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Re: [PATCH v3 02/13] s390x/tcg: fix ignoring bit 63 when setting the sto

From: Thomas Huth
Subject: Re: [PATCH v3 02/13] s390x/tcg: fix ignoring bit 63 when setting the storage key in SSKE
Date: Mon, 6 Sep 2021 11:57:25 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.12.0

On 03/09/2021 17.55, David Hildenbrand wrote:
Right now we could set an 8-bit storage key via SSKE and retrieve it
again via ISKE, which is against the architecture description:

The new seven-bit storage-key value, or selected bits
thereof, is obtained from bit positions 56-62 of gen-
eral register R 1 . The contents of bit positions 0-55
and 63 of the register are ignored.

The seven-bit storage key is inserted in bit positions
56-62 of general register R 1 , and bit 63 is set to zero.

Let's properly ignore bit 63 to create the correct seven-bit storage key.

Signed-off-by: David Hildenbrand <david@redhat.com>
  target/s390x/tcg/mem_helper.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c
index e0befd0f03..3c0820dd74 100644
--- a/target/s390x/tcg/mem_helper.c
+++ b/target/s390x/tcg/mem_helper.c
@@ -2210,7 +2210,7 @@ void HELPER(sske)(CPUS390XState *env, uint64_t r1, 
uint64_t r2)
          skeyclass = S390_SKEYS_GET_CLASS(ss);
- key = (uint8_t) r1;
+    key = r1 & 0xfe;
      skeyclass->set_skeys(ss, addr / TARGET_PAGE_SIZE, 1, &key);
      * As we can only flush by virtual address and not all the entries

Reviewed-by: Thomas Huth <thuth@redhat.com>

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