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[Qemu-trivial] [PATCH v11 6/6] trace: [trivial] Statically enable all gu
From: |
Lluís Vilanova |
Subject: |
[Qemu-trivial] [PATCH v11 6/6] trace: [trivial] Statically enable all guest events |
Date: |
Tue, 4 Jul 2017 10:54:52 +0200 |
User-agent: |
StGit/0.17.1-dirty |
The existing optimizations makes it feasible to have them available on all
builds.
Some quick'n'dirty numbers with 400.perlbench (SPECcpu2006) on the train input
(medium size - suns.pl) and the guest_mem_before event:
* vanilla, statically disabled
real 0m2,259s
user 0m2,252s
sys 0m0,004s
* vanilla, statically enabled (overhead: 2.18x)
real 0m4,921s
user 0m4,912s
sys 0m0,008s
* multi-tb, statically disabled (overhead: 0.99x) [within noise range]
real 0m2,228s
user 0m2,216s
sys 0m0,008s
* multi-tb, statically enabled (overhead: 0.99x) [within noise range]
real 0m2,229s
user 0m2,224s
sys 0m0,004s
Now enabling all events when booting an ARM system that immediately shuts down
(https://lists.gnu.org/archive/html/qemu-devel/2017-06/msg04085.html):
* vanilla, statically disabled
real 0m32,153s
user 0m31,276s
sys 0m0,108s
* vanilla, statically enabled (overhead: 1.35x)
real 0m43,507s
user 0m42,680s
sys 0m0,168s
* multi-tb, statically disabled (overhead: 1.03x)
real 0m32,993s
user 0m32,516s
sys 0m0,104s
* multi-tb, statically enabled (overhead: 1.00x) [within noise range]
real 0m32,110s
user 0m31,176s
sys 0m0,156s
And finally enabling all events using Emilio's dbt-bench
(where orig == vanilla, new == multi-tb):
NBench score; higher is
better
180
+-+--------+----------+----------+---------+----------+----------+----------+----------+----------+---------+----------+--------+-+
|
|
| *** $$$$%%
orig |
160
+-+....................................*.*.$..$.%............................................................orig-enabled
+-+
| * * $ $ %
new |
140
+-+....................................*.*.$..$.%............................................................new-disabled.......+-+
| * * $ $ %
|
| * * $ $ %
|
120
+-+....................................*.*.$..$.%...............................................................................+-+
| * * $ $ %
|
| * * $ $ %
|
100
+-+....................................*.*.$..$.%.....$$$%%%....................................................................+-+
| * * $ $ % *** $ $ % *** $$$%%
|
80
+-+....................................*.*.$..$.%.*.*.$.$..%.*.*.$.$.%..........................................................+-+
| * * $ $ % * * $ $ % * * $ $ %
|
| * * $ $ % * * $ $ % * * $ $ %
|
60
+-+.........................***..$$$%%.*.*##..$.%.*.*.$.$..%.*.*.$.$.%..***.$$$%%...............................................+-+
| **** $$$%% * * $ $ % * * # $ % * *## $ % * * $ $ % *
* $ $ % |
| * * $ $ % * * $ $ % * * # $ % * * # $ % * *## $ % *
* $ $ % |
40
+-+..............*..*.$.$.%.*.*..$.$.%.*.*.#..$.%.*.*.#.$..%.*.*.#.$.%..*.*.$.$.%...............................................+-+
| * * $ $ % * * $ $ % * * # $ % * * # $ % * * # $ % *
*## $ % *** $$$%%% |
20
+-+....***.$$$%%.*..*##.$.%.*.*###.$.%.*.*.#..$.%.*.*.#.$..%.*.*.#.$.%..*.*.#.$.%..................................*.*.$.$..%...+-+
| * *## $ % * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % *
* # $ % * *## $ % |
| * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % *
* # $ % ***###$$%% ***##$$$%% * * # $ % |
0
+-+----***##$$%%-****##$$%%-***###$$%%-***##$$$%%-***##$$%%%-***##$$%%--***##$$%%-****##$$%%-***###$$%%-***##$$$%%-***##$$%%%---+-+
NUMERIC SORTSTRING SORT BITFIEFP EMULATION ASSIGNMENT IDEA
HUFFMAN FOURIER NEURLU DECOMPOSITION gmean
png: http://imgur.com/a/8XG5S
Signed-off-by: Lluís Vilanova <address@hidden>
Reviewed-by: Emilio G. Cota <address@hidden>
---
trace-events | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/trace-events b/trace-events
index bae63fdb1d..f9dbd7f509 100644
--- a/trace-events
+++ b/trace-events
@@ -106,7 +106,7 @@ vcpu guest_cpu_reset(void)
#
# Mode: user, softmmu
# Targets: TCG(all)
-disable vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d",
"vaddr=0x%016"PRIx64" info=%d"
+vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info) "info=%d",
"vaddr=0x%016"PRIx64" info=%d"
# @num: System call number.
# @arg*: System call argument value.
@@ -115,7 +115,7 @@ disable vcpu tcg guest_mem_before(TCGv vaddr, uint8_t info)
"info=%d", "vaddr=0x
#
# Mode: user
# Targets: TCG(all)
-disable vcpu guest_user_syscall(uint64_t num, uint64_t arg1, uint64_t arg2,
uint64_t arg3, uint64_t arg4, uint64_t arg5, uint64_t arg6, uint64_t arg7,
uint64_t arg8) "num=0x%016"PRIx64" arg1=0x%016"PRIx64" arg2=0x%016"PRIx64"
arg3=0x%016"PRIx64" arg4=0x%016"PRIx64" arg5=0x%016"PRIx64" arg6=0x%016"PRIx64"
arg7=0x%016"PRIx64" arg8=0x%016"PRIx64
+vcpu guest_user_syscall(uint64_t num, uint64_t arg1, uint64_t arg2, uint64_t
arg3, uint64_t arg4, uint64_t arg5, uint64_t arg6, uint64_t arg7, uint64_t
arg8) "num=0x%016"PRIx64" arg1=0x%016"PRIx64" arg2=0x%016"PRIx64"
arg3=0x%016"PRIx64" arg4=0x%016"PRIx64" arg5=0x%016"PRIx64" arg6=0x%016"PRIx64"
arg7=0x%016"PRIx64" arg8=0x%016"PRIx64
# @num: System call number.
# @ret: System call result value.
@@ -124,4 +124,4 @@ disable vcpu guest_user_syscall(uint64_t num, uint64_t
arg1, uint64_t arg2, uint
#
# Mode: user
# Targets: TCG(all)
-disable vcpu guest_user_syscall_ret(uint64_t num, uint64_t ret)
"num=0x%016"PRIx64" ret=0x%016"PRIx64
+vcpu guest_user_syscall_ret(uint64_t num, uint64_t ret) "num=0x%016"PRIx64"
ret=0x%016"PRIx64
- [Qemu-trivial] [PATCH v11 6/6] trace: [trivial] Statically enable all guest events,
Lluís Vilanova <=