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Re: [PATCH-for-5.1 v3] hw/misc/aspeed_sdmc: Fix incorrect memory size
From: |
Peter Maydell |
Subject: |
Re: [PATCH-for-5.1 v3] hw/misc/aspeed_sdmc: Fix incorrect memory size |
Date: |
Fri, 24 Jul 2020 14:19:45 +0100 |
On Tue, 21 Jul 2020 at 13:42, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
>
> The SDRAM Memory Controller has a 32-bit address bus, thus
> supports up to 4 GiB of DRAM. There is a signed to unsigned
> conversion error with the AST2600 maximum memory size:
>
> (uint64_t)(2048 << 20) = (uint64_t)(-2147483648)
> = 0xffffffff40000000
> = 16 EiB - 2 GiB
>
> Fix by using the IEC suffixes which are usually safer, and add
> an assertion check to verify the memory is valid. This would have
> caught this bug:
>
> $ qemu-system-arm -M ast2600-evb
> qemu-system-arm: hw/misc/aspeed_sdmc.c:258: aspeed_sdmc_realize: Assertion
> `asc->max_ram_size < 4 * GiB' failed.
> Aborted (core dumped)
>
> Fixes: 1550d72679 ("aspeed/sdmc: Add AST2600 support")
> Reviewed-by: Cédric Le Goater <clg@kaod.org>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> --
Applied to target-arm.next, thanks.
-- PMM