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Re: [Simulavr-devel] simulavrxx timers

From: Klaus Rudolph
Subject: Re: [Simulavr-devel] simulavrxx timers
Date: Fri, 30 May 2008 07:51:51 +0200
User-agent: Thunderbird (Windows/20080421)

Michael Hennebry schrieb:
In HWMegaTimer0::CpuCycle(),
there is an 8-case switch (tccr) statement.
Its cases are the possible clock select values.
Is that correct?
tccr contains more than the CS bits,

Right! Rest of bits will compared in TimerCompareAfterCount();

Also, the return value is always 0.
Does that indicate success, 0 nanoseconds or something else?

Look at avrdevice.cpp:
   for (ii=hwCycleList.begin(); ii!=end; ii++) {
        if (((*ii)->CpuCycle())>0) hwWait=1;

    if (cpuCycles<=0) {

        if (hwWait!=0) {
            if(trace_on)traceOut << "CPU-Hold by IO-Hardware ";

as you can see, hardware is able to stop the cpu core in some cases. The interface of CpuCycle is allways the same and the timers are never hold the core itself.

The EEprom is using this feature:
    if (cpuHoldCycles>0) return 1;  //let the cpu sleep a cycle
    return 0;                       //let the cpu continue

Hope this helps


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