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[Tinycc-devel] tcc 0.9.23 shift generation bug


From: Michael Somos
Subject: [Tinycc-devel] tcc 0.9.23 shift generation bug
Date: Mon, 20 Jun 2005 06:44:43 -0400

There is a bug in shift generation. Notice the "1UL". If it is just "1"
instead, the code is "sar" as expected. Here is script showing difference :

==============================================================================
? gcc -o g -c a.c ; tcc -o t -c a.c ; objdump -d g t ; tcc -v ; cat a.c

g:     file format elf32-i386

Disassembly of section .text:

00000000 <main>:
   0:   55                      push   %ebp
   1:   89 e5                   mov    %esp,%ebp
   3:   83 ec 08                sub    $0x8,%esp
   6:   83 e4 f0                and    $0xfffffff0,%esp
   9:   a1 00 00 00 00          mov    0x0,%eax
   e:   d1 f8                   sar    %eax
  10:   89 ec                   mov    %ebp,%esp
  12:   5d                      pop    %ebp
  13:   c3                      ret
  14:   8d b6 00 00 00 00       lea    0x0(%esi),%esi
  1a:   8d bf 00 00 00 00       lea    0x0(%edi),%edi

t:     file format elf32-i386

Disassembly of section .text:

00000000 <main>:
   0:   55                      push   %ebp
   1:   89 e5                   mov    %esp,%ebp
   3:   81 ec 00 00 00 00       sub    $0x0,%esp
   9:   8b 05 00 00 00 00       mov    0x0,%eax
   f:   c1 e8 01                shr    $0x1,%eax
  12:   e9 00 00 00 00          jmp    17 <main+0x17>
  17:   c9                      leave
  18:   c3                      ret
tcc version 0.9.23
int i;
int main(void){ return i >> 1UL ; }
==============================================================================




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