diff --git a/Changelog b/Changelog index 8264d1d..5d15412 100644 --- a/Changelog +++ b/Changelog @@ -16,14 +16,14 @@ Platforms: - vastly improved support for ARM hard float calling convention (Thomas Preud'homme, Daniel Glöckner) - provide a runtime library for ARM (Thomas Preud'homme) -- many x86-64 ABI fixes incl. XMM register passing and tests (James Lyon) +- many x86_64 ABI fixes incl. XMM register passing and tests (James Lyon) - ABI tests with native compiler using libtcc (James Lyon) - UNICODE startup code supports wmain and wWinMain (YX Hao) Features: - VLA (variable length array) improved (James Lyon, Pip Cet) - import functions by ordinal in .def files on windows (YX Hao) -- x86/x86-64 assembler much improved (Michael Matz) +- x86/x86_64 assembler much improved (Michael Matz) - simple dead code suppression (Edmund Grimley Evans, Michael Matz, grischka) - implement round/fmin/fmax etc. math on windows (Avi Halachmi) - #pragma once support (Sergey Korshunoff, Vlad Vissoultchev, ...) @@ -43,8 +43,8 @@ User interface: - new LIBTCCAPI tcc_set_options() (grischka) Platforms: -- Many improvements for x86-64 target (Shinichiro Hamaji, Michael Matz, grischka) -- x86-64 assembler (Frederic Feret) +- Many improvements for x86_64 target (Shinichiro Hamaji, Michael Matz, grischka) +- x86_64 assembler (Frederic Feret) - Many improvements for ARM target (Daniel Glöckner, Thomas Preud'homme) - Support WinCE PE ARM (Timo VJ Lahde) - Support ARM hardfloat calling convention (Thomas Preud'homme) @@ -63,7 +63,7 @@ Features: version 0.9.25: -- first support for x86-64 target (Shinichiro Hamaji) +- first support for x86_64 target (Shinichiro Hamaji) - support µClibc - split tcc.c into tcc.h libtcc.c tccpp.c tccgen.c tcc.c - improved preprocess output with linenumbers and spaces preserved diff --git a/Makefile b/Makefile index f9008ff..00d17bb 100644 --- a/Makefile +++ b/Makefile @@ -56,7 +56,7 @@ LDFLAGS_P = $(LDFLAGS) CONFIG_$(ARCH) = yes NATIVE_DEFINES_$(CONFIG_i386) += -DTCC_TARGET_I386 -NATIVE_DEFINES_$(CONFIG_x86-64) += -DTCC_TARGET_X86_64 +NATIVE_DEFINES_$(CONFIG_x86_64) += -DTCC_TARGET_X86_64 NATIVE_DEFINES_$(CONFIG_WIN32) += -DTCC_TARGET_PE NATIVE_DEFINES_$(CONFIG_uClibc) += -DTCC_UCLIBC NATIVE_DEFINES_$(CONFIG_arm) += -DTCC_TARGET_ARM @@ -95,7 +95,7 @@ ARM64_FILES = $(CORE_FILES) arm64-gen.c arm64-link.c C67_FILES = $(CORE_FILES) c67-gen.c c67-link.c tcccoff.c ifdef CONFIG_WIN32 - ifeq ($(ARCH),x86-64) + ifeq ($(ARCH),x86_64) NATIVE_FILES=$(WIN64_FILES) PROGS_CROSS=$(WIN32_CROSS) $(X64_CROSS) $(ARM_CROSS) $(ARM64_CROSS) $(C67_CROSS) $(WINCE_CROSS) LIBTCC1_CROSS=lib/i386-win32/libtcc1.a @@ -110,7 +110,7 @@ NATIVE_FILES=$(I386_FILES) PROGS_CROSS=$(X64_CROSS) $(WIN32_CROSS) $(WIN64_CROSS) $(ARM_CROSS) $(ARM64_CROSS) $(C67_CROSS) $(WINCE_CROSS) LIBTCC1_CROSS=lib/i386-win32/libtcc1.a lib/x86_64-win32/libtcc1.a -else ifeq ($(ARCH),x86-64) +else ifeq ($(ARCH),x86_64) NATIVE_FILES=$(X86_64_FILES) PROGS_CROSS=$(I386_CROSS) $(WIN32_CROSS) $(WIN64_CROSS) $(ARM_CROSS) $(ARM64_CROSS) $(C67_CROSS) $(WINCE_CROSS) LIBTCC1_CROSS=lib/i386-win32/libtcc1.a lib/x86_64-win32/libtcc1.a diff --git a/configure b/configure index 3799805..d8980dc 100755 --- a/configure +++ b/configure @@ -164,7 +164,7 @@ case "$cpu" in cpu="x86" ;; x86_64|amd64) - cpu="x86-64" + cpu="x86_64" ;; arm*) case "$cpu" in @@ -332,7 +332,7 @@ if test -z "$cross_prefix" ; then fi if test -z "$triplet"; then - if test $cpu = "x86-64" -o $cpu = "aarch64" ; then + if test $cpu = "x86_64" -o $cpu = "aarch64" ; then if test -f "/usr/lib64/crti.o" ; then tcc_lddir="lib64" fi @@ -453,8 +453,8 @@ echo "#define GCC_MINOR $gcc_minor" >> $TMPH if test "$cpu" = "x86" ; then echo "ARCH=i386" >> config.mak -elif test "$cpu" = "x86-64" ; then - echo "ARCH=x86-64" >> config.mak +elif test "$cpu" = "x86_64" ; then + echo "ARCH=x86_64" >> config.mak elif test "$cpu" = "armv4l" ; then echo "ARCH=arm" >> config.mak echo "#define TCC_ARM_VERSION $cpuver" >> $TMPH diff --git a/elf.h b/elf.h index d761747..947281d 100644 --- a/elf.h +++ b/elf.h @@ -227,7 +227,7 @@ typedef struct #define EM_ME16 59 /* Toyota ME16 processor */ #define EM_ST100 60 /* STMicroelectronic ST100 processor */ #define EM_TINYJ 61 /* Advanced Logic Corp. Tinyj emb.fam*/ -#define EM_X86_64 62 /* AMD x86-64 architecture */ +#define EM_X86_64 62 /* AMD x86_64 architecture */ #define EM_PDSP 63 /* Sony DSP Processor */ #define EM_FX66 66 /* Siemens FX66 microcontroller */ @@ -2851,7 +2851,7 @@ typedef Elf32_Addr Elf32_Conflict; #define R_CRIS_NUM 20 -/* AMD x86-64 relocations. */ +/* AMD x86_64 relocations. */ #define R_X86_64_NONE 0 /* No reloc */ #define R_X86_64_64 1 /* Direct 64 bit */ #define R_X86_64_PC32 2 /* PC relative 32 bit signed */ diff --git a/lib/Makefile b/lib/Makefile index 85dc5cf..3ca3231 100644 --- a/lib/Makefile +++ b/lib/Makefile @@ -9,14 +9,14 @@ VPATH = $(TOPSRC)/lib $(TOPSRC)/win32/lib ifndef TARGET # we're building the native libtcc1.a ifdef CONFIG_WIN32 - ifeq ($(ARCH),x86-64) + ifeq ($(ARCH),x86_64) TARGET = x86_64-win32 else TARGET = i386-win32 endif else ifeq ($(ARCH),i386) TARGET = i386 - else ifeq ($(ARCH),x86-64) + else ifeq ($(ARCH),x86_64) TARGET = x86_64 else ifeq ($(ARCH),arm) TARGET = arm diff --git a/tcc-doc.texi b/tcc-doc.texi index a1c6761..c1396ba 100644 --- a/tcc-doc.texi +++ b/tcc-doc.texi @@ -387,10 +387,10 @@ gcc's algorithm. Select the float ABI. Possible values: @code{softfp} and @code{hard} @item -mno-sse -Do not use sse registers on x86-64 +Do not use sse registers on x86_64 @item -m32, -m64 -Pass command line to the i386/x86-64 cross compiler. +Pass command line to the i386/x86_64 cross compiler. @end table diff --git a/tcc.h b/tcc.h index 0e22e68..4913018 100644 --- a/tcc.h +++ b/tcc.h @@ -125,7 +125,7 @@ /* #define TCC_TARGET_ARM *//* ARMv4 code generator */ /* #define TCC_TARGET_ARM64 *//* ARMv8 code generator */ /* #define TCC_TARGET_C67 *//* TMS320C67xx code generator */ -/* #define TCC_TARGET_X86_64 *//* x86-64 code generator */ +/* #define TCC_TARGET_X86_64 *//* x86_64 code generator */ /* default target is I386 */ #if !defined(TCC_TARGET_I386) && !defined(TCC_TARGET_ARM) && \ @@ -821,8 +821,8 @@ struct filespec { #define VT_LLONG 12 /* 64 bit integer */ #define VT_LONG 13 /* long integer (NEVER USED as type, only during parsing) */ -#define VT_QLONG 14 /* 128-bit integer. Only used for x86-64 ABI */ -#define VT_QFLOAT 15 /* 128-bit float. Only used for x86-64 ABI */ +#define VT_QLONG 14 /* 128-bit integer. Only used for x86_64 ABI */ +#define VT_QFLOAT 15 /* 128-bit float. Only used for x86_64 ABI */ #define VT_UNSIGNED 0x0010 /* unsigned type */ #define VT_ARRAY 0x0020 /* array type (also has VT_PTR) */ #define VT_BITFIELD 0x0040 /* bitfield modifier */ diff --git a/tccgen.c b/tccgen.c index 1919c3c..76a83e1 100644 --- a/tccgen.c +++ b/tccgen.c @@ -2982,7 +2982,7 @@ ST_FUNC void vstore(void) load(t, &sv); vtop[-1].r = t | VT_LVAL; } - /* two word case handling : store second register at word + 4 (or +8 for x86-64) */ + /* two word case handling : store second register at word + 4 (or +8 for x86_64) */ #if defined(TCC_TARGET_ARM64) || defined(TCC_TARGET_X86_64) if (((ft & VT_BTYPE) == VT_QLONG) || ((ft & VT_BTYPE) == VT_QFLOAT)) { int addr_type = VT_LLONG, load_size = 8, load_type = ((vtop->type.t & VT_BTYPE) == VT_QLONG) ? VT_LLONG : VT_DOUBLE; diff --git a/tests/Makefile b/tests/Makefile index dbd035f..558d06c 100644 --- a/tests/Makefile +++ b/tests/Makefile @@ -36,13 +36,13 @@ endif ifeq ($(TARGETOS),Darwin) TESTS := $(filter-out hello-exe test3 $(BTESTS),$(TESTS)) endif -ifeq (,$(filter arm64 i386 x86-64,$(ARCH))) +ifeq (,$(filter arm64 i386 x86_64,$(ARCH))) TESTS := $(filter-out vla_test-run,$(TESTS)) endif ifeq ($(CONFIG_arm_eabi),yes) TESTS := $(filter-out test3,$(TESTS)) endif -ifeq (,$(filter i386 x86-64,$(ARCH))) +ifeq (,$(filter i386 x86_64,$(ARCH))) TESTS := $(filter-out dlltest,$(TESTS)) endif diff --git a/tests/abitest.c b/tests/abitest.c index 896e97b..c852f4f 100644 --- a/tests/abitest.c +++ b/tests/abitest.c @@ -90,7 +90,7 @@ RET_PRIMITIVE_TEST(longdouble, LONG_DOUBLE, LONG_DOUBLE_LITERAL(378943892.0)) /* * ret_2float_test: * - * On x86-64, a struct with 2 floats should be packed into a single + * On x86_64, a struct with 2 floats should be packed into a single * SSE register (VT_DOUBLE is used for this purpose). */ typedef struct ret_2float_test_type_s {float x, y;} ret_2float_test_type; @@ -118,7 +118,7 @@ static int ret_2float_test(void) { /* * ret_2double_test: * - * On x86-64, a struct with 2 doubles should be passed in two SSE + * On x86_64, a struct with 2 doubles should be passed in two SSE * registers. */ typedef struct ret_2double_test_type_s {double x, y;} ret_2double_test_type; @@ -179,7 +179,7 @@ static int ret_8plus2double_test(void) { /* * ret_mixed_test: * - * On x86-64, a struct with a double and a 64-bit integer should be + * On x86_64, a struct with a double and a 64-bit integer should be * passed in one SSE register and one integer register. */ typedef struct ret_mixed_test_type_s {double x; long long y;} ret_mixed_test_type; @@ -207,7 +207,7 @@ static int ret_mixed_test(void) { /* * ret_mixed2_test: * - * On x86-64, a struct with two floats and two 32-bit integers should + * On x86_64, a struct with two floats and two 32-bit integers should * be passed in one SSE register and one integer register. */ typedef struct ret_mixed2_test_type_s {float x,x2; int y,y2;} ret_mixed2_test_type; @@ -235,7 +235,7 @@ static int ret_mixed2_test(void) { /* * ret_mixed3_test: * - * On x86-64, this struct should be passed in two integer registers. + * On x86_64, this struct should be passed in two integer registers. */ typedef struct ret_mixed3_test_type_s {float x; int y; float x2; int y2;} ret_mixed3_test_type; typedef ret_mixed3_test_type (*ret_mixed3_test_function_type) (ret_mixed3_test_type); @@ -287,7 +287,7 @@ static int reg_pack_test(void) { /* * reg_pack_longlong_test: return a small struct which should be packed into - * registers (x86-64) during return. + * registers (x86_64) during return. */ typedef struct reg_pack_longlong_test_type_s {long long x, y;} reg_pack_longlong_test_type; typedef reg_pack_longlong_test_type (*reg_pack_longlong_test_function_type) (reg_pack_longlong_test_type); @@ -372,7 +372,7 @@ static int sret_test(void) { /* * one_member_union_test: * - * In the x86-64 ABI a union should always be passed on the stack. However + * In the x86_64 ABI a union should always be passed on the stack. However * it appears that a single member union is treated by GCC as its member. */ typedef union one_member_union_test_type_u {int x;} one_member_union_test_type; @@ -400,7 +400,7 @@ static int one_member_union_test(void) { /* * two_member_union_test: * - * In the x86-64 ABI a union should always be passed on the stack. + * In the x86_64 ABI a union should always be passed on the stack. */ typedef union two_member_union_test_type_u {int x; long y;} two_member_union_test_type; typedef two_member_union_test_type (*two_member_union_test_function_type) (two_member_union_test_type); @@ -587,7 +587,7 @@ static int stdarg_struct_test(void) { return run_callback(src, stdarg_struct_test_callback); } -/* Test that x86-64 arranges the stack correctly for arguments with alignment >8 bytes */ +/* Test that x86_64 arranges the stack correctly for arguments with alignment >8 bytes */ typedef LONG_DOUBLE (*arg_align_test_callback_type) (LONG_DOUBLE,int,LONG_DOUBLE,int,LONG_DOUBLE); diff --git a/tests/tcctest.c b/tests/tcctest.c index 988b212..c7b999f 100644 --- a/tests/tcctest.c +++ b/tests/tcctest.c @@ -3204,7 +3204,7 @@ void test_high_clobbers(void) register long val asm("r12"); long val2; /* This tests if asm clobbers correctly save/restore callee saved - registers if they are clobbered and if it's the high 8 x86-64 + registers if they are clobbered and if it's the high 8 x86_64 registers. This is fragile for GCC as the constraints do not correctly capture the data flow, but good enough for us. */ asm volatile("mov $0x4542, %%r12" : "=r" (val):: "memory"); @@ -3644,10 +3644,10 @@ void callsave_test(void) printf ("callsavetest: %d\n", s); d = alloca (sizeof(double)); d[0] = 10.0; - /* x86-64 had a bug were the next call to get100 would evict + /* x86_64 had a bug were the next call to get100 would evict the lvalue &d[0] as VT_LLOCAL, and the reload would be done in int type, not pointer type. When alloca returns a pointer - with the high 32 bit set (which is likely on x86-64) the access + with the high 32 bit set (which is likely on x86_64) the access generates a segfault. */ i = d[0] > get100 (); printf ("%d\n", i); diff --git a/tests/tests2/Makefile b/tests/tests2/Makefile index ef82d2a..52f590f 100644 --- a/tests/tests2/Makefile +++ b/tests/tests2/Makefile @@ -22,10 +22,10 @@ endif ifeq ($(TARGETOS),Darwin) SKIP += 40_stdio.test endif -ifeq ($(ARCH),x86-64) +ifeq ($(ARCH),x86_64) SKIP += 73_arm64.test endif -ifeq (,$(filter i386 x86-64,$(ARCH))) +ifeq (,$(filter i386 x86_64,$(ARCH))) SKIP += 85_asm-outside-function.test endif diff --git a/win32/Makefile b/win32/Makefile index 19c9ee4..7b864de 100644 --- a/win32/Makefile +++ b/win32/Makefile @@ -24,7 +24,7 @@ TARGET = $(CPU) ifeq ($(TARGET), 64) TFLAGS = -m$(TARGET) -DTCC_TARGET_X86_64 TARCH = x86_64 -CARCH = x86-64 +CARCH = x86_64 else TFLAGS = -m$(TARGET) -DTCC_TARGET_I386 TARCH = i386 diff --git a/x86_64-gen.c b/x86_64-gen.c index 9f19e78..2bc6875 100644 --- a/x86_64-gen.c +++ b/x86_64-gen.c @@ -1,5 +1,5 @@ /* - * x86-64 code generator for TCC + * x86_64 code generator for TCC * * Copyright (c) 2008 Shinichiro Hamaji * @@ -752,7 +752,7 @@ void gen_offs_sp(int b, int r, int d) ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align, int *regsize) { int size, align; - *ret_align = 1; // Never have to re-align return values for x86-64 + *ret_align = 1; // Never have to re-align return values for x86_64 *regsize = 8; size = type_size(vt, &align); if (size > 8 || (size & (size - 1))) @@ -1172,7 +1172,7 @@ ST_FUNC int classify_x86_64_va_arg(CType *ty) ST_FUNC int gfunc_sret(CType *vt, int variadic, CType *ret, int *ret_align, int *regsize) { int size, align, reg_count; - *ret_align = 1; // Never have to re-align return values for x86-64 + *ret_align = 1; // Never have to re-align return values for x86_64 *regsize = 8; return (classify_x86_64_arg(vt, ret, &size, &align, ®_count) != x86_64_mode_memory); } @@ -2300,7 +2300,7 @@ ST_FUNC void gen_vla_alloc(CType *type, int align) { } -/* end of x86-64 code generator */ +/* end of x86_64 code generator */ /*************************************************************/ #endif /* ! TARGET_DEFS_ONLY */ /******************************************************/ diff --git a/x86_64-link.c b/x86_64-link.c index 27cad93..5712b94 100644 --- a/x86_64-link.c +++ b/x86_64-link.c @@ -119,7 +119,7 @@ ST_FUNC unsigned create_plt_entry(TCCState *s1, unsigned got_offset, struct sym_ p[1] = modrm; write32le(p + 2, got_offset); p[6] = 0x68; /* push $xxx */ - /* On x86-64, the relocation is referred to by _index_ */ + /* On x86_64, the relocation is referred to by _index_ */ write32le(p + 7, relofs / sizeof (ElfW_Rel)); p[11] = 0xe9; /* jmp plt_start */ write32le(p + 12, -(plt->data_offset));