From MAILER-DAEMON Tue Mar 02 10:17:56 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lH6ma-0003Rh-0s for mharc-qemu-commits@gnu.org; Tue, 02 Mar 2021 10:17:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:48174) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH6mV-0003QJ-TP for qemu-commits@nongnu.org; Tue, 02 Mar 2021 10:17:54 -0500 Received: from out-17.smtp.github.com ([192.30.252.200]:36673 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH6mS-0007le-DI for qemu-commits@nongnu.org; Tue, 02 Mar 2021 10:17:51 -0500 Received: from github.com (hubbernetes-node-90394c5.va3-iad.github.net [10.48.109.29]) by smtp.github.com (Postfix) with ESMTPA id 9389F5C08A0 for ; Tue, 2 Mar 2021 07:17:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614698267; bh=spuhVLluMDPIDqN4tzWiUuXLtV97DcBmmgKRlC442mU=; h=Date:From:To:Subject:From; b=aC2ZGaLct4VqkrgWozn42cM4LUNWzCOMLRJQHmWXP0VgnF0tXnp07uX3wXf/QP5Dv 6IBrRxQdzAyvTK6YVTODcmsGVISxeW/MsJVnnbwkRk3mL+cxYqzrWzVFOfjZjmpbFx JUjE9RyVTv9+VIIeacehzExtXDZV1Ml9t9eTpwGM= Date: Tue, 02 Mar 2021 07:17:47 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 49e856: meson.build: expose TCG cross compiler information... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Mar 2021 15:17:54 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 49e8565b3df3f43aae57a3850e1b4cd176ef6582=0D https://github.com/qemu/qemu/commit/49e8565b3df3f43aae57a3850e1b4cd= 176ef6582=0D Author: Alex Benn=C3=A9e =0D Date: 2021-02-24 (Wed, 24 Feb 2021)=0D =0D Changed paths:=0D M meson.build=0D M tests/tcg/configure.sh=0D =0D Log Message:=0D -----------=0D meson.build: expose TCG cross compiler information in summary=0D =0D Blink and you miss the cross TCG compiler stuff so lets display it=0D with the rest of the compiler information.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222101455.12640-2-alex.bennee@linaro.org>=0D =0D =0D Commit: 9d66a0eada1cf558cc7fabe1e86131ea68ea7192=0D https://github.com/qemu/qemu/commit/9d66a0eada1cf558cc7fabe1e86131e= a68ea7192=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-02-24 (Wed, 24 Feb 2021)=0D =0D Changed paths:=0D M tests/docker/dockerfiles/fedora-cris-cross.docker=0D M tests/docker/dockerfiles/fedora-i386-cross.docker=0D M tests/docker/dockerfiles/fedora-win32-cross.docker=0D M tests/docker/dockerfiles/fedora-win64-cross.docker=0D M tests/docker/dockerfiles/fedora.docker=0D =0D Log Message:=0D -----------=0D docker: Bump Fedora images to release 33=0D =0D Fedora 33 was released on October 27, 2020.=0D =0D Update all the Fedora 32 images to this new release.=0D =0D Suggested-by: Daniel Berrang=C3=A9 =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210118181255.314672-1-philmd@redhat.com>=0D Message-Id: <20210222101455.12640-3-alex.bennee@linaro.org>=0D =0D =0D Commit: d98946450d82d2b46c3cc93e22cee2b189f019b0=0D https://github.com/qemu/qemu/commit/d98946450d82d2b46c3cc93e22cee2b= 189f019b0=0D Author: Alex Benn=C3=A9e =0D Date: 2021-02-24 (Wed, 24 Feb 2021)=0D =0D Changed paths:=0D M tests/acceptance/virtio-gpu.py=0D =0D Log Message:=0D -----------=0D tests/acceptance: allow a "graceful" failing for virtio-gpu test=0D =0D This is a band-aid with a TODO for cases when QEMU doesn't start due=0D to missing VirGL. Longer term we could do with some proper feature=0D probing.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210222101455.12640-4-alex.bennee@linaro.org>=0D =0D =0D Commit: 663a041e1dff50eaa66c8d2b01ade1ac8cd65619=0D https://github.com/qemu/qemu/commit/663a041e1dff50eaa66c8d2b01ade1a= c8cd65619=0D Author: Alex Benn=C3=A9e =0D Date: 2021-02-24 (Wed, 24 Feb 2021)=0D =0D Changed paths:=0D M docs/devel/testing.rst=0D =0D Log Message:=0D -----------=0D docs/devel: expand on use of containers to build tests=0D =0D Expand on the usage of containers for building tests and why we have=0D some that are not used to build QEMU itself.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Thomas Huth =0D Cc: Thomas Huth =0D Message-Id: <20210222101455.12640-5-alex.bennee@linaro.org>=0D =0D =0D Commit: 9c1f491e02a64882201d20fa8324884baee91fd8=0D https://github.com/qemu/qemu/commit/9c1f491e02a64882201d20fa8324884= baee91fd8=0D Author: Alex Benn=C3=A9e =0D Date: 2021-02-24 (Wed, 24 Feb 2021)=0D =0D Changed paths:=0D M docs/devel/testing.rst=0D =0D Log Message:=0D -----------=0D docs/devel: update the container based tests=0D =0D This section has grown a little stale so clean-up the language and=0D examples for current usage:=0D =0D - refer to containers at the top=0D - mention podman can also be used=0D - add podman prerequisites section=0D - move to using "docker-help" for online help=0D - mention the registry and it's purpose=0D - don't refer to out-of-date min-glib image=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210222101455.12640-6-alex.bennee@linaro.org>=0D =0D =0D Commit: 4583cdadf807c272fe01501b414c570a527e6f41=0D https://github.com/qemu/qemu/commit/4583cdadf807c272fe01501b414c570= a527e6f41=0D Author: Alex Benn=C3=A9e =0D Date: 2021-02-24 (Wed, 24 Feb 2021)=0D =0D Changed paths:=0D M docs/devel/testing.rst=0D =0D Log Message:=0D -----------=0D docs/devel: add forward reference to check-tcg=0D =0D For completeness reference the check-tcg tests in the container=0D preamble text.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Thomas Huth =0D Cc: Thomas Huth =0D Message-Id: <20210222101455.12640-7-alex.bennee@linaro.org>=0D =0D =0D Commit: 93a11007681a8051c07834c52d785a2948ff9632=0D https://github.com/qemu/qemu/commit/93a11007681a8051c07834c52d785a2= 948ff9632=0D Author: Alex Benn=C3=A9e =0D Date: 2021-02-24 (Wed, 24 Feb 2021)=0D =0D Changed paths:=0D R CODING_STYLE.rst=0D M README.rst=0D M docs/devel/index.rst=0D A docs/devel/style.rst=0D M scripts/fix-multiline-comments.sh=0D =0D Log Message:=0D -----------=0D docs: move CODING_STYLE into the developer documentation=0D =0D There is no particular reason to keep this on it's own in the root of=0D the tree. Move it into the rest of the fine developer manual and fixup=0D= any links to it. The only tweak I've made is to fix the code-block=0D annotations to mention the language C.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Claudio Fontana =0D Message-Id: <20210223095931.16908-1-alex.bennee@linaro.org>=0D =0D =0D Commit: cbcf09872a936ccefef6a34298046d3b9aefc148=0D https://github.com/qemu/qemu/commit/cbcf09872a936ccefef6a34298046d3= b9aefc148=0D Author: Peter Maydell =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D R CODING_STYLE.rst=0D M README.rst=0D M docs/devel/index.rst=0D A docs/devel/style.rst=0D M docs/devel/testing.rst=0D M meson.build=0D M scripts/fix-multiline-comments.sh=0D M tests/acceptance/virtio-gpu.py=0D M tests/docker/dockerfiles/fedora-cris-cross.docker=0D M tests/docker/dockerfiles/fedora-i386-cross.docker=0D M tests/docker/dockerfiles/fedora-win32-cross.docker=0D M tests/docker/dockerfiles/fedora-win64-cross.docker=0D M tests/docker/dockerfiles/fedora.docker=0D M tests/tcg/configure.sh=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-updates= -240221-1' into staging=0D =0D Testing tweaks (build, docs, bumps)=0D =0D - expose cross compiler info in meson pretty print=0D - bump Fedora to 33=0D - "graceful" handling of missing virgl config=0D - updates to the container documentation=0D - move CODING_STYLE.rst into developer manual=0D =0D # gpg: Signature made Wed 24 Feb 2021 11:08:03 GMT=0D # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2= A44=0D # gpg: Good signature from "Alex Benn=C3=A9e (Master Work Key) " [full]=0D # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E = 2A44=0D =0D * remotes/stsquad/tags/pull-testing-updates-240221-1:=0D docs: move CODING_STYLE into the developer documentation=0D docs/devel: add forward reference to check-tcg=0D docs/devel: update the container based tests=0D docs/devel: expand on use of containers to build tests=0D tests/acceptance: allow a "graceful" failing for virtio-gpu test=0D docker: Bump Fedora images to release 33=0D meson.build: expose TCG cross compiler information in summary=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/51db2d7cf26d...cbcf09872a93= =0D From MAILER-DAEMON Tue Mar 02 10:23:32 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lH6s0-0002Xw-Rr for mharc-qemu-commits@gnu.org; Tue, 02 Mar 2021 10:23:32 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49360) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH6s0-0002V1-0r for qemu-commits@nongnu.org; Tue, 02 Mar 2021 10:23:32 -0500 Received: from out-25.smtp.github.com ([192.30.252.208]:44765 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lH6rw-0008Ub-2a for qemu-commits@nongnu.org; Tue, 02 Mar 2021 10:23:31 -0500 Received: from github.com (hubbernetes-node-8f1f80c.ash1-iad.github.net [10.56.122.38]) by smtp.github.com (Postfix) with ESMTPA id 436E88408F3 for ; Tue, 2 Mar 2021 07:23:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614698607; bh=A87snJQ989gDn1vwkfQ0Ne9c/NVdeHvoYfuwJPDOqrM=; h=Date:From:To:Subject:From; b=Tdp4qaiCYt2qJPdTsMRTPzxWqeHzCwayYuxVlaWOQbm5v/0A/5QtQLyG3DeXf0mLj fQeIPhA0iym78i+nJXm3/+nxODTcp5mlaKLWWgxSVFTQOX/rO9Wud5eoPh8uaJRW/b CFOtPPY0LMkjZoyzfeKqablyKiaxcJGF5EXYHkrs= Date: Tue, 02 Mar 2021 07:23:27 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 237377: hvf: Sign the code after installation X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Mar 2021 15:23:32 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 237377ac72b38f030058948f2d744c230b62be40=0D https://github.com/qemu/qemu/commit/237377ac72b38f030058948f2d744c2= 30b62be40=0D Author: Akihiko Odaki =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M meson.build=0D M scripts/entitlement.sh=0D =0D Log Message:=0D -----------=0D hvf: Sign the code after installation=0D =0D Before this change, the code signed during the build was installed=0D directly.=0D =0D However, the signature gets invalidated because meson modifies the code=0D= to fix dynamic library install names during the install process.=0D =0D It also prevents meson to strip the code because the pre-signed file is=0D= not marked as an executable (although it is somehow able to perform the=0D= modification described above).=0D =0D With this change, the unsigned code will be installed and modified by=0D meson first, and a script signs it later.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210225000614.46919-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: efce01bcb6757158358a3f2c1f6756ffab4aa8c0=0D https://github.com/qemu/qemu/commit/efce01bcb6757158358a3f2c1f6756f= fab4aa8c0=0D Author: Alexander Bulekov =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M configure=0D =0D Log Message:=0D -----------=0D configure: fix --enable-fuzzing linker failures=0D =0D With --enable-fuzzing, QEMU_CFLAGS include -fsanitize=3Dfuzzer-no-link.=0D= This should allow us to build non-fuzzer binaries using objects=0D instrumented for fuzzing. However, to do that, we also need to link with=0D= -fsanitize=3Dfuzzer-no-link. We were not doing that.=0D =0D Reported-by: Li Qiang ,=0D Signed-off-by: Alexander Bulekov =0D Message-Id: <20210221174510.22542-1-alxndr@bu.edu>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 106ad1f9c513f48b046e07e45406c339d16e4e2f=0D https://github.com/qemu/qemu/commit/106ad1f9c513f48b046e07e45406c33= 9d16e4e2f=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M configure=0D M meson.build=0D M meson_options.txt=0D =0D Log Message:=0D -----------=0D multiprocess: move feature to meson_options.txt=0D =0D While at it, improve the description of the feature in the summary and=0D= help message.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: c9b6609b69facad0cc5425d4fa7934c33d7f2e91=0D https://github.com/qemu/qemu/commit/c9b6609b69facad0cc5425d4fa7934c= 33d7f2e91=0D Author: Hannes Reinecke =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D M hw/scsi/scsi-generic.c=0D M include/hw/scsi/scsi.h=0D =0D Log Message:=0D -----------=0D scsi: make io_timeout configurable=0D =0D The current code sets an infinite timeout on SG_IO requests,=0D causing the guest to stall if the host experiences a frame=0D loss.=0D This patch adds an 'io_timeout' parameter for SCSIDevice to=0D make the SG_IO timeout configurable, and also shortens the=0D default timeout to 30 seconds to avoid infinite stalls.=0D =0D Signed-off-by: Hannes Reinecke =0D Message-Id: <20201116183114.55703-3-hare@suse.de>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: b2d50a3343d939a603df4436ccc41b4cf8223f88=0D https://github.com/qemu/qemu/commit/b2d50a3343d939a603df4436ccc41b4= cf8223f88=0D Author: Hannes Reinecke =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D M hw/scsi/scsi-generic.c=0D M hw/scsi/trace-events=0D =0D Log Message:=0D -----------=0D scsi: add tracing for SG_IO commands=0D =0D Add tracepoints for SG_IO commands to allow for debugging=0D of SG_IO commands.=0D =0D Signed-off-by: Hannes Reinecke =0D Message-Id: <20201116183114.55703-4-hare@suse.de>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 166854f7cd91d7cff23298180585209ea9d501d4=0D https://github.com/qemu/qemu/commit/166854f7cd91d7cff23298180585209= ea9d501d4=0D Author: Zihao Chang =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-generic.c=0D =0D Log Message:=0D -----------=0D scsi: allow user to set werror as report=0D =0D 'enospc' is the default for -drive, but qemu allows user to set=0D drive option werror. If werror of scsi-generic is set to 'report'=0D by user, qemu will not allow vm to start.=0D =0D This patch allow user to set werror as 'report' for scsi-generic.=0D =0D Signed-off-by: Zihao Chang =0D Reviewed-by: Fam Zheng =0D Message-Id: <20201103061240.1364-1-changzihao1@huawei.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 6f1a5c37db5a6fc7c5c44b3e45cee6e33df31e9d=0D https://github.com/qemu/qemu/commit/6f1a5c37db5a6fc7c5c44b3e45cee6e= 33df31e9d=0D Author: Maxim Levitsky =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/virtio-scsi-dataplane.c=0D =0D Log Message:=0D -----------=0D virtio-scsi: don't process IO on fenced dataplane=0D =0D If virtio_scsi_dataplane_start fails, there is a small window when it dro= ps the=0D aio lock (in aio_wait_bh_oneshot) and the dataplane's AIO handler can=0D still run during that window.=0D =0D This is done after the dataplane was marked as fenced, thus we use this f= lag=0D to avoid it doing any IO.=0D =0D Signed-off-by: Maxim Levitsky =0D Message-Id: <20201217150040.906961-2-mlevitsk@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: f95f61c2c9618fae7d8ea4c1d63e7416884bad52=0D https://github.com/qemu/qemu/commit/f95f61c2c9618fae7d8ea4c1d63e741= 6884bad52=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D =0D Log Message:=0D -----------=0D scsi-disk: move scsi_handle_rw_error earlier=0D =0D Remove the forward declaration.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 424740def9a42da88550410de9a41ef07cc4a010=0D https://github.com/qemu/qemu/commit/424740def9a42da88550410de9a41ef= 07cc4a010=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D =0D Log Message:=0D -----------=0D scsi-disk: do not complete requests early for rerror/werror=3Dignore=0D= =0D When requested to ignore errors, just do nothing and let the=0D request complete normally. This means that the request will=0D be accounted correctly.=0D =0D This is what commit 40dce4ee61 ("scsi-disk: fix rerror/werror=3Dignore",=0D= 2018-10-19) was supposed to do:=0D =0D Fixes: 40dce4ee61 ("scsi-disk: fix rerror/werror=3Dignore", 2018-10-19)=0D= Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: d7a84021db8eeddcd5d24ab591a1434763caff6c=0D https://github.com/qemu/qemu/commit/d7a84021db8eeddcd5d24ab591a1434= 763caff6c=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D M include/scsi/utils.h=0D M scsi/utils.c=0D =0D Log Message:=0D -----------=0D scsi: introduce scsi_sense_from_errno()=0D =0D The new function is an extension of the switch statement in scsi-disk.c=0D= which also includes the errno cases only found in sg_io_sense_from_errno.= =0D This allows us to consolidate the errno handling.=0D =0D Extracted from a patch by Hannes Reinecke .=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: f63c68bc0f514694a958b2e84a204b7792d28b17=0D https://github.com/qemu/qemu/commit/f63c68bc0f514694a958b2e84a204b7= 792d28b17=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D =0D Log Message:=0D -----------=0D scsi-disk: pass SCSI status to scsi_handle_rw_error=0D =0D Instead of fishing it from *r->status, just pass the SCSI status=0D as a positive value of the second parameter and an errno as a=0D negative value.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 782a78c9e994c2be23467262f50e885a0eb0d9fc=0D https://github.com/qemu/qemu/commit/782a78c9e994c2be23467262f50e885= a0eb0d9fc=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D =0D Log Message:=0D -----------=0D scsi-disk: pass guest recoverable errors through even for rerror=3Dstop= =0D =0D Right now, recoverable sense values are only passed directly to the=0D guest only for rerror=3Dreport. However, when rerror/werror are 'stop'=0D= we still don't want the host to be involved on every UNIT ATTENTION=0D (especially considered that the QMP event will not have enough informatio= n=0D to act on the report).=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 17ea26c2d80a695b4d3af9ae2eaa438095029773=0D https://github.com/qemu/qemu/commit/17ea26c2d80a695b4d3af9ae2eaa438= 095029773=0D Author: Hannes Reinecke =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/esp-pci.c=0D M hw/scsi/esp.c=0D M hw/scsi/lsi53c895a.c=0D M hw/scsi/megasas.c=0D M hw/scsi/mptsas.c=0D M hw/scsi/scsi-bus.c=0D M hw/scsi/spapr_vscsi.c=0D M hw/scsi/virtio-scsi.c=0D M hw/scsi/vmw_pvscsi.c=0D M hw/usb/dev-storage.c=0D M hw/usb/dev-uas.c=0D M include/hw/scsi/esp.h=0D M include/hw/scsi/scsi.h=0D =0D Log Message:=0D -----------=0D scsi: drop 'result' argument from command_complete callback=0D =0D The command complete callback has a SCSIRequest as the first argument,=0D= and the status field of that structure is identical to the 'status'=0D argument. So drop the argument from the callback.=0D =0D Signed-off-by: Hannes Reinecke =0D Message-Id: <20201116184041.60465-3-hare@suse.de>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 6585b1627899a3fcaf1cf62bfb659b04371ca9ec=0D https://github.com/qemu/qemu/commit/6585b1627899a3fcaf1cf62bfb659b0= 4371ca9ec=0D Author: Pavel Dovgalyuk =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M chardev/char-socket.c=0D =0D Log Message:=0D -----------=0D char: don't fail when client is not connected=0D =0D This patch checks that ioc is not null before=0D using it in tcp socket tcp_chr_add_watch function.=0D =0D The failure occurs in replay mode of the execution,=0D when monitor and serial port are tcp servers,=0D and there are no clients connected to them:=0D =0D -monitor tcp:127.0.0.1:8081,server,nowait=0D -serial tcp:127.0.0.1:8082,server,nowait=0D =0D Signed-off-by: Pavel Dovgalyuk =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <161284977034.741841.12565530923825663110.stgit@pasha-ThinkPa= d-X280>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 87c9991a0c4fba1af0255857ea07841e83c01ec7=0D https://github.com/qemu/qemu/commit/87c9991a0c4fba1af0255857ea07841= e83c01ec7=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M gdbstub.c=0D =0D Log Message:=0D -----------=0D gdbstub: use preferred boolean option syntax=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-2-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: bfdc1267689b9482bf79af8a8801bfa9d586bf43=0D https://github.com/qemu/qemu/commit/bfdc1267689b9482bf79af8a8801bfa= 9d586bf43=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D qemu-options: update to show preferred boolean syntax for -chardev=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-3-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: a9daa36a529c3236724bcc96bdfc7c88b3c88695=0D https://github.com/qemu/qemu/commit/a9daa36a529c3236724bcc96bdfc7c8= 8b3c88695=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D qemu-options: update to show preferred boolean syntax for -spice=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-4-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 8b0dc2465127aa16be244690bf50a23b216db4c7=0D https://github.com/qemu/qemu/commit/8b0dc2465127aa16be244690bf50a23= b216db4c7=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D qemu-options: update to show preferred boolean syntax for -netdev=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-5-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: bf24095ff5b2259f76a6ba12c489b76f1e9bb1d8=0D https://github.com/qemu/qemu/commit/bf24095ff5b2259f76a6ba12c489b76= f1e9bb1d8=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D qemu-options: update to show preferred boolean syntax for -incoming=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-6-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 82a17d1d67f282665105e86e9ffadf1da570d000=0D https://github.com/qemu/qemu/commit/82a17d1d67f282665105e86e9ffadf1= da570d000=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D qemu-options: update to show preferred boolean syntax for -vnc=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D The on|off syntax has been supported since -vnc switched to use=0D QemuOpts in commit 4db14629c38611061fc19ec6927405923de84f08=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-7-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: c23874132b79f69328b53273437970116c7a3d0d=0D https://github.com/qemu/qemu/commit/c23874132b79f69328b532734379701= 16c7a3d0d=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M docs/COLO-FT.txt=0D M docs/ccid.txt=0D M docs/colo-proxy.txt=0D M docs/devel/writing-qmp-commands.txt=0D M docs/interop/live-block-operations.rst=0D M docs/interop/qmp-intro.txt=0D M docs/system/cpu-hotplug.rst=0D M docs/system/s390x/3270.rst=0D M docs/system/target-avr.rst=0D M docs/tools/qemu-storage-daemon.rst=0D M scripts/qmp/qemu-ga-client=0D M tests/test-char.c=0D =0D Log Message:=0D -----------=0D docs: update to show preferred boolean syntax for -chardev=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-8-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: f3f8ce670ab2aee1901ba48e304c21b21f615851=0D https://github.com/qemu/qemu/commit/f3f8ce670ab2aee1901ba48e304c21b= 21f615851=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M docs/system/vnc-security.rst=0D =0D Log Message:=0D -----------=0D docs: update to show preferred boolean syntax for -vnc=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D The on|off syntax has been supported since -vnc switched to use=0D QemuOpts in commit 4db14629c38611061fc19ec6927405923de84f08=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-9-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 1bd39ea91115603977df48128b669a115d222dc8=0D https://github.com/qemu/qemu/commit/1bd39ea91115603977df48128b669a1= 15d222dc8=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M docs/COLO-FT.txt=0D M docs/interop/firmware.json=0D M docs/system/cpu-models-x86.rst.inc=0D =0D Log Message:=0D -----------=0D docs: update to show preferred boolean syntax for -cpu=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "+foo" or "-foo"=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-10-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: b7d77f5a8e5c18a4ade46cdea859a28dd314cc1e=0D https://github.com/qemu/qemu/commit/b7d77f5a8e5c18a4ade46cdea859a28= dd314cc1e=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M target/i386/cpu.c=0D M tests/qtest/test-x86-cpuid-compat.c=0D =0D Log Message:=0D -----------=0D target/i386: update to show preferred boolean syntax for -cpu=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "+foo" or "-foo"=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-11-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 3a2e982d4774993290a12c75f5918e3caec80d2b=0D https://github.com/qemu/qemu/commit/3a2e982d4774993290a12c75f5918e3= caec80d2b=0D Author: Doug Evans =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M qom/object.c=0D =0D Log Message:=0D -----------=0D qom/object.c: Fix typo=0D =0D A simple typo (noticed by inspection).=0D =0D Signed-off-by: Doug Evans =0D Message-Id: <000000000000530c7105bb191b33@google.com>=0D Signed-off-by: Paolo Bonzini =0D =0D Signed-off-by: Doug Evans =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 06e878b413766778a53be3d25c0373a23679d039=0D https://github.com/qemu/qemu/commit/06e878b413766778a53be3d25c0373a= 23679d039=0D Author: Chenyi Qiang =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M target/i386/cpu.c=0D M target/i386/cpu.h=0D =0D Log Message:=0D -----------=0D target/i386: Add bus lock debug exception support=0D =0D Bus lock debug exception is a feature that can notify the kernel by=0D generate an #DB trap after the instruction acquires a bus lock when=0D CPL>0. This allows the kernel to enforce user application throttling or=0D= mitigations.=0D =0D This feature is enumerated via CPUID.(EAX=3D7,ECX=3D0).ECX[bit 24].=0D =0D Signed-off-by: Chenyi Qiang =0D Message-Id: <20210202090224.13274-1-chenyi.qiang@intel.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: b979c93121d4276c124dccbff2848b7aede66cb6=0D https://github.com/qemu/qemu/commit/b979c93121d4276c124dccbff2848b7= aede66cb6=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qemu-options.hx=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D vl: deprecate -writeconfig=0D =0D The functionality of -writeconfig is limited and the code=0D does not even try to detect cases where it prints incorrect=0D syntax (for example if values have a quote in them, since=0D qemu_config_parse does not support any kind of escaping)=0D so remove it.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 9d902d51154bcbd305ae7138ef31e2843bb3427e=0D https://github.com/qemu/qemu/commit/9d902d51154bcbd305ae7138ef31e28= 43bb3427e=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M chardev/char-socket.c=0D M qapi/char.json=0D M tests/guest-debug/run-test.py=0D =0D Log Message:=0D -----------=0D chardev: do not use short form boolean options in non-QemuOpts characte= r device descriptions=0D =0D Options such as "-gdb" or "-serial" accept a part-QemuOpts part-parsed-by= -hand=0D character device description. Do not use short form boolean options in t= he=0D QemuOpts part.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: c45b426acd1ad8e30fbe1b9af8c07b2889c28c6b=0D https://github.com/qemu/qemu/commit/c45b426acd1ad8e30fbe1b9af8c07b2= 889c28c6b=0D Author: Zheng Zhan Liang =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M target/i386/tcg/misc_helper.c=0D =0D Log Message:=0D -----------=0D tcg/i386: rdpmc: fix the the condtions=0D =0D Signed-off-by: Zheng Zhan Liang =0D Message-Id: <20210225054756.35962-1-linuxmaker@163.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 07dbfdd290cea5d75d3e21948dc54fdb6f5174ac=0D https://github.com/qemu/qemu/commit/07dbfdd290cea5d75d3e21948dc54fd= b6f5174ac=0D Author: Peter Maydell =0D Date: 2021-03-02 (Tue, 02 Mar 2021)=0D =0D Changed paths:=0D M chardev/char-socket.c=0D M configure=0D M docs/COLO-FT.txt=0D M docs/ccid.txt=0D M docs/colo-proxy.txt=0D M docs/devel/writing-qmp-commands.txt=0D M docs/interop/firmware.json=0D M docs/interop/live-block-operations.rst=0D M docs/interop/qmp-intro.txt=0D M docs/system/cpu-hotplug.rst=0D M docs/system/cpu-models-x86.rst.inc=0D M docs/system/deprecated.rst=0D M docs/system/s390x/3270.rst=0D M docs/system/target-avr.rst=0D M docs/system/vnc-security.rst=0D M docs/tools/qemu-storage-daemon.rst=0D M gdbstub.c=0D M hw/scsi/esp-pci.c=0D M hw/scsi/esp.c=0D M hw/scsi/lsi53c895a.c=0D M hw/scsi/megasas.c=0D M hw/scsi/mptsas.c=0D M hw/scsi/scsi-bus.c=0D M hw/scsi/scsi-disk.c=0D M hw/scsi/scsi-generic.c=0D M hw/scsi/spapr_vscsi.c=0D M hw/scsi/trace-events=0D M hw/scsi/virtio-scsi-dataplane.c=0D M hw/scsi/virtio-scsi.c=0D M hw/scsi/vmw_pvscsi.c=0D M hw/usb/dev-storage.c=0D M hw/usb/dev-uas.c=0D M include/hw/scsi/esp.h=0D M include/hw/scsi/scsi.h=0D M include/scsi/utils.h=0D M meson.build=0D M meson_options.txt=0D M qapi/char.json=0D M qemu-options.hx=0D M qom/object.c=0D M scripts/entitlement.sh=0D M scripts/qmp/qemu-ga-client=0D M scsi/utils.c=0D M softmmu/vl.c=0D M target/i386/cpu.c=0D M target/i386/cpu.h=0D M target/i386/tcg/misc_helper.c=0D M tests/guest-debug/run-test.py=0D M tests/qtest/test-x86-cpuid-compat.c=0D M tests/test-char.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream'= into staging=0D =0D * fix --enable-fuzzing linker failures (Alexander)=0D * target/i386: Add bus lock debug exception support (Chenyi)=0D * update documentation for preferred boolean option syntax (Daniel)=0D * make SCSI io_timeout configurable (Hannes)=0D * fix handling of guest recoverable SCSI errors (myself)=0D * misc fixes (Pavel, Zheng Zhan Liang, Zihao)=0D * fix installation of binaries with entitlements (Akihiko)=0D =0D # gpg: Signature made Thu 25 Feb 2021 14:41:56 GMT=0D # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7A= E83=0D # gpg: issuer "pbonzini@redhat.com"=0D # gpg: Good signature from "Paolo Bonzini " [full]=0D # gpg: aka "Paolo Bonzini " [full]=0D= # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 = 69B1=0D # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 = AE83=0D =0D * remotes/bonzini-gitlab/tags/for-upstream: (29 commits)=0D tcg/i386: rdpmc: fix the the condtions=0D chardev: do not use short form boolean options in non-QemuOpts characte= r device descriptions=0D vl: deprecate -writeconfig=0D target/i386: Add bus lock debug exception support=0D qom/object.c: Fix typo=0D target/i386: update to show preferred boolean syntax for -cpu=0D docs: update to show preferred boolean syntax for -cpu=0D docs: update to show preferred boolean syntax for -vnc=0D docs: update to show preferred boolean syntax for -chardev=0D qemu-options: update to show preferred boolean syntax for -vnc=0D qemu-options: update to show preferred boolean syntax for -incoming=0D qemu-options: update to show preferred boolean syntax for -netdev=0D qemu-options: update to show preferred boolean syntax for -spice=0D qemu-options: update to show preferred boolean syntax for -chardev=0D gdbstub: use preferred boolean option syntax=0D char: don't fail when client is not connected=0D scsi: drop 'result' argument from command_complete callback=0D scsi-disk: pass guest recoverable errors through even for rerror=3Dstop= =0D scsi-disk: pass SCSI status to scsi_handle_rw_error=0D scsi: introduce scsi_sense_from_errno()=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/cbcf09872a93...07dbfdd290ce= =0D From MAILER-DAEMON Wed Mar 03 11:55:19 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lHUmN-0000k2-ES for mharc-qemu-commits@gnu.org; Wed, 03 Mar 2021 11:55:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:58408) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHUmI-0000jd-6o for qemu-commits@nongnu.org; Wed, 03 Mar 2021 11:55:14 -0500 Received: from out-28.smtp.github.com ([192.30.252.211]:55315) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHUmE-0004mP-7e for qemu-commits@nongnu.org; Wed, 03 Mar 2021 11:55:13 -0500 Received: from github.com (hubbernetes-node-df986b3.ash1-iad.github.net [10.56.120.45]) by smtp.github.com (Postfix) with ESMTPA id 5B40E900701 for ; Wed, 3 Mar 2021 08:55:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614790509; bh=gIVyuB+kEva3AUhUnM9A7yKPulBk/YZ6AJJfBY8E63M=; h=Date:From:To:Subject:From; b=cjl/Y1+Mu7crY7f2terpSF71eEew6fxuH84x+QWcLWXgdc3VJgjoA4PrucHGcvb/6 PjG4RbRA1Qky2SRnRm8jThnm/e7nosAbBExnH5ZzvgnfrGbnzWWuuxbyyt73bI4X89 GJ5sygBIJeyUg1IH+e8tik6fwB1SUh3nIDJjNk7A= Date: Wed, 03 Mar 2021 08:55:09 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 237377: hvf: Sign the code after installation X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Mar 2021 16:55:18 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 237377ac72b38f030058948f2d744c230b62be40=0D https://github.com/qemu/qemu/commit/237377ac72b38f030058948f2d744c2= 30b62be40=0D Author: Akihiko Odaki =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M meson.build=0D M scripts/entitlement.sh=0D =0D Log Message:=0D -----------=0D hvf: Sign the code after installation=0D =0D Before this change, the code signed during the build was installed=0D directly.=0D =0D However, the signature gets invalidated because meson modifies the code=0D= to fix dynamic library install names during the install process.=0D =0D It also prevents meson to strip the code because the pre-signed file is=0D= not marked as an executable (although it is somehow able to perform the=0D= modification described above).=0D =0D With this change, the unsigned code will be installed and modified by=0D meson first, and a script signs it later.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210225000614.46919-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: efce01bcb6757158358a3f2c1f6756ffab4aa8c0=0D https://github.com/qemu/qemu/commit/efce01bcb6757158358a3f2c1f6756f= fab4aa8c0=0D Author: Alexander Bulekov =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M configure=0D =0D Log Message:=0D -----------=0D configure: fix --enable-fuzzing linker failures=0D =0D With --enable-fuzzing, QEMU_CFLAGS include -fsanitize=3Dfuzzer-no-link.=0D= This should allow us to build non-fuzzer binaries using objects=0D instrumented for fuzzing. However, to do that, we also need to link with=0D= -fsanitize=3Dfuzzer-no-link. We were not doing that.=0D =0D Reported-by: Li Qiang ,=0D Signed-off-by: Alexander Bulekov =0D Message-Id: <20210221174510.22542-1-alxndr@bu.edu>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 106ad1f9c513f48b046e07e45406c339d16e4e2f=0D https://github.com/qemu/qemu/commit/106ad1f9c513f48b046e07e45406c33= 9d16e4e2f=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M configure=0D M meson.build=0D M meson_options.txt=0D =0D Log Message:=0D -----------=0D multiprocess: move feature to meson_options.txt=0D =0D While at it, improve the description of the feature in the summary and=0D= help message.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: c9b6609b69facad0cc5425d4fa7934c33d7f2e91=0D https://github.com/qemu/qemu/commit/c9b6609b69facad0cc5425d4fa7934c= 33d7f2e91=0D Author: Hannes Reinecke =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D M hw/scsi/scsi-generic.c=0D M include/hw/scsi/scsi.h=0D =0D Log Message:=0D -----------=0D scsi: make io_timeout configurable=0D =0D The current code sets an infinite timeout on SG_IO requests,=0D causing the guest to stall if the host experiences a frame=0D loss.=0D This patch adds an 'io_timeout' parameter for SCSIDevice to=0D make the SG_IO timeout configurable, and also shortens the=0D default timeout to 30 seconds to avoid infinite stalls.=0D =0D Signed-off-by: Hannes Reinecke =0D Message-Id: <20201116183114.55703-3-hare@suse.de>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: b2d50a3343d939a603df4436ccc41b4cf8223f88=0D https://github.com/qemu/qemu/commit/b2d50a3343d939a603df4436ccc41b4= cf8223f88=0D Author: Hannes Reinecke =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D M hw/scsi/scsi-generic.c=0D M hw/scsi/trace-events=0D =0D Log Message:=0D -----------=0D scsi: add tracing for SG_IO commands=0D =0D Add tracepoints for SG_IO commands to allow for debugging=0D of SG_IO commands.=0D =0D Signed-off-by: Hannes Reinecke =0D Message-Id: <20201116183114.55703-4-hare@suse.de>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 166854f7cd91d7cff23298180585209ea9d501d4=0D https://github.com/qemu/qemu/commit/166854f7cd91d7cff23298180585209= ea9d501d4=0D Author: Zihao Chang =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-generic.c=0D =0D Log Message:=0D -----------=0D scsi: allow user to set werror as report=0D =0D 'enospc' is the default for -drive, but qemu allows user to set=0D drive option werror. If werror of scsi-generic is set to 'report'=0D by user, qemu will not allow vm to start.=0D =0D This patch allow user to set werror as 'report' for scsi-generic.=0D =0D Signed-off-by: Zihao Chang =0D Reviewed-by: Fam Zheng =0D Message-Id: <20201103061240.1364-1-changzihao1@huawei.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 6f1a5c37db5a6fc7c5c44b3e45cee6e33df31e9d=0D https://github.com/qemu/qemu/commit/6f1a5c37db5a6fc7c5c44b3e45cee6e= 33df31e9d=0D Author: Maxim Levitsky =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/virtio-scsi-dataplane.c=0D =0D Log Message:=0D -----------=0D virtio-scsi: don't process IO on fenced dataplane=0D =0D If virtio_scsi_dataplane_start fails, there is a small window when it dro= ps the=0D aio lock (in aio_wait_bh_oneshot) and the dataplane's AIO handler can=0D still run during that window.=0D =0D This is done after the dataplane was marked as fenced, thus we use this f= lag=0D to avoid it doing any IO.=0D =0D Signed-off-by: Maxim Levitsky =0D Message-Id: <20201217150040.906961-2-mlevitsk@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: f95f61c2c9618fae7d8ea4c1d63e7416884bad52=0D https://github.com/qemu/qemu/commit/f95f61c2c9618fae7d8ea4c1d63e741= 6884bad52=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D =0D Log Message:=0D -----------=0D scsi-disk: move scsi_handle_rw_error earlier=0D =0D Remove the forward declaration.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 424740def9a42da88550410de9a41ef07cc4a010=0D https://github.com/qemu/qemu/commit/424740def9a42da88550410de9a41ef= 07cc4a010=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D =0D Log Message:=0D -----------=0D scsi-disk: do not complete requests early for rerror/werror=3Dignore=0D= =0D When requested to ignore errors, just do nothing and let the=0D request complete normally. This means that the request will=0D be accounted correctly.=0D =0D This is what commit 40dce4ee61 ("scsi-disk: fix rerror/werror=3Dignore",=0D= 2018-10-19) was supposed to do:=0D =0D Fixes: 40dce4ee61 ("scsi-disk: fix rerror/werror=3Dignore", 2018-10-19)=0D= Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: d7a84021db8eeddcd5d24ab591a1434763caff6c=0D https://github.com/qemu/qemu/commit/d7a84021db8eeddcd5d24ab591a1434= 763caff6c=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D M include/scsi/utils.h=0D M scsi/utils.c=0D =0D Log Message:=0D -----------=0D scsi: introduce scsi_sense_from_errno()=0D =0D The new function is an extension of the switch statement in scsi-disk.c=0D= which also includes the errno cases only found in sg_io_sense_from_errno.= =0D This allows us to consolidate the errno handling.=0D =0D Extracted from a patch by Hannes Reinecke .=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: f63c68bc0f514694a958b2e84a204b7792d28b17=0D https://github.com/qemu/qemu/commit/f63c68bc0f514694a958b2e84a204b7= 792d28b17=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D =0D Log Message:=0D -----------=0D scsi-disk: pass SCSI status to scsi_handle_rw_error=0D =0D Instead of fishing it from *r->status, just pass the SCSI status=0D as a positive value of the second parameter and an errno as a=0D negative value.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 782a78c9e994c2be23467262f50e885a0eb0d9fc=0D https://github.com/qemu/qemu/commit/782a78c9e994c2be23467262f50e885= a0eb0d9fc=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D =0D Log Message:=0D -----------=0D scsi-disk: pass guest recoverable errors through even for rerror=3Dstop= =0D =0D Right now, recoverable sense values are only passed directly to the=0D guest only for rerror=3Dreport. However, when rerror/werror are 'stop'=0D= we still don't want the host to be involved on every UNIT ATTENTION=0D (especially considered that the QMP event will not have enough informatio= n=0D to act on the report).=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 17ea26c2d80a695b4d3af9ae2eaa438095029773=0D https://github.com/qemu/qemu/commit/17ea26c2d80a695b4d3af9ae2eaa438= 095029773=0D Author: Hannes Reinecke =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M hw/scsi/esp-pci.c=0D M hw/scsi/esp.c=0D M hw/scsi/lsi53c895a.c=0D M hw/scsi/megasas.c=0D M hw/scsi/mptsas.c=0D M hw/scsi/scsi-bus.c=0D M hw/scsi/spapr_vscsi.c=0D M hw/scsi/virtio-scsi.c=0D M hw/scsi/vmw_pvscsi.c=0D M hw/usb/dev-storage.c=0D M hw/usb/dev-uas.c=0D M include/hw/scsi/esp.h=0D M include/hw/scsi/scsi.h=0D =0D Log Message:=0D -----------=0D scsi: drop 'result' argument from command_complete callback=0D =0D The command complete callback has a SCSIRequest as the first argument,=0D= and the status field of that structure is identical to the 'status'=0D argument. So drop the argument from the callback.=0D =0D Signed-off-by: Hannes Reinecke =0D Message-Id: <20201116184041.60465-3-hare@suse.de>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 6585b1627899a3fcaf1cf62bfb659b04371ca9ec=0D https://github.com/qemu/qemu/commit/6585b1627899a3fcaf1cf62bfb659b0= 4371ca9ec=0D Author: Pavel Dovgalyuk =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M chardev/char-socket.c=0D =0D Log Message:=0D -----------=0D char: don't fail when client is not connected=0D =0D This patch checks that ioc is not null before=0D using it in tcp socket tcp_chr_add_watch function.=0D =0D The failure occurs in replay mode of the execution,=0D when monitor and serial port are tcp servers,=0D and there are no clients connected to them:=0D =0D -monitor tcp:127.0.0.1:8081,server,nowait=0D -serial tcp:127.0.0.1:8082,server,nowait=0D =0D Signed-off-by: Pavel Dovgalyuk =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <161284977034.741841.12565530923825663110.stgit@pasha-ThinkPa= d-X280>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 87c9991a0c4fba1af0255857ea07841e83c01ec7=0D https://github.com/qemu/qemu/commit/87c9991a0c4fba1af0255857ea07841= e83c01ec7=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M gdbstub.c=0D =0D Log Message:=0D -----------=0D gdbstub: use preferred boolean option syntax=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-2-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: bfdc1267689b9482bf79af8a8801bfa9d586bf43=0D https://github.com/qemu/qemu/commit/bfdc1267689b9482bf79af8a8801bfa= 9d586bf43=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D qemu-options: update to show preferred boolean syntax for -chardev=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-3-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: a9daa36a529c3236724bcc96bdfc7c88b3c88695=0D https://github.com/qemu/qemu/commit/a9daa36a529c3236724bcc96bdfc7c8= 8b3c88695=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D qemu-options: update to show preferred boolean syntax for -spice=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-4-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 8b0dc2465127aa16be244690bf50a23b216db4c7=0D https://github.com/qemu/qemu/commit/8b0dc2465127aa16be244690bf50a23= b216db4c7=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D qemu-options: update to show preferred boolean syntax for -netdev=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-5-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: bf24095ff5b2259f76a6ba12c489b76f1e9bb1d8=0D https://github.com/qemu/qemu/commit/bf24095ff5b2259f76a6ba12c489b76= f1e9bb1d8=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D qemu-options: update to show preferred boolean syntax for -incoming=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-6-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 82a17d1d67f282665105e86e9ffadf1da570d000=0D https://github.com/qemu/qemu/commit/82a17d1d67f282665105e86e9ffadf1= da570d000=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D qemu-options: update to show preferred boolean syntax for -vnc=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D The on|off syntax has been supported since -vnc switched to use=0D QemuOpts in commit 4db14629c38611061fc19ec6927405923de84f08=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-7-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: c23874132b79f69328b53273437970116c7a3d0d=0D https://github.com/qemu/qemu/commit/c23874132b79f69328b532734379701= 16c7a3d0d=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M docs/COLO-FT.txt=0D M docs/ccid.txt=0D M docs/colo-proxy.txt=0D M docs/devel/writing-qmp-commands.txt=0D M docs/interop/live-block-operations.rst=0D M docs/interop/qmp-intro.txt=0D M docs/system/cpu-hotplug.rst=0D M docs/system/s390x/3270.rst=0D M docs/system/target-avr.rst=0D M docs/tools/qemu-storage-daemon.rst=0D M scripts/qmp/qemu-ga-client=0D M tests/test-char.c=0D =0D Log Message:=0D -----------=0D docs: update to show preferred boolean syntax for -chardev=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-8-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: f3f8ce670ab2aee1901ba48e304c21b21f615851=0D https://github.com/qemu/qemu/commit/f3f8ce670ab2aee1901ba48e304c21b= 21f615851=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M docs/system/vnc-security.rst=0D =0D Log Message:=0D -----------=0D docs: update to show preferred boolean syntax for -vnc=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "foo" or "nofoo".=0D =0D The on|off syntax has been supported since -vnc switched to use=0D QemuOpts in commit 4db14629c38611061fc19ec6927405923de84f08=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-9-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 1bd39ea91115603977df48128b669a115d222dc8=0D https://github.com/qemu/qemu/commit/1bd39ea91115603977df48128b669a1= 15d222dc8=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M docs/COLO-FT.txt=0D M docs/interop/firmware.json=0D M docs/system/cpu-models-x86.rst.inc=0D =0D Log Message:=0D -----------=0D docs: update to show preferred boolean syntax for -cpu=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "+foo" or "-foo"=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-10-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: b7d77f5a8e5c18a4ade46cdea859a28dd314cc1e=0D https://github.com/qemu/qemu/commit/b7d77f5a8e5c18a4ade46cdea859a28= dd314cc1e=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M target/i386/cpu.c=0D M tests/qtest/test-x86-cpuid-compat.c=0D =0D Log Message:=0D -----------=0D target/i386: update to show preferred boolean syntax for -cpu=0D =0D The preferred syntax is to use "foo=3Don|off", rather than a bare=0D "+foo" or "-foo"=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210216191027.595031-11-berrange@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 3a2e982d4774993290a12c75f5918e3caec80d2b=0D https://github.com/qemu/qemu/commit/3a2e982d4774993290a12c75f5918e3= caec80d2b=0D Author: Doug Evans =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M qom/object.c=0D =0D Log Message:=0D -----------=0D qom/object.c: Fix typo=0D =0D A simple typo (noticed by inspection).=0D =0D Signed-off-by: Doug Evans =0D Message-Id: <000000000000530c7105bb191b33@google.com>=0D Signed-off-by: Paolo Bonzini =0D =0D Signed-off-by: Doug Evans =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 06e878b413766778a53be3d25c0373a23679d039=0D https://github.com/qemu/qemu/commit/06e878b413766778a53be3d25c0373a= 23679d039=0D Author: Chenyi Qiang =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M target/i386/cpu.c=0D M target/i386/cpu.h=0D =0D Log Message:=0D -----------=0D target/i386: Add bus lock debug exception support=0D =0D Bus lock debug exception is a feature that can notify the kernel by=0D generate an #DB trap after the instruction acquires a bus lock when=0D CPL>0. This allows the kernel to enforce user application throttling or=0D= mitigations.=0D =0D This feature is enumerated via CPUID.(EAX=3D7,ECX=3D0).ECX[bit 24].=0D =0D Signed-off-by: Chenyi Qiang =0D Message-Id: <20210202090224.13274-1-chenyi.qiang@intel.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: b979c93121d4276c124dccbff2848b7aede66cb6=0D https://github.com/qemu/qemu/commit/b979c93121d4276c124dccbff2848b7= aede66cb6=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qemu-options.hx=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D vl: deprecate -writeconfig=0D =0D The functionality of -writeconfig is limited and the code=0D does not even try to detect cases where it prints incorrect=0D syntax (for example if values have a quote in them, since=0D qemu_config_parse does not support any kind of escaping)=0D so remove it.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 9d902d51154bcbd305ae7138ef31e2843bb3427e=0D https://github.com/qemu/qemu/commit/9d902d51154bcbd305ae7138ef31e28= 43bb3427e=0D Author: Paolo Bonzini =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M chardev/char-socket.c=0D M qapi/char.json=0D M tests/guest-debug/run-test.py=0D =0D Log Message:=0D -----------=0D chardev: do not use short form boolean options in non-QemuOpts characte= r device descriptions=0D =0D Options such as "-gdb" or "-serial" accept a part-QemuOpts part-parsed-by= -hand=0D character device description. Do not use short form boolean options in t= he=0D QemuOpts part.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: c45b426acd1ad8e30fbe1b9af8c07b2889c28c6b=0D https://github.com/qemu/qemu/commit/c45b426acd1ad8e30fbe1b9af8c07b2= 889c28c6b=0D Author: Zheng Zhan Liang =0D Date: 2021-02-25 (Thu, 25 Feb 2021)=0D =0D Changed paths:=0D M target/i386/tcg/misc_helper.c=0D =0D Log Message:=0D -----------=0D tcg/i386: rdpmc: fix the the condtions=0D =0D Signed-off-by: Zheng Zhan Liang =0D Message-Id: <20210225054756.35962-1-linuxmaker@163.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 07dbfdd290cea5d75d3e21948dc54fdb6f5174ac=0D https://github.com/qemu/qemu/commit/07dbfdd290cea5d75d3e21948dc54fd= b6f5174ac=0D Author: Peter Maydell =0D Date: 2021-03-02 (Tue, 02 Mar 2021)=0D =0D Changed paths:=0D M chardev/char-socket.c=0D M configure=0D M docs/COLO-FT.txt=0D M docs/ccid.txt=0D M docs/colo-proxy.txt=0D M docs/devel/writing-qmp-commands.txt=0D M docs/interop/firmware.json=0D M docs/interop/live-block-operations.rst=0D M docs/interop/qmp-intro.txt=0D M docs/system/cpu-hotplug.rst=0D M docs/system/cpu-models-x86.rst.inc=0D M docs/system/deprecated.rst=0D M docs/system/s390x/3270.rst=0D M docs/system/target-avr.rst=0D M docs/system/vnc-security.rst=0D M docs/tools/qemu-storage-daemon.rst=0D M gdbstub.c=0D M hw/scsi/esp-pci.c=0D M hw/scsi/esp.c=0D M hw/scsi/lsi53c895a.c=0D M hw/scsi/megasas.c=0D M hw/scsi/mptsas.c=0D M hw/scsi/scsi-bus.c=0D M hw/scsi/scsi-disk.c=0D M hw/scsi/scsi-generic.c=0D M hw/scsi/spapr_vscsi.c=0D M hw/scsi/trace-events=0D M hw/scsi/virtio-scsi-dataplane.c=0D M hw/scsi/virtio-scsi.c=0D M hw/scsi/vmw_pvscsi.c=0D M hw/usb/dev-storage.c=0D M hw/usb/dev-uas.c=0D M include/hw/scsi/esp.h=0D M include/hw/scsi/scsi.h=0D M include/scsi/utils.h=0D M meson.build=0D M meson_options.txt=0D M qapi/char.json=0D M qemu-options.hx=0D M qom/object.c=0D M scripts/entitlement.sh=0D M scripts/qmp/qemu-ga-client=0D M scsi/utils.c=0D M softmmu/vl.c=0D M target/i386/cpu.c=0D M target/i386/cpu.h=0D M target/i386/tcg/misc_helper.c=0D M tests/guest-debug/run-test.py=0D M tests/qtest/test-x86-cpuid-compat.c=0D M tests/test-char.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream'= into staging=0D =0D * fix --enable-fuzzing linker failures (Alexander)=0D * target/i386: Add bus lock debug exception support (Chenyi)=0D * update documentation for preferred boolean option syntax (Daniel)=0D * make SCSI io_timeout configurable (Hannes)=0D * fix handling of guest recoverable SCSI errors (myself)=0D * misc fixes (Pavel, Zheng Zhan Liang, Zihao)=0D * fix installation of binaries with entitlements (Akihiko)=0D =0D # gpg: Signature made Thu 25 Feb 2021 14:41:56 GMT=0D # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7A= E83=0D # gpg: issuer "pbonzini@redhat.com"=0D # gpg: Good signature from "Paolo Bonzini " [full]=0D # gpg: aka "Paolo Bonzini " [full]=0D= # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 = 69B1=0D # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 = AE83=0D =0D * remotes/bonzini-gitlab/tags/for-upstream: (29 commits)=0D tcg/i386: rdpmc: fix the the condtions=0D chardev: do not use short form boolean options in non-QemuOpts characte= r device descriptions=0D vl: deprecate -writeconfig=0D target/i386: Add bus lock debug exception support=0D qom/object.c: Fix typo=0D target/i386: update to show preferred boolean syntax for -cpu=0D docs: update to show preferred boolean syntax for -cpu=0D docs: update to show preferred boolean syntax for -vnc=0D docs: update to show preferred boolean syntax for -chardev=0D qemu-options: update to show preferred boolean syntax for -vnc=0D qemu-options: update to show preferred boolean syntax for -incoming=0D qemu-options: update to show preferred boolean syntax for -netdev=0D qemu-options: update to show preferred boolean syntax for -spice=0D qemu-options: update to show preferred boolean syntax for -chardev=0D gdbstub: use preferred boolean option syntax=0D char: don't fail when client is not connected=0D scsi: drop 'result' argument from command_complete callback=0D scsi-disk: pass guest recoverable errors through even for rerror=3Dstop= =0D scsi-disk: pass SCSI status to scsi_handle_rw_error=0D scsi: introduce scsi_sense_from_errno()=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/cbcf09872a93...07dbfdd290ce= =0D From MAILER-DAEMON Wed Mar 03 12:01:26 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lHUsG-0003UC-Sa for mharc-qemu-commits@gnu.org; Wed, 03 Mar 2021 12:01:25 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:60858) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHUs9-0003Q4-7K for qemu-commits@nongnu.org; Wed, 03 Mar 2021 12:01:18 -0500 Received: from out-17.smtp.github.com ([192.30.252.200]:35451 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHUrr-0006ps-3s for qemu-commits@nongnu.org; Wed, 03 Mar 2021 12:01:15 -0500 Received: from github.com (hubbernetes-node-7247464.va3-iad.github.net [10.48.112.57]) by smtp.github.com (Postfix) with ESMTPA id 546F15C089D for ; Wed, 3 Mar 2021 09:00:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614790854; bh=tO8rJT7qeT0+IMGdZQBm+mG2F6l9cE6cC1fD28t6Enw=; h=Date:From:To:Subject:From; b=s2JgzV2KKvL1GjpPi1fnAqOFXqwO0FZNN2ea593UQBtahoZ/9SISpwKINfK3kiEQq zGItN8ItBHrv6txv/AhSRWqu+ySjgdkmWp31VOaqfV5K2ZxE+3z7UQherk1iuTTdM1 37aGD7zmb4sbM+z4Y9+ke3U4avqNrQQCGXErQ6us= Date: Wed, 03 Mar 2021 09:00:54 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 0a343a: i386/acpi: restore device paths for pre-5.1 vms X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Mar 2021 17:01:20 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 0a343a5add75f9f90c65e932863d57ddbcb28f5c=0D https://github.com/qemu/qemu/commit/0a343a5add75f9f90c65e932863d57d= dbcb28f5c=0D Author: Vitaly Cheptsov =0D Date: 2021-03-02 (Tue, 02 Mar 2021)=0D =0D Changed paths:=0D M hw/i386/acpi-build.c=0D M hw/i386/pc_piix.c=0D M hw/i386/pc_q35.c=0D M include/hw/i386/pc.h=0D =0D Log Message:=0D -----------=0D i386/acpi: restore device paths for pre-5.1 vms=0D =0D After fixing the _UID value for the primary PCI root bridge in=0D af1b80ae it was discovered that this change updates Windows=0D configuration in an incompatible way causing network configuration=0D failure unless DHCP is used. More details provided on the list:=0D =0D https://lists.gnu.org/archive/html/qemu-devel/2021-02/msg08484.html=0D =0D This change reverts the _UID update from 1 to 0 for q35 and i440fx=0D VMs before version 5.2 to maintain the original behaviour when=0D upgrading.=0D =0D Cc: qemu-stable@nongnu.org=0D Cc: qemu-devel@nongnu.org=0D Reported-by: Thomas Lamprecht =0D Suggested-by: Michael S. Tsirkin =0D Signed-off-by: Vitaly Cheptsov =0D Message-Id: <20210301195919.9333-1-cheptsov@ispras.ru>=0D Tested-by: Thomas Lamprecht =0D Reviewed-by: Igor Mammedov =0D Reviewed-by: Michael S. Tsirkin =0D Signed-off-by: Michael S. Tsirkin =0D Fixes: af1b80ae56c9 ("i386/acpi: fix inconsistent QEMU/OVMF device paths"= )=0D =0D =0D Commit: fb592882397870a9eaf206f6c92789274ed07dda=0D https://github.com/qemu/qemu/commit/fb592882397870a9eaf206f6c927892= 74ed07dda=0D Author: Cindy Lu =0D Date: 2021-03-02 (Tue, 02 Mar 2021)=0D =0D Changed paths:=0D M hw/net/virtio-net.c=0D =0D Log Message:=0D -----------=0D virtio-net: handle zero mac for a vdpa peer=0D =0D Some mlx vdpa devices with kernels at least up to 5.11 currently present=0D= 0 as their MAC address. This is because they have not been=0D pre-configured with a MAC: they have a learning bridge and only learn=0D= the MAC once guest is up. Kernel patches and tools to allow programming=0D= the MAC from host are being developed. For now - since these=0D combinations exist in the field - let's detect zero mac and just try to=0D= proceed with the mac from the qemu command line.=0D =0D This makes the guest use this MAC to send packets in turn teaching=0D the MAC to the card, and things work.=0D =0D TODO:=0D report the actual MAC from QEMU commad line in the info message.=0D TODO:=0D detect that a (non-zero) hardware MAC does not match QEMU command line=0D= and fail init.=0D =0D Signed-off-by: Cindy Lu =0D Message-Id: <20210225165506.18321-2-lulu@redhat.com>=0D =0D mst: rewritten code comments, message printed and the commit log.=0D =0D Cc: Eli Cohen =0D Cc: Parav Pandit =0D Tested-by: Adrian Moreno =0D Tested-by: Sean Mooney =0D Reviewed-by: Michael S. Tsirkin =0D Signed-off-by: Michael S. Tsirkin =0D =0D =0D Commit: b52fa0ea45bea494a953dd766151d584a28e87e5=0D https://github.com/qemu/qemu/commit/b52fa0ea45bea494a953dd766151d58= 4a28e87e5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-02 (Tue, 02 Mar 2021)=0D =0D Changed paths:=0D M hw/pci/pci.c=0D =0D Log Message:=0D -----------=0D hw/pci: Have safer pcie_bus_realize() by checking error path=0D =0D While pci_bus_realize() currently does not use the Error* argument,=0D it would be an error to leave pcie_bus_realize() setting bus->flags=0D if pci_bus_realize() had failed.=0D =0D Fix by using a local Error* and return early (propagating the error)=0D if pci_bus_realize() failed.=0D =0D Reported-by: Markus Armbruster =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210201153700.618946-1-philmd@redhat.com>=0D Reviewed-by: Michael S. Tsirkin =0D Signed-off-by: Michael S. Tsirkin =0D =0D =0D Commit: 1d8d014e936a49795de95a35a2a1ab8000ab2e5b=0D https://github.com/qemu/qemu/commit/1d8d014e936a49795de95a35a2a1ab8= 000ab2e5b=0D Author: Stefan Hajnoczi =0D Date: 2021-03-02 (Tue, 02 Mar 2021)=0D =0D Changed paths:=0D M hw/virtio/vhost.c=0D =0D Log Message:=0D -----------=0D vhost: simplify vhost_dev_init() fail_busyloop label=0D =0D Requiring a conditional for every goto is tedious:=0D =0D if (busyloop_timeout) {=0D goto fail_busyloop;=0D } else {=0D goto fail;=0D }=0D =0D Move the conditional to into the fail_busyloop label so that it's safe=0D= to jump to this label unconditionally.=0D =0D This change makes the migrate_add_blocker() error case more consistent.=0D= It jumped to fail_busyloop unconditionally whereas the memslots limits=0D= error case was conditional.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210222114931.272308-1-stefanha@redhat.com>=0D Reviewed-by: Stefano Garzarella =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Michael S. Tsirkin =0D Signed-off-by: Michael S. Tsirkin =0D =0D =0D Commit: c40ae5a3ee387b13116948cbfe7824f03311db7e=0D https://github.com/qemu/qemu/commit/c40ae5a3ee387b13116948cbfe7824f= 03311db7e=0D Author: Peter Maydell =0D Date: 2021-03-03 (Wed, 03 Mar 2021)=0D =0D Changed paths:=0D M hw/i386/acpi-build.c=0D M hw/i386/pc_piix.c=0D M hw/i386/pc_q35.c=0D M hw/net/virtio-net.c=0D M hw/pci/pci.c=0D M hw/virtio/vhost.c=0D M include/hw/i386/pc.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagi= ng=0D =0D pc,virtio,pci: bug fixes=0D =0D Fixes all over the place. Specifically this fixes=0D a bug which made windows guests lose device config=0D (such as the configured fixed IP) after upgrading=0D to the new QEMU.=0D =0D Signed-off-by: Michael S. Tsirkin =0D =0D # gpg: Signature made Tue 02 Mar 2021 14:19:51 GMT=0D # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5= 469=0D # gpg: issuer "mst@redhat.com"=0D # gpg: Good signature from "Michael S. Tsirkin " [full]=0D= # gpg: aka "Michael S. Tsirkin " [full]=0D= # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE = 8E67=0D # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D = 5469=0D =0D * remotes/mst/tags/for_upstream:=0D vhost: simplify vhost_dev_init() fail_busyloop label=0D hw/pci: Have safer pcie_bus_realize() by checking error path=0D virtio-net: handle zero mac for a vdpa peer=0D i386/acpi: restore device paths for pre-5.1 vms=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/07dbfdd290ce...c40ae5a3ee38= =0D From MAILER-DAEMON Wed Mar 03 13:10:47 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lHVxO-0006Bv-Vt for mharc-qemu-commits@gnu.org; Wed, 03 Mar 2021 13:10:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:52320) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHVxL-00069f-RB for qemu-commits@nongnu.org; Wed, 03 Mar 2021 13:10:43 -0500 Received: from out-22.smtp.github.com ([192.30.252.205]:43385 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHVxI-00057w-4V for qemu-commits@nongnu.org; Wed, 03 Mar 2021 13:10:43 -0500 Received: from github.com (hubbernetes-node-f74ee4a.ac4-iad.github.net [10.52.114.83]) by smtp.github.com (Postfix) with ESMTPA id 541D5560063 for ; Wed, 3 Mar 2021 10:10:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614795039; bh=NmaQS425DclTgbDz4h+67xvlSs6uWfeXldI3gEfuMR8=; h=Date:From:To:Subject:From; b=McbO8iEXpUm/m+ulqMV5JdPj7ALyCESTCQFNC8PxHlkAQv3e5UEdjt8EWaf3HRkCV jhCKI3HuqS4cShgJVC8FCPlmtUm03BGkfQ0gklmDzukYChi8vuVuanHE4So5B4LiRq s9kwvTNAJIY/yfYXZ/htAuI8vLs2knyYd8CTow1o= Date: Wed, 03 Mar 2021 10:10:39 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 0a343a: i386/acpi: restore device paths for pre-5.1 vms X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Mar 2021 18:10:44 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 0a343a5add75f9f90c65e932863d57ddbcb28f5c=0D https://github.com/qemu/qemu/commit/0a343a5add75f9f90c65e932863d57d= dbcb28f5c=0D Author: Vitaly Cheptsov =0D Date: 2021-03-02 (Tue, 02 Mar 2021)=0D =0D Changed paths:=0D M hw/i386/acpi-build.c=0D M hw/i386/pc_piix.c=0D M hw/i386/pc_q35.c=0D M include/hw/i386/pc.h=0D =0D Log Message:=0D -----------=0D i386/acpi: restore device paths for pre-5.1 vms=0D =0D After fixing the _UID value for the primary PCI root bridge in=0D af1b80ae it was discovered that this change updates Windows=0D configuration in an incompatible way causing network configuration=0D failure unless DHCP is used. More details provided on the list:=0D =0D https://lists.gnu.org/archive/html/qemu-devel/2021-02/msg08484.html=0D =0D This change reverts the _UID update from 1 to 0 for q35 and i440fx=0D VMs before version 5.2 to maintain the original behaviour when=0D upgrading.=0D =0D Cc: qemu-stable@nongnu.org=0D Cc: qemu-devel@nongnu.org=0D Reported-by: Thomas Lamprecht =0D Suggested-by: Michael S. Tsirkin =0D Signed-off-by: Vitaly Cheptsov =0D Message-Id: <20210301195919.9333-1-cheptsov@ispras.ru>=0D Tested-by: Thomas Lamprecht =0D Reviewed-by: Igor Mammedov =0D Reviewed-by: Michael S. Tsirkin =0D Signed-off-by: Michael S. Tsirkin =0D Fixes: af1b80ae56c9 ("i386/acpi: fix inconsistent QEMU/OVMF device paths"= )=0D =0D =0D Commit: fb592882397870a9eaf206f6c92789274ed07dda=0D https://github.com/qemu/qemu/commit/fb592882397870a9eaf206f6c927892= 74ed07dda=0D Author: Cindy Lu =0D Date: 2021-03-02 (Tue, 02 Mar 2021)=0D =0D Changed paths:=0D M hw/net/virtio-net.c=0D =0D Log Message:=0D -----------=0D virtio-net: handle zero mac for a vdpa peer=0D =0D Some mlx vdpa devices with kernels at least up to 5.11 currently present=0D= 0 as their MAC address. This is because they have not been=0D pre-configured with a MAC: they have a learning bridge and only learn=0D= the MAC once guest is up. Kernel patches and tools to allow programming=0D= the MAC from host are being developed. For now - since these=0D combinations exist in the field - let's detect zero mac and just try to=0D= proceed with the mac from the qemu command line.=0D =0D This makes the guest use this MAC to send packets in turn teaching=0D the MAC to the card, and things work.=0D =0D TODO:=0D report the actual MAC from QEMU commad line in the info message.=0D TODO:=0D detect that a (non-zero) hardware MAC does not match QEMU command line=0D= and fail init.=0D =0D Signed-off-by: Cindy Lu =0D Message-Id: <20210225165506.18321-2-lulu@redhat.com>=0D =0D mst: rewritten code comments, message printed and the commit log.=0D =0D Cc: Eli Cohen =0D Cc: Parav Pandit =0D Tested-by: Adrian Moreno =0D Tested-by: Sean Mooney =0D Reviewed-by: Michael S. Tsirkin =0D Signed-off-by: Michael S. Tsirkin =0D =0D =0D Commit: b52fa0ea45bea494a953dd766151d584a28e87e5=0D https://github.com/qemu/qemu/commit/b52fa0ea45bea494a953dd766151d58= 4a28e87e5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-02 (Tue, 02 Mar 2021)=0D =0D Changed paths:=0D M hw/pci/pci.c=0D =0D Log Message:=0D -----------=0D hw/pci: Have safer pcie_bus_realize() by checking error path=0D =0D While pci_bus_realize() currently does not use the Error* argument,=0D it would be an error to leave pcie_bus_realize() setting bus->flags=0D if pci_bus_realize() had failed.=0D =0D Fix by using a local Error* and return early (propagating the error)=0D if pci_bus_realize() failed.=0D =0D Reported-by: Markus Armbruster =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210201153700.618946-1-philmd@redhat.com>=0D Reviewed-by: Michael S. Tsirkin =0D Signed-off-by: Michael S. Tsirkin =0D =0D =0D Commit: 1d8d014e936a49795de95a35a2a1ab8000ab2e5b=0D https://github.com/qemu/qemu/commit/1d8d014e936a49795de95a35a2a1ab8= 000ab2e5b=0D Author: Stefan Hajnoczi =0D Date: 2021-03-02 (Tue, 02 Mar 2021)=0D =0D Changed paths:=0D M hw/virtio/vhost.c=0D =0D Log Message:=0D -----------=0D vhost: simplify vhost_dev_init() fail_busyloop label=0D =0D Requiring a conditional for every goto is tedious:=0D =0D if (busyloop_timeout) {=0D goto fail_busyloop;=0D } else {=0D goto fail;=0D }=0D =0D Move the conditional to into the fail_busyloop label so that it's safe=0D= to jump to this label unconditionally.=0D =0D This change makes the migrate_add_blocker() error case more consistent.=0D= It jumped to fail_busyloop unconditionally whereas the memslots limits=0D= error case was conditional.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210222114931.272308-1-stefanha@redhat.com>=0D Reviewed-by: Stefano Garzarella =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Michael S. Tsirkin =0D Signed-off-by: Michael S. Tsirkin =0D =0D =0D Commit: c40ae5a3ee387b13116948cbfe7824f03311db7e=0D https://github.com/qemu/qemu/commit/c40ae5a3ee387b13116948cbfe7824f= 03311db7e=0D Author: Peter Maydell =0D Date: 2021-03-03 (Wed, 03 Mar 2021)=0D =0D Changed paths:=0D M hw/i386/acpi-build.c=0D M hw/i386/pc_piix.c=0D M hw/i386/pc_q35.c=0D M hw/net/virtio-net.c=0D M hw/pci/pci.c=0D M hw/virtio/vhost.c=0D M include/hw/i386/pc.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagi= ng=0D =0D pc,virtio,pci: bug fixes=0D =0D Fixes all over the place. Specifically this fixes=0D a bug which made windows guests lose device config=0D (such as the configured fixed IP) after upgrading=0D to the new QEMU.=0D =0D Signed-off-by: Michael S. Tsirkin =0D =0D # gpg: Signature made Tue 02 Mar 2021 14:19:51 GMT=0D # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5= 469=0D # gpg: issuer "mst@redhat.com"=0D # gpg: Good signature from "Michael S. Tsirkin " [full]=0D= # gpg: aka "Michael S. Tsirkin " [full]=0D= # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE = 8E67=0D # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D = 5469=0D =0D * remotes/mst/tags/for_upstream:=0D vhost: simplify vhost_dev_init() fail_busyloop label=0D hw/pci: Have safer pcie_bus_realize() by checking error path=0D virtio-net: handle zero mac for a vdpa peer=0D i386/acpi: restore device paths for pre-5.1 vms=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/07dbfdd290ce...c40ae5a3ee38= =0D From MAILER-DAEMON Thu Mar 04 05:43:28 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lHlS4-0004H7-Cq for mharc-qemu-commits@gnu.org; Thu, 04 Mar 2021 05:43:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:55424) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHlS3-0004Gr-Ia for qemu-commits@nongnu.org; Thu, 04 Mar 2021 05:43:27 -0500 Received: from out-18.smtp.github.com ([192.30.252.201]:50919 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHlS1-0005Hu-B7 for qemu-commits@nongnu.org; Thu, 04 Mar 2021 05:43:26 -0500 Received: from github.com (hubbernetes-node-284cf4b.va3-iad.github.net [10.48.100.58]) by smtp.github.com (Postfix) with ESMTPA id 7D07A340474 for ; Thu, 4 Mar 2021 02:43:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614854604; bh=Z89+TOWdrYCVAe/8CbbYSdc5BHgQ+3osX6TDUJWnHCY=; h=Date:From:To:Subject:From; b=y4e9UrMZkwrwtq2Q5depl8fo8leLJLD1kgb0P7vJ+f49iIFzeMRTRJhtGZLwER7El LSn/JCURteWLQn5Em3ntmSh44j3OBp1zc7cp+JhT29P5l9Lkh27eqVCI1iVvGwuJGX AV1iMsqHoMh7sQ5dHNn2FG1m+Rrf/93l9l096bzo= Date: Thu, 04 Mar 2021 02:43:24 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] e586ed: virtiofs: drop remapped security.capability xattr ... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Mar 2021 10:43:27 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: e586edcb410543768ef009eaa22a2d9dd4a53846 https://github.com/qemu/qemu/commit/e586edcb410543768ef009eaa22a2d9dd4a53846 Author: Dr. David Alan Gilbert Date: 2021-03-04 (Thu, 04 Mar 2021) Changed paths: M docs/tools/virtiofsd.rst M tools/virtiofsd/passthrough_ll.c Log Message: ----------- virtiofs: drop remapped security.capability xattr as needed On Linux, the 'security.capability' xattr holds a set of capabilities that can change when an executable is run, giving a limited form of privilege escalation to those programs that the writer of the file deemed worthy. Any write causes the 'security.capability' xattr to be dropped, stopping anyone from gaining privilege by modifying a blessed file. Fuse relies on the daemon to do this dropping, and in turn the daemon relies on the host kernel to drop the xattr for it. However, with the addition of -o xattrmap, the xattr that the guest stores its capabilities in is now not the same as the one that the host kernel automatically clears. Where the mapping changes 'security.capability', explicitly clear the remapped name to preserve the same behaviour. This bug is assigned CVE-2021-20263. Signed-off-by: Dr. David Alan Gilbert Reviewed-by: Vivek Goyal Commit: cb90ecf9349198558569f6c86c4c27d215406095 https://github.com/qemu/qemu/commit/cb90ecf9349198558569f6c86c4c27d215406095 Author: Peter Maydell Date: 2021-03-04 (Thu, 04 Mar 2021) Changed paths: M docs/tools/virtiofsd.rst M tools/virtiofsd/passthrough_ll.c Log Message: ----------- Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20210304' into staging virtiofs minor security fix Fix xattrmap to drop remapped security.capability capabilities. Signed-off-by: Dr. David Alan Gilbert # gpg: Signature made Thu 04 Mar 2021 10:36:45 GMT # gpg: using RSA key 45F5C71B4A0CB7FB977A9FA90516331EBC5BFDE7 # gpg: Good signature from "Dr. David Alan Gilbert (RH2) " [full] # Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7 * remotes/dgilbert-gitlab/tags/pull-virtiofs-20210304: virtiofs: drop remapped security.capability xattr as needed Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/c40ae5a3ee38...cb90ecf93491 From MAILER-DAEMON Thu Mar 04 08:04:41 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lHnej-0003Lk-3g for mharc-qemu-commits@gnu.org; Thu, 04 Mar 2021 08:04:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59454) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHneh-0003KL-Q1 for qemu-commits@nongnu.org; Thu, 04 Mar 2021 08:04:39 -0500 Received: from out-24.smtp.github.com ([192.30.252.207]:33633) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHneg-00028B-0h for qemu-commits@nongnu.org; Thu, 04 Mar 2021 08:04:39 -0500 Received: from github.com (hubbernetes-node-2b0cb0b.ac4-iad.github.net [10.52.205.45]) by smtp.github.com (Postfix) with ESMTPA id 5575C600852 for ; Thu, 4 Mar 2021 05:04:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614863077; bh=KVE6plTXrpamlXPpMJjX9DH6chEYtcPIO4MQu7y0FfQ=; h=Date:From:To:Subject:From; b=mBr4iGS4nzwYeUYjYB8Qc8yitJm7yQVzu/6uXA5mYGh+F/awx8LGxEUzn/zlj1oDR kaoOb6MZSpzH3K6pfmE/SHsEiNy2LRhmmB9kniyBK5QF86oEXtK5a/9kdXBLUkaG/v NFkEL3J768C2rieqDYtchd0UWUCevnwKv/ULiYHE= Date: Thu, 04 Mar 2021 05:04:37 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] e586ed: virtiofs: drop remapped security.capability xattr ... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Mar 2021 13:04:40 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: e586edcb410543768ef009eaa22a2d9dd4a53846 https://github.com/qemu/qemu/commit/e586edcb410543768ef009eaa22a2d9dd4a53846 Author: Dr. David Alan Gilbert Date: 2021-03-04 (Thu, 04 Mar 2021) Changed paths: M docs/tools/virtiofsd.rst M tools/virtiofsd/passthrough_ll.c Log Message: ----------- virtiofs: drop remapped security.capability xattr as needed On Linux, the 'security.capability' xattr holds a set of capabilities that can change when an executable is run, giving a limited form of privilege escalation to those programs that the writer of the file deemed worthy. Any write causes the 'security.capability' xattr to be dropped, stopping anyone from gaining privilege by modifying a blessed file. Fuse relies on the daemon to do this dropping, and in turn the daemon relies on the host kernel to drop the xattr for it. However, with the addition of -o xattrmap, the xattr that the guest stores its capabilities in is now not the same as the one that the host kernel automatically clears. Where the mapping changes 'security.capability', explicitly clear the remapped name to preserve the same behaviour. This bug is assigned CVE-2021-20263. Signed-off-by: Dr. David Alan Gilbert Reviewed-by: Vivek Goyal Commit: cb90ecf9349198558569f6c86c4c27d215406095 https://github.com/qemu/qemu/commit/cb90ecf9349198558569f6c86c4c27d215406095 Author: Peter Maydell Date: 2021-03-04 (Thu, 04 Mar 2021) Changed paths: M docs/tools/virtiofsd.rst M tools/virtiofsd/passthrough_ll.c Log Message: ----------- Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiofs-20210304' into staging virtiofs minor security fix Fix xattrmap to drop remapped security.capability capabilities. Signed-off-by: Dr. David Alan Gilbert # gpg: Signature made Thu 04 Mar 2021 10:36:45 GMT # gpg: using RSA key 45F5C71B4A0CB7FB977A9FA90516331EBC5BFDE7 # gpg: Good signature from "Dr. David Alan Gilbert (RH2) " [full] # Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B FDE7 * remotes/dgilbert-gitlab/tags/pull-virtiofs-20210304: virtiofs: drop remapped security.capability xattr as needed Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/c40ae5a3ee38...cb90ecf93491 From MAILER-DAEMON Thu Mar 04 08:04:41 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lHnej-0003ME-E0 for mharc-qemu-commits@gnu.org; Thu, 04 Mar 2021 08:04:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59452) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHneh-0003Jo-F7 for qemu-commits@nongnu.org; Thu, 04 Mar 2021 08:04:39 -0500 Received: from out-20.smtp.github.com ([192.30.252.203]:59765) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lHnee-00027N-Ul for qemu-commits@nongnu.org; Thu, 04 Mar 2021 08:04:39 -0500 Received: from github.com (hubbernetes-node-34ac8dd.va3-iad.github.net [10.48.100.66]) by smtp.github.com (Postfix) with ESMTPA id 29429E0381 for ; Thu, 4 Mar 2021 05:04:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614863076; bh=5kmVBekqGwQnuoyAV8HFijvXTZmocwEBZ8uOyA5Vbl4=; h=Date:From:To:Subject:From; b=ov0IxTz7r9A+OYmxi3827dKe9cYXSo96Myc8OyX3MZHB1Ne9pfOf9NkG2mrfGDbrE MeeaENH+8osqKTBmcs/eo4ub/91O5lNjH5Mc9X3UOgO2Nm9oS1QeO/nNdcOVRDn9hn 34dlnhG50Pfc85jNs54zmJB2t9c2d/OfFbuUgjbg= Date: Thu, 04 Mar 2021 05:04:36 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.203; envelope-from=noreply@github.com; helo=out-20.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 1e8b6f: ui/cocoa: Remove the uses of full screen APIs X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 04 Mar 2021 13:04:39 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 1e8b6f2b4989d3d2567befa00cd9c4430190f433=0D https://github.com/qemu/qemu/commit/1e8b6f2b4989d3d2567befa00cd9c44= 30190f433=0D Author: Akihiko Odaki =0D Date: 2021-03-03 (Wed, 03 Mar 2021)=0D =0D Changed paths:=0D M ui/cocoa.m=0D =0D Log Message:=0D -----------=0D ui/cocoa: Remove the uses of full screen APIs=0D =0D The detections of [NSView -enterFullScreen:] and=0D [NSView -exitFullScreen:] were wrong. A detection is coded as:=0D [NSView respondsToSelector:@selector(exitFullScreenModeWithOptions:)]=0D but it should be:=0D [NSView instancesRespondToSelector:@selector(exitFullScreenModeWithOption= s:)]=0D =0D Because of those APIs were not detected, ui/cocoa always falled=0D back to a borderless window whose frame matches the screen to=0D implement fullscreen behavior.=0D =0D The code using [NSView -enterFullScreen:] and=0D [NSView -exitFullScreen:] will be used if you fix the detections,=0D but its behavior is undesirable; the full screen view stretches=0D the video, changing the aspect ratio, even if zooming is disabled.=0D =0D This change removes the code as it does nothing good.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210220013138.51437-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 8eb13bbbac08aa077efcf9877c9646c4497d766c=0D https://github.com/qemu/qemu/commit/8eb13bbbac08aa077efcf9877c9646c= 4497d766c=0D Author: Zack Marvel =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M ui/gtk.c=0D =0D Log Message:=0D -----------=0D ui/gtk: vte: fix sending multiple characeters=0D =0D When using the GTK UI with libvte, multicharacter keystrokes are not=0D sent correctly (such as arrow keys). gd_vc_in should check the=0D CharBackend's can_receive instead of assuming multiple characters can be=0D= received. This is not an issue for e.g. the SDL UI because=0D qemu_chr_be_write is called with len=3D1 for each character (SDL sends=0D= more than once keystroke).=0D =0D Modify gd_vc_in to call qemu_chr_be_write multiple times if necessary.=0D= =0D Buglink: https://bugs.launchpad.net/qemu/+bug/1407808=0D =0D Signed-off-by: Zack Marvel =0D Message-Id: <20210221170613.13183-2-zpmarvel@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: d9c32b8f7f5f05511d77a1ec1d1d35bf7bff2961=0D https://github.com/qemu/qemu/commit/d9c32b8f7f5f05511d77a1ec1d1d35b= f7bff2961=0D Author: Akihiko Odaki =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M ui/cocoa.m=0D =0D Log Message:=0D -----------=0D ui/cocoa: Fix stride resolution of pixman image=0D =0D A display can receive an image which its stride is greater than its=0D width. In fact, when a guest requests virtio-gpu to scan out a=0D smaller part of an image, virtio-gpu passes it to a display as an=0D image which its width represents the one of the part and its stride=0D equals to the one of the whole image.=0D =0D This change makes ui/cocoa to cover such cases.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210222144012.21486-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: bc6a3565c89243f0aaa24bac6dc37fb52b16d5c5=0D https://github.com/qemu/qemu/commit/bc6a3565c89243f0aaa24bac6dc37fb= 52b16d5c5=0D Author: Akihiko Odaki =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M configure=0D M docs/interop/vhost-user.json=0D M include/ui/egl-helpers.h=0D M include/ui/spice-display.h=0D M meson.build=0D M ui/egl-helpers.c=0D M ui/gtk-egl.c=0D M ui/gtk-gl-area.c=0D M ui/gtk.c=0D M ui/meson.build=0D =0D Log Message:=0D -----------=0D configure: Improve OpenGL dependency detections=0D =0D This has the following visible changes:=0D =0D - GBM is required only for OpenGL dma-buf.=0D - X11 is explicitly required by gtk-egl.=0D - EGL is now mandatory for the OpenGL displays.=0D =0D The last one needs some detailed description. Before this change,=0D EGL was tested only for OpenGL dma-buf with the check of=0D EGL_MESA_image_dma_buf_export. However, all of the OpenGL=0D displays depend on EGL and EGL_MESA_image_dma_buf_export is always=0D defined by epoxy's EGL interface.=0D Therefore, it makes more sense to always check the presence of EGL=0D and say the OpenGL displays are available along with OpenGL dma-buf=0D if it is present.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210223060307.87736-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 4313739a57a34998ebaf032dcdda065c0105a939=0D https://github.com/qemu/qemu/commit/4313739a57a34998ebaf032dcdda065= c0105a939=0D Author: Akihiko Odaki =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M ui/cocoa.m=0D =0D Log Message:=0D -----------=0D ui/cocoa: Replace fprintf with error_report=0D =0D Signed-off-by: Akihiko Odaki =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210223131106.21166-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: b5a087b071b6d4752234d8c190cc7f22f44ec2e9=0D https://github.com/qemu/qemu/commit/b5a087b071b6d4752234d8c190cc7f2= 2f44ec2e9=0D Author: Akihiko Odaki =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/display/vhost-user-gpu.c=0D M hw/display/virtio-gpu.c=0D M include/ui/console.h=0D M ui/console.c=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D ui/console: Add placeholder flag to message surface=0D =0D The surfaces created with former qemu_create_message_surface=0D did not display the content from the guest and always contained=0D simple messages describing the reason.=0D =0D A display backend may want to hide the window showing such a=0D surface. This change renames the function to=0D qemu_create_placeholder_surface, and adds "placeholder" flag; the=0D display can check the flag to decide to do anything special like=0D hiding the window.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210225101316.83940-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: c821a58ee7003c2a0567dddaee33c2a5ae71c404=0D https://github.com/qemu/qemu/commit/c821a58ee7003c2a0567dddaee33c2a= 5ae71c404=0D Author: Akihiko Odaki =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M ui/console.c=0D M ui/gtk.c=0D M ui/sdl2-2d.c=0D M ui/sdl2-gl.c=0D M ui/spice-display.c=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D ui/console: Pass placeholder surface to displays=0D =0D ui/console used to accept NULL as graphic console surface, but its=0D semantics was inconsistent among displays:=0D - cocoa and gtk-egl perform NULL dereference.=0D - egl-headless, spice and spice-egl do nothing.=0D - gtk releases underlying resources.=0D - sdl2-2d and sdl2-gl destroys the window.=0D - vnc shows a message, "Display output is not active."=0D =0D Fortunately, only virtio-gpu and virtio-gpu-3d assign NULL so=0D we can study them to figure out the desired behavior. They assign=0D NULL *except* for the primary display when the device is realized,=0D reset, or its scanout is disabled. This effectively destroys=0D windows for the (uninitialized) secondary displays.=0D =0D To implement the consistent behavior of display device=0D realization/reset, this change embeds it to the operation=0D switching the surface. When NULL was given as a new surface when=0D switching, ui/console will instead passes a placeholder down=0D to each display listeners.=0D =0D sdl destroys the window for a secondary console if its surface is a=0D placeholder. The other displays simply shows the placeholder.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210225101316.83940-2-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: ed8f3fe6898e0f3fea2ece7c87464a06098b2300=0D https://github.com/qemu/qemu/commit/ed8f3fe6898e0f3fea2ece7c87464a0= 6098b2300=0D Author: Akihiko Odaki =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/display/vhost-user-gpu.c=0D M hw/display/virtio-gpu-3d.c=0D M hw/display/virtio-gpu-base.c=0D M hw/display/virtio-gpu.c=0D =0D Log Message:=0D -----------=0D virtio-gpu: Do not distinguish the primary console=0D =0D In the past, virtio-gpu set NULL as the surface for the secondary=0D consoles to hide its window. The distinction is now handled in=0D ui/console and the display backends and virtio-gpu does no longer=0D have to do that.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210225101316.83940-3-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: fe352f5c0056b4d21ae033ec49acc0bce9897e53=0D https://github.com/qemu/qemu/commit/fe352f5c0056b4d21ae033ec49acc0b= ce9897e53=0D Author: Peter Maydell =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M configure=0D M docs/interop/vhost-user.json=0D M hw/display/vhost-user-gpu.c=0D M hw/display/virtio-gpu-3d.c=0D M hw/display/virtio-gpu-base.c=0D M hw/display/virtio-gpu.c=0D M include/ui/console.h=0D M include/ui/egl-helpers.h=0D M include/ui/spice-display.h=0D M meson.build=0D M ui/cocoa.m=0D M ui/console.c=0D M ui/egl-helpers.c=0D M ui/gtk-egl.c=0D M ui/gtk-gl-area.c=0D M ui/gtk.c=0D M ui/meson.build=0D M ui/sdl2-2d.c=0D M ui/sdl2-gl.c=0D M ui/spice-display.c=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kraxel/tags/ui-20210304-pull-requ= est' into staging=0D =0D ui/console: message surface tweaks.=0D ui/cocoa: bugfixes and cleanups.=0D =0D # gpg: Signature made Thu 04 Mar 2021 08:36:53 GMT=0D # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87= 138=0D # gpg: Good signature from "Gerd Hoffmann (work) " [fu= ll]=0D # gpg: aka "Gerd Hoffmann " [full]=0D # gpg: aka "Gerd Hoffmann (private) " [= full]=0D # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 = 7138=0D =0D * remotes/kraxel/tags/ui-20210304-pull-request:=0D virtio-gpu: Do not distinguish the primary console=0D ui/console: Pass placeholder surface to displays=0D ui/console: Add placeholder flag to message surface=0D ui/cocoa: Replace fprintf with error_report=0D configure: Improve OpenGL dependency detections=0D ui/cocoa: Fix stride resolution of pixman image=0D ui/gtk: vte: fix sending multiple characeters=0D ui/cocoa: Remove the uses of full screen APIs=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/cb90ecf93491...fe352f5c0056= =0D From MAILER-DAEMON Fri Mar 05 05:19:23 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lI7YI-00084t-UL for mharc-qemu-commits@gnu.org; Fri, 05 Mar 2021 05:19:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:46630) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lI7YI-00081M-3W for qemu-commits@nongnu.org; Fri, 05 Mar 2021 05:19:22 -0500 Received: from out-28.smtp.github.com ([192.30.252.211]:37797) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lI7YF-00015E-3Y for qemu-commits@nongnu.org; Fri, 05 Mar 2021 05:19:21 -0500 Received: from github.com (hubbernetes-node-85733df.ash1-iad.github.net [10.56.119.31]) by smtp.github.com (Postfix) with ESMTPA id E3065900706 for ; Fri, 5 Mar 2021 02:19:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614939555; bh=WY2LoV6LmjQtgDnE1glsdIwjoe4c3FfUJZt8YZzUj+Q=; h=Date:From:To:Subject:From; b=mGMVlSYkXYQNP29SOjL70gG02Qq731HrWXy7MLnjMTxH8XkdgN4dnC9WVUU05I9ol YH/2dBwtXncGTOfD9Gdc8nSgJt44J82et7yI1UxXs1Ar7U3bGnDe+qDwtQKJX+lqoK +W2zjQTk5eSFDov/NdQIqHHTrv1W+0rVSLnIUhUo= Date: Fri, 05 Mar 2021 02:19:15 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 1e8b6f: ui/cocoa: Remove the uses of full screen APIs X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Mar 2021 10:19:22 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 1e8b6f2b4989d3d2567befa00cd9c4430190f433=0D https://github.com/qemu/qemu/commit/1e8b6f2b4989d3d2567befa00cd9c44= 30190f433=0D Author: Akihiko Odaki =0D Date: 2021-03-03 (Wed, 03 Mar 2021)=0D =0D Changed paths:=0D M ui/cocoa.m=0D =0D Log Message:=0D -----------=0D ui/cocoa: Remove the uses of full screen APIs=0D =0D The detections of [NSView -enterFullScreen:] and=0D [NSView -exitFullScreen:] were wrong. A detection is coded as:=0D [NSView respondsToSelector:@selector(exitFullScreenModeWithOptions:)]=0D but it should be:=0D [NSView instancesRespondToSelector:@selector(exitFullScreenModeWithOption= s:)]=0D =0D Because of those APIs were not detected, ui/cocoa always falled=0D back to a borderless window whose frame matches the screen to=0D implement fullscreen behavior.=0D =0D The code using [NSView -enterFullScreen:] and=0D [NSView -exitFullScreen:] will be used if you fix the detections,=0D but its behavior is undesirable; the full screen view stretches=0D the video, changing the aspect ratio, even if zooming is disabled.=0D =0D This change removes the code as it does nothing good.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210220013138.51437-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 8eb13bbbac08aa077efcf9877c9646c4497d766c=0D https://github.com/qemu/qemu/commit/8eb13bbbac08aa077efcf9877c9646c= 4497d766c=0D Author: Zack Marvel =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M ui/gtk.c=0D =0D Log Message:=0D -----------=0D ui/gtk: vte: fix sending multiple characeters=0D =0D When using the GTK UI with libvte, multicharacter keystrokes are not=0D sent correctly (such as arrow keys). gd_vc_in should check the=0D CharBackend's can_receive instead of assuming multiple characters can be=0D= received. This is not an issue for e.g. the SDL UI because=0D qemu_chr_be_write is called with len=3D1 for each character (SDL sends=0D= more than once keystroke).=0D =0D Modify gd_vc_in to call qemu_chr_be_write multiple times if necessary.=0D= =0D Buglink: https://bugs.launchpad.net/qemu/+bug/1407808=0D =0D Signed-off-by: Zack Marvel =0D Message-Id: <20210221170613.13183-2-zpmarvel@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: d9c32b8f7f5f05511d77a1ec1d1d35bf7bff2961=0D https://github.com/qemu/qemu/commit/d9c32b8f7f5f05511d77a1ec1d1d35b= f7bff2961=0D Author: Akihiko Odaki =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M ui/cocoa.m=0D =0D Log Message:=0D -----------=0D ui/cocoa: Fix stride resolution of pixman image=0D =0D A display can receive an image which its stride is greater than its=0D width. In fact, when a guest requests virtio-gpu to scan out a=0D smaller part of an image, virtio-gpu passes it to a display as an=0D image which its width represents the one of the part and its stride=0D equals to the one of the whole image.=0D =0D This change makes ui/cocoa to cover such cases.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210222144012.21486-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: bc6a3565c89243f0aaa24bac6dc37fb52b16d5c5=0D https://github.com/qemu/qemu/commit/bc6a3565c89243f0aaa24bac6dc37fb= 52b16d5c5=0D Author: Akihiko Odaki =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M configure=0D M docs/interop/vhost-user.json=0D M include/ui/egl-helpers.h=0D M include/ui/spice-display.h=0D M meson.build=0D M ui/egl-helpers.c=0D M ui/gtk-egl.c=0D M ui/gtk-gl-area.c=0D M ui/gtk.c=0D M ui/meson.build=0D =0D Log Message:=0D -----------=0D configure: Improve OpenGL dependency detections=0D =0D This has the following visible changes:=0D =0D - GBM is required only for OpenGL dma-buf.=0D - X11 is explicitly required by gtk-egl.=0D - EGL is now mandatory for the OpenGL displays.=0D =0D The last one needs some detailed description. Before this change,=0D EGL was tested only for OpenGL dma-buf with the check of=0D EGL_MESA_image_dma_buf_export. However, all of the OpenGL=0D displays depend on EGL and EGL_MESA_image_dma_buf_export is always=0D defined by epoxy's EGL interface.=0D Therefore, it makes more sense to always check the presence of EGL=0D and say the OpenGL displays are available along with OpenGL dma-buf=0D if it is present.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210223060307.87736-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 4313739a57a34998ebaf032dcdda065c0105a939=0D https://github.com/qemu/qemu/commit/4313739a57a34998ebaf032dcdda065= c0105a939=0D Author: Akihiko Odaki =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M ui/cocoa.m=0D =0D Log Message:=0D -----------=0D ui/cocoa: Replace fprintf with error_report=0D =0D Signed-off-by: Akihiko Odaki =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210223131106.21166-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: b5a087b071b6d4752234d8c190cc7f22f44ec2e9=0D https://github.com/qemu/qemu/commit/b5a087b071b6d4752234d8c190cc7f2= 2f44ec2e9=0D Author: Akihiko Odaki =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/display/vhost-user-gpu.c=0D M hw/display/virtio-gpu.c=0D M include/ui/console.h=0D M ui/console.c=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D ui/console: Add placeholder flag to message surface=0D =0D The surfaces created with former qemu_create_message_surface=0D did not display the content from the guest and always contained=0D simple messages describing the reason.=0D =0D A display backend may want to hide the window showing such a=0D surface. This change renames the function to=0D qemu_create_placeholder_surface, and adds "placeholder" flag; the=0D display can check the flag to decide to do anything special like=0D hiding the window.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210225101316.83940-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: c821a58ee7003c2a0567dddaee33c2a5ae71c404=0D https://github.com/qemu/qemu/commit/c821a58ee7003c2a0567dddaee33c2a= 5ae71c404=0D Author: Akihiko Odaki =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M ui/console.c=0D M ui/gtk.c=0D M ui/sdl2-2d.c=0D M ui/sdl2-gl.c=0D M ui/spice-display.c=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D ui/console: Pass placeholder surface to displays=0D =0D ui/console used to accept NULL as graphic console surface, but its=0D semantics was inconsistent among displays:=0D - cocoa and gtk-egl perform NULL dereference.=0D - egl-headless, spice and spice-egl do nothing.=0D - gtk releases underlying resources.=0D - sdl2-2d and sdl2-gl destroys the window.=0D - vnc shows a message, "Display output is not active."=0D =0D Fortunately, only virtio-gpu and virtio-gpu-3d assign NULL so=0D we can study them to figure out the desired behavior. They assign=0D NULL *except* for the primary display when the device is realized,=0D reset, or its scanout is disabled. This effectively destroys=0D windows for the (uninitialized) secondary displays.=0D =0D To implement the consistent behavior of display device=0D realization/reset, this change embeds it to the operation=0D switching the surface. When NULL was given as a new surface when=0D switching, ui/console will instead passes a placeholder down=0D to each display listeners.=0D =0D sdl destroys the window for a secondary console if its surface is a=0D placeholder. The other displays simply shows the placeholder.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210225101316.83940-2-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: ed8f3fe6898e0f3fea2ece7c87464a06098b2300=0D https://github.com/qemu/qemu/commit/ed8f3fe6898e0f3fea2ece7c87464a0= 6098b2300=0D Author: Akihiko Odaki =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/display/vhost-user-gpu.c=0D M hw/display/virtio-gpu-3d.c=0D M hw/display/virtio-gpu-base.c=0D M hw/display/virtio-gpu.c=0D =0D Log Message:=0D -----------=0D virtio-gpu: Do not distinguish the primary console=0D =0D In the past, virtio-gpu set NULL as the surface for the secondary=0D consoles to hide its window. The distinction is now handled in=0D ui/console and the display backends and virtio-gpu does no longer=0D have to do that.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210225101316.83940-3-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: fe352f5c0056b4d21ae033ec49acc0bce9897e53=0D https://github.com/qemu/qemu/commit/fe352f5c0056b4d21ae033ec49acc0b= ce9897e53=0D Author: Peter Maydell =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M configure=0D M docs/interop/vhost-user.json=0D M hw/display/vhost-user-gpu.c=0D M hw/display/virtio-gpu-3d.c=0D M hw/display/virtio-gpu-base.c=0D M hw/display/virtio-gpu.c=0D M include/ui/console.h=0D M include/ui/egl-helpers.h=0D M include/ui/spice-display.h=0D M meson.build=0D M ui/cocoa.m=0D M ui/console.c=0D M ui/egl-helpers.c=0D M ui/gtk-egl.c=0D M ui/gtk-gl-area.c=0D M ui/gtk.c=0D M ui/meson.build=0D M ui/sdl2-2d.c=0D M ui/sdl2-gl.c=0D M ui/spice-display.c=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kraxel/tags/ui-20210304-pull-requ= est' into staging=0D =0D ui/console: message surface tweaks.=0D ui/cocoa: bugfixes and cleanups.=0D =0D # gpg: Signature made Thu 04 Mar 2021 08:36:53 GMT=0D # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87= 138=0D # gpg: Good signature from "Gerd Hoffmann (work) " [fu= ll]=0D # gpg: aka "Gerd Hoffmann " [full]=0D # gpg: aka "Gerd Hoffmann (private) " [= full]=0D # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 = 7138=0D =0D * remotes/kraxel/tags/ui-20210304-pull-request:=0D virtio-gpu: Do not distinguish the primary console=0D ui/console: Pass placeholder surface to displays=0D ui/console: Add placeholder flag to message surface=0D ui/cocoa: Replace fprintf with error_report=0D configure: Improve OpenGL dependency detections=0D ui/cocoa: Fix stride resolution of pixman image=0D ui/gtk: vte: fix sending multiple characeters=0D ui/cocoa: Remove the uses of full screen APIs=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/cb90ecf93491...fe352f5c0056= =0D From MAILER-DAEMON Fri Mar 05 05:48:27 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lI80R-0004ME-08 for mharc-qemu-commits@gnu.org; Fri, 05 Mar 2021 05:48:27 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:51640) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lI80P-0004Kn-9N for qemu-commits@nongnu.org; Fri, 05 Mar 2021 05:48:25 -0500 Received: from out-28.smtp.github.com ([192.30.252.211]:55971) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lI80L-0005i3-Ex for qemu-commits@nongnu.org; Fri, 05 Mar 2021 05:48:24 -0500 Received: from github.com (hubbernetes-node-f7dd089.ash1-iad.github.net [10.56.25.66]) by smtp.github.com (Postfix) with ESMTPA id 83D05900107 for ; Fri, 5 Mar 2021 02:48:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614941300; bh=HCin38X4U9KwtOo2deTSF0qRchOzQL0qOFarxORB9Z8=; h=Date:From:To:Subject:From; b=hmnm1S9g2eTmqH8mfrlVi3cxeo8Z2tOD4ddIoBeI53qgScXxJBAV6RyYYu0nr6lPj BUukdv2jKQsbyGoKOob3mCevgVPUgsWqAVzV6krHvp9hVvivcCJl1p5v6JAy+pDg7m A0XolAEuzxBpJXzjQAcuFTZwIe3pdQRKasUyNZWk= Date: Fri, 05 Mar 2021 02:48:20 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 6f0377: target/riscv: Declare csr_ops[] with a known size X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Mar 2021 10:48:25 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 6f03770daccaffc39a4ce61854ab126020374112=0D https://github.com/qemu/qemu/commit/6f03770daccaffc39a4ce61854ab126= 020374112=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M target/riscv/cpu.h=0D =0D Log Message:=0D -----------=0D target/riscv: Declare csr_ops[] with a known size=0D =0D csr_ops[] is currently declared with an unknown size in cpu.h.=0D Since the array size is known, let's do a complete declaration.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Alistair Francis =0D Message-id: 1611024723-14293-1-git-send-email-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: a033d8008d1b2b35332597eacc92a1a4b14121ad=0D https://github.com/qemu/qemu/commit/a033d8008d1b2b35332597eacc92a1a= 4b14121ad=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/sifive_u_otp.c=0D =0D Log Message:=0D -----------=0D hw/misc: sifive_u_otp: Use error_report() when block operation fails=0D= =0D At present when blk_pread() / blk_pwrite() fails, a guest error=0D is logged, but this is not really a guest error. Change to use=0D error_report() instead.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Alistair Francis =0D Message-id: 1611026585-29971-1-git-send-email-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 454d1e7cf29ff04c11acbef79fdeecdb07118d81=0D https://github.com/qemu/qemu/commit/454d1e7cf29ff04c11acbef79fdeecd= b07118d81=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M pc-bios/opensbi-riscv32-generic-fw_dynamic.bin=0D M pc-bios/opensbi-riscv32-generic-fw_dynamic.elf=0D M pc-bios/opensbi-riscv64-generic-fw_dynamic.bin=0D M pc-bios/opensbi-riscv64-generic-fw_dynamic.elf=0D M roms/opensbi=0D =0D Log Message:=0D -----------=0D roms/opensbi: Upgrade from v0.8 to v0.9=0D =0D Upgrade OpenSBI from v0.8 to v0.9 and the pre-built bios images.=0D =0D The v0.9 release includes the following commits:=0D =0D 35bc810 docs/platform: Update QEMU parameter for fw_payload=0D 78afe11 config.mk: Update QEMU run command for generic and sifive fu540 p= latforms=0D ec3e5b1 docs/platform: sifive_fu540: Update U-Boot instructions=0D 7d61a68 README.md: fix markdown link formatting=0D a5f9104 lib/utils: fdt: Update FDT expand size to 1024 for reserved memor= y node=0D ec1abf6 include: sbi_bitops: Remove dead shift assignment in ffs/fls=0D 8e47649 lib: Add sbi_strncmp implementation=0D 2845d2d lib: utils: Add a macro in libfdt_env.h for strncmp=0D 2cfd2fc lib: utils: Use strncmp in fdt_parse_hart_id()=0D 937caee lib: sbi_misaligned_ldst: Determine transformed instruction lengt= h correctly=0D 4b18a2a firmware: fw_base: Improve exception stack setup in trap handler=0D= 9d56961 lib: sbi_trap: Fix hstatus.SPVP update in sbi_trap_redirect()=0D d7f87d9 platform: kendryte/k210: fixup FDT=0D e435ba0 lib: sbi_init: Avoid thundering hurd problem with coldboot_lock=0D= 4f3bad6 lib: sbi: Handle the case where MTVAL has illegal instruction add= ress=0D 7b0b289 lib: sbi: Remove redundant SBI_HART_HAS_PMP feature=0D 74d1db7 lib: sbi: Improve PMP CSR detection and progamming=0D 2c341f7 lib: sbi: Detect and print MHPM counters at boot-time=0D 162d453 include: sbi: Few cosmetic changes in riscv_encoding.h=0D ebc8ebc lib: sbi: Improve HPM CSR read/write emulation=0D dcb10c0 lib: sbi: Don't handle VS-mode ecall in sbi_trap_handler()=0D bef63d6 include: Rename ECALL defines to match latest RISC-V spec=0D c1c7c3e lib: sbi_trap: Allow M-mode to M-mode ECALLs=0D 6734304 lib: sbi: Allow specifying start mode to sbi_hsm_hart_start() API= =0D 7ccf6bf lib: sbi: Allow specifying mode in sbi_hart_pmp_check_addr() API=0D= 9f935a4 lib: utils: Improve fdt_cpu_fixup() implementation=0D 172fa16 lib: sbi: Ensure coldboot HART supports next privilege mode=0D aaeca7e platform: generic: Don't mark non-MMU HARTs as invalid=0D 7701ea1 lib: sbi: Fix PMP CSR detection=0D 79bf80b lib: sbi_scratch: typo scatch=0D a04c465 makefile: fix clean directive=0D af4b50f Makefile: Build ELF, BIN and LD script in platform build director= y=0D 6ca0969 firmware: Add common FW_FDT_PATH compile-time option=0D 9c07c51 firmware: Remove FW_PAYLOAD_FDT_PATH compile-time option=0D e9a4bfb Makefile: Allow padding zeros when converting DTB to C source=0D a0f2d4a platform: kendryte/k210: Add some padding for FDT fixups=0D dbeeacb include: sbi: Remove redundant includes from sbi_platform.h=0D a12d46a include: sbi: Remove pmp_region callbacks from sbi_platform_opera= tions=0D a126886 lib: sbi: Configure PMP late in coldboot and warmboot path=0D f81d6f6 lib: sbi: Remove redundant hartid parameter from sbi_hart_init()=0D= 8b65005 include: sbi: Make hartmask pointer const in sbi_hartmask_test_ha= rt()=0D b1678af lib: sbi: Add initial domain support=0D e73b92d lib: sbi: Extend sbi_hsm_hart_started_mask() for domains=0D 3a30d2c lib: sbi: Extend sbi_hsm_hart_start() for domains=0D 530e95b lib: sbi: Optimize sbi_hsm_hart_started_mask() implementation=0D 3e20037 lib: sbi: Extend sbi_system_reset() for domains=0D 5edbb7c lib: utils: Update fdt_reserved_memory_fixup() to use current dom= ain=0D 5fd99db lib: utils: Update fdt_cpu_fixup() to use current domain=0D e856462 lib: sbi: Remove redundant sbi_hart_pmp_xyz() functions=0D c10c30b lib: sbi: Configure PMP based on domain memory regions=0D c347408 lib: sbi: Display domain details in boot prints=0D fdf5d5c docs: Add initial documentation for domain support=0D 74c0ea1 lib: utils: Implement "ranges" property parsing=0D bf21632 lib: sbi: Detect PMP granularity and number of address bits=0D a809f40 lib: sbi: Improve boot time print with additional PMP information= =0D 914f81f Makefile: Add option to use toolchain default ABI and ISA string=0D= 48616b3 lib: sbi: Improve boot prints in cold boot sequence=0D 781cafd docs: fix a typo error=0D 54a7734 include: sbi: Add SBI SRST extension related defines=0D c4acc60 include: sbi: Remove opensbi specific reset type defines=0D da07479 platform: Remove dummy system reset functions=0D 5c429ae lib: sbi: Improve system reset platform operations=0D 548d03e lib: sbi: Implement System Reset (SRST) SBI extension=0D 2677324 firmware: fw_base: Optimize trap handler for RV32 systems=0D 8d2edc4 lib: sbi: Fix sbi_hart_switch_mode() for u-mode=0D 3d921fa lib: sbi: Fix typo in sbi_domain_finalize()=0D 4e37022 lib: sbi: Fix domain_count check in sbi_domain_finalize()=0D c709d40 lib: sbi: Auto start domain only if boot HART within limits=0D c1f6d89 include: sbi: Use lower bits for domain memory region permissions= =0D 62ea4f4 lib: sbi: Override domain boot HART when coldboot HART assigned t= o it=0D 555e737 lib: sbi: Add error prints in sbi_domain_finalize()=0D 9b65dca include: sbi: Add domains_init() platform operation=0D c0d2baa docs: Add domain device tree binding documentation=0D ba741ea lib: utils: Add helper routines to populate domains from FDT=0D 4fffb53 platform: generic: Populate domains from FDT=0D e7da0b4 lib: utils/libfdt: Upgrade to v1.6.0 release=0D 2179777 lib: utils: Allow FDT domain iteration functions to fail=0D 7baccfc lib: sbi: Add function to register new domain=0D 6fc1986 lib: utils: Remove fdt_domain_get() function=0D a029bd9 lib: sbi: Remove domain_get() platform callback function=0D 7dcb1e1 lib: sbi: Fix sign-extension in sbi_misaligned_load_handler()=0D 80bc506 lib: sbi: Replace args with trap registers in ecall handler=0D b7df5e4 lib: sbi: Introduce sbi_trap_exit() API=0D 12394a2 lib: sbi: Allow custom local TLB flush function=0D 0d49c3b lib: utils: Fix shakti uart implementation=0D db56341 lib: sbi: Allow platforms to provide root domain memory regions=0D= e884416 include: sbi: No need to pack struct sbi_trap_regs=0D 386eba2 include: sbi: No need to pack struct sbi_scratch=0D 1bbf361 include: sbi: Don't pack struct sbi_platform and sbi_platform_ope= rations=0D da5293f platform: template: Fix compile error=0D 234ed8e include: Bump-up version to 0.9=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-Id: 20210119234438.10132-1-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 43a9658889c32a2d8b4a4c1f7ac6a7f7741aa781=0D https://github.com/qemu/qemu/commit/43a9658889c32a2d8b4a4c1f7ac6a7f= 7741aa781=0D Author: Yifei Jiang =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D A target/riscv/arch_dump.c=0D M target/riscv/cpu.c=0D M target/riscv/cpu.h=0D M target/riscv/cpu_bits.h=0D M target/riscv/meson.build=0D =0D Log Message:=0D -----------=0D target-riscv: support QMP dump-guest-memory=0D =0D Add the support needed for creating prstatus elf notes. This allows=0D us to use QMP dump-guest-memory.=0D =0D Now ELF notes of RISC-V only contain prstatus elf notes.=0D =0D Signed-off-by: Yifei Jiang =0D Signed-off-by: Mingwang Li =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Andrew Jones =0D Reviewed-by: Palmer Dabbelt =0D Message-id: 20210201124458.1248-2-jiangyifei@huawei.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 10509e1095c9910957c4c2b93bbf2f1833838e68=0D https://github.com/qemu/qemu/commit/10509e1095c9910957c4c2b93bbf2f1= 833838e68=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/block/m25p80.c=0D =0D Log Message:=0D -----------=0D hw/block: m25p80: Add ISSI SPI flash support=0D =0D This adds the ISSI SPI flash support. The number of dummy cycles in=0D fast read, fast read dual output and fast read quad output commands=0D is currently using the default 8. Likewise, the same default value=0D is used for fast read dual/quad I/O command. Per the datasheet [1],=0D the number of dummy cycles is configurable, but this is not modeled=0D at present.=0D =0D For flash whose size is larger than 16 MiB, the sequence of 3-byte=0D address along with EXTADD bit in the bank address register (BAR) is=0D not supported. We assume that guest software always uses op codes=0D with 4-byte address sequence. Fortunately, this is the case for both=0D U-Boot and Linux spi-nor drivers.=0D =0D QPI (Quad Peripheral Interface) that supports 2-cycle instruction=0D has different default values for dummy cycles of fast read family=0D commands, and is unsupported at the time being.=0D =0D [1] http://www.issi.com/WW/pdf/25LP-WP256.pdf=0D =0D Signed-off-by: Bin Meng =0D Acked-by: Alistair Francis =0D Message-id: 20210126060007.12904-2-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 62d1076678a4c3d2385cc492283061b710bb0a60=0D https://github.com/qemu/qemu/commit/62d1076678a4c3d2385cc492283061b= 710bb0a60=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/block/m25p80.c=0D =0D Log Message:=0D -----------=0D hw/block: m25p80: Add various ISSI flash information=0D =0D This updates the flash information table to include various ISSI=0D flashes that are supported by upstream U-Boot and Linux kernel.=0D =0D Signed-off-by: Bin Meng =0D Acked-by: Alistair Francis =0D Message-id: 20210126060007.12904-3-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 0694dabe9763847f3010b54ab3ec7d367d2f0ff0=0D https://github.com/qemu/qemu/commit/0694dabe9763847f3010b54ab3ec7d3= 67d2f0ff0=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/ssi/Kconfig=0D M hw/ssi/meson.build=0D A hw/ssi/sifive_spi.c=0D A include/hw/ssi/sifive_spi.h=0D =0D Log Message:=0D -----------=0D hw/ssi: Add SiFive SPI controller support=0D =0D This adds the SiFive SPI controller model for the FU540 SoC.=0D The direct memory-mapped SPI flash mode is unsupported.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210126060007.12904-4-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 145b299139da92fb1b1048b393865bc96597d6b9=0D https://github.com/qemu/qemu/commit/145b299139da92fb1b1048b393865bc= 96597d6b9=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/Kconfig=0D M hw/riscv/sifive_u.c=0D M include/hw/riscv/sifive_u.h=0D =0D Log Message:=0D -----------=0D hw/riscv: sifive_u: Add QSPI0 controller and connect a flash=0D =0D This adds the QSPI0 controller to the SoC, and connects an ISSI=0D 25WP256 flash to it. The generation of corresponding device tree=0D source fragment is also added.=0D =0D Since the direct memory-mapped mode is not supported by the SiFive=0D SPI model, the property does not populate the second group=0D which represents the memory mapped address of the SPI flash.=0D =0D With this commit, upstream U-Boot for the SiFive HiFive Unleashed=0D board can boot on QEMU 'sifive_u' out of the box. This allows users=0D to develop and test the recommended RISC-V boot flow with a real=0D world use case: ZSBL (in QEMU) loads U-Boot SPL from SPI flash to=0D L2LIM, then U-Boot SPL loads the payload from SPI flash that is=0D combined with OpenSBI fw_dynamic firmware and U-Boot proper.=0D =0D Specify machine property `msel` to 6 to allow booting from the SPI=0D flash. U-Boot spl is directly loaded via `-bios`, and subsequent=0D payload is stored in the SPI flash image. Example command line:=0D =0D $ qemu-system-riscv64 -nographic -M sifive_u,msel=3D6 -smp 5 -m 8G \=0D -bios u-boot-spl.bin -drive file=3Dspi-nor.img,if=3Dmtd=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210126060007.12904-5-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 722f1352b6c248ead94efd77ff5726aa0cba949b=0D https://github.com/qemu/qemu/commit/722f1352b6c248ead94efd77ff5726a= a0cba949b=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/Kconfig=0D M hw/riscv/sifive_u.c=0D M include/hw/riscv/sifive_u.h=0D =0D Log Message:=0D -----------=0D hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card=0D =0D This adds the QSPI2 controller to the SoC, and connects an SD=0D card to it. The generation of corresponding device tree source=0D fragment is also added.=0D =0D Specify machine property `msel` to 11 to boot the same upstream=0D U-Boot SPL and payload image for the SiFive HiFive Unleashed board.=0D Note subsequent payload is stored in the SD card image.=0D =0D $ qemu-system-riscv64 -nographic -M sifive_u,msel=3D11 -smp 5 -m 8G \=0D -bios u-boot-spl.bin -drive file=3Dsdcard.img,if=3Dsd=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210126060007.12904-6-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 8e3c886870d4cc5c3b93f2817edcc3699af31adc=0D https://github.com/qemu/qemu/commit/8e3c886870d4cc5c3b93f2817edcc36= 99af31adc=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M include/hw/riscv/sifive_u.h=0D =0D Log Message:=0D -----------=0D hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value=0D =0D All other peripherals' IRQs are in the format of decimal value.=0D Change SIFIVE_U_GEM_IRQ to be consistent.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210126060007.12904-7-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 1921e4276d4e0e41df8c4be87fbbdd5d121bdfdc=0D https://github.com/qemu/qemu/commit/1921e4276d4e0e41df8c4be87fbbdd5= d121bdfdc=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M docs/system/targets.rst=0D =0D Log Message:=0D -----------=0D docs/system: Sort targets in alphabetical order=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210126060007.12904-8-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: d6d98968142f9c2541ee28e239d6a95b117499da=0D https://github.com/qemu/qemu/commit/d6d98968142f9c2541ee28e239d6a95= b117499da=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D A docs/system/target-riscv.rst=0D M docs/system/targets.rst=0D =0D Log Message:=0D -----------=0D docs/system: Add RISC-V documentation=0D =0D Add RISC-V system emulator documentation for generic information.=0D `Board-specific documentation` and `RISC-V CPU features` are only=0D a placeholder and will be added in the future.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210126060007.12904-9-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 01153d2b606ccef3414cbedd3309e7c965902b6b=0D https://github.com/qemu/qemu/commit/01153d2b606ccef3414cbedd3309e7c= 965902b6b=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D A docs/system/riscv/sifive_u.rst=0D M docs/system/target-riscv.rst=0D =0D Log Message:=0D -----------=0D docs/system: riscv: Add documentation for sifive_u machine=0D =0D This adds detailed documentation for RISC-V `sifive_u` machine,=0D including the following information:=0D =0D - Supported devices=0D - Hardware configuration information=0D - Boot options=0D - Machine-specific options=0D - Running Linux kernel=0D - Running VxWorks kernel=0D - Running U-Boot, and with an alternate configuration=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Palmer Dabbelt =0D Message-id: 20210126060007.12904-10-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 6b9409ba5f79b93411f32d2589fd3a3a3e4e62e2=0D https://github.com/qemu/qemu/commit/6b9409ba5f79b93411f32d2589fd3a3= a3e4e62e2=0D Author: Laurent Vivier =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/rtc/goldfish_rtc.c=0D =0D Log Message:=0D -----------=0D goldfish_rtc: re-arm the alarm after migration=0D =0D After a migration the clock offset is updated, but we also=0D need to re-arm the alarm if needed.=0D =0D Signed-off-by: Laurent Vivier =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20201220112615.933036-7-laurent@vivier.eu=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 4fcad931566c86514f56bbbeda1e30858b331f34=0D https://github.com/qemu/qemu/commit/4fcad931566c86514f56bbbeda1e308= 58b331f34=0D Author: Alistair Francis =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: Add a SiFive machine section=0D =0D Signed-off-by: Alistair Francis =0D Acked-by: Bin Meng =0D Acked-by: Palmer Dabbelt =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Palmer Dabbelt =0D Message-id: 6bc077e5ae4a9512c8adf81ae194718f2f17c402.1612836645.git.alist= air.francis@wdc.com=0D =0D =0D Commit: 732612856a8948a6ba1148322651743aa963b51c=0D https://github.com/qemu/qemu/commit/732612856a8948a6ba1148322651743= aa963b51c=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/microchip_pfsoc.c=0D M hw/riscv/opentitan.c=0D M hw/riscv/sifive_e.c=0D M hw/riscv/sifive_u.c=0D M hw/riscv/spike.c=0D M hw/riscv/virt.c=0D =0D Log Message:=0D -----------=0D hw/riscv: Drop 'struct MemmapEntry'=0D =0D There is already a MemMapEntry type defined in hwaddr.h. Let's drop=0D the RISC-V defined `struct MemmapEntry` and use the existing one.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210220144807.819-2-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 2fa3c7b6eee83d3ca1bd3d69669cf2fb8a11223b=0D https://github.com/qemu/qemu/commit/2fa3c7b6eee83d3ca1bd3d69669cf2f= b8a11223b=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/virt.c=0D =0D Log Message:=0D -----------=0D hw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init()=0D =0D `link_up` is never used in gpex_pcie_init(). Drop it.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210220144807.819-3-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: cfeb8a17c88f50c2a6dbf1cd4b9a279df5a30ec9=0D https://github.com/qemu/qemu/commit/cfeb8a17c88f50c2a6dbf1cd4b9a279= df5a30ec9=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/virt.c=0D =0D Log Message:=0D -----------=0D hw/riscv: virt: Limit RAM size in a 32-bit system=0D =0D RV32 supports 34-bit physical address hence the maximum RAM size=0D should be limited. Limit the RAM size to 10 GiB, which leaves=0D some room for PCIe high mmio space.=0D =0D For 32-bit host, this is not needed as machine->ram_size cannot=0D represent a RAM size that big. Use a #if size test to only do=0D the size limitation for the 64-bit host.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210220144807.819-4-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 19800265d407f09f333cf80dba3e975eb7bc1872=0D https://github.com/qemu/qemu/commit/19800265d407f09f333cf80dba3e975= eb7bc1872=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/virt.c=0D =0D Log Message:=0D -----------=0D hw/riscv: virt: Map high mmio for PCIe=0D =0D Some peripherals require 64-bit PCI address, so let's map the high=0D mmio space for PCIe.=0D =0D For RV32, the address is hardcoded to below 4 GiB from the highest=0D accessible physical address. For RV64, the base address depends on=0D top of RAM and is aligned to its size which is using 16 GiB for now.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210220144807.819-5-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 9a7beaad3dbba982f7a461d676b55a5c3851d312=0D https://github.com/qemu/qemu/commit/9a7beaad3dbba982f7a461d676b55a5= c3851d312=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A docs/system/riscv/sifive_u.rst=0D A docs/system/target-riscv.rst=0D M docs/system/targets.rst=0D M hw/block/m25p80.c=0D M hw/misc/sifive_u_otp.c=0D M hw/riscv/Kconfig=0D M hw/riscv/microchip_pfsoc.c=0D M hw/riscv/opentitan.c=0D M hw/riscv/sifive_e.c=0D M hw/riscv/sifive_u.c=0D M hw/riscv/spike.c=0D M hw/riscv/virt.c=0D M hw/rtc/goldfish_rtc.c=0D M hw/ssi/Kconfig=0D M hw/ssi/meson.build=0D A hw/ssi/sifive_spi.c=0D M include/hw/riscv/sifive_u.h=0D A include/hw/ssi/sifive_spi.h=0D M pc-bios/opensbi-riscv32-generic-fw_dynamic.bin=0D M pc-bios/opensbi-riscv32-generic-fw_dynamic.elf=0D M pc-bios/opensbi-riscv64-generic-fw_dynamic.bin=0D M pc-bios/opensbi-riscv64-generic-fw_dynamic.elf=0D M roms/opensbi=0D A target/riscv/arch_dump.c=0D M target/riscv/cpu.c=0D M target/riscv/cpu.h=0D M target/riscv/cpu_bits.h=0D M target/riscv/meson.build=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply= -20210304' into staging=0D =0D RISC-V PR for 6.0=0D =0D This PR is a collection of RISC-V patches:=0D - Improvements to SiFive U OTP=0D - Upgrade OpenSBI to v0.9=0D - Support the QMP dump-guest-memory=0D - Add support for the SiFive SPI controller (sifive_u)=0D - Initial RISC-V system documentation=0D - A fix for the Goldfish RTC=0D - MAINTAINERS updates=0D - Support for high PCIe memory in the virt machine=0D =0D # gpg: Signature made Thu 04 Mar 2021 14:44:31 GMT=0D # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977= 054=0D # gpg: Good signature from "Alistair Francis " [f= ull]=0D # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 = 7054=0D =0D * remotes/alistair/tags/pull-riscv-to-apply-20210304:=0D hw/riscv: virt: Map high mmio for PCIe=0D hw/riscv: virt: Limit RAM size in a 32-bit system=0D hw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init()=0D hw/riscv: Drop 'struct MemmapEntry'=0D MAINTAINERS: Add a SiFive machine section=0D goldfish_rtc: re-arm the alarm after migration=0D docs/system: riscv: Add documentation for sifive_u machine=0D docs/system: Add RISC-V documentation=0D docs/system: Sort targets in alphabetical order=0D hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value=0D hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card=0D hw/riscv: sifive_u: Add QSPI0 controller and connect a flash=0D hw/ssi: Add SiFive SPI controller support=0D hw/block: m25p80: Add various ISSI flash information=0D hw/block: m25p80: Add ISSI SPI flash support=0D target-riscv: support QMP dump-guest-memory=0D roms/opensbi: Upgrade from v0.8 to v0.9=0D hw/misc: sifive_u_otp: Use error_report() when block operation fails=0D= target/riscv: Declare csr_ops[] with a known size=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/fe352f5c0056...9a7beaad3dbb= =0D From MAILER-DAEMON Fri Mar 05 10:15:40 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lICB2-0004MP-9k for mharc-qemu-commits@gnu.org; Fri, 05 Mar 2021 10:15:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59724) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lICAw-0004LG-FL for qemu-commits@nongnu.org; Fri, 05 Mar 2021 10:15:34 -0500 Received: from out-22.smtp.github.com ([192.30.252.205]:59123 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lICAs-0001xZ-Nl for qemu-commits@nongnu.org; Fri, 05 Mar 2021 10:15:34 -0500 Received: from github.com (hubbernetes-node-00c5e98.ac4-iad.github.net [10.52.205.82]) by smtp.github.com (Postfix) with ESMTPA id BFC8A5603FE for ; Fri, 5 Mar 2021 07:15:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614957329; bh=Q47hIooJ9CbNYHcQmoY4dJzV5w+LvhBd/Rhq3GeJd00=; h=Date:From:To:Subject:From; b=UzW8x2svlXHvB2wo/KxhffOXBKn22JhrsN+vsHS1bDjss2gvfJXFcBb7tAZwwt6Wj Sodm8ff6gyrYh13aZ7KQX1lyyCrJE3hyg76P6Etc0txtEMaH2MV7/XR9yi/3LlYxBT mP1TI92kpMYUvZ8e+SKhpvWrsi7+G8zAIWGC73ss= Date: Fri, 05 Mar 2021 07:15:29 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 6f0377: target/riscv: Declare csr_ops[] with a known size X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Mar 2021 15:15:34 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 6f03770daccaffc39a4ce61854ab126020374112=0D https://github.com/qemu/qemu/commit/6f03770daccaffc39a4ce61854ab126= 020374112=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M target/riscv/cpu.h=0D =0D Log Message:=0D -----------=0D target/riscv: Declare csr_ops[] with a known size=0D =0D csr_ops[] is currently declared with an unknown size in cpu.h.=0D Since the array size is known, let's do a complete declaration.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Alistair Francis =0D Message-id: 1611024723-14293-1-git-send-email-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: a033d8008d1b2b35332597eacc92a1a4b14121ad=0D https://github.com/qemu/qemu/commit/a033d8008d1b2b35332597eacc92a1a= 4b14121ad=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/sifive_u_otp.c=0D =0D Log Message:=0D -----------=0D hw/misc: sifive_u_otp: Use error_report() when block operation fails=0D= =0D At present when blk_pread() / blk_pwrite() fails, a guest error=0D is logged, but this is not really a guest error. Change to use=0D error_report() instead.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Alistair Francis =0D Message-id: 1611026585-29971-1-git-send-email-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 454d1e7cf29ff04c11acbef79fdeecdb07118d81=0D https://github.com/qemu/qemu/commit/454d1e7cf29ff04c11acbef79fdeecd= b07118d81=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M pc-bios/opensbi-riscv32-generic-fw_dynamic.bin=0D M pc-bios/opensbi-riscv32-generic-fw_dynamic.elf=0D M pc-bios/opensbi-riscv64-generic-fw_dynamic.bin=0D M pc-bios/opensbi-riscv64-generic-fw_dynamic.elf=0D M roms/opensbi=0D =0D Log Message:=0D -----------=0D roms/opensbi: Upgrade from v0.8 to v0.9=0D =0D Upgrade OpenSBI from v0.8 to v0.9 and the pre-built bios images.=0D =0D The v0.9 release includes the following commits:=0D =0D 35bc810 docs/platform: Update QEMU parameter for fw_payload=0D 78afe11 config.mk: Update QEMU run command for generic and sifive fu540 p= latforms=0D ec3e5b1 docs/platform: sifive_fu540: Update U-Boot instructions=0D 7d61a68 README.md: fix markdown link formatting=0D a5f9104 lib/utils: fdt: Update FDT expand size to 1024 for reserved memor= y node=0D ec1abf6 include: sbi_bitops: Remove dead shift assignment in ffs/fls=0D 8e47649 lib: Add sbi_strncmp implementation=0D 2845d2d lib: utils: Add a macro in libfdt_env.h for strncmp=0D 2cfd2fc lib: utils: Use strncmp in fdt_parse_hart_id()=0D 937caee lib: sbi_misaligned_ldst: Determine transformed instruction lengt= h correctly=0D 4b18a2a firmware: fw_base: Improve exception stack setup in trap handler=0D= 9d56961 lib: sbi_trap: Fix hstatus.SPVP update in sbi_trap_redirect()=0D d7f87d9 platform: kendryte/k210: fixup FDT=0D e435ba0 lib: sbi_init: Avoid thundering hurd problem with coldboot_lock=0D= 4f3bad6 lib: sbi: Handle the case where MTVAL has illegal instruction add= ress=0D 7b0b289 lib: sbi: Remove redundant SBI_HART_HAS_PMP feature=0D 74d1db7 lib: sbi: Improve PMP CSR detection and progamming=0D 2c341f7 lib: sbi: Detect and print MHPM counters at boot-time=0D 162d453 include: sbi: Few cosmetic changes in riscv_encoding.h=0D ebc8ebc lib: sbi: Improve HPM CSR read/write emulation=0D dcb10c0 lib: sbi: Don't handle VS-mode ecall in sbi_trap_handler()=0D bef63d6 include: Rename ECALL defines to match latest RISC-V spec=0D c1c7c3e lib: sbi_trap: Allow M-mode to M-mode ECALLs=0D 6734304 lib: sbi: Allow specifying start mode to sbi_hsm_hart_start() API= =0D 7ccf6bf lib: sbi: Allow specifying mode in sbi_hart_pmp_check_addr() API=0D= 9f935a4 lib: utils: Improve fdt_cpu_fixup() implementation=0D 172fa16 lib: sbi: Ensure coldboot HART supports next privilege mode=0D aaeca7e platform: generic: Don't mark non-MMU HARTs as invalid=0D 7701ea1 lib: sbi: Fix PMP CSR detection=0D 79bf80b lib: sbi_scratch: typo scatch=0D a04c465 makefile: fix clean directive=0D af4b50f Makefile: Build ELF, BIN and LD script in platform build director= y=0D 6ca0969 firmware: Add common FW_FDT_PATH compile-time option=0D 9c07c51 firmware: Remove FW_PAYLOAD_FDT_PATH compile-time option=0D e9a4bfb Makefile: Allow padding zeros when converting DTB to C source=0D a0f2d4a platform: kendryte/k210: Add some padding for FDT fixups=0D dbeeacb include: sbi: Remove redundant includes from sbi_platform.h=0D a12d46a include: sbi: Remove pmp_region callbacks from sbi_platform_opera= tions=0D a126886 lib: sbi: Configure PMP late in coldboot and warmboot path=0D f81d6f6 lib: sbi: Remove redundant hartid parameter from sbi_hart_init()=0D= 8b65005 include: sbi: Make hartmask pointer const in sbi_hartmask_test_ha= rt()=0D b1678af lib: sbi: Add initial domain support=0D e73b92d lib: sbi: Extend sbi_hsm_hart_started_mask() for domains=0D 3a30d2c lib: sbi: Extend sbi_hsm_hart_start() for domains=0D 530e95b lib: sbi: Optimize sbi_hsm_hart_started_mask() implementation=0D 3e20037 lib: sbi: Extend sbi_system_reset() for domains=0D 5edbb7c lib: utils: Update fdt_reserved_memory_fixup() to use current dom= ain=0D 5fd99db lib: utils: Update fdt_cpu_fixup() to use current domain=0D e856462 lib: sbi: Remove redundant sbi_hart_pmp_xyz() functions=0D c10c30b lib: sbi: Configure PMP based on domain memory regions=0D c347408 lib: sbi: Display domain details in boot prints=0D fdf5d5c docs: Add initial documentation for domain support=0D 74c0ea1 lib: utils: Implement "ranges" property parsing=0D bf21632 lib: sbi: Detect PMP granularity and number of address bits=0D a809f40 lib: sbi: Improve boot time print with additional PMP information= =0D 914f81f Makefile: Add option to use toolchain default ABI and ISA string=0D= 48616b3 lib: sbi: Improve boot prints in cold boot sequence=0D 781cafd docs: fix a typo error=0D 54a7734 include: sbi: Add SBI SRST extension related defines=0D c4acc60 include: sbi: Remove opensbi specific reset type defines=0D da07479 platform: Remove dummy system reset functions=0D 5c429ae lib: sbi: Improve system reset platform operations=0D 548d03e lib: sbi: Implement System Reset (SRST) SBI extension=0D 2677324 firmware: fw_base: Optimize trap handler for RV32 systems=0D 8d2edc4 lib: sbi: Fix sbi_hart_switch_mode() for u-mode=0D 3d921fa lib: sbi: Fix typo in sbi_domain_finalize()=0D 4e37022 lib: sbi: Fix domain_count check in sbi_domain_finalize()=0D c709d40 lib: sbi: Auto start domain only if boot HART within limits=0D c1f6d89 include: sbi: Use lower bits for domain memory region permissions= =0D 62ea4f4 lib: sbi: Override domain boot HART when coldboot HART assigned t= o it=0D 555e737 lib: sbi: Add error prints in sbi_domain_finalize()=0D 9b65dca include: sbi: Add domains_init() platform operation=0D c0d2baa docs: Add domain device tree binding documentation=0D ba741ea lib: utils: Add helper routines to populate domains from FDT=0D 4fffb53 platform: generic: Populate domains from FDT=0D e7da0b4 lib: utils/libfdt: Upgrade to v1.6.0 release=0D 2179777 lib: utils: Allow FDT domain iteration functions to fail=0D 7baccfc lib: sbi: Add function to register new domain=0D 6fc1986 lib: utils: Remove fdt_domain_get() function=0D a029bd9 lib: sbi: Remove domain_get() platform callback function=0D 7dcb1e1 lib: sbi: Fix sign-extension in sbi_misaligned_load_handler()=0D 80bc506 lib: sbi: Replace args with trap registers in ecall handler=0D b7df5e4 lib: sbi: Introduce sbi_trap_exit() API=0D 12394a2 lib: sbi: Allow custom local TLB flush function=0D 0d49c3b lib: utils: Fix shakti uart implementation=0D db56341 lib: sbi: Allow platforms to provide root domain memory regions=0D= e884416 include: sbi: No need to pack struct sbi_trap_regs=0D 386eba2 include: sbi: No need to pack struct sbi_scratch=0D 1bbf361 include: sbi: Don't pack struct sbi_platform and sbi_platform_ope= rations=0D da5293f platform: template: Fix compile error=0D 234ed8e include: Bump-up version to 0.9=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-Id: 20210119234438.10132-1-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 43a9658889c32a2d8b4a4c1f7ac6a7f7741aa781=0D https://github.com/qemu/qemu/commit/43a9658889c32a2d8b4a4c1f7ac6a7f= 7741aa781=0D Author: Yifei Jiang =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D A target/riscv/arch_dump.c=0D M target/riscv/cpu.c=0D M target/riscv/cpu.h=0D M target/riscv/cpu_bits.h=0D M target/riscv/meson.build=0D =0D Log Message:=0D -----------=0D target-riscv: support QMP dump-guest-memory=0D =0D Add the support needed for creating prstatus elf notes. This allows=0D us to use QMP dump-guest-memory.=0D =0D Now ELF notes of RISC-V only contain prstatus elf notes.=0D =0D Signed-off-by: Yifei Jiang =0D Signed-off-by: Mingwang Li =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Andrew Jones =0D Reviewed-by: Palmer Dabbelt =0D Message-id: 20210201124458.1248-2-jiangyifei@huawei.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 10509e1095c9910957c4c2b93bbf2f1833838e68=0D https://github.com/qemu/qemu/commit/10509e1095c9910957c4c2b93bbf2f1= 833838e68=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/block/m25p80.c=0D =0D Log Message:=0D -----------=0D hw/block: m25p80: Add ISSI SPI flash support=0D =0D This adds the ISSI SPI flash support. The number of dummy cycles in=0D fast read, fast read dual output and fast read quad output commands=0D is currently using the default 8. Likewise, the same default value=0D is used for fast read dual/quad I/O command. Per the datasheet [1],=0D the number of dummy cycles is configurable, but this is not modeled=0D at present.=0D =0D For flash whose size is larger than 16 MiB, the sequence of 3-byte=0D address along with EXTADD bit in the bank address register (BAR) is=0D not supported. We assume that guest software always uses op codes=0D with 4-byte address sequence. Fortunately, this is the case for both=0D U-Boot and Linux spi-nor drivers.=0D =0D QPI (Quad Peripheral Interface) that supports 2-cycle instruction=0D has different default values for dummy cycles of fast read family=0D commands, and is unsupported at the time being.=0D =0D [1] http://www.issi.com/WW/pdf/25LP-WP256.pdf=0D =0D Signed-off-by: Bin Meng =0D Acked-by: Alistair Francis =0D Message-id: 20210126060007.12904-2-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 62d1076678a4c3d2385cc492283061b710bb0a60=0D https://github.com/qemu/qemu/commit/62d1076678a4c3d2385cc492283061b= 710bb0a60=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/block/m25p80.c=0D =0D Log Message:=0D -----------=0D hw/block: m25p80: Add various ISSI flash information=0D =0D This updates the flash information table to include various ISSI=0D flashes that are supported by upstream U-Boot and Linux kernel.=0D =0D Signed-off-by: Bin Meng =0D Acked-by: Alistair Francis =0D Message-id: 20210126060007.12904-3-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 0694dabe9763847f3010b54ab3ec7d367d2f0ff0=0D https://github.com/qemu/qemu/commit/0694dabe9763847f3010b54ab3ec7d3= 67d2f0ff0=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/ssi/Kconfig=0D M hw/ssi/meson.build=0D A hw/ssi/sifive_spi.c=0D A include/hw/ssi/sifive_spi.h=0D =0D Log Message:=0D -----------=0D hw/ssi: Add SiFive SPI controller support=0D =0D This adds the SiFive SPI controller model for the FU540 SoC.=0D The direct memory-mapped SPI flash mode is unsupported.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210126060007.12904-4-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 145b299139da92fb1b1048b393865bc96597d6b9=0D https://github.com/qemu/qemu/commit/145b299139da92fb1b1048b393865bc= 96597d6b9=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/Kconfig=0D M hw/riscv/sifive_u.c=0D M include/hw/riscv/sifive_u.h=0D =0D Log Message:=0D -----------=0D hw/riscv: sifive_u: Add QSPI0 controller and connect a flash=0D =0D This adds the QSPI0 controller to the SoC, and connects an ISSI=0D 25WP256 flash to it. The generation of corresponding device tree=0D source fragment is also added.=0D =0D Since the direct memory-mapped mode is not supported by the SiFive=0D SPI model, the property does not populate the second group=0D which represents the memory mapped address of the SPI flash.=0D =0D With this commit, upstream U-Boot for the SiFive HiFive Unleashed=0D board can boot on QEMU 'sifive_u' out of the box. This allows users=0D to develop and test the recommended RISC-V boot flow with a real=0D world use case: ZSBL (in QEMU) loads U-Boot SPL from SPI flash to=0D L2LIM, then U-Boot SPL loads the payload from SPI flash that is=0D combined with OpenSBI fw_dynamic firmware and U-Boot proper.=0D =0D Specify machine property `msel` to 6 to allow booting from the SPI=0D flash. U-Boot spl is directly loaded via `-bios`, and subsequent=0D payload is stored in the SPI flash image. Example command line:=0D =0D $ qemu-system-riscv64 -nographic -M sifive_u,msel=3D6 -smp 5 -m 8G \=0D -bios u-boot-spl.bin -drive file=3Dspi-nor.img,if=3Dmtd=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210126060007.12904-5-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 722f1352b6c248ead94efd77ff5726aa0cba949b=0D https://github.com/qemu/qemu/commit/722f1352b6c248ead94efd77ff5726a= a0cba949b=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/Kconfig=0D M hw/riscv/sifive_u.c=0D M include/hw/riscv/sifive_u.h=0D =0D Log Message:=0D -----------=0D hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card=0D =0D This adds the QSPI2 controller to the SoC, and connects an SD=0D card to it. The generation of corresponding device tree source=0D fragment is also added.=0D =0D Specify machine property `msel` to 11 to boot the same upstream=0D U-Boot SPL and payload image for the SiFive HiFive Unleashed board.=0D Note subsequent payload is stored in the SD card image.=0D =0D $ qemu-system-riscv64 -nographic -M sifive_u,msel=3D11 -smp 5 -m 8G \=0D -bios u-boot-spl.bin -drive file=3Dsdcard.img,if=3Dsd=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210126060007.12904-6-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 8e3c886870d4cc5c3b93f2817edcc3699af31adc=0D https://github.com/qemu/qemu/commit/8e3c886870d4cc5c3b93f2817edcc36= 99af31adc=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M include/hw/riscv/sifive_u.h=0D =0D Log Message:=0D -----------=0D hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value=0D =0D All other peripherals' IRQs are in the format of decimal value.=0D Change SIFIVE_U_GEM_IRQ to be consistent.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210126060007.12904-7-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 1921e4276d4e0e41df8c4be87fbbdd5d121bdfdc=0D https://github.com/qemu/qemu/commit/1921e4276d4e0e41df8c4be87fbbdd5= d121bdfdc=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M docs/system/targets.rst=0D =0D Log Message:=0D -----------=0D docs/system: Sort targets in alphabetical order=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210126060007.12904-8-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: d6d98968142f9c2541ee28e239d6a95b117499da=0D https://github.com/qemu/qemu/commit/d6d98968142f9c2541ee28e239d6a95= b117499da=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D A docs/system/target-riscv.rst=0D M docs/system/targets.rst=0D =0D Log Message:=0D -----------=0D docs/system: Add RISC-V documentation=0D =0D Add RISC-V system emulator documentation for generic information.=0D `Board-specific documentation` and `RISC-V CPU features` are only=0D a placeholder and will be added in the future.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210126060007.12904-9-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 01153d2b606ccef3414cbedd3309e7c965902b6b=0D https://github.com/qemu/qemu/commit/01153d2b606ccef3414cbedd3309e7c= 965902b6b=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D A docs/system/riscv/sifive_u.rst=0D M docs/system/target-riscv.rst=0D =0D Log Message:=0D -----------=0D docs/system: riscv: Add documentation for sifive_u machine=0D =0D This adds detailed documentation for RISC-V `sifive_u` machine,=0D including the following information:=0D =0D - Supported devices=0D - Hardware configuration information=0D - Boot options=0D - Machine-specific options=0D - Running Linux kernel=0D - Running VxWorks kernel=0D - Running U-Boot, and with an alternate configuration=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Palmer Dabbelt =0D Message-id: 20210126060007.12904-10-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 6b9409ba5f79b93411f32d2589fd3a3a3e4e62e2=0D https://github.com/qemu/qemu/commit/6b9409ba5f79b93411f32d2589fd3a3= a3e4e62e2=0D Author: Laurent Vivier =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/rtc/goldfish_rtc.c=0D =0D Log Message:=0D -----------=0D goldfish_rtc: re-arm the alarm after migration=0D =0D After a migration the clock offset is updated, but we also=0D need to re-arm the alarm if needed.=0D =0D Signed-off-by: Laurent Vivier =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20201220112615.933036-7-laurent@vivier.eu=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 4fcad931566c86514f56bbbeda1e30858b331f34=0D https://github.com/qemu/qemu/commit/4fcad931566c86514f56bbbeda1e308= 58b331f34=0D Author: Alistair Francis =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: Add a SiFive machine section=0D =0D Signed-off-by: Alistair Francis =0D Acked-by: Bin Meng =0D Acked-by: Palmer Dabbelt =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Palmer Dabbelt =0D Message-id: 6bc077e5ae4a9512c8adf81ae194718f2f17c402.1612836645.git.alist= air.francis@wdc.com=0D =0D =0D Commit: 732612856a8948a6ba1148322651743aa963b51c=0D https://github.com/qemu/qemu/commit/732612856a8948a6ba1148322651743= aa963b51c=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/microchip_pfsoc.c=0D M hw/riscv/opentitan.c=0D M hw/riscv/sifive_e.c=0D M hw/riscv/sifive_u.c=0D M hw/riscv/spike.c=0D M hw/riscv/virt.c=0D =0D Log Message:=0D -----------=0D hw/riscv: Drop 'struct MemmapEntry'=0D =0D There is already a MemMapEntry type defined in hwaddr.h. Let's drop=0D the RISC-V defined `struct MemmapEntry` and use the existing one.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210220144807.819-2-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 2fa3c7b6eee83d3ca1bd3d69669cf2fb8a11223b=0D https://github.com/qemu/qemu/commit/2fa3c7b6eee83d3ca1bd3d69669cf2f= b8a11223b=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/virt.c=0D =0D Log Message:=0D -----------=0D hw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init()=0D =0D `link_up` is never used in gpex_pcie_init(). Drop it.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210220144807.819-3-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: cfeb8a17c88f50c2a6dbf1cd4b9a279df5a30ec9=0D https://github.com/qemu/qemu/commit/cfeb8a17c88f50c2a6dbf1cd4b9a279= df5a30ec9=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/virt.c=0D =0D Log Message:=0D -----------=0D hw/riscv: virt: Limit RAM size in a 32-bit system=0D =0D RV32 supports 34-bit physical address hence the maximum RAM size=0D should be limited. Limit the RAM size to 10 GiB, which leaves=0D some room for PCIe high mmio space.=0D =0D For 32-bit host, this is not needed as machine->ram_size cannot=0D represent a RAM size that big. Use a #if size test to only do=0D the size limitation for the 64-bit host.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210220144807.819-4-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 19800265d407f09f333cf80dba3e975eb7bc1872=0D https://github.com/qemu/qemu/commit/19800265d407f09f333cf80dba3e975= eb7bc1872=0D Author: Bin Meng =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/virt.c=0D =0D Log Message:=0D -----------=0D hw/riscv: virt: Map high mmio for PCIe=0D =0D Some peripherals require 64-bit PCI address, so let's map the high=0D mmio space for PCIe.=0D =0D For RV32, the address is hardcoded to below 4 GiB from the highest=0D accessible physical address. For RV64, the base address depends on=0D top of RAM and is aligned to its size which is using 16 GiB for now.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Alistair Francis =0D Message-id: 20210220144807.819-5-bmeng.cn@gmail.com=0D Signed-off-by: Alistair Francis =0D =0D =0D Commit: 9a7beaad3dbba982f7a461d676b55a5c3851d312=0D https://github.com/qemu/qemu/commit/9a7beaad3dbba982f7a461d676b55a5= c3851d312=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A docs/system/riscv/sifive_u.rst=0D A docs/system/target-riscv.rst=0D M docs/system/targets.rst=0D M hw/block/m25p80.c=0D M hw/misc/sifive_u_otp.c=0D M hw/riscv/Kconfig=0D M hw/riscv/microchip_pfsoc.c=0D M hw/riscv/opentitan.c=0D M hw/riscv/sifive_e.c=0D M hw/riscv/sifive_u.c=0D M hw/riscv/spike.c=0D M hw/riscv/virt.c=0D M hw/rtc/goldfish_rtc.c=0D M hw/ssi/Kconfig=0D M hw/ssi/meson.build=0D A hw/ssi/sifive_spi.c=0D M include/hw/riscv/sifive_u.h=0D A include/hw/ssi/sifive_spi.h=0D M pc-bios/opensbi-riscv32-generic-fw_dynamic.bin=0D M pc-bios/opensbi-riscv32-generic-fw_dynamic.elf=0D M pc-bios/opensbi-riscv64-generic-fw_dynamic.bin=0D M pc-bios/opensbi-riscv64-generic-fw_dynamic.elf=0D M roms/opensbi=0D A target/riscv/arch_dump.c=0D M target/riscv/cpu.c=0D M target/riscv/cpu.h=0D M target/riscv/cpu_bits.h=0D M target/riscv/meson.build=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply= -20210304' into staging=0D =0D RISC-V PR for 6.0=0D =0D This PR is a collection of RISC-V patches:=0D - Improvements to SiFive U OTP=0D - Upgrade OpenSBI to v0.9=0D - Support the QMP dump-guest-memory=0D - Add support for the SiFive SPI controller (sifive_u)=0D - Initial RISC-V system documentation=0D - A fix for the Goldfish RTC=0D - MAINTAINERS updates=0D - Support for high PCIe memory in the virt machine=0D =0D # gpg: Signature made Thu 04 Mar 2021 14:44:31 GMT=0D # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977= 054=0D # gpg: Good signature from "Alistair Francis " [f= ull]=0D # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 = 7054=0D =0D * remotes/alistair/tags/pull-riscv-to-apply-20210304:=0D hw/riscv: virt: Map high mmio for PCIe=0D hw/riscv: virt: Limit RAM size in a 32-bit system=0D hw/riscv: virt: Drop the 'link_up' parameter of gpex_pcie_init()=0D hw/riscv: Drop 'struct MemmapEntry'=0D MAINTAINERS: Add a SiFive machine section=0D goldfish_rtc: re-arm the alarm after migration=0D docs/system: riscv: Add documentation for sifive_u machine=0D docs/system: Add RISC-V documentation=0D docs/system: Sort targets in alphabetical order=0D hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value=0D hw/riscv: sifive_u: Add QSPI2 controller and connect an SD card=0D hw/riscv: sifive_u: Add QSPI0 controller and connect a flash=0D hw/ssi: Add SiFive SPI controller support=0D hw/block: m25p80: Add various ISSI flash information=0D hw/block: m25p80: Add ISSI SPI flash support=0D target-riscv: support QMP dump-guest-memory=0D roms/opensbi: Upgrade from v0.8 to v0.9=0D hw/misc: sifive_u_otp: Use error_report() when block operation fails=0D= target/riscv: Declare csr_ops[] with a known size=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/fe352f5c0056...9a7beaad3dbb= =0D From MAILER-DAEMON Fri Mar 05 10:21:17 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lICGT-0003zl-NN for mharc-qemu-commits@gnu.org; Fri, 05 Mar 2021 10:21:17 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:32892) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lICGR-0003td-Id for qemu-commits@nongnu.org; Fri, 05 Mar 2021 10:21:15 -0500 Received: from out-28.smtp.github.com ([192.30.252.211]:60441) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lICGN-0004Zs-D8 for qemu-commits@nongnu.org; Fri, 05 Mar 2021 10:21:15 -0500 Received: from github.com (hubbernetes-node-d016006.ash1-iad.github.net [10.56.25.65]) by smtp.github.com (Postfix) with ESMTPA id 9DDFB90009E for ; Fri, 5 Mar 2021 07:21:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614957670; bh=nOvkKgD0NVT3pI3juS/sZdNOAwqoSpbRwt6P1GqU0fM=; h=Date:From:To:Subject:From; b=D2R+hN70q0QgCwEJHWDyPnEKYFEbnOyj2JeT5GBHTqkBgEjw180bRheteMlI5IJJz ae052S/ncv6T3QMDmWucywHI8uqP1O4BPkMOQzPYGRQ7lhPUYElOGHdBmwORnC10Sr n815K0qfhEQNaOwG07kleuLV3qtQqfQC9J8VxuNs= Date: Fri, 05 Mar 2021 07:21:10 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] d71a24: error: Fix "Converting to ERRP_GUARD()" doc on "va... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Mar 2021 15:21:15 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: d71a243220db1e6bc04425b5988b8a9bc8523345=0D https://github.com/qemu/qemu/commit/d71a243220db1e6bc04425b5988b8a9= bc8523345=0D Author: Markus Armbruster =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M include/qapi/error.h=0D =0D Log Message:=0D -----------=0D error: Fix "Converting to ERRP_GUARD()" doc on "valid at return"=0D =0D Setting errp =3D NULL is wrong: the automatic error propagation still=0D propagates the dangling pointer _auto_errp_prop.local_err. We need to=0D= set *errp =3D NULL to clear the dangling pointer.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210125132635.1253219-1-armbru@redhat.com>=0D Reviewed-by: Vladimir Sementsov-Ogievskiy =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 96291f13434e3f179744fec549ada90a9411fef0=0D https://github.com/qemu/qemu/commit/96291f13434e3f179744fec549ada90= a9411fef0=0D Author: Eric Blake =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M qga/commands-posix.c=0D =0D Log Message:=0D -----------=0D qga: Utilize QAPI_LIST_APPEND in qmp_guest_network_get_interfaces=0D =0D I found another spot that can benefit from using our macros instead of=0D= open-coding qapi list creation.=0D =0D Signed-off-by: Eric Blake =0D Message-Id: <20210205171634.1491258-1-eblake@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Markus Armbruster =0D =0D =0D Commit: a0e61807a3492b57f10d78e97fed97a0d3b21933=0D https://github.com/qemu/qemu/commit/a0e61807a3492b57f10d78e97fed97a= 0d3b21933=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M qapi/meson.build=0D =0D Log Message:=0D -----------=0D qapi: Remove QMP events and commands from user-mode builds=0D =0D We removed the QMP loop in user-mode builds in commit 1935e0e4e09=0D ("qapi/meson: Remove QMP from user-mode emulation"), now commands=0D and events code is unreachable.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210224171642.3242293-1-philmd@redhat.com>=0D Acked-by: Paolo Bonzini =0D Signed-off-by: Markus Armbruster =0D =0D =0D Commit: 0e92a19b8c3b269dee377b76898c8bd7cadc1273=0D https://github.com/qemu/qemu/commit/0e92a19b8c3b269dee377b76898c8bd= 7cadc1273=0D Author: Markus Armbruster =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/parser.py=0D M tests/qapi-schema/leading-comma-list.err=0D M tests/qapi-schema/trailing-comma-list.err=0D =0D Log Message:=0D -----------=0D qapi: Fix parse errors for removal of null from schema language=0D =0D Commit 9d55380b5a "qapi: Remove null from schema language" (v4.2.0)=0D neglected to update two error messages. Do that now.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210224101442.1837475-1-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: John Snow =0D =0D =0D Commit: bb736b20a31fa9956195565ea34bc9c28953e70d=0D https://github.com/qemu/qemu/commit/bb736b20a31fa9956195565ea34bc9c= 28953e70d=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M include/qapi/error.h=0D M qapi/meson.build=0D M qga/commands-posix.c=0D M scripts/qapi/parser.py=0D M tests/qapi-schema/leading-comma-list.err=0D M tests/qapi-schema/trailing-comma-list.err=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-03-05'= into staging=0D =0D QAPI patches patches for 2021-03-05=0D =0D # gpg: Signature made Fri 05 Mar 2021 14:42:18 GMT=0D # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918= 653=0D # gpg: issuer "armbru@redhat.com"=0D # gpg: Good signature from "Markus Armbruster " [full]= =0D # gpg: aka "Markus Armbruster " [ful= l]=0D # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 = 8653=0D =0D * remotes/armbru/tags/pull-qapi-2021-03-05:=0D qapi: Fix parse errors for removal of null from schema language=0D qapi: Remove QMP events and commands from user-mode builds=0D qga: Utilize QAPI_LIST_APPEND in qmp_guest_network_get_interfaces=0D error: Fix "Converting to ERRP_GUARD()" doc on "valid at return"=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/9a7beaad3dbb...bb736b20a31f= =0D From MAILER-DAEMON Fri Mar 05 14:04:54 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lIFks-000198-AG for mharc-qemu-commits@gnu.org; Fri, 05 Mar 2021 14:04:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33854) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lIFkq-00013s-UA for qemu-commits@nongnu.org; Fri, 05 Mar 2021 14:04:53 -0500 Received: from out-23.smtp.github.com ([192.30.252.206]:36699) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lIFko-00067p-7k for qemu-commits@nongnu.org; Fri, 05 Mar 2021 14:04:51 -0500 Received: from github.com (hubbernetes-node-b1ab623.ac4-iad.github.net [10.52.205.21]) by smtp.github.com (Postfix) with ESMTPA id 883616007FE for ; Fri, 5 Mar 2021 11:04:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614971089; bh=UNsiVmTvoZuPUN9YIaQ9upVNin7eB75I/tzfzfsfuNs=; h=Date:From:To:Subject:From; b=veU+m5WHhU3ZOtY7Io77LsiSEdpyU16QjN/VOMRBQ2jmvQXzSb7dwhca7EjWURcZS fpHLGUlw1tPlqxtQPLApPyFaUmW9UajRbHaDSL7DCTPBK3Vw4ijMH/lj+Gngai8arF nqca1NAcO6uSUDkp9wx0uhDfZYJBM57xmmTfoGAk= Date: Fri, 05 Mar 2021 11:04:49 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.206; envelope-from=noreply@github.com; helo=out-23.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] d71a24: error: Fix "Converting to ERRP_GUARD()" doc on "va... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Mar 2021 19:04:53 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: d71a243220db1e6bc04425b5988b8a9bc8523345=0D https://github.com/qemu/qemu/commit/d71a243220db1e6bc04425b5988b8a9= bc8523345=0D Author: Markus Armbruster =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M include/qapi/error.h=0D =0D Log Message:=0D -----------=0D error: Fix "Converting to ERRP_GUARD()" doc on "valid at return"=0D =0D Setting errp =3D NULL is wrong: the automatic error propagation still=0D propagates the dangling pointer _auto_errp_prop.local_err. We need to=0D= set *errp =3D NULL to clear the dangling pointer.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210125132635.1253219-1-armbru@redhat.com>=0D Reviewed-by: Vladimir Sementsov-Ogievskiy =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 96291f13434e3f179744fec549ada90a9411fef0=0D https://github.com/qemu/qemu/commit/96291f13434e3f179744fec549ada90= a9411fef0=0D Author: Eric Blake =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M qga/commands-posix.c=0D =0D Log Message:=0D -----------=0D qga: Utilize QAPI_LIST_APPEND in qmp_guest_network_get_interfaces=0D =0D I found another spot that can benefit from using our macros instead of=0D= open-coding qapi list creation.=0D =0D Signed-off-by: Eric Blake =0D Message-Id: <20210205171634.1491258-1-eblake@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Markus Armbruster =0D =0D =0D Commit: a0e61807a3492b57f10d78e97fed97a0d3b21933=0D https://github.com/qemu/qemu/commit/a0e61807a3492b57f10d78e97fed97a= 0d3b21933=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M qapi/meson.build=0D =0D Log Message:=0D -----------=0D qapi: Remove QMP events and commands from user-mode builds=0D =0D We removed the QMP loop in user-mode builds in commit 1935e0e4e09=0D ("qapi/meson: Remove QMP from user-mode emulation"), now commands=0D and events code is unreachable.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210224171642.3242293-1-philmd@redhat.com>=0D Acked-by: Paolo Bonzini =0D Signed-off-by: Markus Armbruster =0D =0D =0D Commit: 0e92a19b8c3b269dee377b76898c8bd7cadc1273=0D https://github.com/qemu/qemu/commit/0e92a19b8c3b269dee377b76898c8bd= 7cadc1273=0D Author: Markus Armbruster =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/parser.py=0D M tests/qapi-schema/leading-comma-list.err=0D M tests/qapi-schema/trailing-comma-list.err=0D =0D Log Message:=0D -----------=0D qapi: Fix parse errors for removal of null from schema language=0D =0D Commit 9d55380b5a "qapi: Remove null from schema language" (v4.2.0)=0D neglected to update two error messages. Do that now.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210224101442.1837475-1-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: John Snow =0D =0D =0D Commit: bb736b20a31fa9956195565ea34bc9c28953e70d=0D https://github.com/qemu/qemu/commit/bb736b20a31fa9956195565ea34bc9c= 28953e70d=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M include/qapi/error.h=0D M qapi/meson.build=0D M qga/commands-posix.c=0D M scripts/qapi/parser.py=0D M tests/qapi-schema/leading-comma-list.err=0D M tests/qapi-schema/trailing-comma-list.err=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-03-05'= into staging=0D =0D QAPI patches patches for 2021-03-05=0D =0D # gpg: Signature made Fri 05 Mar 2021 14:42:18 GMT=0D # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918= 653=0D # gpg: issuer "armbru@redhat.com"=0D # gpg: Good signature from "Markus Armbruster " [full]= =0D # gpg: aka "Markus Armbruster " [ful= l]=0D # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 = 8653=0D =0D * remotes/armbru/tags/pull-qapi-2021-03-05:=0D qapi: Fix parse errors for removal of null from schema language=0D qapi: Remove QMP events and commands from user-mode builds=0D qga: Utilize QAPI_LIST_APPEND in qmp_guest_network_get_interfaces=0D error: Fix "Converting to ERRP_GUARD()" doc on "valid at return"=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/9a7beaad3dbb...bb736b20a31f= =0D From MAILER-DAEMON Fri Mar 05 14:10:31 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lIFqI-0004gU-Sy for mharc-qemu-commits@gnu.org; Fri, 05 Mar 2021 14:10:30 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34928) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lIFqG-0004gJ-QB for qemu-commits@nongnu.org; Fri, 05 Mar 2021 14:10:30 -0500 Received: from out-25.smtp.github.com ([192.30.252.208]:49677 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lIFqC-0007am-S4 for qemu-commits@nongnu.org; Fri, 05 Mar 2021 14:10:27 -0500 Received: from github.com (hubbernetes-node-8f1f80c.ash1-iad.github.net [10.56.122.38]) by smtp.github.com (Postfix) with ESMTPA id 3D24C840BB2 for ; Fri, 5 Mar 2021 11:10:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614971423; bh=ZKmuTn5OcnIUI8CDJXK9dn2wkyBNun42XPU3vCpmTQg=; h=Date:From:To:Subject:From; b=fCpMIGE3rLEctvEPt0PeU5JtkuRHJTy1LUKz/vMctWe3yjvB3OufLCevAzml1Owgp M/3Rc1s8SkdIYYocjh5HBZjYVJHD0un6i+jPwwXmo6WCtT6FOagQBYjS9/Dznowzfm sJdw2Xin+mdW8z9gNwC3Cie1WTLKLj7K2FmTkdVE= Date: Fri, 05 Mar 2021 11:10:23 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 011025: s390x/cpu_model: disallow unpack for --only-migrat... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Mar 2021 19:10:30 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 0110253e690f37ff0add0c8d75f47747041d75fa=0D https://github.com/qemu/qemu/commit/0110253e690f37ff0add0c8d75f4774= 7041d75fa=0D Author: Christian Borntraeger =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/cpu_models.c=0D =0D Log Message:=0D -----------=0D s390x/cpu_model: disallow unpack for --only-migratable=0D =0D Secure execution (aka protected virtualization) guests cannot be=0D migrated at the moment. If the unpack facility is provided in the cpu=0D model, a guest may choose to transition to secure mode, making the=0D guest unmigratable at that point in time. If the machine was explicitly=0D= started with --only-migratable, we would get a failure only when the=0D guest actually tries to transition; instead, explicitly disallow the=0D unpack facility if --only-migratable was specified to avoid late=0D surprises.=0D =0D Signed-off-by: Christian Borntraeger =0D Reviewed-by: David Hildenbrand =0D Reviewed-by: Halil Pasic =0D Message-Id: <20210125135332.181324-1-borntraeger@de.ibm.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: ea1b90b4fcb1230b2c85f3fd4ee09a84ddca7a6f=0D https://github.com/qemu/qemu/commit/ea1b90b4fcb1230b2c85f3fd4ee09a8= 4ddca7a6f=0D Author: Thomas Huth =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/arch_dump.c=0D =0D Log Message:=0D -----------=0D target/s390x/arch_dump: Fix warning for the name field in the PT_NOTE s= ection=0D =0D There is a compiler warning with GCC 9.3 when compiling with=0D the -fsanitize=3Dthread compiler flag:=0D =0D In function 'strncpy',=0D inlined from 's390x_write_elf64_notes' at ../target/s390x/arch_dump.c= :219:9:=0D /usr/include/x86_64-linux-gnu/bits/string_fortified.h:106:10: error:=0D '__builtin_strncpy' specified bound 8 equals destination size=0D [-Werror=3Dstringop-truncation]=0D =0D Since the name should always be NUL-terminated, let's use g_strlcpy() to=0D= silence this warning. And while we're at it, also add an assert() to make= =0D sure that the provided names always fit the size field (which is fine for= =0D the current callers, the function is called once with "CORE" and once wit= h=0D "LINUX" as a name).=0D =0D Signed-off-by: Thomas Huth =0D Reviewed-by: Christian Borntraeger =0D Message-Id: <20210205093921.848260-1-thuth@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 24056cbfd577fd219d55c03f69df66e6351456e7=0D https://github.com/qemu/qemu/commit/24056cbfd577fd219d55c03f69df66e= 6351456e7=0D Author: Halil Pasic =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/meson.build=0D =0D Log Message:=0D -----------=0D hw/s390x: fix build for virtio-9p-ccw=0D =0D Commit 2c44220d05 ("meson: convert hw/arch*"), which migrated the old=0D= Makefile.objs to meson.build accidentally excluded virtio-ccw-9p.c and=0D= thus the virtio-9p-ccw device from the build (and potentially also=0D included the file virtio-ccw-blk.c twice in the source set). And since=0D= CONFIG_VIRTFS can't be used the way it was used here (see commit=0D 2c9dce0196 ("meson: do not use CONFIG_VIRTFS")), the preconditions have=0D= to be written differently.=0D =0D Let's fix this!=0D =0D Signed-off-by: Halil Pasic =0D Fixes: 2c44220d05 ("meson: convert hw/arch*")=0D Reported-by: Jakob Naucke =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Thomas Huth =0D Message-Id: <20210218034059.1096078-1-pasic@linux.ibm.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 403af209db8c030ed1e000640cd3cd80c6882883=0D https://github.com/qemu/qemu/commit/403af209db8c030ed1e000640cd3cd8= 0c6882883=0D Author: Matthew Rosato =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/s390-pci-inst.c=0D =0D Log Message:=0D -----------=0D s390x/pci: restore missing Query PCI Function CLP data=0D =0D Some CLP response data was accidentally dropped when fixing endianness=0D= issues with the Query PCI Function CLP response. All of these values are= =0D sent as 0s to the guest for emulated devices, so the impact is only=0D observed on passthrough devices.=0D =0D Fixes: a4e2fff1b104 ("s390x/pci: fix endianness issues")=0D Signed-off-by: Matthew Rosato =0D Message-Id: <1613681609-9349-1-git-send-email-mjrosato@linux.ibm.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 151fcdfd628a396845b275831e920ddbc10a9f18=0D https://github.com/qemu/qemu/commit/151fcdfd628a396845b275831e920dd= bc10a9f18=0D Author: Cornelia Huck =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/virtio-ccw.c=0D =0D Log Message:=0D -----------=0D virtio-ccw: commands on revision-less devices=0D =0D The virtio standard specifies that any non-transitional device must=0D reject commands prior to revision setting (which we do). Devices=0D that are transitional need to assume revision 0 (legacy) if the=0D driver sends a non-revision-setting command first in order to=0D support legacy drivers. We neglected to do the latter.=0D =0D Fortunately, nearly everything worked as intended anyway; the only=0D problem was not properly rejecting revision setting after some other=0D command had been issued. Easy to fix by setting revision to 0 if=0D we see a non-revision command on a legacy-capable revision-less=0D device.=0D =0D Found by code inspection, not observed in the wild.=0D =0D Signed-off-by: Cornelia Huck =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Michael S. Tsirkin =0D Acked-by: Halil Pasic =0D Message-Id: <20210216111830.1087847-1-cohuck@redhat.com>=0D =0D =0D Commit: a54b8ac340c20531daa89929c5ce7fed89fa401d=0D https://github.com/qemu/qemu/commit/a54b8ac340c20531daa89929c5ce7fe= d89fa401d=0D Author: Pierre Morel =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/ioinst.c=0D =0D Log Message:=0D -----------=0D css: SCHIB measurement block origin must be aligned=0D =0D The Measurement Block Origin inside the SCHIB is used when=0D Measurement Block format 1 is in used and must be aligned=0D on 64 bytes otherwise an operand exception is recognized=0D when issuing the Modify Sub CHannel (MSCH) instruction.=0D =0D Signed-off-by: Pierre Morel =0D Reviewed-by: Thomas Huth =0D Message-Id: <1613741973-3711-2-git-send-email-pmorel@linux.ibm.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: d6cd66311f527ee29c1d7b0988059cda00ad92fa=0D https://github.com/qemu/qemu/commit/d6cd66311f527ee29c1d7b0988059cd= a00ad92fa=0D Author: Eric Farman =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/ccw.c=0D =0D Log Message:=0D -----------=0D vfio-ccw: Do not read region ret_code after write=0D =0D A pwrite() call returns the number of bytes written (or -1 on error),=0D and vfio-ccw compares this number with the size of the region to=0D determine if an error had occurred or not.=0D =0D If they are not equal, this is a failure and the errno is used to=0D determine exactly how things failed. An errno of zero is possible=0D (though unlikely) in this situation and would be translated to a=0D successful operation.=0D =0D If they ARE equal, the ret_code field is read from the region to=0D determine how to proceed. While the kernel sets the ret_code field=0D as necessary, the region and thus this field is not "written back"=0D to the user. So the value can only be what it was initialized to,=0D which is zero.=0D =0D So, let's convert an unexpected length with errno of zero to a=0D return code of -EFAULT, and explicitly set an expected length to=0D a return code of zero. This will be a little safer and clearer.=0D =0D Suggested-by: Matthew Rosato =0D Signed-off-by: Eric Farman =0D Message-Id: <20210303160739.2179378-1-farman@linux.ibm.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 39d5d1404ed695f4a1cd2b117a6cf2d92dd8e8b9=0D https://github.com/qemu/qemu/commit/39d5d1404ed695f4a1cd2b117a6cf2d= 92dd8e8b9=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/kvm.c=0D =0D Log Message:=0D -----------=0D target/s390x/kvm: Simplify debug code=0D =0D We already have the 'run' variable holding 'cs->kvm_run' value.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210303182219.1631042-3-philmd@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 91e92cad67caca3bc4b8e920ddb5c8ca64aac9e1=0D https://github.com/qemu/qemu/commit/91e92cad67caca3bc4b8e920ddb5c8c= a64aac9e1=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/meson.build=0D M hw/s390x/s390-pci-inst.c=0D M hw/s390x/virtio-ccw.c=0D M hw/vfio/ccw.c=0D M target/s390x/arch_dump.c=0D M target/s390x/cpu_models.c=0D M target/s390x/ioinst.c=0D M target/s390x/kvm.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210305= ' into staging=0D =0D some accumulated s390x fixes=0D =0D # gpg: Signature made Fri 05 Mar 2021 15:50:00 GMT=0D # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02= FAF=0D # gpg: issuer "cohuck@redhat.com"=0D # gpg: Good signature from "Cornelia Huck " [unkn= own]=0D # gpg: aka "Cornelia Huck " [fu= ll]=0D # gpg: aka "Cornelia Huck " [fu= ll]=0D # gpg: aka "Cornelia Huck " [unknown]=0D= # gpg: aka "Cornelia Huck " [unknown]=0D= # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 = 2FAF=0D =0D * remotes/cohuck-gitlab/tags/s390x-20210305:=0D target/s390x/kvm: Simplify debug code=0D vfio-ccw: Do not read region ret_code after write=0D css: SCHIB measurement block origin must be aligned=0D virtio-ccw: commands on revision-less devices=0D s390x/pci: restore missing Query PCI Function CLP data=0D hw/s390x: fix build for virtio-9p-ccw=0D target/s390x/arch_dump: Fix warning for the name field in the PT_NOTE s= ection=0D s390x/cpu_model: disallow unpack for --only-migratable=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/bb736b20a31f...91e92cad67ca= =0D From MAILER-DAEMON Fri Mar 05 17:52:51 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lIJJT-0004IP-Fg for mharc-qemu-commits@gnu.org; Fri, 05 Mar 2021 17:52:51 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:52542) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lIJJM-0004EP-S6 for qemu-commits@nongnu.org; Fri, 05 Mar 2021 17:52:45 -0500 Received: from out-21.smtp.github.com ([192.30.252.204]:40169 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lIJJJ-0004ut-CB for qemu-commits@nongnu.org; Fri, 05 Mar 2021 17:52:44 -0500 Received: from github.com (hubbernetes-node-55c360f.ac4-iad.github.net [10.52.207.66]) by smtp.github.com (Postfix) with ESMTPA id 2B4E45203A9 for ; Fri, 5 Mar 2021 14:52:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614984759; bh=lIaxovb/AI6byMFNlJXNTExCXujDMW+P9uauFOGq9ro=; h=Date:From:To:Subject:From; b=1QJ2pa6P8MeRLDFfi8NqgqbUYN89mQSxr868OoigtM7zqoVvdM2bhFtrcK7ZiQuOw wlh6NMx9zbCuKAa7zdiafvg9xetW/C6ACGOoDs6Hv8gazpP5Rw0baGYMBH7xyF/4Q7 Nkfm+lODABqbKJD0Bp3EtuleNGPcuqo2kFNl7nj0= Date: Fri, 05 Mar 2021 14:52:39 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 011025: s390x/cpu_model: disallow unpack for --only-migrat... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Mar 2021 22:52:45 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 0110253e690f37ff0add0c8d75f47747041d75fa=0D https://github.com/qemu/qemu/commit/0110253e690f37ff0add0c8d75f4774= 7041d75fa=0D Author: Christian Borntraeger =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/cpu_models.c=0D =0D Log Message:=0D -----------=0D s390x/cpu_model: disallow unpack for --only-migratable=0D =0D Secure execution (aka protected virtualization) guests cannot be=0D migrated at the moment. If the unpack facility is provided in the cpu=0D model, a guest may choose to transition to secure mode, making the=0D guest unmigratable at that point in time. If the machine was explicitly=0D= started with --only-migratable, we would get a failure only when the=0D guest actually tries to transition; instead, explicitly disallow the=0D unpack facility if --only-migratable was specified to avoid late=0D surprises.=0D =0D Signed-off-by: Christian Borntraeger =0D Reviewed-by: David Hildenbrand =0D Reviewed-by: Halil Pasic =0D Message-Id: <20210125135332.181324-1-borntraeger@de.ibm.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: ea1b90b4fcb1230b2c85f3fd4ee09a84ddca7a6f=0D https://github.com/qemu/qemu/commit/ea1b90b4fcb1230b2c85f3fd4ee09a8= 4ddca7a6f=0D Author: Thomas Huth =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/arch_dump.c=0D =0D Log Message:=0D -----------=0D target/s390x/arch_dump: Fix warning for the name field in the PT_NOTE s= ection=0D =0D There is a compiler warning with GCC 9.3 when compiling with=0D the -fsanitize=3Dthread compiler flag:=0D =0D In function 'strncpy',=0D inlined from 's390x_write_elf64_notes' at ../target/s390x/arch_dump.c= :219:9:=0D /usr/include/x86_64-linux-gnu/bits/string_fortified.h:106:10: error:=0D '__builtin_strncpy' specified bound 8 equals destination size=0D [-Werror=3Dstringop-truncation]=0D =0D Since the name should always be NUL-terminated, let's use g_strlcpy() to=0D= silence this warning. And while we're at it, also add an assert() to make= =0D sure that the provided names always fit the size field (which is fine for= =0D the current callers, the function is called once with "CORE" and once wit= h=0D "LINUX" as a name).=0D =0D Signed-off-by: Thomas Huth =0D Reviewed-by: Christian Borntraeger =0D Message-Id: <20210205093921.848260-1-thuth@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 24056cbfd577fd219d55c03f69df66e6351456e7=0D https://github.com/qemu/qemu/commit/24056cbfd577fd219d55c03f69df66e= 6351456e7=0D Author: Halil Pasic =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/meson.build=0D =0D Log Message:=0D -----------=0D hw/s390x: fix build for virtio-9p-ccw=0D =0D Commit 2c44220d05 ("meson: convert hw/arch*"), which migrated the old=0D= Makefile.objs to meson.build accidentally excluded virtio-ccw-9p.c and=0D= thus the virtio-9p-ccw device from the build (and potentially also=0D included the file virtio-ccw-blk.c twice in the source set). And since=0D= CONFIG_VIRTFS can't be used the way it was used here (see commit=0D 2c9dce0196 ("meson: do not use CONFIG_VIRTFS")), the preconditions have=0D= to be written differently.=0D =0D Let's fix this!=0D =0D Signed-off-by: Halil Pasic =0D Fixes: 2c44220d05 ("meson: convert hw/arch*")=0D Reported-by: Jakob Naucke =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Thomas Huth =0D Message-Id: <20210218034059.1096078-1-pasic@linux.ibm.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 403af209db8c030ed1e000640cd3cd80c6882883=0D https://github.com/qemu/qemu/commit/403af209db8c030ed1e000640cd3cd8= 0c6882883=0D Author: Matthew Rosato =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/s390-pci-inst.c=0D =0D Log Message:=0D -----------=0D s390x/pci: restore missing Query PCI Function CLP data=0D =0D Some CLP response data was accidentally dropped when fixing endianness=0D= issues with the Query PCI Function CLP response. All of these values are= =0D sent as 0s to the guest for emulated devices, so the impact is only=0D observed on passthrough devices.=0D =0D Fixes: a4e2fff1b104 ("s390x/pci: fix endianness issues")=0D Signed-off-by: Matthew Rosato =0D Message-Id: <1613681609-9349-1-git-send-email-mjrosato@linux.ibm.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 151fcdfd628a396845b275831e920ddbc10a9f18=0D https://github.com/qemu/qemu/commit/151fcdfd628a396845b275831e920dd= bc10a9f18=0D Author: Cornelia Huck =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/virtio-ccw.c=0D =0D Log Message:=0D -----------=0D virtio-ccw: commands on revision-less devices=0D =0D The virtio standard specifies that any non-transitional device must=0D reject commands prior to revision setting (which we do). Devices=0D that are transitional need to assume revision 0 (legacy) if the=0D driver sends a non-revision-setting command first in order to=0D support legacy drivers. We neglected to do the latter.=0D =0D Fortunately, nearly everything worked as intended anyway; the only=0D problem was not properly rejecting revision setting after some other=0D command had been issued. Easy to fix by setting revision to 0 if=0D we see a non-revision command on a legacy-capable revision-less=0D device.=0D =0D Found by code inspection, not observed in the wild.=0D =0D Signed-off-by: Cornelia Huck =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Michael S. Tsirkin =0D Acked-by: Halil Pasic =0D Message-Id: <20210216111830.1087847-1-cohuck@redhat.com>=0D =0D =0D Commit: a54b8ac340c20531daa89929c5ce7fed89fa401d=0D https://github.com/qemu/qemu/commit/a54b8ac340c20531daa89929c5ce7fe= d89fa401d=0D Author: Pierre Morel =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/ioinst.c=0D =0D Log Message:=0D -----------=0D css: SCHIB measurement block origin must be aligned=0D =0D The Measurement Block Origin inside the SCHIB is used when=0D Measurement Block format 1 is in used and must be aligned=0D on 64 bytes otherwise an operand exception is recognized=0D when issuing the Modify Sub CHannel (MSCH) instruction.=0D =0D Signed-off-by: Pierre Morel =0D Reviewed-by: Thomas Huth =0D Message-Id: <1613741973-3711-2-git-send-email-pmorel@linux.ibm.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: d6cd66311f527ee29c1d7b0988059cda00ad92fa=0D https://github.com/qemu/qemu/commit/d6cd66311f527ee29c1d7b0988059cd= a00ad92fa=0D Author: Eric Farman =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/ccw.c=0D =0D Log Message:=0D -----------=0D vfio-ccw: Do not read region ret_code after write=0D =0D A pwrite() call returns the number of bytes written (or -1 on error),=0D and vfio-ccw compares this number with the size of the region to=0D determine if an error had occurred or not.=0D =0D If they are not equal, this is a failure and the errno is used to=0D determine exactly how things failed. An errno of zero is possible=0D (though unlikely) in this situation and would be translated to a=0D successful operation.=0D =0D If they ARE equal, the ret_code field is read from the region to=0D determine how to proceed. While the kernel sets the ret_code field=0D as necessary, the region and thus this field is not "written back"=0D to the user. So the value can only be what it was initialized to,=0D which is zero.=0D =0D So, let's convert an unexpected length with errno of zero to a=0D return code of -EFAULT, and explicitly set an expected length to=0D a return code of zero. This will be a little safer and clearer.=0D =0D Suggested-by: Matthew Rosato =0D Signed-off-by: Eric Farman =0D Message-Id: <20210303160739.2179378-1-farman@linux.ibm.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 39d5d1404ed695f4a1cd2b117a6cf2d92dd8e8b9=0D https://github.com/qemu/qemu/commit/39d5d1404ed695f4a1cd2b117a6cf2d= 92dd8e8b9=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-04 (Thu, 04 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/kvm.c=0D =0D Log Message:=0D -----------=0D target/s390x/kvm: Simplify debug code=0D =0D We already have the 'run' variable holding 'cs->kvm_run' value.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210303182219.1631042-3-philmd@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 91e92cad67caca3bc4b8e920ddb5c8ca64aac9e1=0D https://github.com/qemu/qemu/commit/91e92cad67caca3bc4b8e920ddb5c8c= a64aac9e1=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/meson.build=0D M hw/s390x/s390-pci-inst.c=0D M hw/s390x/virtio-ccw.c=0D M hw/vfio/ccw.c=0D M target/s390x/arch_dump.c=0D M target/s390x/cpu_models.c=0D M target/s390x/ioinst.c=0D M target/s390x/kvm.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210305= ' into staging=0D =0D some accumulated s390x fixes=0D =0D # gpg: Signature made Fri 05 Mar 2021 15:50:00 GMT=0D # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02= FAF=0D # gpg: issuer "cohuck@redhat.com"=0D # gpg: Good signature from "Cornelia Huck " [unkn= own]=0D # gpg: aka "Cornelia Huck " [fu= ll]=0D # gpg: aka "Cornelia Huck " [fu= ll]=0D # gpg: aka "Cornelia Huck " [unknown]=0D= # gpg: aka "Cornelia Huck " [unknown]=0D= # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 = 2FAF=0D =0D * remotes/cohuck-gitlab/tags/s390x-20210305:=0D target/s390x/kvm: Simplify debug code=0D vfio-ccw: Do not read region ret_code after write=0D css: SCHIB measurement block origin must be aligned=0D virtio-ccw: commands on revision-less devices=0D s390x/pci: restore missing Query PCI Function CLP data=0D hw/s390x: fix build for virtio-9p-ccw=0D target/s390x/arch_dump: Fix warning for the name field in the PT_NOTE s= ection=0D s390x/cpu_model: disallow unpack for --only-migratable=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/bb736b20a31f...91e92cad67ca= =0D From MAILER-DAEMON Fri Mar 05 17:58:29 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lIJOu-0006w5-SE for mharc-qemu-commits@gnu.org; Fri, 05 Mar 2021 17:58:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53886) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lIJOt-0006vZ-Dh for qemu-commits@nongnu.org; Fri, 05 Mar 2021 17:58:27 -0500 Received: from out-26.smtp.github.com ([192.30.252.209]:46861 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lIJOo-0007Oq-FA for qemu-commits@nongnu.org; Fri, 05 Mar 2021 17:58:26 -0500 Received: from github.com (hubbernetes-node-f4255c4.ash1-iad.github.net [10.56.121.15]) by smtp.github.com (Postfix) with ESMTPA id CC5675E02DC for ; Fri, 5 Mar 2021 14:58:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1614985101; bh=GhrDCxd2IcN67hw7NXfrgqvhzrP15JYve7dUuT1Bq4M=; h=Date:From:To:Subject:From; b=y0hUUVc2IVERBJ1K4xGhquT7zZVDWMIuasnPBHyjx5Kr/Sn0Z8paN9fqXdijgNYIR gd3y6VdG2L83PN8+d2epw4LoZTvT4BBfJlu0r7HAru0cK4fWrJy25lLNdZTgPPG3U6 MadhB7fvOhRcKX2NvwkS8yetYDrUX3OSOCDbBJDI= Date: Fri, 05 Mar 2021 14:58:21 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] c593f1: iotests: Drop deprecated 'props' from object-add X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Mar 2021 22:58:27 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: c593f16543ed30be20167e328766e685530ca9e0=0D https://github.com/qemu/qemu/commit/c593f16543ed30be20167e328766e68= 5530ca9e0=0D Author: Alberto Garcia =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/087=0D M tests/qemu-iotests/184=0D M tests/qemu-iotests/218=0D M tests/qemu-iotests/235=0D M tests/qemu-iotests/245=0D M tests/qemu-iotests/258=0D M tests/qemu-iotests/258.out=0D M tests/qemu-iotests/295=0D M tests/qemu-iotests/296=0D =0D Log Message:=0D -----------=0D iotests: Drop deprecated 'props' from object-add=0D =0D Signed-off-by: Alberto Garcia =0D Message-Id: <20210222115737.2993-1-berto@igalia.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 568bf20672a18afc7ff239e5513c8f8147a253d2=0D https://github.com/qemu/qemu/commit/568bf20672a18afc7ff239e5513c8f8= 147a253d2=0D Author: Max Reitz =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M block/backup.c=0D =0D Log Message:=0D -----------=0D backup: Remove nodes from job in .clean()=0D =0D The block job holds a reference to the backup-top node (because it is=0D passed as the main job BDS to block_job_create()). Therefore,=0D bdrv_backup_top_drop() cannot delete the backup-top node (replacing it=0D= by its child does not affect the job parent, because that has=0D .stay_at_node set). That is a problem, because all of its I/O functions=0D= assume the BlockCopyState (s->bcs) to be valid and that it has a=0D filtered child; but after bdrv_backup_top_drop(), neither of those=0D things are true.=0D =0D It does not make sense to add new parents to backup-top after=0D backup_clean(), so we should detach it from the job before=0D bdrv_backup_top_drop(). Because there is no function to do that for a=0D= single node, just detach all of the job's nodes -- the job does not do=0D= anything past backup_clean() anyway.=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210219153348.41861-2-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 6fb8ef5036204ee421cdd14febc044a374bce4cb=0D https://github.com/qemu/qemu/commit/6fb8ef5036204ee421cdd14febc044a= 374bce4cb=0D Author: Max Reitz =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M block/backup-top.c=0D =0D Log Message:=0D -----------=0D backup-top: Refuse I/O in inactive state=0D =0D When the backup-top node transitions from active to inactive in=0D bdrv_backup_top_drop(), the BlockCopyState is freed and the filtered=0D child is removed, so the node effectively becomes unusable.=0D =0D However, noone told its I/O functions this, so they will happily=0D continue accessing bs->backing and s->bcs. Prevent that by aborting=0D early when s->active is false.=0D =0D (After the preceding patch, the node should be gone after=0D bdrv_backup_top_drop(), so this should largely be a theoretical problem.=0D= But still, better to be safe than sorry, and also I think it just makes=0D= sense to check s->active in the I/O functions.)=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210219153348.41861-3-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 857be78f489deb681c5dbcef6bafb9a11c5a208d=0D https://github.com/qemu/qemu/commit/857be78f489deb681c5dbcef6bafb9a= 11c5a208d=0D Author: Max Reitz =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/283=0D M tests/qemu-iotests/283.out=0D =0D Log Message:=0D -----------=0D iotests/283: Check that finalize drops backup-top=0D =0D Without any of HEAD^ or HEAD^^ applied, qemu will most likely crash on=0D= the qemu-io invocation, for a variety of immediate reasons. The=0D underlying problem is generally a use-after-free access into=0D backup-top's BlockCopyState.=0D =0D With only HEAD^ applied, qemu-io will run into an EIO (which is not=0D capture by the output, but you can see that the qemu-io invocation will=0D= be accepted (i.e., qemu-io will run) in contrast to the reference=0D output, where the node name cannot be found), and qemu will then crash=0D= in query-named-block-nodes: bdrv_get_allocated_file_size() detects=0D backup-top to be a filter and passes the request through to its child.=0D= However, after bdrv_backup_top_drop(), that child is NULL, so the=0D recursive call crashes.=0D =0D With HEAD^^ applied, this test should pass.=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210219153348.41861-4-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 83665ef324922a101ca6848e2612f9768d6ff44a=0D https://github.com/qemu/qemu/commit/83665ef324922a101ca6848e2612f97= 68d6ff44a=0D Author: Eric Blake =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/300=0D =0D Log Message:=0D -----------=0D iotests: Fix up python style in 300=0D =0D Break some long lines, and relax our type hints to be more generic to=0D any JSON, in order to more easily permit the additional JSON depth now=0D= possible in migration parameters. Detected by iotest 297.=0D =0D Fixes: ca4bfec41d56=0D (qemu-iotests: 300: Add test case for modifying persistence of bitmap)=0D= Reported-by: Kevin Wolf =0D Signed-off-by: Eric Blake =0D Message-Id: <20210215220518.1745469-1-eblake@redhat.com>=0D Reviewed-by: John Snow =0D Reviewed-by: Vladimir Sementsov-Ogievskiy =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 56cb002e3bc0f2a08be1c5a79f8b176b97ff4b4b=0D https://github.com/qemu/qemu/commit/56cb002e3bc0f2a08be1c5a79f8b176= b97ff4b4b=0D Author: Stefano Garzarella =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M blockjob.c=0D =0D Log Message:=0D -----------=0D blockjob: report a better error message=0D =0D When a block job fails, we report strerror(-job->job.ret) error=0D message, also if the job set an error object.=0D Let's report a better error message using error_get_pretty(job->job.err).= =0D =0D If an error object was not set, strerror(-job->ret) is used as fallback,=0D= as explained in include/qemu/job.h:=0D =0D typedef struct Job {=0D ...=0D /**=0D * Error object for a failed job.=0D * If job->ret is nonzero and an error object was not set, it will be= set=0D * to strerror(-job->ret) during job_completed.=0D */=0D Error *err;=0D }=0D =0D In block_job_query() there can be a transient where 'job.err' is not set=0D= by a scheduled bottom half. In that case we use strerror(-job->ret) as it= =0D was before.=0D =0D Suggested-by: Kevin Wolf =0D Signed-off-by: Stefano Garzarella =0D Message-Id: <20210225103633.76746-1-sgarzare@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: d182ce772a74289462f8619130aab5c8ea719b26=0D https://github.com/qemu/qemu/commit/d182ce772a74289462f8619130aab5c= 8ea719b26=0D Author: Paolo Bonzini =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D storage-daemon: report unexpected arguments on the fly=0D =0D If the first character of optstring is '-', then each nonoption argv=0D element is handled as if it were the argument of an option with character= =0D code 1. This removes the reordering of the argv array, and enables usage= =0D of loc_set_cmdline to provide better error messages.=0D =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210301152844.291799-2-pbonzini@redhat.com>=0D Reviewed-by: Eric Blake =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: a597e5964b042e7db12454f68dd0e19c4dd34fb6=0D https://github.com/qemu/qemu/commit/a597e5964b042e7db12454f68dd0e19= c4dd34fb6=0D Author: Paolo Bonzini =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D storage-daemon: include current command line option in the errors=0D =0D Use the location management facilities that the emulator uses, so that=0D= the current command line option appears in the error message.=0D =0D Before:=0D =0D $ storage-daemon/qemu-storage-daemon --nbd key..=3D=0D qemu-storage-daemon: Invalid parameter 'key..'=0D =0D After:=0D =0D $ storage-daemon/qemu-storage-daemon --nbd key..=3D=0D qemu-storage-daemon: --nbd key..=3D: Invalid parameter 'key..'=0D =0D Reviewed-by: Eric Blake =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210301152844.291799-3-pbonzini@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 7dc033e47f450285c2253cd1d37ba87753cdff43=0D https://github.com/qemu/qemu/commit/7dc033e47f450285c2253cd1d37ba87= 753cdff43=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-storage-daemon.rst=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qemu-storage-daemon: add --pidfile option=0D =0D Daemons often have a --pidfile option where the pid is written to a file=0D= so that scripts can stop the daemon by sending a signal.=0D =0D The pid file also acts as a lock to prevent multiple instances of the=0D daemon from launching for a given pid file.=0D =0D QEMU, qemu-nbd, qemu-ga, virtiofsd, and qemu-pr-helper all support the=0D= --pidfile option. Add it to qemu-storage-daemon too.=0D =0D Reported-by: Richard W.M. Jones =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210302142746.170535-1-stefanha@redhat.com>=0D Reviewed-by: Richard W.M. Jones =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 691ce8a9cc8a4908bab204286d1a4238f3660b02=0D https://github.com/qemu/qemu/commit/691ce8a9cc8a4908bab204286d1a423= 8f3660b02=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-storage-daemon.rst=0D =0D Log Message:=0D -----------=0D docs: show how to spawn qemu-storage-daemon with fd passing=0D =0D The QMP monitor, NBD server, and vhost-user-blk export all support file=0D= descriptor passing. This is a useful technique because it allows the=0D parent process to spawn and wait for qemu-storage-daemon without busy=0D waiting, which may delay startup due to arbitrary sleep() calls.=0D =0D This Python example is inspired by the test case written for libnbd by=0D= Richard W.M. Jones :=0D https://gitlab.com/nbdkit/libnbd/-/commit/89113f484effb0e6c322314ba75c1cb= e07a04543=0D =0D Thanks to Daniel P. Berrang=C3=A9 for suggestions o= n=0D how to get this working. Now let's document it!=0D =0D Reported-by: Richard W.M. Jones =0D Cc: Kevin Wolf =0D Cc: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210301172728.135331-2-stefanha@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Richard W.M. Jones =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 409e6a53320fe5b6f9ed0adb527aed4a5a88bb44=0D https://github.com/qemu/qemu/commit/409e6a53320fe5b6f9ed0adb527aed4= a5a88bb44=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-storage-daemon.rst=0D =0D Log Message:=0D -----------=0D docs: replace insecure /tmp examples in qsd docs=0D =0D World-writeable directories have security issues. Avoid showing them in=0D= the documentation since someone might accidentally use them in=0D situations where they are insecure.=0D =0D There tend to be 3 security problems:=0D 1. Denial of service. An adversary may be able to create the file=0D beforehand, consume all space/inodes, etc to sabotage us.=0D 2. Impersonation. An adversary may be able to create a listen socket and=0D= accept incoming connections that were meant for us.=0D 3. Unauthenticated client access. An adversary may be able to connect to=0D= us if we did not set the uid/gid and permissions correctly.=0D =0D These can be prevented or mitigated with private /tmp, carefully setting=0D= the umask, etc but that requires special action and does not apply to=0D all situations. Just avoid using /tmp in examples.=0D =0D Reported-by: Richard W.M. Jones =0D Reported-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210301172728.135331-3-stefanha@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Richard W.M. Jones =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 522a78089cc1d1344db3150042a8752895ee1090=0D https://github.com/qemu/qemu/commit/522a78089cc1d1344db3150042a8752= 895ee1090=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/block/vhost-user-blk.c=0D =0D Log Message:=0D -----------=0D vhost-user-blk: fix blkcfg->num_queues endianness=0D =0D Treat the num_queues field as virtio-endian. On big-endian hosts the=0D vhost-user-blk num_queues field was in the wrong endianness.=0D =0D Move the blkcfg.num_queues store operation from realize to=0D vhost_user_blk_update_config() so feature negotiation has finished and=0D= we know the endianness of the device. VIRTIO 1.0 devices are=0D little-endian, but in case someone wants to use legacy VIRTIO we support=0D= all endianness cases.=0D =0D Cc: qemu-stable@nongnu.org=0D Signed-off-by: Stefan Hajnoczi =0D Reviewed-by: Raphael Norwitz =0D Reviewed-by: Michael S. Tsirkin =0D Message-Id: <20210223144653.811468-2-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 690694bf7da83ecbcf763473151f20be1ddd0012=0D https://github.com/qemu/qemu/commit/690694bf7da83ecbcf763473151f20b= e1ddd0012=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/libqos/libqtest.h=0D M tests/qtest/libqtest.c=0D =0D Log Message:=0D -----------=0D libqtest: add qtest_socket_server()=0D =0D Add an API that returns a new UNIX domain socket in the listen state.=0D The code for this was already there but only used internally in=0D init_socket().=0D =0D This new API will be used by vhost-user-blk-test.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210223144653.811468-3-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 31d35f6c55f344650b053a1d7055e2ec46a7da79=0D https://github.com/qemu/qemu/commit/31d35f6c55f344650b053a1d7055e2e= c46a7da79=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/libqos/libqtest.h=0D M tests/qtest/libqtest.c=0D =0D Log Message:=0D -----------=0D libqtest: add qtest_kill_qemu()=0D =0D Tests that manage multiple processes may wish to kill QEMU before=0D destroying the QTestState. Expose a function to do that.=0D =0D The vhost-user-blk-test testcase will need this.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210223144653.811468-4-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: d4b28c31e2dc9873726b8773f4f4f21170465220=0D https://github.com/qemu/qemu/commit/d4b28c31e2dc9873726b8773f4f4f21= 170465220=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/libqos/libqtest.h=0D M tests/qtest/libqtest.c=0D =0D Log Message:=0D -----------=0D libqtest: add qtest_remove_abrt_handler()=0D =0D Add a function to remove previously-added abrt handler functions.=0D =0D Now that a symmetric pair of add/remove functions exists we can also=0D balance the SIGABRT handler installation. The signal handler was=0D installed each time qtest_add_abrt_handler() was called. Now it is=0D installed when the abrt handler list becomes non-empty and removed again=0D= when the list becomes empty.=0D =0D The qtest_remove_abrt_handler() function will be used by=0D vhost-user-blk-test.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210223144653.811468-5-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 2d52150aad8d628968dd5dee1cd8a3b4dafb9208=0D https://github.com/qemu/qemu/commit/2d52150aad8d628968dd5dee1cd8a3b= 4dafb9208=0D Author: Coiby Xu =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M tests/qtest/libqos/meson.build=0D A tests/qtest/libqos/vhost-user-blk.c=0D A tests/qtest/libqos/vhost-user-blk.h=0D M tests/qtest/meson.build=0D A tests/qtest/vhost-user-blk-test.c=0D =0D Log Message:=0D -----------=0D test: new qTest case to test the vhost-user-blk-server=0D =0D This test case has the same tests as tests/virtio-blk-test.c except for=0D= tests have block_resize. Since the vhost-user-blk export only serves one=0D= client one time, two exports are started by qemu-storage-daemon for the=0D= hotplug test.=0D =0D Suggested-by: Thomas Huth =0D Signed-off-by: Coiby Xu =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-6-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 2828da3cf0177776d745467780c54d099d9a7bcf=0D https://github.com/qemu/qemu/commit/2828da3cf0177776d745467780c54d0= 99d9a7bcf=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/vhost-user-blk-test.c=0D =0D Log Message:=0D -----------=0D tests/qtest: add multi-queue test case to vhost-user-blk-test=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-7-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: cf961a4815ff9ed4a95553ccc18077e7ed6e2d73=0D https://github.com/qemu/qemu/commit/cf961a4815ff9ed4a95553ccc18077e= 7ed6e2d73=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: fix blk_size double byteswap=0D =0D The config->blk_size field is little-endian. Use the native-endian=0D blk_size variable to avoid double byteswapping.=0D =0D Fixes: 11f60f7eaee2630dd6fa0c3a8c49f792e46c4cf1 ("block/export: make vhos= t-user-blk config space little-endian")=0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-8-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 82eac56740e797efad4653443bc1e5e003828ecf=0D https://github.com/qemu/qemu/commit/82eac56740e797efad4653443bc1e5e= 003828ecf=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: use VIRTIO_BLK_SECTOR_BITS=0D =0D Use VIRTIO_BLK_SECTOR_BITS and VIRTIO_BLK_SECTOR_SIZE when dealing with=0D= virtio-blk sector numbers. Although the values happen to be the same as=0D= BDRV_SECTOR_BITS and BDRV_SECTOR_SIZE, they are conceptually different.=0D= This makes it clearer when we are dealing with virtio-blk sector units.=0D= =0D Use VIRTIO_BLK_SECTOR_BITS in vu_blk_initialize_config(). Later patches=0D= will use it the new constants the virtqueue request processing code=0D path.=0D =0D Suggested-by: Max Reitz =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-9-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: fe921e0f67625c3dbaa96f745def536bcea77562=0D https://github.com/qemu/qemu/commit/fe921e0f67625c3dbaa96f745def536= bcea77562=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: fix vhost-user-blk export sector number calculation=0D =0D The driver is supposed to honor the blk_size field but the protocol=0D still uses 512-byte sector numbers. It is incorrect to multiply=0D req->sector_num by blk_size.=0D =0D VIRTIO 1.1 5.2.5 Device Initialization says:=0D =0D blk_size can be read to determine the optimal sector size for the=0D driver to use. This does not affect the units used in the protocol=0D (always 512 bytes), but awareness of the correct value can affect=0D performance.=0D =0D Fixes: 3578389bcf76c824a5d82e6586a6f0c71e56f2aa ("block/export: vhost-use= r block device backend server")=0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-10-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: c9affc7d402e84e092fa7e2032722834720ac776=0D https://github.com/qemu/qemu/commit/c9affc7d402e84e092fa7e203272283= 4720ac776=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: port virtio-blk discard/write zeroes input validation=0D =0D Validate discard/write zeroes the same way we do for virtio-blk. Some of=0D= these checks are mandated by the VIRTIO specification, others are=0D internal to QEMU.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-11-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 2f56051e14fd8d5507a9c9afcc95831eee607bbe=0D https://github.com/qemu/qemu/commit/2f56051e14fd8d5507a9c9afcc95831= eee607bbe=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/vhost-user-blk-test.c=0D =0D Log Message:=0D -----------=0D vhost-user-blk-test: test discard/write zeroes invalid inputs=0D =0D Exercise input validation code paths in=0D block/export/vhost-user-blk-server.c.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-12-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 07ea49bab18bf1af8232625d868be1fedeeb908c=0D https://github.com/qemu/qemu/commit/07ea49bab18bf1af8232625d868be1f= edeeb908c=0D Author: Stefan Hajnoczi =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: port virtio-blk read/write range check=0D =0D Check that the sector number and byte count are valid.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-13-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: b9b1ea806b93e89add9644569c866aa570a9b635=0D https://github.com/qemu/qemu/commit/b9b1ea806b93e89add9644569c866aa= 570a9b635=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M block/dirty-bitmap.c=0D M block/qcow2-bitmap.c=0D M include/block/dirty-bitmap.h=0D =0D Log Message:=0D -----------=0D qcow2-bitmap: make bytes_covered_by_bitmap_cluster() public=0D =0D Rename bytes_covered_by_bitmap_cluster() to=0D bdrv_dirty_bitmap_serialization_coverage() and make it public.=0D It is needed as we are going to share it with bitmap loading in=0D parallels format.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Eric Blake =0D Reviewed-by: Denis V. Lunev =0D Message-Id: <20210224104707.88430-2-vsementsov@virtuozzo.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e8df61e9a909df6eb935c7cb2c894072f8e74bf6=0D https://github.com/qemu/qemu/commit/e8df61e9a909df6eb935c7cb2c89407= 2f8e74bf6=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M docs/interop/parallels.txt=0D =0D Log Message:=0D -----------=0D parallels.txt: fix bitmap L1 table description=0D =0D Actually L1 table entry offset is in 512 bytes sectors. Fix the spec.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-3-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e9d6b4f6317d64414832c0164f27fe033c64e6fa=0D https://github.com/qemu/qemu/commit/e9d6b4f6317d64414832c0164f27fe0= 33c64e6fa=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M block/parallels.c=0D M block/parallels.h=0D =0D Log Message:=0D -----------=0D block/parallels: BDRVParallelsState: add cluster_size field=0D =0D We are going to use it in more places, calculating=0D "s->tracks << BDRV_SECTOR_BITS" doesn't look good.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-4-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: bb9c76b4e33e86f0a8a185113e64785b5250579d=0D https://github.com/qemu/qemu/commit/bb9c76b4e33e86f0a8a185113e64785= b5250579d=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M block/meson.build=0D A block/parallels-ext.c=0D M block/parallels.c=0D M block/parallels.h=0D =0D Log Message:=0D -----------=0D parallels: support bitmap extension for read-only mode=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-5-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: efb8373f1deda5a91dd680096b8c5ed4d0bbd2a3=0D https://github.com/qemu/qemu/commit/efb8373f1deda5a91dd680096b8c5ed= 4d0bbd2a3=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/iotests.py=0D =0D Log Message:=0D -----------=0D iotests.py: add unarchive_sample_image() helper=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-6-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: d1152a02b290c48ccd58192e8c37521ad11b1803=0D https://github.com/qemu/qemu/commit/d1152a02b290c48ccd58192e8c37521= ad11b1803=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D A tests/qemu-iotests/sample_images/parallels-with-bitmap.bz2=0D A tests/qemu-iotests/sample_images/parallels-with-bitmap.sh=0D A tests/qemu-iotests/tests/parallels-read-bitmap=0D A tests/qemu-iotests/tests/parallels-read-bitmap.out=0D =0D Log Message:=0D -----------=0D iotests: add parallels-read-bitmap test=0D =0D Test support for reading bitmap from parallels image format.=0D parallels-with-bitmap.bz2 is generated on Virtuozzo by=0D parallels-with-bitmap.sh=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-7-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 737555938750f0bca0f8f1c20b30866ad3eb9d9d=0D https://github.com/qemu/qemu/commit/737555938750f0bca0f8f1c20b30866= ad3eb9d9d=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: update parallels block driver=0D =0D Add new parallels-ext.c and myself as co-maintainer.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210304095151.19358-1-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 67bedc3aed5c455b629c2cb5f523b536c46adff9=0D https://github.com/qemu/qemu/commit/67bedc3aed5c455b629c2cb5f523b53= 6c46adff9=0D Author: Kevin Wolf =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-storage-daemon.rst=0D =0D Log Message:=0D -----------=0D docs: qsd: Explain --export nbd,name=3D... default=0D =0D The 'name' option for NBD exports is optional. Add a note that the=0D default for the option is the node name (people could otherwise expect=0D= that it's the empty string like for qemu-nbd).=0D =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210305094856.18964-1-kwolf@redhat.com>=0D Reviewed-by: Max Reitz =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 33615cec7bdef58def3c77a5855638e932455270=0D https://github.com/qemu/qemu/commit/33615cec7bdef58def3c77a5855638e= 932455270=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M block/backup-top.c=0D M block/backup.c=0D M block/dirty-bitmap.c=0D M block/export/vhost-user-blk-server.c=0D M block/meson.build=0D A block/parallels-ext.c=0D M block/parallels.c=0D M block/parallels.h=0D M block/qcow2-bitmap.c=0D M blockjob.c=0D M docs/interop/parallels.txt=0D M docs/tools/qemu-storage-daemon.rst=0D M hw/block/vhost-user-blk.c=0D M include/block/dirty-bitmap.h=0D M storage-daemon/qemu-storage-daemon.c=0D M tests/qemu-iotests/087=0D M tests/qemu-iotests/184=0D M tests/qemu-iotests/218=0D M tests/qemu-iotests/235=0D M tests/qemu-iotests/245=0D M tests/qemu-iotests/258=0D M tests/qemu-iotests/258.out=0D M tests/qemu-iotests/283=0D M tests/qemu-iotests/283.out=0D M tests/qemu-iotests/295=0D M tests/qemu-iotests/296=0D M tests/qemu-iotests/300=0D M tests/qemu-iotests/iotests.py=0D A tests/qemu-iotests/sample_images/parallels-with-bitmap.bz2=0D A tests/qemu-iotests/sample_images/parallels-with-bitmap.sh=0D A tests/qemu-iotests/tests/parallels-read-bitmap=0D A tests/qemu-iotests/tests/parallels-read-bitmap.out=0D M tests/qtest/libqos/libqtest.h=0D M tests/qtest/libqos/meson.build=0D A tests/qtest/libqos/vhost-user-blk.c=0D A tests/qtest/libqos/vhost-user-blk.h=0D M tests/qtest/libqtest.c=0D M tests/qtest/meson.build=0D A tests/qtest/vhost-user-blk-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into sta= ging=0D =0D Block layer patches:=0D =0D - qemu-storage-daemon: add --pidfile option=0D - qemu-storage-daemon: CLI error messages include the option name now=0D - vhost-user-blk export: Misc fixes, added test cases=0D - docs: Improvements for qemu-storage-daemon documentation=0D - parallels: load bitmap extension=0D - backup-top: Don't crash on post-finalize accesses=0D - iotests improvements=0D =0D # gpg: Signature made Fri 05 Mar 2021 16:53:21 GMT=0D # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2= FD6=0D # gpg: issuer "kwolf@redhat.com"=0D # gpg: Good signature from "Kevin Wolf " [full]=0D # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F = 2FD6=0D =0D * remotes/kevin/tags/for-upstream: (31 commits)=0D docs: qsd: Explain --export nbd,name=3D... default=0D MAINTAINERS: update parallels block driver=0D iotests: add parallels-read-bitmap test=0D iotests.py: add unarchive_sample_image() helper=0D parallels: support bitmap extension for read-only mode=0D block/parallels: BDRVParallelsState: add cluster_size field=0D parallels.txt: fix bitmap L1 table description=0D qcow2-bitmap: make bytes_covered_by_bitmap_cluster() public=0D block/export: port virtio-blk read/write range check=0D vhost-user-blk-test: test discard/write zeroes invalid inputs=0D block/export: port virtio-blk discard/write zeroes input validation=0D block/export: fix vhost-user-blk export sector number calculation=0D block/export: use VIRTIO_BLK_SECTOR_BITS=0D block/export: fix blk_size double byteswap=0D tests/qtest: add multi-queue test case to vhost-user-blk-test=0D test: new qTest case to test the vhost-user-blk-server=0D libqtest: add qtest_remove_abrt_handler()=0D libqtest: add qtest_kill_qemu()=0D libqtest: add qtest_socket_server()=0D vhost-user-blk: fix blkcfg->num_queues endianness=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/91e92cad67ca...33615cec7bde= =0D From MAILER-DAEMON Sat Mar 06 06:23:43 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lIV27-00070K-GX for mharc-qemu-commits@gnu.org; Sat, 06 Mar 2021 06:23:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49010) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lIV25-0006yS-Uz for qemu-commits@nongnu.org; Sat, 06 Mar 2021 06:23:41 -0500 Received: from out-20.smtp.github.com ([192.30.252.203]:48223) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lIV20-0000Xa-MI for qemu-commits@nongnu.org; Sat, 06 Mar 2021 06:23:41 -0500 Received: from github.com (hubbernetes-node-34ac8dd.va3-iad.github.net [10.48.100.66]) by smtp.github.com (Postfix) with ESMTPA id AB51BE080C for ; Sat, 6 Mar 2021 03:23:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615029815; bh=giVJPbTkMftpBg75gaTEetv41x5udwyaJt9jcSODyiI=; h=Date:From:To:Subject:From; b=Kxxb709AsTjHuH9iLjIp0kAxB4Dg1CQzC/lHov4QLRjNfGCo66EaCrXpUihiQbNGi V27yfrk76Sji/Zmdk9tKcNuOa66HWngeS7VC1SWAu8E1yQ450hBQXjiLqWEcJHPfsq YuCAAFJV6tSpqmJf/MEqcU7r4u8cIfEArqVE+fJw= Date: Sat, 06 Mar 2021 03:23:35 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.203; envelope-from=noreply@github.com; helo=out-20.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 4f335a: sbsa-ref: remove cortex-a53 from list of supported... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 06 Mar 2021 11:23:42 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 4f335a6381f83beb5d6ac0d3993514379454a99d=0D https://github.com/qemu/qemu/commit/4f335a6381f83beb5d6ac0d39935143= 79454a99d=0D Author: Marcin Juszkiewicz =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/sbsa-ref.c=0D =0D Log Message:=0D -----------=0D sbsa-ref: remove cortex-a53 from list of supported cpus=0D =0D Cortex-A53 supports 40bits of address space. sbsa-ref's memory starts=0D above this limit.=0D =0D Signed-off-by: Marcin Juszkiewicz =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Acked-by: Leif Lindholm =0D Message-id: 20210216150122.3830863-2-marcin.juszkiewicz@linaro.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: cecc0962099b4967473383bf28f12bef47e62cca=0D https://github.com/qemu/qemu/commit/cecc0962099b4967473383bf28f12be= f47e62cca=0D Author: Marcin Juszkiewicz =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/sbsa-ref.c=0D =0D Log Message:=0D -----------=0D sbsa-ref: add 'max' to list of allowed cpus=0D =0D Let add 'max' cpu while work goes on adding newer CPU types than=0D Cortex-A72. This allows us to check SVE etc support.=0D =0D Signed-off-by: Marcin Juszkiewicz =0D Acked-by: Leif Lindholm =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210216150122.3830863-3-marcin.juszkiewicz@linaro.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: f2f68a78b793808b84367bc708d632969d4440aa=0D https://github.com/qemu/qemu/commit/f2f68a78b793808b84367bc708d6329= 69d4440aa=0D Author: Rebecca Cran =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.h=0D M target/arm/helper.c=0D M target/arm/internals.h=0D M target/arm/translate-a64.c=0D =0D Log Message:=0D -----------=0D target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe=0D= =0D Add support for FEAT_SSBS. SSBS (Speculative Store Bypass Safe) is an=0D optional feature in ARMv8.0, and mandatory in ARMv8.5.=0D =0D Signed-off-by: Rebecca Cran =0D Reviewed-by: Richard Henderson =0D Message-id: 20210216224543.16142-2-rebecca@nuviainc.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 89455d1ba6ed190e840cb732e63958755ea42a07=0D https://github.com/qemu/qemu/commit/89455d1ba6ed190e840cb732e639587= 55ea42a07=0D Author: Rebecca Cran =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu64.c=0D =0D Log Message:=0D -----------=0D target/arm: Enable FEAT_SSBS for "max" AARCH64 CPU=0D =0D Set ID_AA64PFR1_EL1.SSBS to 2 and ID_PFR2.SSBS to 1.=0D =0D Signed-off-by: Rebecca Cran =0D Reviewed-by: Richard Henderson =0D Message-id: 20210216224543.16142-3-rebecca@nuviainc.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: ed84a60ca80c403749c1fc1bab27c85d8edba39d=0D https://github.com/qemu/qemu/commit/ed84a60ca80c403749c1fc1bab27c85= d8edba39d=0D Author: Rebecca Cran =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.c=0D =0D Log Message:=0D -----------=0D target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU=0D =0D Enable FEAT_SSBS for the "max" 32-bit CPU.=0D =0D Signed-off-by: Rebecca Cran =0D Reviewed-by: Richard Henderson =0D Message-id: 20210216224543.16142-4-rebecca@nuviainc.com=0D [PMM: fix typo causing compilation failure]=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 01c966b54f5effd7132da1a8d33ae1927944cfdf=0D https://github.com/qemu/qemu/commit/01c966b54f5effd7132da1a8d33ae19= 27944cfdf=0D Author: Doug Evans =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/net/meson.build=0D A hw/net/npcm7xx_emc.c=0D M hw/net/trace-events=0D A include/hw/net/npcm7xx_emc.h=0D =0D Log Message:=0D -----------=0D hw/net: Add npcm7xx emc model=0D =0D This is a 10/100 ethernet device that has several features.=0D Only the ones needed by the Linux driver have been implemented.=0D See npcm7xx_emc.c for a list of unimplemented features.=0D =0D Reviewed-by: Hao Wu =0D Reviewed-by: Avi Fishman =0D Signed-off-by: Doug Evans =0D Message-id: 20210218212453.831406-2-dje@google.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 7758643650f0229bd3ccd23112c255664445eabd=0D https://github.com/qemu/qemu/commit/7758643650f0229bd3ccd23112c2556= 64445eabd=0D Author: Doug Evans =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/nuvoton.rst=0D M hw/arm/npcm7xx.c=0D M include/hw/arm/npcm7xx.h=0D =0D Log Message:=0D -----------=0D hw/arm: Add npcm7xx emc model=0D =0D This is a 10/100 ethernet device that has several features.=0D Only the ones needed by the Linux driver have been implemented.=0D See npcm7xx_emc.c for a list of unimplemented features.=0D =0D Reviewed-by: Hao Wu =0D Reviewed-by: Avi Fishman =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Doug Evans =0D Message-id: 20210218212453.831406-3-dje@google.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: e6646167cc390388a330fe94b9af4d5e8e0cb2d9=0D https://github.com/qemu/qemu/commit/e6646167cc390388a330fe94b9af4d5= e8e0cb2d9=0D Author: Doug Evans =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/meson.build=0D A tests/qtest/npcm7xx_emc-test.c=0D =0D Log Message:=0D -----------=0D tests/qtests: Add npcm7xx emc model test=0D =0D Reviewed-by: Hao Wu =0D Reviewed-by: Avi Fishman =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Doug Evans =0D Message-id: 20210218212453.831406-4-dje@google.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 4565afbbf0b6d897ee746f2410d60460f43c3159=0D https://github.com/qemu/qemu/commit/4565afbbf0b6d897ee746f2410d6046= 0f43c3159=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/xlnx-zynqmp.c=0D M include/hw/arm/xlnx-zynqmp.h=0D =0D Log Message:=0D -----------=0D hw/arm/xlnx-zynqmp: Remove obsolete 'has_rpu' property=0D =0D We hint the 'has_rpu' property is no longer required since commit=0D 6908ec448b4 ("xlnx-zynqmp: Properly support the smp command line=0D option") which was released in QEMU v2.11.0.=0D =0D Beside, this device is marked 'user_creatable =3D false', so the=0D only thing that could be setting the property is the board code=0D that creates the device.=0D =0D Since the property is not user-facing, we can remove it without=0D going through the deprecation process.=0D =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219144350.1979905-1-f4bug@amsat.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 519183d3fee58e52f7b51cf146c9dc9edc565059=0D https://github.com/qemu/qemu/commit/519183d3fee58e52f7b51cf146c9dc9= edc565059=0D Author: Richard Henderson =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/helper-a64.c=0D M target/arm/helper-a64.h=0D M target/arm/translate-a64.c=0D M target/arm/vec_helper.c=0D =0D Log Message:=0D -----------=0D target/arm: Speed up aarch64 TBL/TBX=0D =0D Always perform one call instead of two for 16-byte operands.=0D Use byte loads/stores directly into the vector register file=0D instead of extractions and deposits to a 64-bit local variable.=0D =0D In order to easily receive pointers into the vector register file,=0D convert the helper to the gvec out-of-line signature. Move the=0D helper into vec_helper.c, where it can make use of H1 and clear_tail.=0D =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Alex Benn=C3=A9e =0D Tested-by: Alex Benn=C3=A9e =0D Message-id: 20210224230532.276878-1-richard.henderson@linaro.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 5dfbfefaada495b9a65382d64f06325fd802c717=0D https://github.com/qemu/qemu/commit/5dfbfefaada495b9a65382d64f06325= fd802c717=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/i2c/npcm7xx_smbus.c=0D =0D Log Message:=0D -----------=0D hw/i2c/npcm7xx_smbus: Simplify npcm7xx_smbus_init()=0D =0D The STATUS register will be reset to IDLE in=0D cnpcm7xx_smbus_enter_reset(), no need to preset=0D it in instance_init().=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Hao Wu =0D Message-id: 20210228224813.312532-1-f4bug@amsat.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 819b3496196c2a7de89ed2372182c24053443990=0D https://github.com/qemu/qemu/commit/819b3496196c2a7de89ed2372182c24= 053443990=0D Author: schspa =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/virtio/virtio-mmio.c=0D =0D Log Message:=0D -----------=0D virtio-mmio: improve virtio-mmio get_dev_path alog=0D =0D At the moment the following QEMU command line triggers an assertion=0D failure On xlnx-versal SOC:=0D qemu-system-aarch64 \=0D -machine xlnx-versal-virt -nographic -smp 2 -m 128 \=0D -fsdev local,id=3Dshareid,path=3D${HOME}/work,security_model=3Dnone= \=0D -device virtio-9p-device,fsdev=3Dshareid,mount_tag=3Dshare \=0D -fsdev local,id=3Dshareid1,path=3D${HOME}/Music,security_model=3Dno= ne \=0D -device virtio-9p-device,fsdev=3Dshareid1,mount_tag=3Dshare1=0D =0D qemu-system-aarch64: ../migration/savevm.c:860:=0D vmstate_register_with_alias_id:=0D Assertion `!se->compat || se->instance_id =3D=3D 0' failed.=0D =0D This problem was fixed on arm virt platform in commit f58b39d2d5b=0D ("virtio-mmio: format transport base address in BusClass.get_dev_path")=0D= =0D It works perfectly on arm virt platform. but there is still there on=0D xlnx-versal SOC.=0D =0D The main difference between arm virt and xlnx-versal is they use=0D different way to create virtio-mmio qdev. on arm virt, it calls=0D sysbus_create_simple("virtio-mmio", base, pic[irq]); which will call=0D sysbus_mmio_map internally and assign base address to subsys device=0D mmio correctly. but xlnx-versal's implements won't do this.=0D =0D However, xlnx-versal can't switch to sysbus_create_simple() to create=0D virtio-mmio device. It's because xlnx-versal's cpu use=0D VersalVirt.soc.fpd.apu.mr as it's memory. which is subregion of=0D system_memory. sysbus_create_simple will add virtio to system_memory,=0D which can't be accessed by cpu.=0D =0D Besides, xlnx-versal can't add sysbus_mmio_map api call too, because=0D this will add memory region to system_memory, and it can't be added=0D to VersalVirt.soc.fpd.apu.mr again.=0D =0D We can solve this by assign correct base address offset on dev_path.=0D =0D This path was test on aarch64 virt & xlnx-versal platform.=0D =0D Signed-off-by: schspa =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 2d928adf8a9148510e1b2041145b8a873f4d26df=0D https://github.com/qemu/qemu/commit/2d928adf8a9148510e1b2041145b8a8= 73f4d26df=0D Author: Peter Collingbourne =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/helper.c=0D M target/arm/mte_helper.c=0D =0D Log Message:=0D -----------=0D target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks=0D =0D Section D6.7 of the ARM ARM states:=0D =0D For the purpose of determining Tag Check Fault handling, unprivileged=0D load and store instructions are treated as if executed at EL0 when=0D executed at either:=0D - EL1, when the Effective value of PSTATE.UAO is 0.=0D - EL2, when both the Effective value of HCR_EL2.{E2H, TGE} is {1, 1}=0D and the Effective value of PSTATE.UAO is 0.=0D =0D ARM has confirmed a defect in the pseudocode function=0D AArch64.TagCheckFault that makes it inconsistent with the above=0D wording. The remedy is to adjust references to PSTATE.EL in that=0D function to instead refer to AArch64.AccessUsesEL(acctype), so=0D that unprivileged instructions use SCTLR_EL1.TCF0 and TFSRE0_EL1.=0D The exception type for synchronous tag check faults remains unchanged.=0D= =0D This patch implements the described change by partially reverting=0D commits 50244cc76abc and cc97b0019bb5.=0D =0D Signed-off-by: Peter Collingbourne =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219201820.2672077-1-pcc@google.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 6e937ba7f8fb90d66cb3781f7fed32fb4239556a=0D https://github.com/qemu/qemu/commit/6e937ba7f8fb90d66cb3781f7fed32f= b4239556a=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.c=0D M target/arm/cpu_tcg.c=0D =0D Log Message:=0D -----------=0D target/arm: Restrict v8M IDAU to TCG=0D =0D IDAU is specific to M-profile. KVM only supports A-profile.=0D Restrict this interface to TCG, as it is pointless (and=0D confusing) on a KVM-only build.=0D =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210221222617.2579610-2-f4bug@amsat.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: dddc200dcddd1a4e44c32e2b0f5a3cb248c506a6=0D https://github.com/qemu/qemu/commit/dddc200dcddd1a4e44c32e2b0f5a3cb= 248c506a6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.c=0D =0D Log Message:=0D -----------=0D target/arm/cpu: Update coding style to make checkpatch.pl happy=0D =0D We will move this code in the next commit. Clean it up=0D first to avoid checkpatch.pl errors.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210221222617.2579610-3-f4bug@amsat.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 9aee50eefba8c39d17759c7def3ba5a899c86271=0D https://github.com/qemu/qemu/commit/9aee50eefba8c39d17759c7def3ba5a= 899c86271=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/musicpal.c=0D =0D Log Message:=0D -----------=0D hw/arm/musicpal: Remove dead code for non-32-bit-RGB surfaces=0D =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel RGB. Remove the legacy dead=0D code from the milkymist display device which was handling the=0D possibility that the console surface was some other format.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215103215.4944-2-peter.maydell@linaro.org=0D =0D =0D Commit: 21c231d7c8872b0ba800c6e8734c15b4ccaf34fb=0D https://github.com/qemu/qemu/commit/21c231d7c8872b0ba800c6e8734c15b= 4ccaf34fb=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/display/tc6393xb.c=0D M include/ui/console.h=0D =0D Log Message:=0D -----------=0D hw/display/tc6393xb: Remove dead code for handling non-32bpp surfaces=0D= =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel RGB. Remove the legacy dead=0D code from the tc6393xb display device which was handling the=0D possibility that the console surface was some other format.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215103215.4944-3-peter.maydell@linaro.org=0D =0D =0D Commit: 38da138b5903d0e90ab066a16847b0cff9777e93=0D https://github.com/qemu/qemu/commit/38da138b5903d0e90ab066a16847b0c= ff9777e93=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/display/tc6393xb_template.h=0D =0D Log Message:=0D -----------=0D hw/display/tc6393xb: Expand out macros in template header=0D =0D Now the template header is included only for BITS=3D=3D32, expand=0D out all the macros that depended on the BITS setting.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215103215.4944-4-peter.maydell@linaro.org=0D =0D =0D Commit: cd067fa7c3e0d09c26ae2e0bf4210e151b2b5395=0D https://github.com/qemu/qemu/commit/cd067fa7c3e0d09c26ae2e0bf4210e1= 51b2b5395=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/display/tc6393xb.c=0D R hw/display/tc6393xb_template.h=0D =0D Log Message:=0D -----------=0D hw/display/tc6393xb: Inline tc6393xb_draw_graphic32() at its callsite=0D= =0D The function tc6393xb_draw_graphic32() is called in exactly one place,=0D= so just inline the function body at its callsite. This allows us to=0D drop the template header entirely.=0D =0D The code move includes a single added space after 'for' to fix=0D the coding style.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-5-peter.maydell@linaro.org=0D =0D =0D Commit: 83b319bfdc3c0776e8df4f855906dc3203a9aab3=0D https://github.com/qemu/qemu/commit/83b319bfdc3c0776e8df4f855906dc3= 203a9aab3=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/display/omap_lcd_template.h=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Expand out macros in template header=0D =0D The omap_lcdc template header is already only included once, for=0D DEPTH=3D=3D32, but it still has all the macro-driven parameterization=0D for other depths. Expand out all the macros in the header.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-6-peter.maydell@linaro.org=0D =0D =0D Commit: 36bc11b5b6daff3517a49d020940159301d87ae1=0D https://github.com/qemu/qemu/commit/36bc11b5b6daff3517a49d020940159= 301d87ae1=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/display/omap_lcd_template.h=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Drop broken bigendian ifdef=0D =0D The draw_line16_32() function in the omap_lcdc template header=0D includes an ifdef for the case where HOST_WORDS_BIGENDIAN matches=0D TARGET_WORDS_BIGENDIAN. This is trying to optimise for "source=0D bitmap and destination bitmap format match", but it is broken,=0D because in this function the formats don't match: the source is=0D 16-bit colour and the destination is 32-bit colour, so a memcpy()=0D will produce corrupted graphics output. Drop the bogus ifdef.=0D =0D This bug was introduced in commit ea644cf343129, when we dropped=0D support for DEPTH values other than 32 from the template header.=0D The old #if line was=0D #if DEPTH =3D=3D 16 && defined(HOST_WORDS_BIGENDIAN) =3D=3D defined(TAR= GET_WORDS_BIGENDIAN)=0D and this was mistakenly changed to=0D #if defined(HOST_WORDS_BIGENDIAN) =3D=3D defined(TARGET_WORDS_BIGENDIAN= )=0D rather than deleting the #if as now having an always-false condition.=0D =0D Fixes: ea644cf343129=0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-7-peter.maydell@linaro.org=0D =0D =0D Commit: f359c4d0a223f099ffe1f0fb99016b173b5b8601=0D https://github.com/qemu/qemu/commit/f359c4d0a223f099ffe1f0fb99016b1= 73b5b8601=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/display/omap_lcd_template.h=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Fix coding style issues in template header=0D =0D Fix some minor coding style issues in the template header,=0D so checkpatch doesn't complain when we move the code.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-8-peter.maydell@linaro.org=0D =0D =0D Commit: 4b32d2f50d5c956efa9e43e2d33097ed44f634a3=0D https://github.com/qemu/qemu/commit/4b32d2f50d5c956efa9e43e2d33097e= d44f634a3=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D R hw/display/omap_lcd_template.h=0D M hw/display/omap_lcdc.c=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Inline template header into C file=0D =0D We only include the template header once, so just inline it into the=0D source file for the device.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-9-peter.maydell@linaro.org=0D =0D =0D Commit: 6b1d08aab681004616986c9fa6392114a0eff1d4=0D https://github.com/qemu/qemu/commit/6b1d08aab681004616986c9fa639211= 4a0eff1d4=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/display/omap_lcdc.c=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Delete unnecessary macro=0D =0D The macro draw_line_func is used only once; just expand it.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-10-peter.maydell@linaro.org=0D =0D =0D Commit: abfe6db82e5b11148cf4e486a3c393828f387e5f=0D https://github.com/qemu/qemu/commit/abfe6db82e5b11148cf4e486a3c3938= 28f387e5f=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/display/tcx.c=0D =0D Log Message:=0D -----------=0D hw/display/tcx: Drop unnecessary code for handling BGR format outputs=0D= =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel, RGB. The TCX code already=0D assumes 32bpp, but it still has some checks of is_surface_bgr()=0D in an attempt to support 32bpp BGR. is_surface_bgr() will always=0D return false for the qemu_console_surface(), unless the display=0D device itself has deliberately created an alternate-format=0D surface via a function like qemu_create_displaysurface_from().=0D =0D Drop the never-used BGR-handling code, and assert that we have=0D a 32-bit surface rather than just doing nothing if it isn't.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Mark Cave-Ayland =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215102149.20513-1-peter.maydell@linaro.org=0D =0D =0D Commit: 132e42fdd4a22c90289358542ca08581b938b6f2=0D https://github.com/qemu/qemu/commit/132e42fdd4a22c90289358542ca0858= 1b938b6f2=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make SYSCLK frequency board-specific=0D =0D The AN524 has a different SYSCLK frequency from the AN505 and AN521;=0D make the SYSCLK frequency a field in the MPS2TZMachineClass rather=0D than a compile-time constant so we can support the AN524.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-2-peter.maydell@linaro.org=0D =0D =0D Commit: b709ca37333112196c032379658cb86d4479fb60=0D https://github.com/qemu/qemu/commit/b709ca37333112196c032379658cb86= d4479fb60=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D M hw/arm/mps2.c=0D M hw/misc/mps2-scc.c=0D M include/hw/misc/mps2-scc.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-scc: Support configurable number of OSCCLK values=0D =0D Currently the MPS2 SCC device implements a fixed number of OSCCLK=0D values (3). The variant of this device in the MPS3 AN524 board has 6=0D OSCCLK values. Switch to using a PROP_ARRAY, which allows board code=0D to specify how large the OSCCLK array should be as well as its=0D values.=0D =0D With a variable-length property array, the SCC no longer specifies=0D default values for the OSCCLKs, so we must set them explicitly in the=0D board code. This defaults are actually incorrect for the an521 and=0D an505; we will correct this bug in a following patch.=0D =0D This is a migration compatibility break for all the mps boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-3-peter.maydell@linaro.org=0D =0D =0D Commit: 9afbdc9126e34df8880645a28e0b969a9608af79=0D https://github.com/qemu/qemu/commit/9afbdc9126e34df8880645a28e0b969= a9608af79=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Correct the OSCCLK settings for mps2-an505 and mps2-an5= 11=0D =0D We were previously using the default OSCCLK settings, which are=0D correct for the older MPS2 boards (mps2-an385, mps2-an386,=0D mps2-an500, mps2-an511), but wrong for the mps2-an505 and mps2-511=0D implemented in mps2-tz.c. Now we're setting the values explicitly we=0D can fix them to be correct.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-4-peter.maydell@linaro.org=0D =0D =0D Commit: c440c328ba267485172cfa582561738de1daa76a=0D https://github.com/qemu/qemu/commit/c440c328ba267485172cfa582561738= de1daa76a=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make the OSCCLK settings be configurable per-board=0D =0D The AN505 and AN511 happen to share the same OSCCLK values, but the=0D AN524 will have a different set (and more of them), so split the=0D settings out to be per-board.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-5-peter.maydell@linaro.org=0D =0D =0D Commit: fd6013663e4547795efc9ffc4aeae1d6db384e88=0D https://github.com/qemu/qemu/commit/fd6013663e4547795efc9ffc4aeae1d= 6db384e88=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-fpgaio.c=0D M include/hw/misc/mps2-fpgaio.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-fpgaio: Make number of LEDs configurable by board=0D =0D The MPS2 board has 2 LEDs, but the MPS3 board has 10 LEDs. The=0D FPGAIO device is similar on both sets of boards, but the LED0=0D register has correspondingly more bits that have an effect. Add a=0D device property for number of LEDs.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-6-peter.maydell@linaro.org=0D =0D =0D Commit: 2c64b0a57f61da4251d921186483c66ea403941a=0D https://github.com/qemu/qemu/commit/2c64b0a57f61da4251d921186483c66= ea403941a=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-fpgaio.c=0D M include/hw/misc/mps2-fpgaio.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-fpgaio: Support SWITCH register=0D =0D MPS3 boards have an extra SWITCH register in the FPGAIO block which=0D reports the value of some switches. Implement this, governed by a=0D property the board code can use to specify whether whether it exists.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-7-peter.maydell@linaro.org=0D =0D =0D Commit: 8730535edb561c85f51d2c8edb24913d795b8698=0D https://github.com/qemu/qemu/commit/8730535edb561c85f51d2c8edb24913= d795b8698=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board=0D =0D Set the FPGAIO num-leds and have-switches properties explicitly=0D per-board, rather than relying on the defaults. The AN505 and AN521=0D both have the same settings as the default values, but the AN524 will=0D be different.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-8-peter.maydell@linaro.org=0D =0D =0D Commit: d07afe7599c8a936da34a2ffba9630611d4bf697=0D https://github.com/qemu/qemu/commit/d07afe7599c8a936da34a2ffba96306= 11d4bf697=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board ty= pe=0D =0D In the mps2-tz board code, we handle devices whose interrupt lines=0D must be wired to all CPUs by creating IRQ splitter devices for the=0D AN521, because it has 2 CPUs, but wiring the device IRQ directly to=0D the SSE/IoTKit input for the AN505, which has only 1 CPU.=0D =0D We can avoid making an explicit check on the board type constant by=0D instead creating and using the IRQ splitters for any board with more=0D than 1 CPU. This avoids having to add extra cases to the=0D conditionals every time we add new boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-9-peter.maydell@linaro.org=0D =0D =0D Commit: 6bdbf3a839b8150328776b06a90abc0508e6c25f=0D https://github.com/qemu/qemu/commit/6bdbf3a839b8150328776b06a90abc0= 508e6c25f=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make number of IRQs board-specific=0D =0D The AN524 has more interrupt lines than the AN505 and AN521; make=0D numirq board-specific rather than a compile-time constant.=0D =0D Since the difference is small (92 on the current boards and 95 on the=0D new one) we don't dynamically allocate the cpu_irq_splitter[] array=0D but leave it as a fixed length array whose size is the maximum needed=0D for any of the boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-10-peter.maydell@linaro.org=0D =0D =0D Commit: ff355033ca2541e322b23387801a10eb4475a964=0D https://github.com/qemu/qemu/commit/ff355033ca2541e322b23387801a10e= b4475a964=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-scc.c=0D M include/hw/misc/mps2-scc.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524=0D =0D The AN524 version of the SCC interface has different behaviour for=0D some of the CFG registers; implement it.=0D =0D Each board in this family can have minor differences in the meaning=0D of the CFG registers, so rather than trying to specify all the=0D possible semantics via individual device properties, we make the=0D behaviour conditional on the part-number field of the SCC_ID register=0D which the board code already passes us.=0D =0D For the AN524, the differences are:=0D * CFG3 is reserved rather than being board switches=0D * CFG5 is a new register ("ACLK Frequency in Hz")=0D * CFG6 is a new register ("Clock divider for BRAM")=0D =0D We implement both of the new registers as reads-as-written.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-11-peter.maydell@linaro.org=0D =0D =0D Commit: 4a8b3f654b185da13a6796b2913ef79f6efe3661=0D https://github.com/qemu/qemu/commit/4a8b3f654b185da13a6796b2913ef79= f6efe3661=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI=0D =0D On the MPS2 boards, the first 32 interrupt lines are entirely=0D internal to the SSE; interrupt lines for devices outside the SSE=0D start at 32. In the application notes that document each FPGA image,=0D the interrupt wiring is documented from the point of view of the CPU,=0D so '0' is the first of the SSE's interrupts and the devices in the=0D FPGA image itself are '32' and up: so the UART 0 Receive interrupt is=0D 32, the SPI #0 interrupt is 51, and so on.=0D =0D Within our implementation, because the external interrupts must be=0D connected to the EXP_IRQ[0...n] lines of the SSE object, we made the=0D get_sse_irq_in() function take an irqno whose values start at 0 for=0D the first FPGA device interrupt. In this numbering scheme the UART 0=0D Receive interrupt is 0, the SPI #0 interrupt is 19, and so on.=0D =0D The result of these two different numbering schemes has been that=0D half of the devices were wired up to the wrong IRQs: the UART IRQs=0D are wired up correctly, but the DMA and SPI devices were passing=0D start-at-32 values to get_sse_irq_in() and so being mis-connected.=0D =0D Fix the bug by making get_sse_irq_in() take values specified with the=0D same scheme that the hardware manuals use, to avoid confusion.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-12-peter.maydell@linaro.org=0D =0D =0D Commit: 61db91da0117388e3895f4813dd3e923c7f8b09f=0D https://github.com/qemu/qemu/commit/61db91da0117388e3895f4813dd3e92= 3c7f8b09f=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrup= ts=0D =0D The mps2-tz code uses PPCPortInfo data structures to define what=0D devices are present and how they are wired up. Currently we use=0D these to specify device types and addresses, but hard-code the=0D interrupt line wiring in each make_* helper function. This works for=0D the two boards we have at the moment, but the AN524 has some devices=0D with different interrupt assignments.=0D =0D This commit adds the framework to allow PPCPortInfo structures to=0D specify interrupt numbers. We add an array of interrupt numbers to=0D the PPCPortInfo struct, and pass it through to the make_* helpers.=0D The following commit will change the make_* helpers over to using the=0D framework.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-13-peter.maydell@linaro.org=0D =0D =0D Commit: 8f2476de350f28a10a6bf672063934375bb74224=0D https://github.com/qemu/qemu/commit/8f2476de350f28a10a6bf6720639343= 75bb74224=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Move device IRQ info to data structures=0D =0D Move the specification of the IRQ information for the uart, ethernet,=0D dma and spi devices to the data structures. (The other devices=0D handled by the PPCPortInfo structures don't have any interrupt lines=0D we need to wire up.)=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-14-peter.maydell@linaro.org=0D =0D =0D Commit: b67f1b67c44e6bb75d5843a4360365b1262f4a6a=0D https://github.com/qemu/qemu/commit/b67f1b67c44e6bb75d5843a4360365b= 1262f4a6a=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs=0D= =0D We create an OR gate to wire together the overflow IRQs for all the=0D UARTs on the board; this has to have twice the number of inputs as=0D there are UARTs, since each UART feeds it a TX overflow and an RX=0D overflow interrupt line. Replace the hardcoded '10' with a=0D calculation based on the size of the uart[] array in the=0D MPS2TZMachineState. (We rely on OR gate inputs that are never wired=0D up or asserted being treated as always-zero.)=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-15-peter.maydell@linaro.org=0D =0D =0D Commit: eb5180505bfb1e74b5b5e3ea90d0d61951392765=0D https://github.com/qemu/qemu/commit/eb5180505bfb1e74b5b5e3ea90d0d61= 951392765=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Allow boards to have different PPCInfo data=0D =0D The AN505 and AN521 have the same device layout, but the AN524 is=0D somewhat different. Allow for more than one PPCInfo array, which can=0D be selected based on the board type.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-16-peter.maydell@linaro.org=0D =0D =0D Commit: c5fb41899522ec7e931ad7062ad850a7a6e54745=0D https://github.com/qemu/qemu/commit/c5fb41899522ec7e931ad7062ad850a= 7a6e54745=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make RAM arrangement board-specific=0D =0D The AN505 and AN521 have the same layout of RAM; the AN524 does not.=0D Replace the current hard-coding of where the RAM is and which parts=0D of it are behind which MPCs with a data-driven approach.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-17-peter.maydell@linaro.org=0D =0D =0D Commit: 565124a986998cd15eb62963693ea794cc526778=0D https://github.com/qemu/qemu/commit/565124a986998cd15eb62963693ea79= 4cc526778=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data=0D =0D Instead of hardcoding the MachineClass default_ram_size and=0D default_ram_id fields, set them on class creation by finding the=0D entry in the RAMInfo array which is marked as being the QEMU system=0D RAM.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-18-peter.maydell@linaro.org=0D =0D =0D Commit: e301a164da31408e74cfbc5fa0eb50147b6eaf50=0D https://github.com/qemu/qemu/commit/e301a164da31408e74cfbc5fa0eb501= 47b6eaf50=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Support ROMs as well as RAMs=0D =0D The AN505 and AN521 don't have any read-only memory, but the AN524=0D does; add a flag to ROMInfo to mark a region as ROM.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-19-peter.maydell@linaro.org=0D =0D =0D Commit: 53318e6ddc2e2085836f17eb877e797c8d46d11b=0D https://github.com/qemu/qemu/commit/53318e6ddc2e2085836f17eb877e797= c8d46d11b=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo=0D =0D The armv7m_load_kernel() function takes a mem_size argument which it=0D expects to be the size of the memory region at guest address 0. (It=0D uses this argument only as a limit on how large a raw image file it=0D can load at address zero).=0D =0D Instead of hardcoding this value, find the RAMInfo corresponding to=0D the 0 address and extract its size.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-20-peter.maydell@linaro.org=0D =0D =0D Commit: 653303186c95933b5b5fd0ec8f3fbf2278c3110a=0D https://github.com/qemu/qemu/commit/653303186c95933b5b5fd0ec8f3fbf2= 278c3110a=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Add new mps3-an524 board=0D =0D Add support for the mps3-an524 board; this is an SSE-200 based FPGA=0D image, like the existing mps2-an521. It has a usefully larger amount=0D of RAM, and a PL031 RTC, as well as some more minor differences.=0D =0D In real hardware this image runs on a newer generation of the FPGA=0D board, the MPS3 rather than the older MPS2. Architecturally the two=0D boards are similar, so we implement the MPS3 boards in the mps2-tz.c=0D file as variations of the existing MPS2 boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-21-peter.maydell@linaro.org=0D =0D =0D Commit: e5eb36233c050027819a32e010b76aa09a7a162d=0D https://github.com/qemu/qemu/commit/e5eb36233c050027819a32e010b76aa= 09a7a162d=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Stub out USB controller for mps3-an524=0D =0D The AN524 has a USB controller (an ISP1763); we don't have a model of=0D it but we should provide a stub "unimplemented-device" for it. This=0D is slightly complicated because the USB controller shares a PPC port=0D with the ethernet controller.=0D =0D Implement a make_* function which provides creates a container=0D MemoryRegion with both the ethernet controller and an=0D unimplemented-device stub for the USB controller.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-22-peter.maydell@linaro.org=0D =0D =0D Commit: 15b0d76af584b236a1ad55c31061171f92564157=0D https://github.com/qemu/qemu/commit/15b0d76af584b236a1ad55c31061171= f92564157=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524=0D =0D The AN524 has a PL031 RTC, which we have a model of; provide it=0D rather than an unimplemented-device stub.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-23-peter.maydell@linaro.org=0D =0D =0D Commit: 54f271698d3294b523d88373b35f3f83c31544d3=0D https://github.com/qemu/qemu/commit/54f271698d3294b523d88373b35f3f8= 3c31544d3=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/mps2.rst=0D =0D Log Message:=0D -----------=0D docs/system/arm/mps2.rst: Document the new mps3-an524 board=0D =0D Add brief documentation of the new mps3-an524 board.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-24-peter.maydell@linaro.org=0D =0D =0D Commit: 2c669ff88ec6733420a000103a2b8b9e93df4945=0D https://github.com/qemu/qemu/commit/2c669ff88ec6733420a000103a2b8b9= e93df4945=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D M hw/misc/armsse-cpuid.c=0D M hw/misc/armsse-mhu.c=0D M hw/misc/iotkit-sysctl.c=0D M hw/misc/iotkit-sysinfo.c=0D M hw/misc/mps2-fpgaio.c=0D M hw/misc/mps2-scc.c=0D M include/hw/arm/armsse.h=0D M include/hw/misc/armsse-cpuid.h=0D M include/hw/misc/armsse-mhu.h=0D M include/hw/misc/iotkit-secctl.h=0D M include/hw/misc/iotkit-sysctl.h=0D M include/hw/misc/iotkit-sysinfo.h=0D M include/hw/misc/mps2-fpgaio.h=0D =0D Log Message:=0D -----------=0D hw/arm/mps2: Update old infocenter.arm.com URLs=0D =0D Update old infocenter.arm.com URLs to the equivalent developer.arm.com=0D= ones (the old URLs should redirect, but we might as well avoid the=0D redirection notice, and the new URLs are pleasantly shorter).=0D =0D This commit covers the links to the MPS2 board TRM, the various=0D Application Notes, the IoTKit and SSE-200 documents.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-25-peter.maydell@linaro.org=0D =0D =0D Commit: 11b95b4d7fb358fabf3eba07efb2d6cb04dd38df=0D https://github.com/qemu/qemu/commit/11b95b4d7fb358fabf3eba07efb2d6c= b04dd38df=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/mps2.rst=0D M docs/system/arm/nuvoton.rst=0D M hw/arm/mps2-tz.c=0D M hw/arm/mps2.c=0D M hw/arm/musicpal.c=0D M hw/arm/npcm7xx.c=0D M hw/arm/sbsa-ref.c=0D M hw/arm/xlnx-zynqmp.c=0D R hw/display/omap_lcd_template.h=0D M hw/display/omap_lcdc.c=0D M hw/display/tc6393xb.c=0D R hw/display/tc6393xb_template.h=0D M hw/display/tcx.c=0D M hw/i2c/npcm7xx_smbus.c=0D M hw/misc/armsse-cpuid.c=0D M hw/misc/armsse-mhu.c=0D M hw/misc/iotkit-sysctl.c=0D M hw/misc/iotkit-sysinfo.c=0D M hw/misc/mps2-fpgaio.c=0D M hw/misc/mps2-scc.c=0D M hw/net/meson.build=0D A hw/net/npcm7xx_emc.c=0D M hw/net/trace-events=0D M hw/virtio/virtio-mmio.c=0D M include/hw/arm/armsse.h=0D M include/hw/arm/npcm7xx.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/misc/armsse-cpuid.h=0D M include/hw/misc/armsse-mhu.h=0D M include/hw/misc/iotkit-secctl.h=0D M include/hw/misc/iotkit-sysctl.h=0D M include/hw/misc/iotkit-sysinfo.h=0D M include/hw/misc/mps2-fpgaio.h=0D M include/hw/misc/mps2-scc.h=0D A include/hw/net/npcm7xx_emc.h=0D M include/ui/console.h=0D M target/arm/cpu.c=0D M target/arm/cpu.h=0D M target/arm/cpu64.c=0D M target/arm/cpu_tcg.c=0D M target/arm/helper-a64.c=0D M target/arm/helper-a64.h=0D M target/arm/helper.c=0D M target/arm/internals.h=0D M target/arm/mte_helper.c=0D M target/arm/translate-a64.c=0D M target/arm/vec_helper.c=0D M tests/qtest/meson.build=0D A tests/qtest/npcm7xx_emc-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10305' into staging=0D =0D * sbsa-ref: remove cortex-a53 from list of supported cpus=0D * sbsa-ref: add 'max' to list of allowed cpus=0D * target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe=0D= * npcm7xx: add EMC model=0D * xlnx-zynqmp: Remove obsolete 'has_rpu' property=0D * target/arm: Speed up aarch64 TBL/TBX=0D * virtio-mmio: improve virtio-mmio get_dev_path alog=0D * target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks=0D * target/arm: Restrict v8M IDAU to TCG=0D * target/arm/cpu: Update coding style to make checkpatch.pl happy=0D * musicpal, tc6393xb, omap_lcdc, tcx: drop dead code for non-32-bit-RGB = surfaces=0D * Add new board: mps3-an524=0D =0D # gpg: Signature made Fri 05 Mar 2021 17:14:06 GMT=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210305: (49 commits)=0D hw/arm/mps2: Update old infocenter.arm.com URLs=0D docs/system/arm/mps2.rst: Document the new mps3-an524 board=0D hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524=0D hw/arm/mps2-tz: Stub out USB controller for mps3-an524=0D hw/arm/mps2-tz: Add new mps3-an524 board=0D hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo=0D hw/arm/mps2-tz: Support ROMs as well as RAMs=0D hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data=0D hw/arm/mps2-tz: Make RAM arrangement board-specific=0D hw/arm/mps2-tz: Allow boards to have different PPCInfo data=0D hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs=0D= hw/arm/mps2-tz: Move device IRQ info to data structures=0D hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrup= ts=0D hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI=0D hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524=0D hw/arm/mps2-tz: Make number of IRQs board-specific=0D hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board ty= pe=0D hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board=0D hw/misc/mps2-fpgaio: Support SWITCH register=0D hw/misc/mps2-fpgaio: Make number of LEDs configurable by board=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/33615cec7bde...11b95b4d7fb3= =0D From MAILER-DAEMON Sat Mar 06 08:52:14 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lIXLq-0004ZW-H7 for mharc-qemu-commits@gnu.org; Sat, 06 Mar 2021 08:52:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:43500) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lIXLo-0004WU-LM for qemu-commits@nongnu.org; Sat, 06 Mar 2021 08:52:12 -0500 Received: from out-23.smtp.github.com ([192.30.252.206]:39909) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lIXLk-00040j-69 for qemu-commits@nongnu.org; Sat, 06 Mar 2021 08:52:11 -0500 Received: from github.com (hubbernetes-node-4f75f5c.ac4-iad.github.net [10.52.202.66]) by smtp.github.com (Postfix) with ESMTPA id 6AB736003F7 for ; Sat, 6 Mar 2021 05:52:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615038727; bh=RxxM18biB4IvRHT/Vg8yzSPp7SaNry4AQZzFTFhpEkc=; h=Date:From:To:Subject:From; b=s1DFniER1WISLeWmhbC0F23FpjGOG0nl5V8NlZNpsMy95m7NDxtpEXEzaW46MmHL8 2TNbT8EfWGfjvjKR+kgp6d4vyRgRY1t4+zRkKyvqNiFQTD/AsRv+FoLiKzVrUKLfI3 CgPb6c6AS0Z/WLrX09YEkZZXV77ZL0v1AzzVwhOY= Date: Sat, 06 Mar 2021 05:52:07 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.206; envelope-from=noreply@github.com; helo=out-23.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] b2b111: hw/display/tc6393xb: Remove dead code for handling... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 06 Mar 2021 13:52:12 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: b2b111faec50918a5e3b78942be5b81cb46a51fc=0D https://github.com/qemu/qemu/commit/b2b111faec50918a5e3b78942be5b81= cb46a51fc=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/display/tc6393xb.c=0D =0D Log Message:=0D -----------=0D hw/display/tc6393xb: Remove dead code for handling non-32bpp surfaces=0D= =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel RGB. Remove the legacy dead=0D code from the tc6393xb display device which was handling the=0D possibility that the console surface was some other format.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215103215.4944-3-peter.maydell@linaro.org=0D =0D =0D Commit: 8cfd41dd89981c49aa15c603c3e3233580620d72=0D https://github.com/qemu/qemu/commit/8cfd41dd89981c49aa15c603c3e3233= 580620d72=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/tc6393xb_template.h=0D =0D Log Message:=0D -----------=0D hw/display/tc6393xb: Expand out macros in template header=0D =0D Now the template header is included only for BITS=3D=3D32, expand=0D out all the macros that depended on the BITS setting.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215103215.4944-4-peter.maydell@linaro.org=0D =0D =0D Commit: 0dc51b002482d4b5e60f634dcbcd8a3a906d7b97=0D https://github.com/qemu/qemu/commit/0dc51b002482d4b5e60f634dcbcd8a3= a906d7b97=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/tc6393xb.c=0D R hw/display/tc6393xb_template.h=0D =0D Log Message:=0D -----------=0D hw/display/tc6393xb: Inline tc6393xb_draw_graphic32() at its callsite=0D= =0D The function tc6393xb_draw_graphic32() is called in exactly one place,=0D= so just inline the function body at its callsite. This allows us to=0D drop the template header entirely.=0D =0D The code move includes a single added space after 'for' to fix=0D the coding style.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-5-peter.maydell@linaro.org=0D =0D =0D Commit: 52b8ac590daebe1bbdaa2a5757ba5e05a626fab5=0D https://github.com/qemu/qemu/commit/52b8ac590daebe1bbdaa2a5757ba5e0= 5a626fab5=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/omap_lcd_template.h=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Expand out macros in template header=0D =0D The omap_lcdc template header is already only included once, for=0D DEPTH=3D=3D32, but it still has all the macro-driven parameterization=0D for other depths. Expand out all the macros in the header.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-6-peter.maydell@linaro.org=0D =0D =0D Commit: 78b40bfb8fee5bb8ecff176522ad8098476cab5d=0D https://github.com/qemu/qemu/commit/78b40bfb8fee5bb8ecff176522ad809= 8476cab5d=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/omap_lcd_template.h=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Drop broken bigendian ifdef=0D =0D The draw_line16_32() function in the omap_lcdc template header=0D includes an ifdef for the case where HOST_WORDS_BIGENDIAN matches=0D TARGET_WORDS_BIGENDIAN. This is trying to optimise for "source=0D bitmap and destination bitmap format match", but it is broken,=0D because in this function the formats don't match: the source is=0D 16-bit colour and the destination is 32-bit colour, so a memcpy()=0D will produce corrupted graphics output. Drop the bogus ifdef.=0D =0D This bug was introduced in commit ea644cf343129, when we dropped=0D support for DEPTH values other than 32 from the template header.=0D The old #if line was=0D #if DEPTH =3D=3D 16 && defined(HOST_WORDS_BIGENDIAN) =3D=3D defined(TAR= GET_WORDS_BIGENDIAN)=0D and this was mistakenly changed to=0D #if defined(HOST_WORDS_BIGENDIAN) =3D=3D defined(TARGET_WORDS_BIGENDIAN= )=0D rather than deleting the #if as now having an always-false condition.=0D =0D Fixes: ea644cf343129=0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-7-peter.maydell@linaro.org=0D =0D =0D Commit: 0c6d9ff0afa3500af875d64382c2a6ca9d7934a0=0D https://github.com/qemu/qemu/commit/0c6d9ff0afa3500af875d64382c2a6c= a9d7934a0=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/omap_lcd_template.h=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Fix coding style issues in template header=0D =0D Fix some minor coding style issues in the template header,=0D so checkpatch doesn't complain when we move the code.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-8-peter.maydell@linaro.org=0D =0D =0D Commit: 1cccdd1807d17939d2d28df00d9040eea5c357db=0D https://github.com/qemu/qemu/commit/1cccdd1807d17939d2d28df00d9040e= ea5c357db=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D R hw/display/omap_lcd_template.h=0D M hw/display/omap_lcdc.c=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Inline template header into C file=0D =0D We only include the template header once, so just inline it into the=0D source file for the device.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-9-peter.maydell@linaro.org=0D =0D =0D Commit: cfb08215ca3b8df4662e08328f91d43c2603f4b2=0D https://github.com/qemu/qemu/commit/cfb08215ca3b8df4662e08328f91d43= c2603f4b2=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/omap_lcdc.c=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Delete unnecessary macro=0D =0D The macro draw_line_func is used only once; just expand it.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-10-peter.maydell@linaro.org=0D =0D =0D Commit: 7713fff47d31e7607e52c9247fb7b628ed6bb096=0D https://github.com/qemu/qemu/commit/7713fff47d31e7607e52c9247fb7b62= 8ed6bb096=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/tcx.c=0D =0D Log Message:=0D -----------=0D hw/display/tcx: Drop unnecessary code for handling BGR format outputs=0D= =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel, RGB. The TCX code already=0D assumes 32bpp, but it still has some checks of is_surface_bgr()=0D in an attempt to support 32bpp BGR. is_surface_bgr() will always=0D return false for the qemu_console_surface(), unless the display=0D device itself has deliberately created an alternate-format=0D surface via a function like qemu_create_displaysurface_from().=0D =0D Drop the never-used BGR-handling code, and assert that we have=0D a 32-bit surface rather than just doing nothing if it isn't.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Mark Cave-Ayland =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215102149.20513-1-peter.maydell@linaro.org=0D =0D =0D Commit: a3e24690b8f7724e7acf9eeb83613302dc907747=0D https://github.com/qemu/qemu/commit/a3e24690b8f7724e7acf9eeb8361330= 2dc907747=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make SYSCLK frequency board-specific=0D =0D The AN524 has a different SYSCLK frequency from the AN505 and AN521;=0D make the SYSCLK frequency a field in the MPS2TZMachineClass rather=0D than a compile-time constant so we can support the AN524.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-2-peter.maydell@linaro.org=0D =0D =0D Commit: 4fb013afcc037c27e3d0cd9af437a737106cca00=0D https://github.com/qemu/qemu/commit/4fb013afcc037c27e3d0cd9af437a73= 7106cca00=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D M hw/arm/mps2.c=0D M hw/misc/mps2-scc.c=0D M include/hw/misc/mps2-scc.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-scc: Support configurable number of OSCCLK values=0D =0D Currently the MPS2 SCC device implements a fixed number of OSCCLK=0D values (3). The variant of this device in the MPS3 AN524 board has 6=0D OSCCLK values. Switch to using a PROP_ARRAY, which allows board code=0D to specify how large the OSCCLK array should be as well as its=0D values.=0D =0D With a variable-length property array, the SCC no longer specifies=0D default values for the OSCCLKs, so we must set them explicitly in the=0D board code. This defaults are actually incorrect for the an521 and=0D an505; we will correct this bug in a following patch.=0D =0D This is a migration compatibility break for all the mps boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-3-peter.maydell@linaro.org=0D =0D =0D Commit: 9f9107e887a048d386ed94e52c1e22cbe4f58a4d=0D https://github.com/qemu/qemu/commit/9f9107e887a048d386ed94e52c1e22c= be4f58a4d=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Correct the OSCCLK settings for mps2-an505 and mps2-an5= 11=0D =0D We were previously using the default OSCCLK settings, which are=0D correct for the older MPS2 boards (mps2-an385, mps2-an386,=0D mps2-an500, mps2-an511), but wrong for the mps2-an505 and mps2-511=0D implemented in mps2-tz.c. Now we're setting the values explicitly we=0D can fix them to be correct.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-4-peter.maydell@linaro.org=0D =0D =0D Commit: f7c71b21f27b9cbac2c30eda11a93eb7f8722161=0D https://github.com/qemu/qemu/commit/f7c71b21f27b9cbac2c30eda11a93eb= 7f8722161=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make the OSCCLK settings be configurable per-board=0D =0D The AN505 and AN511 happen to share the same OSCCLK values, but the=0D AN524 will have a different set (and more of them), so split the=0D settings out to be per-board.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-5-peter.maydell@linaro.org=0D =0D =0D Commit: e8556f435eee97d508b58c06c156990d537823ab=0D https://github.com/qemu/qemu/commit/e8556f435eee97d508b58c06c156990= d537823ab=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-fpgaio.c=0D M include/hw/misc/mps2-fpgaio.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-fpgaio: Make number of LEDs configurable by board=0D =0D The MPS2 board has 2 LEDs, but the MPS3 board has 10 LEDs. The=0D FPGAIO device is similar on both sets of boards, but the LED0=0D register has correspondingly more bits that have an effect. Add a=0D device property for number of LEDs.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-6-peter.maydell@linaro.org=0D =0D =0D Commit: b2234223fd511230e933bba2572928ca97028bb8=0D https://github.com/qemu/qemu/commit/b2234223fd511230e933bba2572928c= a97028bb8=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-fpgaio.c=0D M include/hw/misc/mps2-fpgaio.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-fpgaio: Support SWITCH register=0D =0D MPS3 boards have an extra SWITCH register in the FPGAIO block which=0D reports the value of some switches. Implement this, governed by a=0D property the board code can use to specify whether whether it exists.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-7-peter.maydell@linaro.org=0D =0D =0D Commit: de77e8f4d2eec3c0ec9a74ad0da63cd9faec6aa7=0D https://github.com/qemu/qemu/commit/de77e8f4d2eec3c0ec9a74ad0da63cd= 9faec6aa7=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board=0D =0D Set the FPGAIO num-leds and have-switches properties explicitly=0D per-board, rather than relying on the defaults. The AN505 and AN521=0D both have the same settings as the default values, but the AN524 will=0D be different.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-8-peter.maydell@linaro.org=0D =0D =0D Commit: ba94ffd7d18b4724733819eaef3953617d4e81ab=0D https://github.com/qemu/qemu/commit/ba94ffd7d18b4724733819eaef39536= 17d4e81ab=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board ty= pe=0D =0D In the mps2-tz board code, we handle devices whose interrupt lines=0D must be wired to all CPUs by creating IRQ splitter devices for the=0D AN521, because it has 2 CPUs, but wiring the device IRQ directly to=0D the SSE/IoTKit input for the AN505, which has only 1 CPU.=0D =0D We can avoid making an explicit check on the board type constant by=0D instead creating and using the IRQ splitters for any board with more=0D than 1 CPU. This avoids having to add extra cases to the=0D conditionals every time we add new boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-9-peter.maydell@linaro.org=0D =0D =0D Commit: 11e1d41265c3915c5fa4c4bc2457bcad2fe1da74=0D https://github.com/qemu/qemu/commit/11e1d41265c3915c5fa4c4bc2457bca= d2fe1da74=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make number of IRQs board-specific=0D =0D The AN524 has more interrupt lines than the AN505 and AN521; make=0D numirq board-specific rather than a compile-time constant.=0D =0D Since the difference is small (92 on the current boards and 95 on the=0D new one) we don't dynamically allocate the cpu_irq_splitter[] array=0D but leave it as a fixed length array whose size is the maximum needed=0D for any of the boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-10-peter.maydell@linaro.org=0D =0D =0D Commit: 8e4b4c1ca6a9d46ddc727d9485e1ae2e98226aca=0D https://github.com/qemu/qemu/commit/8e4b4c1ca6a9d46ddc727d9485e1ae2= e98226aca=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-scc.c=0D M include/hw/misc/mps2-scc.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524=0D =0D The AN524 version of the SCC interface has different behaviour for=0D some of the CFG registers; implement it.=0D =0D Each board in this family can have minor differences in the meaning=0D of the CFG registers, so rather than trying to specify all the=0D possible semantics via individual device properties, we make the=0D behaviour conditional on the part-number field of the SCC_ID register=0D which the board code already passes us.=0D =0D For the AN524, the differences are:=0D * CFG3 is reserved rather than being board switches=0D * CFG5 is a new register ("ACLK Frequency in Hz")=0D * CFG6 is a new register ("Clock divider for BRAM")=0D =0D We implement both of the new registers as reads-as-written.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-11-peter.maydell@linaro.org=0D =0D =0D Commit: fee887a7b067faf1f9bc2d6c1d5fef787aadaf4a=0D https://github.com/qemu/qemu/commit/fee887a7b067faf1f9bc2d6c1d5fef7= 87aadaf4a=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI=0D =0D On the MPS2 boards, the first 32 interrupt lines are entirely=0D internal to the SSE; interrupt lines for devices outside the SSE=0D start at 32. In the application notes that document each FPGA image,=0D the interrupt wiring is documented from the point of view of the CPU,=0D so '0' is the first of the SSE's interrupts and the devices in the=0D FPGA image itself are '32' and up: so the UART 0 Receive interrupt is=0D 32, the SPI #0 interrupt is 51, and so on.=0D =0D Within our implementation, because the external interrupts must be=0D connected to the EXP_IRQ[0...n] lines of the SSE object, we made the=0D get_sse_irq_in() function take an irqno whose values start at 0 for=0D the first FPGA device interrupt. In this numbering scheme the UART 0=0D Receive interrupt is 0, the SPI #0 interrupt is 19, and so on.=0D =0D The result of these two different numbering schemes has been that=0D half of the devices were wired up to the wrong IRQs: the UART IRQs=0D are wired up correctly, but the DMA and SPI devices were passing=0D start-at-32 values to get_sse_irq_in() and so being mis-connected.=0D =0D Fix the bug by making get_sse_irq_in() take values specified with the=0D same scheme that the hardware manuals use, to avoid confusion.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-12-peter.maydell@linaro.org=0D =0D =0D Commit: 424182791bae6dc9526b7e6d149848f237dbc046=0D https://github.com/qemu/qemu/commit/424182791bae6dc9526b7e6d149848f= 237dbc046=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrup= ts=0D =0D The mps2-tz code uses PPCPortInfo data structures to define what=0D devices are present and how they are wired up. Currently we use=0D these to specify device types and addresses, but hard-code the=0D interrupt line wiring in each make_* helper function. This works for=0D the two boards we have at the moment, but the AN524 has some devices=0D with different interrupt assignments.=0D =0D This commit adds the framework to allow PPCPortInfo structures to=0D specify interrupt numbers. We add an array of interrupt numbers to=0D the PPCPortInfo struct, and pass it through to the make_* helpers.=0D The following commit will change the make_* helpers over to using the=0D framework.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-13-peter.maydell@linaro.org=0D =0D =0D Commit: b22c4e8b960d96e4bbed35d64e017c21f5b5fb41=0D https://github.com/qemu/qemu/commit/b22c4e8b960d96e4bbed35d64e017c2= 1f5b5fb41=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Move device IRQ info to data structures=0D =0D Move the specification of the IRQ information for the uart, ethernet,=0D dma and spi devices to the data structures. (The other devices=0D handled by the PPCPortInfo structures don't have any interrupt lines=0D we need to wire up.)=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-14-peter.maydell@linaro.org=0D =0D =0D Commit: 8cf68ed9354f3ca68b237ed4fff13c108f0d56dd=0D https://github.com/qemu/qemu/commit/8cf68ed9354f3ca68b237ed4fff13c1= 08f0d56dd=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs=0D= =0D We create an OR gate to wire together the overflow IRQs for all the=0D UARTs on the board; this has to have twice the number of inputs as=0D there are UARTs, since each UART feeds it a TX overflow and an RX=0D overflow interrupt line. Replace the hardcoded '10' with a=0D calculation based on the size of the uart[] array in the=0D MPS2TZMachineState. (We rely on OR gate inputs that are never wired=0D up or asserted being treated as always-zero.)=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-15-peter.maydell@linaro.org=0D =0D =0D Commit: ef29e3826be152996b8388656bc9d0dcfc2d43df=0D https://github.com/qemu/qemu/commit/ef29e3826be152996b8388656bc9d0d= cfc2d43df=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Allow boards to have different PPCInfo data=0D =0D The AN505 and AN521 have the same device layout, but the AN524 is=0D somewhat different. Allow for more than one PPCInfo array, which can=0D be selected based on the board type.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-16-peter.maydell@linaro.org=0D =0D =0D Commit: 4fec32db9c23ac7d04a0d0936b1d3b1b3413f280=0D https://github.com/qemu/qemu/commit/4fec32db9c23ac7d04a0d0936b1d3b1= b3413f280=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make RAM arrangement board-specific=0D =0D The AN505 and AN521 have the same layout of RAM; the AN524 does not.=0D Replace the current hard-coding of where the RAM is and which parts=0D of it are behind which MPCs with a data-driven approach.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-17-peter.maydell@linaro.org=0D =0D =0D Commit: 18a8c3b390550601e5b88cf78e416353d23bc1eb=0D https://github.com/qemu/qemu/commit/18a8c3b390550601e5b88cf78e41635= 3d23bc1eb=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data=0D =0D Instead of hardcoding the MachineClass default_ram_size and=0D default_ram_id fields, set them on class creation by finding the=0D entry in the RAMInfo array which is marked as being the QEMU system=0D RAM.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-18-peter.maydell@linaro.org=0D =0D =0D Commit: b89918fceb4041466d8a98400f173fb583f74899=0D https://github.com/qemu/qemu/commit/b89918fceb4041466d8a98400f173fb= 583f74899=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Support ROMs as well as RAMs=0D =0D The AN505 and AN521 don't have any read-only memory, but the AN524=0D does; add a flag to ROMInfo to mark a region as ROM.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-19-peter.maydell@linaro.org=0D =0D =0D Commit: a113aef998fe02154d2c95f34d38975648011dbb=0D https://github.com/qemu/qemu/commit/a113aef998fe02154d2c95f34d38975= 648011dbb=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo=0D =0D The armv7m_load_kernel() function takes a mem_size argument which it=0D expects to be the size of the memory region at guest address 0. (It=0D uses this argument only as a limit on how large a raw image file it=0D can load at address zero).=0D =0D Instead of hardcoding this value, find the RAMInfo corresponding to=0D the 0 address and extract its size.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-20-peter.maydell@linaro.org=0D =0D =0D Commit: 9c586cd54e7873e3139dae095f40715205a0d2c0=0D https://github.com/qemu/qemu/commit/9c586cd54e7873e3139dae095f40715= 205a0d2c0=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Add new mps3-an524 board=0D =0D Add support for the mps3-an524 board; this is an SSE-200 based FPGA=0D image, like the existing mps2-an521. It has a usefully larger amount=0D of RAM, and a PL031 RTC, as well as some more minor differences.=0D =0D In real hardware this image runs on a newer generation of the FPGA=0D board, the MPS3 rather than the older MPS2. Architecturally the two=0D boards are similar, so we implement the MPS3 boards in the mps2-tz.c=0D file as variations of the existing MPS2 boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-21-peter.maydell@linaro.org=0D =0D =0D Commit: 454f2b4495d521fa81cbab8dc6f83f2d309693f0=0D https://github.com/qemu/qemu/commit/454f2b4495d521fa81cbab8dc6f83f2= d309693f0=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Stub out USB controller for mps3-an524=0D =0D The AN524 has a USB controller (an ISP1763); we don't have a model of=0D it but we should provide a stub "unimplemented-device" for it. This=0D is slightly complicated because the USB controller shares a PPC port=0D with the ethernet controller.=0D =0D Implement a make_* function which provides creates a container=0D MemoryRegion with both the ethernet controller and an=0D unimplemented-device stub for the USB controller.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-22-peter.maydell@linaro.org=0D =0D =0D Commit: d211c28dc7a5e31791697c7da578665b9cc15441=0D https://github.com/qemu/qemu/commit/d211c28dc7a5e31791697c7da578665= b9cc15441=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524=0D =0D The AN524 has a PL031 RTC, which we have a model of; provide it=0D rather than an unimplemented-device stub.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-23-peter.maydell@linaro.org=0D =0D =0D Commit: 94c78467bb445044013e9fed80e9d9e9175fb1ff=0D https://github.com/qemu/qemu/commit/94c78467bb445044013e9fed80e9d9e= 9175fb1ff=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/mps2.rst=0D =0D Log Message:=0D -----------=0D docs/system/arm/mps2.rst: Document the new mps3-an524 board=0D =0D Add brief documentation of the new mps3-an524 board.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-24-peter.maydell@linaro.org=0D =0D =0D Commit: d2d837d68f7c493e4bc306a237d7f72db88a0201=0D https://github.com/qemu/qemu/commit/d2d837d68f7c493e4bc306a237d7f72= db88a0201=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D M hw/misc/armsse-cpuid.c=0D M hw/misc/armsse-mhu.c=0D M hw/misc/iotkit-sysctl.c=0D M hw/misc/iotkit-sysinfo.c=0D M hw/misc/mps2-fpgaio.c=0D M hw/misc/mps2-scc.c=0D M include/hw/arm/armsse.h=0D M include/hw/misc/armsse-cpuid.h=0D M include/hw/misc/armsse-mhu.h=0D M include/hw/misc/iotkit-secctl.h=0D M include/hw/misc/iotkit-sysctl.h=0D M include/hw/misc/iotkit-sysinfo.h=0D M include/hw/misc/mps2-fpgaio.h=0D =0D Log Message:=0D -----------=0D hw/arm/mps2: Update old infocenter.arm.com URLs=0D =0D Update old infocenter.arm.com URLs to the equivalent developer.arm.com=0D= ones (the old URLs should redirect, but we might as well avoid the=0D redirection notice, and the new URLs are pleasantly shorter).=0D =0D This commit covers the links to the MPS2 board TRM, the various=0D Application Notes, the IoTKit and SSE-200 documents.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-25-peter.maydell@linaro.org=0D =0D =0D Commit: 0273df0390046f9eba16b7e4e25f186664a5cd94=0D https://github.com/qemu/qemu/commit/0273df0390046f9eba16b7e4e25f186= 664a5cd94=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/mps2.rst=0D M docs/system/arm/nuvoton.rst=0D M hw/arm/mps2-tz.c=0D M hw/arm/mps2.c=0D M hw/arm/musicpal.c=0D M hw/arm/npcm7xx.c=0D M hw/arm/sbsa-ref.c=0D M hw/arm/xlnx-zynqmp.c=0D R hw/display/omap_lcd_template.h=0D M hw/display/omap_lcdc.c=0D M hw/display/tc6393xb.c=0D R hw/display/tc6393xb_template.h=0D M hw/display/tcx.c=0D M hw/i2c/npcm7xx_smbus.c=0D M hw/misc/armsse-cpuid.c=0D M hw/misc/armsse-mhu.c=0D M hw/misc/iotkit-sysctl.c=0D M hw/misc/iotkit-sysinfo.c=0D M hw/misc/mps2-fpgaio.c=0D M hw/misc/mps2-scc.c=0D M hw/net/meson.build=0D A hw/net/npcm7xx_emc.c=0D M hw/net/trace-events=0D M hw/virtio/virtio-mmio.c=0D M include/hw/arm/armsse.h=0D M include/hw/arm/npcm7xx.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/misc/armsse-cpuid.h=0D M include/hw/misc/armsse-mhu.h=0D M include/hw/misc/iotkit-secctl.h=0D M include/hw/misc/iotkit-sysctl.h=0D M include/hw/misc/iotkit-sysinfo.h=0D M include/hw/misc/mps2-fpgaio.h=0D M include/hw/misc/mps2-scc.h=0D A include/hw/net/npcm7xx_emc.h=0D M target/arm/cpu.c=0D M target/arm/cpu.h=0D M target/arm/cpu64.c=0D M target/arm/cpu_tcg.c=0D M target/arm/helper-a64.c=0D M target/arm/helper-a64.h=0D M target/arm/helper.c=0D M target/arm/internals.h=0D M target/arm/mte_helper.c=0D M target/arm/translate-a64.c=0D M target/arm/vec_helper.c=0D M tests/qtest/meson.build=0D A tests/qtest/npcm7xx_emc-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10306' into staging=0D =0D * sbsa-ref: remove cortex-a53 from list of supported cpus=0D * sbsa-ref: add 'max' to list of allowed cpus=0D * target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe=0D= * npcm7xx: add EMC model=0D * xlnx-zynqmp: Remove obsolete 'has_rpu' property=0D * target/arm: Speed up aarch64 TBL/TBX=0D * virtio-mmio: improve virtio-mmio get_dev_path alog=0D * target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks=0D * target/arm: Restrict v8M IDAU to TCG=0D * target/arm/cpu: Update coding style to make checkpatch.pl happy=0D * musicpal, tc6393xb, omap_lcdc, tcx: drop dead code for non-32-bit-RGB = surfaces=0D * Add new board: mps3-an524=0D =0D # gpg: Signature made Sat 06 Mar 2021 13:49:46 GMT=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210306: (49 commits)=0D hw/arm/mps2: Update old infocenter.arm.com URLs=0D docs/system/arm/mps2.rst: Document the new mps3-an524 board=0D hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524=0D hw/arm/mps2-tz: Stub out USB controller for mps3-an524=0D hw/arm/mps2-tz: Add new mps3-an524 board=0D hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo=0D hw/arm/mps2-tz: Support ROMs as well as RAMs=0D hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data=0D hw/arm/mps2-tz: Make RAM arrangement board-specific=0D hw/arm/mps2-tz: Allow boards to have different PPCInfo data=0D hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs=0D= hw/arm/mps2-tz: Move device IRQ info to data structures=0D hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrup= ts=0D hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI=0D hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524=0D hw/arm/mps2-tz: Make number of IRQs board-specific=0D hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board ty= pe=0D hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board=0D hw/misc/mps2-fpgaio: Support SWITCH register=0D hw/misc/mps2-fpgaio: Make number of LEDs configurable by board=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/11b95b4d7fb3...0273df039004= =0D From MAILER-DAEMON Mon Mar 08 06:58:35 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJEWw-0005DT-6g for mharc-qemu-commits@gnu.org; Mon, 08 Mar 2021 06:58:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59428) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJEWk-0005Bv-6l for qemu-commits@nongnu.org; Mon, 08 Mar 2021 06:58:27 -0500 Received: from out-22.smtp.github.com ([192.30.252.205]:49423 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJEWc-0004Ex-JW for qemu-commits@nongnu.org; Mon, 08 Mar 2021 06:58:21 -0500 Received: from github.com (hubbernetes-node-bd9a92d.ac4-iad.github.net [10.52.200.13]) by smtp.github.com (Postfix) with ESMTPA id 7902F5607F4 for ; Mon, 8 Mar 2021 03:58:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615204693; bh=1Rf+uUtZCL01TRsMCubqTNfQ2izItjtkBvDEZkyL7Wg=; h=Date:From:To:Subject:From; b=yBmD9pnH567+0BNZ2lEji6TR32b0TOG2qjqcV1+qmvP9x2u7/WBPjjjGhSlv240PP FgAwh4RQkdC1vAasXp8c+/sDYBaGYQBqOew2y+Y5901SYd42EROqSK/3c742n7bUbs jJjXLqCGb/Z4Bjh7sYKjt4gJa/iBtpVbjlisu11k= Date: Mon, 08 Mar 2021 03:58:13 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 25ff11: hw/arm/mps2-tz: Add new mps3-an524 board X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Mar 2021 11:58:31 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 25ff112a8ccaac94ea46c12ef6539da18f70c1c5=0D https://github.com/qemu/qemu/commit/25ff112a8ccaac94ea46c12ef6539da= 18f70c1c5=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Add new mps3-an524 board=0D =0D Add support for the mps3-an524 board; this is an SSE-200 based FPGA=0D image, like the existing mps2-an521. It has a usefully larger amount=0D of RAM, and a PL031 RTC, as well as some more minor differences.=0D =0D In real hardware this image runs on a newer generation of the FPGA=0D board, the MPS3 rather than the older MPS2. Architecturally the two=0D boards are similar, so we implement the MPS3 boards in the mps2-tz.c=0D file as variations of the existing MPS2 boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-21-peter.maydell@linaro.org=0D =0D =0D Commit: a9597753d1f1dfc944dbfd7a6ad007d79d7944b3=0D https://github.com/qemu/qemu/commit/a9597753d1f1dfc944dbfd7a6ad007d= 79d7944b3=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Stub out USB controller for mps3-an524=0D =0D The AN524 has a USB controller (an ISP1763); we don't have a model of=0D it but we should provide a stub "unimplemented-device" for it. This=0D is slightly complicated because the USB controller shares a PPC port=0D with the ethernet controller.=0D =0D Implement a make_* function which provides creates a container=0D MemoryRegion with both the ethernet controller and an=0D unimplemented-device stub for the USB controller.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-22-peter.maydell@linaro.org=0D =0D =0D Commit: 41745d2053a4dc0161115480fdce48f8d93fdb24=0D https://github.com/qemu/qemu/commit/41745d2053a4dc0161115480fdce48f= 8d93fdb24=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524=0D =0D The AN524 has a PL031 RTC, which we have a model of; provide it=0D rather than an unimplemented-device stub.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-23-peter.maydell@linaro.org=0D =0D =0D Commit: ced8bb04ae1b41d5aee5a8f782653149fc0b0367=0D https://github.com/qemu/qemu/commit/ced8bb04ae1b41d5aee5a8f78265314= 9fc0b0367=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/mps2.rst=0D =0D Log Message:=0D -----------=0D docs/system/arm/mps2.rst: Document the new mps3-an524 board=0D =0D Add brief documentation of the new mps3-an524 board.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-24-peter.maydell@linaro.org=0D =0D =0D Commit: 50b52b18cdb9294ce83dd49bb60b8e55a6526ea0=0D https://github.com/qemu/qemu/commit/50b52b18cdb9294ce83dd49bb60b8e5= 5a6526ea0=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D M hw/misc/armsse-cpuid.c=0D M hw/misc/armsse-mhu.c=0D M hw/misc/iotkit-sysctl.c=0D M hw/misc/iotkit-sysinfo.c=0D M hw/misc/mps2-fpgaio.c=0D M hw/misc/mps2-scc.c=0D M include/hw/arm/armsse.h=0D M include/hw/misc/armsse-cpuid.h=0D M include/hw/misc/armsse-mhu.h=0D M include/hw/misc/iotkit-secctl.h=0D M include/hw/misc/iotkit-sysctl.h=0D M include/hw/misc/iotkit-sysinfo.h=0D M include/hw/misc/mps2-fpgaio.h=0D =0D Log Message:=0D -----------=0D hw/arm/mps2: Update old infocenter.arm.com URLs=0D =0D Update old infocenter.arm.com URLs to the equivalent developer.arm.com=0D= ones (the old URLs should redirect, but we might as well avoid the=0D redirection notice, and the new URLs are pleasantly shorter).=0D =0D This commit covers the links to the MPS2 board TRM, the various=0D Application Notes, the IoTKit and SSE-200 documents.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-25-peter.maydell@linaro.org=0D =0D =0D Commit: 138d2931979cb7ee4a54a434a54088231f6980ff=0D https://github.com/qemu/qemu/commit/138d2931979cb7ee4a54a434a540882= 31f6980ff=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/mps2.rst=0D M docs/system/arm/nuvoton.rst=0D M hw/arm/mps2-tz.c=0D M hw/arm/mps2.c=0D M hw/arm/musicpal.c=0D M hw/arm/npcm7xx.c=0D M hw/arm/sbsa-ref.c=0D M hw/arm/xlnx-zynqmp.c=0D R hw/display/omap_lcd_template.h=0D M hw/display/omap_lcdc.c=0D M hw/display/tc6393xb.c=0D R hw/display/tc6393xb_template.h=0D M hw/display/tcx.c=0D M hw/i2c/npcm7xx_smbus.c=0D M hw/misc/armsse-cpuid.c=0D M hw/misc/armsse-mhu.c=0D M hw/misc/iotkit-sysctl.c=0D M hw/misc/iotkit-sysinfo.c=0D M hw/misc/mps2-fpgaio.c=0D M hw/misc/mps2-scc.c=0D M hw/net/meson.build=0D A hw/net/npcm7xx_emc.c=0D M hw/net/trace-events=0D M hw/virtio/virtio-mmio.c=0D M include/hw/arm/armsse.h=0D M include/hw/arm/npcm7xx.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/misc/armsse-cpuid.h=0D M include/hw/misc/armsse-mhu.h=0D M include/hw/misc/iotkit-secctl.h=0D M include/hw/misc/iotkit-sysctl.h=0D M include/hw/misc/iotkit-sysinfo.h=0D M include/hw/misc/mps2-fpgaio.h=0D M include/hw/misc/mps2-scc.h=0D A include/hw/net/npcm7xx_emc.h=0D M target/arm/cpu.c=0D M target/arm/cpu.h=0D M target/arm/cpu64.c=0D M target/arm/cpu_tcg.c=0D M target/arm/helper-a64.c=0D M target/arm/helper-a64.h=0D M target/arm/helper.c=0D M target/arm/internals.h=0D M target/arm/mte_helper.c=0D M target/arm/translate-a64.c=0D M target/arm/vec_helper.c=0D M tests/qtest/meson.build=0D A tests/qtest/npcm7xx_emc-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10308' into staging=0D =0D target-arm queue:=0D * sbsa-ref: remove cortex-a53 from list of supported cpus=0D * sbsa-ref: add 'max' to list of allowed cpus=0D * target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe=0D= * npcm7xx: add EMC model=0D * xlnx-zynqmp: Remove obsolete 'has_rpu' property=0D * target/arm: Speed up aarch64 TBL/TBX=0D * virtio-mmio: improve virtio-mmio get_dev_path alog=0D * target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks=0D * target/arm: Restrict v8M IDAU to TCG=0D * target/arm/cpu: Update coding style to make checkpatch.pl happy=0D * musicpal, tc6393xb, omap_lcdc, tcx: drop dead code for non-32-bit-RGB = surfaces=0D * Add new board: mps3-an524=0D =0D # gpg: Signature made Mon 08 Mar 2021 11:56:24 GMT=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210308: (49 commits)=0D hw/arm/mps2: Update old infocenter.arm.com URLs=0D docs/system/arm/mps2.rst: Document the new mps3-an524 board=0D hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524=0D hw/arm/mps2-tz: Stub out USB controller for mps3-an524=0D hw/arm/mps2-tz: Add new mps3-an524 board=0D hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo=0D hw/arm/mps2-tz: Support ROMs as well as RAMs=0D hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data=0D hw/arm/mps2-tz: Make RAM arrangement board-specific=0D hw/arm/mps2-tz: Allow boards to have different PPCInfo data=0D hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs=0D= hw/arm/mps2-tz: Move device IRQ info to data structures=0D hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrup= ts=0D hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI=0D hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524=0D hw/arm/mps2-tz: Make number of IRQs board-specific=0D hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board ty= pe=0D hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board=0D hw/misc/mps2-fpgaio: Support SWITCH register=0D hw/misc/mps2-fpgaio: Make number of LEDs configurable by board=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/0273df039004...138d2931979c= =0D From MAILER-DAEMON Mon Mar 08 08:31:14 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJFyc-0005px-6K for mharc-qemu-commits@gnu.org; Mon, 08 Mar 2021 08:31:14 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:48288) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJFyW-0005oc-Ju for qemu-commits@nongnu.org; Mon, 08 Mar 2021 08:31:10 -0500 Received: from out-26.smtp.github.com ([192.30.252.209]:40105 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJFyQ-0000ZT-2n for qemu-commits@nongnu.org; Mon, 08 Mar 2021 08:31:07 -0500 Received: from github.com (hubbernetes-node-a683383.ash1-iad.github.net [10.56.115.25]) by smtp.github.com (Postfix) with ESMTPA id 5EBE95E0A2F for ; Mon, 8 Mar 2021 05:31:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615210261; bh=hkhdtAsF8YNzYg/6+nzZy7LX4wY/1UwovnibW9i1RVU=; h=Date:From:To:Subject:From; b=r7vzcEWZVHOK2Er2O9IM212Bx8IS3nE1ae/J9P3jxEEu6tDxVEzC3cE2IjE/0Tci9 ECqPPj1rtq/l8juekMIL6MBUxcE3iZoZSjx0/HHXfaLV0tUO7kF3TBzF1fyO+578yA gCWv4HiekNDsoAfEjXfmdR7uqr2/S/4Yxt+Zpjc4= Date: Mon, 08 Mar 2021 05:31:01 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 4f335a: sbsa-ref: remove cortex-a53 from list of supported... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Mar 2021 13:31:10 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 4f335a6381f83beb5d6ac0d3993514379454a99d=0D https://github.com/qemu/qemu/commit/4f335a6381f83beb5d6ac0d39935143= 79454a99d=0D Author: Marcin Juszkiewicz =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/sbsa-ref.c=0D =0D Log Message:=0D -----------=0D sbsa-ref: remove cortex-a53 from list of supported cpus=0D =0D Cortex-A53 supports 40bits of address space. sbsa-ref's memory starts=0D above this limit.=0D =0D Signed-off-by: Marcin Juszkiewicz =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Acked-by: Leif Lindholm =0D Message-id: 20210216150122.3830863-2-marcin.juszkiewicz@linaro.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: cecc0962099b4967473383bf28f12bef47e62cca=0D https://github.com/qemu/qemu/commit/cecc0962099b4967473383bf28f12be= f47e62cca=0D Author: Marcin Juszkiewicz =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/sbsa-ref.c=0D =0D Log Message:=0D -----------=0D sbsa-ref: add 'max' to list of allowed cpus=0D =0D Let add 'max' cpu while work goes on adding newer CPU types than=0D Cortex-A72. This allows us to check SVE etc support.=0D =0D Signed-off-by: Marcin Juszkiewicz =0D Acked-by: Leif Lindholm =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210216150122.3830863-3-marcin.juszkiewicz@linaro.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: f2f68a78b793808b84367bc708d632969d4440aa=0D https://github.com/qemu/qemu/commit/f2f68a78b793808b84367bc708d6329= 69d4440aa=0D Author: Rebecca Cran =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.h=0D M target/arm/helper.c=0D M target/arm/internals.h=0D M target/arm/translate-a64.c=0D =0D Log Message:=0D -----------=0D target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe=0D= =0D Add support for FEAT_SSBS. SSBS (Speculative Store Bypass Safe) is an=0D optional feature in ARMv8.0, and mandatory in ARMv8.5.=0D =0D Signed-off-by: Rebecca Cran =0D Reviewed-by: Richard Henderson =0D Message-id: 20210216224543.16142-2-rebecca@nuviainc.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 89455d1ba6ed190e840cb732e63958755ea42a07=0D https://github.com/qemu/qemu/commit/89455d1ba6ed190e840cb732e639587= 55ea42a07=0D Author: Rebecca Cran =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu64.c=0D =0D Log Message:=0D -----------=0D target/arm: Enable FEAT_SSBS for "max" AARCH64 CPU=0D =0D Set ID_AA64PFR1_EL1.SSBS to 2 and ID_PFR2.SSBS to 1.=0D =0D Signed-off-by: Rebecca Cran =0D Reviewed-by: Richard Henderson =0D Message-id: 20210216224543.16142-3-rebecca@nuviainc.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: ed84a60ca80c403749c1fc1bab27c85d8edba39d=0D https://github.com/qemu/qemu/commit/ed84a60ca80c403749c1fc1bab27c85= d8edba39d=0D Author: Rebecca Cran =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.c=0D =0D Log Message:=0D -----------=0D target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU=0D =0D Enable FEAT_SSBS for the "max" 32-bit CPU.=0D =0D Signed-off-by: Rebecca Cran =0D Reviewed-by: Richard Henderson =0D Message-id: 20210216224543.16142-4-rebecca@nuviainc.com=0D [PMM: fix typo causing compilation failure]=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 01c966b54f5effd7132da1a8d33ae1927944cfdf=0D https://github.com/qemu/qemu/commit/01c966b54f5effd7132da1a8d33ae19= 27944cfdf=0D Author: Doug Evans =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/net/meson.build=0D A hw/net/npcm7xx_emc.c=0D M hw/net/trace-events=0D A include/hw/net/npcm7xx_emc.h=0D =0D Log Message:=0D -----------=0D hw/net: Add npcm7xx emc model=0D =0D This is a 10/100 ethernet device that has several features.=0D Only the ones needed by the Linux driver have been implemented.=0D See npcm7xx_emc.c for a list of unimplemented features.=0D =0D Reviewed-by: Hao Wu =0D Reviewed-by: Avi Fishman =0D Signed-off-by: Doug Evans =0D Message-id: 20210218212453.831406-2-dje@google.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 7758643650f0229bd3ccd23112c255664445eabd=0D https://github.com/qemu/qemu/commit/7758643650f0229bd3ccd23112c2556= 64445eabd=0D Author: Doug Evans =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/nuvoton.rst=0D M hw/arm/npcm7xx.c=0D M include/hw/arm/npcm7xx.h=0D =0D Log Message:=0D -----------=0D hw/arm: Add npcm7xx emc model=0D =0D This is a 10/100 ethernet device that has several features.=0D Only the ones needed by the Linux driver have been implemented.=0D See npcm7xx_emc.c for a list of unimplemented features.=0D =0D Reviewed-by: Hao Wu =0D Reviewed-by: Avi Fishman =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Doug Evans =0D Message-id: 20210218212453.831406-3-dje@google.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: e6646167cc390388a330fe94b9af4d5e8e0cb2d9=0D https://github.com/qemu/qemu/commit/e6646167cc390388a330fe94b9af4d5= e8e0cb2d9=0D Author: Doug Evans =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/meson.build=0D A tests/qtest/npcm7xx_emc-test.c=0D =0D Log Message:=0D -----------=0D tests/qtests: Add npcm7xx emc model test=0D =0D Reviewed-by: Hao Wu =0D Reviewed-by: Avi Fishman =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Doug Evans =0D Message-id: 20210218212453.831406-4-dje@google.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 4565afbbf0b6d897ee746f2410d60460f43c3159=0D https://github.com/qemu/qemu/commit/4565afbbf0b6d897ee746f2410d6046= 0f43c3159=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/xlnx-zynqmp.c=0D M include/hw/arm/xlnx-zynqmp.h=0D =0D Log Message:=0D -----------=0D hw/arm/xlnx-zynqmp: Remove obsolete 'has_rpu' property=0D =0D We hint the 'has_rpu' property is no longer required since commit=0D 6908ec448b4 ("xlnx-zynqmp: Properly support the smp command line=0D option") which was released in QEMU v2.11.0.=0D =0D Beside, this device is marked 'user_creatable =3D false', so the=0D only thing that could be setting the property is the board code=0D that creates the device.=0D =0D Since the property is not user-facing, we can remove it without=0D going through the deprecation process.=0D =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219144350.1979905-1-f4bug@amsat.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 519183d3fee58e52f7b51cf146c9dc9edc565059=0D https://github.com/qemu/qemu/commit/519183d3fee58e52f7b51cf146c9dc9= edc565059=0D Author: Richard Henderson =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/helper-a64.c=0D M target/arm/helper-a64.h=0D M target/arm/translate-a64.c=0D M target/arm/vec_helper.c=0D =0D Log Message:=0D -----------=0D target/arm: Speed up aarch64 TBL/TBX=0D =0D Always perform one call instead of two for 16-byte operands.=0D Use byte loads/stores directly into the vector register file=0D instead of extractions and deposits to a 64-bit local variable.=0D =0D In order to easily receive pointers into the vector register file,=0D convert the helper to the gvec out-of-line signature. Move the=0D helper into vec_helper.c, where it can make use of H1 and clear_tail.=0D =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Alex Benn=C3=A9e =0D Tested-by: Alex Benn=C3=A9e =0D Message-id: 20210224230532.276878-1-richard.henderson@linaro.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 5dfbfefaada495b9a65382d64f06325fd802c717=0D https://github.com/qemu/qemu/commit/5dfbfefaada495b9a65382d64f06325= fd802c717=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/i2c/npcm7xx_smbus.c=0D =0D Log Message:=0D -----------=0D hw/i2c/npcm7xx_smbus: Simplify npcm7xx_smbus_init()=0D =0D The STATUS register will be reset to IDLE in=0D cnpcm7xx_smbus_enter_reset(), no need to preset=0D it in instance_init().=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Hao Wu =0D Message-id: 20210228224813.312532-1-f4bug@amsat.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 819b3496196c2a7de89ed2372182c24053443990=0D https://github.com/qemu/qemu/commit/819b3496196c2a7de89ed2372182c24= 053443990=0D Author: schspa =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/virtio/virtio-mmio.c=0D =0D Log Message:=0D -----------=0D virtio-mmio: improve virtio-mmio get_dev_path alog=0D =0D At the moment the following QEMU command line triggers an assertion=0D failure On xlnx-versal SOC:=0D qemu-system-aarch64 \=0D -machine xlnx-versal-virt -nographic -smp 2 -m 128 \=0D -fsdev local,id=3Dshareid,path=3D${HOME}/work,security_model=3Dnone= \=0D -device virtio-9p-device,fsdev=3Dshareid,mount_tag=3Dshare \=0D -fsdev local,id=3Dshareid1,path=3D${HOME}/Music,security_model=3Dno= ne \=0D -device virtio-9p-device,fsdev=3Dshareid1,mount_tag=3Dshare1=0D =0D qemu-system-aarch64: ../migration/savevm.c:860:=0D vmstate_register_with_alias_id:=0D Assertion `!se->compat || se->instance_id =3D=3D 0' failed.=0D =0D This problem was fixed on arm virt platform in commit f58b39d2d5b=0D ("virtio-mmio: format transport base address in BusClass.get_dev_path")=0D= =0D It works perfectly on arm virt platform. but there is still there on=0D xlnx-versal SOC.=0D =0D The main difference between arm virt and xlnx-versal is they use=0D different way to create virtio-mmio qdev. on arm virt, it calls=0D sysbus_create_simple("virtio-mmio", base, pic[irq]); which will call=0D sysbus_mmio_map internally and assign base address to subsys device=0D mmio correctly. but xlnx-versal's implements won't do this.=0D =0D However, xlnx-versal can't switch to sysbus_create_simple() to create=0D virtio-mmio device. It's because xlnx-versal's cpu use=0D VersalVirt.soc.fpd.apu.mr as it's memory. which is subregion of=0D system_memory. sysbus_create_simple will add virtio to system_memory,=0D which can't be accessed by cpu.=0D =0D Besides, xlnx-versal can't add sysbus_mmio_map api call too, because=0D this will add memory region to system_memory, and it can't be added=0D to VersalVirt.soc.fpd.apu.mr again.=0D =0D We can solve this by assign correct base address offset on dev_path.=0D =0D This path was test on aarch64 virt & xlnx-versal platform.=0D =0D Signed-off-by: schspa =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 2d928adf8a9148510e1b2041145b8a873f4d26df=0D https://github.com/qemu/qemu/commit/2d928adf8a9148510e1b2041145b8a8= 73f4d26df=0D Author: Peter Collingbourne =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/helper.c=0D M target/arm/mte_helper.c=0D =0D Log Message:=0D -----------=0D target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks=0D =0D Section D6.7 of the ARM ARM states:=0D =0D For the purpose of determining Tag Check Fault handling, unprivileged=0D load and store instructions are treated as if executed at EL0 when=0D executed at either:=0D - EL1, when the Effective value of PSTATE.UAO is 0.=0D - EL2, when both the Effective value of HCR_EL2.{E2H, TGE} is {1, 1}=0D and the Effective value of PSTATE.UAO is 0.=0D =0D ARM has confirmed a defect in the pseudocode function=0D AArch64.TagCheckFault that makes it inconsistent with the above=0D wording. The remedy is to adjust references to PSTATE.EL in that=0D function to instead refer to AArch64.AccessUsesEL(acctype), so=0D that unprivileged instructions use SCTLR_EL1.TCF0 and TFSRE0_EL1.=0D The exception type for synchronous tag check faults remains unchanged.=0D= =0D This patch implements the described change by partially reverting=0D commits 50244cc76abc and cc97b0019bb5.=0D =0D Signed-off-by: Peter Collingbourne =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219201820.2672077-1-pcc@google.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 6e937ba7f8fb90d66cb3781f7fed32fb4239556a=0D https://github.com/qemu/qemu/commit/6e937ba7f8fb90d66cb3781f7fed32f= b4239556a=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.c=0D M target/arm/cpu_tcg.c=0D =0D Log Message:=0D -----------=0D target/arm: Restrict v8M IDAU to TCG=0D =0D IDAU is specific to M-profile. KVM only supports A-profile.=0D Restrict this interface to TCG, as it is pointless (and=0D confusing) on a KVM-only build.=0D =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210221222617.2579610-2-f4bug@amsat.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: dddc200dcddd1a4e44c32e2b0f5a3cb248c506a6=0D https://github.com/qemu/qemu/commit/dddc200dcddd1a4e44c32e2b0f5a3cb= 248c506a6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.c=0D =0D Log Message:=0D -----------=0D target/arm/cpu: Update coding style to make checkpatch.pl happy=0D =0D We will move this code in the next commit. Clean it up=0D first to avoid checkpatch.pl errors.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210221222617.2579610-3-f4bug@amsat.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 9aee50eefba8c39d17759c7def3ba5a899c86271=0D https://github.com/qemu/qemu/commit/9aee50eefba8c39d17759c7def3ba5a= 899c86271=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/musicpal.c=0D =0D Log Message:=0D -----------=0D hw/arm/musicpal: Remove dead code for non-32-bit-RGB surfaces=0D =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel RGB. Remove the legacy dead=0D code from the milkymist display device which was handling the=0D possibility that the console surface was some other format.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215103215.4944-2-peter.maydell@linaro.org=0D =0D =0D Commit: b2b111faec50918a5e3b78942be5b81cb46a51fc=0D https://github.com/qemu/qemu/commit/b2b111faec50918a5e3b78942be5b81= cb46a51fc=0D Author: Peter Maydell =0D Date: 2021-03-05 (Fri, 05 Mar 2021)=0D =0D Changed paths:=0D M hw/display/tc6393xb.c=0D =0D Log Message:=0D -----------=0D hw/display/tc6393xb: Remove dead code for handling non-32bpp surfaces=0D= =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel RGB. Remove the legacy dead=0D code from the tc6393xb display device which was handling the=0D possibility that the console surface was some other format.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215103215.4944-3-peter.maydell@linaro.org=0D =0D =0D Commit: 8cfd41dd89981c49aa15c603c3e3233580620d72=0D https://github.com/qemu/qemu/commit/8cfd41dd89981c49aa15c603c3e3233= 580620d72=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/tc6393xb_template.h=0D =0D Log Message:=0D -----------=0D hw/display/tc6393xb: Expand out macros in template header=0D =0D Now the template header is included only for BITS=3D=3D32, expand=0D out all the macros that depended on the BITS setting.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215103215.4944-4-peter.maydell@linaro.org=0D =0D =0D Commit: 0dc51b002482d4b5e60f634dcbcd8a3a906d7b97=0D https://github.com/qemu/qemu/commit/0dc51b002482d4b5e60f634dcbcd8a3= a906d7b97=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/tc6393xb.c=0D R hw/display/tc6393xb_template.h=0D =0D Log Message:=0D -----------=0D hw/display/tc6393xb: Inline tc6393xb_draw_graphic32() at its callsite=0D= =0D The function tc6393xb_draw_graphic32() is called in exactly one place,=0D= so just inline the function body at its callsite. This allows us to=0D drop the template header entirely.=0D =0D The code move includes a single added space after 'for' to fix=0D the coding style.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-5-peter.maydell@linaro.org=0D =0D =0D Commit: 52b8ac590daebe1bbdaa2a5757ba5e05a626fab5=0D https://github.com/qemu/qemu/commit/52b8ac590daebe1bbdaa2a5757ba5e0= 5a626fab5=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/omap_lcd_template.h=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Expand out macros in template header=0D =0D The omap_lcdc template header is already only included once, for=0D DEPTH=3D=3D32, but it still has all the macro-driven parameterization=0D for other depths. Expand out all the macros in the header.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-6-peter.maydell@linaro.org=0D =0D =0D Commit: 78b40bfb8fee5bb8ecff176522ad8098476cab5d=0D https://github.com/qemu/qemu/commit/78b40bfb8fee5bb8ecff176522ad809= 8476cab5d=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/omap_lcd_template.h=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Drop broken bigendian ifdef=0D =0D The draw_line16_32() function in the omap_lcdc template header=0D includes an ifdef for the case where HOST_WORDS_BIGENDIAN matches=0D TARGET_WORDS_BIGENDIAN. This is trying to optimise for "source=0D bitmap and destination bitmap format match", but it is broken,=0D because in this function the formats don't match: the source is=0D 16-bit colour and the destination is 32-bit colour, so a memcpy()=0D will produce corrupted graphics output. Drop the bogus ifdef.=0D =0D This bug was introduced in commit ea644cf343129, when we dropped=0D support for DEPTH values other than 32 from the template header.=0D The old #if line was=0D #if DEPTH =3D=3D 16 && defined(HOST_WORDS_BIGENDIAN) =3D=3D defined(TAR= GET_WORDS_BIGENDIAN)=0D and this was mistakenly changed to=0D #if defined(HOST_WORDS_BIGENDIAN) =3D=3D defined(TARGET_WORDS_BIGENDIAN= )=0D rather than deleting the #if as now having an always-false condition.=0D =0D Fixes: ea644cf343129=0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-7-peter.maydell@linaro.org=0D =0D =0D Commit: 0c6d9ff0afa3500af875d64382c2a6ca9d7934a0=0D https://github.com/qemu/qemu/commit/0c6d9ff0afa3500af875d64382c2a6c= a9d7934a0=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/omap_lcd_template.h=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Fix coding style issues in template header=0D =0D Fix some minor coding style issues in the template header,=0D so checkpatch doesn't complain when we move the code.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-8-peter.maydell@linaro.org=0D =0D =0D Commit: 1cccdd1807d17939d2d28df00d9040eea5c357db=0D https://github.com/qemu/qemu/commit/1cccdd1807d17939d2d28df00d9040e= ea5c357db=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D R hw/display/omap_lcd_template.h=0D M hw/display/omap_lcdc.c=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Inline template header into C file=0D =0D We only include the template header once, so just inline it into the=0D source file for the device.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-9-peter.maydell@linaro.org=0D =0D =0D Commit: cfb08215ca3b8df4662e08328f91d43c2603f4b2=0D https://github.com/qemu/qemu/commit/cfb08215ca3b8df4662e08328f91d43= c2603f4b2=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/omap_lcdc.c=0D =0D Log Message:=0D -----------=0D hw/display/omap_lcdc: Delete unnecessary macro=0D =0D The macro draw_line_func is used only once; just expand it.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210215103215.4944-10-peter.maydell@linaro.org=0D =0D =0D Commit: 7713fff47d31e7607e52c9247fb7b628ed6bb096=0D https://github.com/qemu/qemu/commit/7713fff47d31e7607e52c9247fb7b62= 8ed6bb096=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/display/tcx.c=0D =0D Log Message:=0D -----------=0D hw/display/tcx: Drop unnecessary code for handling BGR format outputs=0D= =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel, RGB. The TCX code already=0D assumes 32bpp, but it still has some checks of is_surface_bgr()=0D in an attempt to support 32bpp BGR. is_surface_bgr() will always=0D return false for the qemu_console_surface(), unless the display=0D device itself has deliberately created an alternate-format=0D surface via a function like qemu_create_displaysurface_from().=0D =0D Drop the never-used BGR-handling code, and assert that we have=0D a 32-bit surface rather than just doing nothing if it isn't.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Mark Cave-Ayland =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215102149.20513-1-peter.maydell@linaro.org=0D =0D =0D Commit: a3e24690b8f7724e7acf9eeb83613302dc907747=0D https://github.com/qemu/qemu/commit/a3e24690b8f7724e7acf9eeb8361330= 2dc907747=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make SYSCLK frequency board-specific=0D =0D The AN524 has a different SYSCLK frequency from the AN505 and AN521;=0D make the SYSCLK frequency a field in the MPS2TZMachineClass rather=0D than a compile-time constant so we can support the AN524.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-2-peter.maydell@linaro.org=0D =0D =0D Commit: 4fb013afcc037c27e3d0cd9af437a737106cca00=0D https://github.com/qemu/qemu/commit/4fb013afcc037c27e3d0cd9af437a73= 7106cca00=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D M hw/arm/mps2.c=0D M hw/misc/mps2-scc.c=0D M include/hw/misc/mps2-scc.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-scc: Support configurable number of OSCCLK values=0D =0D Currently the MPS2 SCC device implements a fixed number of OSCCLK=0D values (3). The variant of this device in the MPS3 AN524 board has 6=0D OSCCLK values. Switch to using a PROP_ARRAY, which allows board code=0D to specify how large the OSCCLK array should be as well as its=0D values.=0D =0D With a variable-length property array, the SCC no longer specifies=0D default values for the OSCCLKs, so we must set them explicitly in the=0D board code. This defaults are actually incorrect for the an521 and=0D an505; we will correct this bug in a following patch.=0D =0D This is a migration compatibility break for all the mps boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-3-peter.maydell@linaro.org=0D =0D =0D Commit: 9f9107e887a048d386ed94e52c1e22cbe4f58a4d=0D https://github.com/qemu/qemu/commit/9f9107e887a048d386ed94e52c1e22c= be4f58a4d=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Correct the OSCCLK settings for mps2-an505 and mps2-an5= 11=0D =0D We were previously using the default OSCCLK settings, which are=0D correct for the older MPS2 boards (mps2-an385, mps2-an386,=0D mps2-an500, mps2-an511), but wrong for the mps2-an505 and mps2-511=0D implemented in mps2-tz.c. Now we're setting the values explicitly we=0D can fix them to be correct.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-4-peter.maydell@linaro.org=0D =0D =0D Commit: f7c71b21f27b9cbac2c30eda11a93eb7f8722161=0D https://github.com/qemu/qemu/commit/f7c71b21f27b9cbac2c30eda11a93eb= 7f8722161=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make the OSCCLK settings be configurable per-board=0D =0D The AN505 and AN511 happen to share the same OSCCLK values, but the=0D AN524 will have a different set (and more of them), so split the=0D settings out to be per-board.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-5-peter.maydell@linaro.org=0D =0D =0D Commit: e8556f435eee97d508b58c06c156990d537823ab=0D https://github.com/qemu/qemu/commit/e8556f435eee97d508b58c06c156990= d537823ab=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-fpgaio.c=0D M include/hw/misc/mps2-fpgaio.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-fpgaio: Make number of LEDs configurable by board=0D =0D The MPS2 board has 2 LEDs, but the MPS3 board has 10 LEDs. The=0D FPGAIO device is similar on both sets of boards, but the LED0=0D register has correspondingly more bits that have an effect. Add a=0D device property for number of LEDs.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-6-peter.maydell@linaro.org=0D =0D =0D Commit: b2234223fd511230e933bba2572928ca97028bb8=0D https://github.com/qemu/qemu/commit/b2234223fd511230e933bba2572928c= a97028bb8=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-fpgaio.c=0D M include/hw/misc/mps2-fpgaio.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-fpgaio: Support SWITCH register=0D =0D MPS3 boards have an extra SWITCH register in the FPGAIO block which=0D reports the value of some switches. Implement this, governed by a=0D property the board code can use to specify whether whether it exists.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-7-peter.maydell@linaro.org=0D =0D =0D Commit: de77e8f4d2eec3c0ec9a74ad0da63cd9faec6aa7=0D https://github.com/qemu/qemu/commit/de77e8f4d2eec3c0ec9a74ad0da63cd= 9faec6aa7=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board=0D =0D Set the FPGAIO num-leds and have-switches properties explicitly=0D per-board, rather than relying on the defaults. The AN505 and AN521=0D both have the same settings as the default values, but the AN524 will=0D be different.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-8-peter.maydell@linaro.org=0D =0D =0D Commit: ba94ffd7d18b4724733819eaef3953617d4e81ab=0D https://github.com/qemu/qemu/commit/ba94ffd7d18b4724733819eaef39536= 17d4e81ab=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board ty= pe=0D =0D In the mps2-tz board code, we handle devices whose interrupt lines=0D must be wired to all CPUs by creating IRQ splitter devices for the=0D AN521, because it has 2 CPUs, but wiring the device IRQ directly to=0D the SSE/IoTKit input for the AN505, which has only 1 CPU.=0D =0D We can avoid making an explicit check on the board type constant by=0D instead creating and using the IRQ splitters for any board with more=0D than 1 CPU. This avoids having to add extra cases to the=0D conditionals every time we add new boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-9-peter.maydell@linaro.org=0D =0D =0D Commit: 11e1d41265c3915c5fa4c4bc2457bcad2fe1da74=0D https://github.com/qemu/qemu/commit/11e1d41265c3915c5fa4c4bc2457bca= d2fe1da74=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make number of IRQs board-specific=0D =0D The AN524 has more interrupt lines than the AN505 and AN521; make=0D numirq board-specific rather than a compile-time constant.=0D =0D Since the difference is small (92 on the current boards and 95 on the=0D new one) we don't dynamically allocate the cpu_irq_splitter[] array=0D but leave it as a fixed length array whose size is the maximum needed=0D for any of the boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-10-peter.maydell@linaro.org=0D =0D =0D Commit: 8e4b4c1ca6a9d46ddc727d9485e1ae2e98226aca=0D https://github.com/qemu/qemu/commit/8e4b4c1ca6a9d46ddc727d9485e1ae2= e98226aca=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-scc.c=0D M include/hw/misc/mps2-scc.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524=0D =0D The AN524 version of the SCC interface has different behaviour for=0D some of the CFG registers; implement it.=0D =0D Each board in this family can have minor differences in the meaning=0D of the CFG registers, so rather than trying to specify all the=0D possible semantics via individual device properties, we make the=0D behaviour conditional on the part-number field of the SCC_ID register=0D which the board code already passes us.=0D =0D For the AN524, the differences are:=0D * CFG3 is reserved rather than being board switches=0D * CFG5 is a new register ("ACLK Frequency in Hz")=0D * CFG6 is a new register ("Clock divider for BRAM")=0D =0D We implement both of the new registers as reads-as-written.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-11-peter.maydell@linaro.org=0D =0D =0D Commit: fee887a7b067faf1f9bc2d6c1d5fef787aadaf4a=0D https://github.com/qemu/qemu/commit/fee887a7b067faf1f9bc2d6c1d5fef7= 87aadaf4a=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI=0D =0D On the MPS2 boards, the first 32 interrupt lines are entirely=0D internal to the SSE; interrupt lines for devices outside the SSE=0D start at 32. In the application notes that document each FPGA image,=0D the interrupt wiring is documented from the point of view of the CPU,=0D so '0' is the first of the SSE's interrupts and the devices in the=0D FPGA image itself are '32' and up: so the UART 0 Receive interrupt is=0D 32, the SPI #0 interrupt is 51, and so on.=0D =0D Within our implementation, because the external interrupts must be=0D connected to the EXP_IRQ[0...n] lines of the SSE object, we made the=0D get_sse_irq_in() function take an irqno whose values start at 0 for=0D the first FPGA device interrupt. In this numbering scheme the UART 0=0D Receive interrupt is 0, the SPI #0 interrupt is 19, and so on.=0D =0D The result of these two different numbering schemes has been that=0D half of the devices were wired up to the wrong IRQs: the UART IRQs=0D are wired up correctly, but the DMA and SPI devices were passing=0D start-at-32 values to get_sse_irq_in() and so being mis-connected.=0D =0D Fix the bug by making get_sse_irq_in() take values specified with the=0D same scheme that the hardware manuals use, to avoid confusion.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-12-peter.maydell@linaro.org=0D =0D =0D Commit: 424182791bae6dc9526b7e6d149848f237dbc046=0D https://github.com/qemu/qemu/commit/424182791bae6dc9526b7e6d149848f= 237dbc046=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrup= ts=0D =0D The mps2-tz code uses PPCPortInfo data structures to define what=0D devices are present and how they are wired up. Currently we use=0D these to specify device types and addresses, but hard-code the=0D interrupt line wiring in each make_* helper function. This works for=0D the two boards we have at the moment, but the AN524 has some devices=0D with different interrupt assignments.=0D =0D This commit adds the framework to allow PPCPortInfo structures to=0D specify interrupt numbers. We add an array of interrupt numbers to=0D the PPCPortInfo struct, and pass it through to the make_* helpers.=0D The following commit will change the make_* helpers over to using the=0D framework.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-13-peter.maydell@linaro.org=0D =0D =0D Commit: b22c4e8b960d96e4bbed35d64e017c21f5b5fb41=0D https://github.com/qemu/qemu/commit/b22c4e8b960d96e4bbed35d64e017c2= 1f5b5fb41=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Move device IRQ info to data structures=0D =0D Move the specification of the IRQ information for the uart, ethernet,=0D dma and spi devices to the data structures. (The other devices=0D handled by the PPCPortInfo structures don't have any interrupt lines=0D we need to wire up.)=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-14-peter.maydell@linaro.org=0D =0D =0D Commit: 8cf68ed9354f3ca68b237ed4fff13c108f0d56dd=0D https://github.com/qemu/qemu/commit/8cf68ed9354f3ca68b237ed4fff13c1= 08f0d56dd=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs=0D= =0D We create an OR gate to wire together the overflow IRQs for all the=0D UARTs on the board; this has to have twice the number of inputs as=0D there are UARTs, since each UART feeds it a TX overflow and an RX=0D overflow interrupt line. Replace the hardcoded '10' with a=0D calculation based on the size of the uart[] array in the=0D MPS2TZMachineState. (We rely on OR gate inputs that are never wired=0D up or asserted being treated as always-zero.)=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-15-peter.maydell@linaro.org=0D =0D =0D Commit: ef29e3826be152996b8388656bc9d0dcfc2d43df=0D https://github.com/qemu/qemu/commit/ef29e3826be152996b8388656bc9d0d= cfc2d43df=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Allow boards to have different PPCInfo data=0D =0D The AN505 and AN521 have the same device layout, but the AN524 is=0D somewhat different. Allow for more than one PPCInfo array, which can=0D be selected based on the board type.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-16-peter.maydell@linaro.org=0D =0D =0D Commit: 4fec32db9c23ac7d04a0d0936b1d3b1b3413f280=0D https://github.com/qemu/qemu/commit/4fec32db9c23ac7d04a0d0936b1d3b1= b3413f280=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make RAM arrangement board-specific=0D =0D The AN505 and AN521 have the same layout of RAM; the AN524 does not.=0D Replace the current hard-coding of where the RAM is and which parts=0D of it are behind which MPCs with a data-driven approach.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-17-peter.maydell@linaro.org=0D =0D =0D Commit: 18a8c3b390550601e5b88cf78e416353d23bc1eb=0D https://github.com/qemu/qemu/commit/18a8c3b390550601e5b88cf78e41635= 3d23bc1eb=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data=0D =0D Instead of hardcoding the MachineClass default_ram_size and=0D default_ram_id fields, set them on class creation by finding the=0D entry in the RAMInfo array which is marked as being the QEMU system=0D RAM.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-18-peter.maydell@linaro.org=0D =0D =0D Commit: b89918fceb4041466d8a98400f173fb583f74899=0D https://github.com/qemu/qemu/commit/b89918fceb4041466d8a98400f173fb= 583f74899=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Support ROMs as well as RAMs=0D =0D The AN505 and AN521 don't have any read-only memory, but the AN524=0D does; add a flag to ROMInfo to mark a region as ROM.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-19-peter.maydell@linaro.org=0D =0D =0D Commit: a113aef998fe02154d2c95f34d38975648011dbb=0D https://github.com/qemu/qemu/commit/a113aef998fe02154d2c95f34d38975= 648011dbb=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo=0D =0D The armv7m_load_kernel() function takes a mem_size argument which it=0D expects to be the size of the memory region at guest address 0. (It=0D uses this argument only as a limit on how large a raw image file it=0D can load at address zero).=0D =0D Instead of hardcoding this value, find the RAMInfo corresponding to=0D the 0 address and extract its size.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-20-peter.maydell@linaro.org=0D =0D =0D Commit: 25ff112a8ccaac94ea46c12ef6539da18f70c1c5=0D https://github.com/qemu/qemu/commit/25ff112a8ccaac94ea46c12ef6539da= 18f70c1c5=0D Author: Peter Maydell =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Add new mps3-an524 board=0D =0D Add support for the mps3-an524 board; this is an SSE-200 based FPGA=0D image, like the existing mps2-an521. It has a usefully larger amount=0D of RAM, and a PL031 RTC, as well as some more minor differences.=0D =0D In real hardware this image runs on a newer generation of the FPGA=0D board, the MPS3 rather than the older MPS2. Architecturally the two=0D boards are similar, so we implement the MPS3 boards in the mps2-tz.c=0D file as variations of the existing MPS2 boards.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-21-peter.maydell@linaro.org=0D =0D =0D Commit: a9597753d1f1dfc944dbfd7a6ad007d79d7944b3=0D https://github.com/qemu/qemu/commit/a9597753d1f1dfc944dbfd7a6ad007d= 79d7944b3=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Stub out USB controller for mps3-an524=0D =0D The AN524 has a USB controller (an ISP1763); we don't have a model of=0D it but we should provide a stub "unimplemented-device" for it. This=0D is slightly complicated because the USB controller shares a PPC port=0D with the ethernet controller.=0D =0D Implement a make_* function which provides creates a container=0D MemoryRegion with both the ethernet controller and an=0D unimplemented-device stub for the USB controller.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-22-peter.maydell@linaro.org=0D =0D =0D Commit: 41745d2053a4dc0161115480fdce48f8d93fdb24=0D https://github.com/qemu/qemu/commit/41745d2053a4dc0161115480fdce48f= 8d93fdb24=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524=0D =0D The AN524 has a PL031 RTC, which we have a model of; provide it=0D rather than an unimplemented-device stub.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-23-peter.maydell@linaro.org=0D =0D =0D Commit: ced8bb04ae1b41d5aee5a8f782653149fc0b0367=0D https://github.com/qemu/qemu/commit/ced8bb04ae1b41d5aee5a8f78265314= 9fc0b0367=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/mps2.rst=0D =0D Log Message:=0D -----------=0D docs/system/arm/mps2.rst: Document the new mps3-an524 board=0D =0D Add brief documentation of the new mps3-an524 board.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-24-peter.maydell@linaro.org=0D =0D =0D Commit: 50b52b18cdb9294ce83dd49bb60b8e55a6526ea0=0D https://github.com/qemu/qemu/commit/50b52b18cdb9294ce83dd49bb60b8e5= 5a6526ea0=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D M hw/misc/armsse-cpuid.c=0D M hw/misc/armsse-mhu.c=0D M hw/misc/iotkit-sysctl.c=0D M hw/misc/iotkit-sysinfo.c=0D M hw/misc/mps2-fpgaio.c=0D M hw/misc/mps2-scc.c=0D M include/hw/arm/armsse.h=0D M include/hw/misc/armsse-cpuid.h=0D M include/hw/misc/armsse-mhu.h=0D M include/hw/misc/iotkit-secctl.h=0D M include/hw/misc/iotkit-sysctl.h=0D M include/hw/misc/iotkit-sysinfo.h=0D M include/hw/misc/mps2-fpgaio.h=0D =0D Log Message:=0D -----------=0D hw/arm/mps2: Update old infocenter.arm.com URLs=0D =0D Update old infocenter.arm.com URLs to the equivalent developer.arm.com=0D= ones (the old URLs should redirect, but we might as well avoid the=0D redirection notice, and the new URLs are pleasantly shorter).=0D =0D This commit covers the links to the MPS2 board TRM, the various=0D Application Notes, the IoTKit and SSE-200 documents.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210215115138.20465-25-peter.maydell@linaro.org=0D =0D =0D Commit: 138d2931979cb7ee4a54a434a54088231f6980ff=0D https://github.com/qemu/qemu/commit/138d2931979cb7ee4a54a434a540882= 31f6980ff=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/mps2.rst=0D M docs/system/arm/nuvoton.rst=0D M hw/arm/mps2-tz.c=0D M hw/arm/mps2.c=0D M hw/arm/musicpal.c=0D M hw/arm/npcm7xx.c=0D M hw/arm/sbsa-ref.c=0D M hw/arm/xlnx-zynqmp.c=0D R hw/display/omap_lcd_template.h=0D M hw/display/omap_lcdc.c=0D M hw/display/tc6393xb.c=0D R hw/display/tc6393xb_template.h=0D M hw/display/tcx.c=0D M hw/i2c/npcm7xx_smbus.c=0D M hw/misc/armsse-cpuid.c=0D M hw/misc/armsse-mhu.c=0D M hw/misc/iotkit-sysctl.c=0D M hw/misc/iotkit-sysinfo.c=0D M hw/misc/mps2-fpgaio.c=0D M hw/misc/mps2-scc.c=0D M hw/net/meson.build=0D A hw/net/npcm7xx_emc.c=0D M hw/net/trace-events=0D M hw/virtio/virtio-mmio.c=0D M include/hw/arm/armsse.h=0D M include/hw/arm/npcm7xx.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/misc/armsse-cpuid.h=0D M include/hw/misc/armsse-mhu.h=0D M include/hw/misc/iotkit-secctl.h=0D M include/hw/misc/iotkit-sysctl.h=0D M include/hw/misc/iotkit-sysinfo.h=0D M include/hw/misc/mps2-fpgaio.h=0D M include/hw/misc/mps2-scc.h=0D A include/hw/net/npcm7xx_emc.h=0D M target/arm/cpu.c=0D M target/arm/cpu.h=0D M target/arm/cpu64.c=0D M target/arm/cpu_tcg.c=0D M target/arm/helper-a64.c=0D M target/arm/helper-a64.h=0D M target/arm/helper.c=0D M target/arm/internals.h=0D M target/arm/mte_helper.c=0D M target/arm/translate-a64.c=0D M target/arm/vec_helper.c=0D M tests/qtest/meson.build=0D A tests/qtest/npcm7xx_emc-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10308' into staging=0D =0D target-arm queue:=0D * sbsa-ref: remove cortex-a53 from list of supported cpus=0D * sbsa-ref: add 'max' to list of allowed cpus=0D * target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe=0D= * npcm7xx: add EMC model=0D * xlnx-zynqmp: Remove obsolete 'has_rpu' property=0D * target/arm: Speed up aarch64 TBL/TBX=0D * virtio-mmio: improve virtio-mmio get_dev_path alog=0D * target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks=0D * target/arm: Restrict v8M IDAU to TCG=0D * target/arm/cpu: Update coding style to make checkpatch.pl happy=0D * musicpal, tc6393xb, omap_lcdc, tcx: drop dead code for non-32-bit-RGB = surfaces=0D * Add new board: mps3-an524=0D =0D # gpg: Signature made Mon 08 Mar 2021 11:56:24 GMT=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210308: (49 commits)=0D hw/arm/mps2: Update old infocenter.arm.com URLs=0D docs/system/arm/mps2.rst: Document the new mps3-an524 board=0D hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524=0D hw/arm/mps2-tz: Stub out USB controller for mps3-an524=0D hw/arm/mps2-tz: Add new mps3-an524 board=0D hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo=0D hw/arm/mps2-tz: Support ROMs as well as RAMs=0D hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data=0D hw/arm/mps2-tz: Make RAM arrangement board-specific=0D hw/arm/mps2-tz: Allow boards to have different PPCInfo data=0D hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs=0D= hw/arm/mps2-tz: Move device IRQ info to data structures=0D hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrup= ts=0D hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI=0D hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524=0D hw/arm/mps2-tz: Make number of IRQs board-specific=0D hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board ty= pe=0D hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board=0D hw/misc/mps2-fpgaio: Support SWITCH register=0D hw/misc/mps2-fpgaio: Make number of LEDs configurable by board=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/91e92cad67ca...138d2931979c= =0D From MAILER-DAEMON Mon Mar 08 08:52:22 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJGJ3-0008Hl-RD for mharc-qemu-commits@gnu.org; Mon, 08 Mar 2021 08:52:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:53824) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJGJ1-0008Cm-2x for qemu-commits@nongnu.org; Mon, 08 Mar 2021 08:52:19 -0500 Received: from out-17.smtp.github.com ([192.30.252.200]:51241 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJGIw-0001ae-3h for qemu-commits@nongnu.org; Mon, 08 Mar 2021 08:52:18 -0500 Received: from github.com (hubbernetes-node-f0e5901.va3-iad.github.net [10.48.123.48]) by smtp.github.com (Postfix) with ESMTPA id 6283E5C0BF9 for ; Mon, 8 Mar 2021 05:52:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615211533; bh=+QpPN8Mu819RJKreZcoVRtk6iGvAl14qdzwDIrkf2z4=; h=Date:From:To:Subject:From; b=HaNuUo7vXjjBBqzxSLun9bogFeLzonFnqE//8AfKZlI09uhiXMml2hYzp2enyuTrW l/yCBiyX1wU3bGg4PINiE5kLSPGXoMIME7om58aJ1eVqhrvOPztZy/hxrMjQNXCFR3 RpWQP3P4MJHOxzcO/p0lMnN97Cyt4ZGQc2FVDtAQ= Date: Mon, 08 Mar 2021 05:52:13 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] c6986f: KVM: x86: do not fail if software breakpoint has a... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Mar 2021 13:52:20 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: c6986f16a7022ccfb73d91bc7676c8e1d15e5342=0D https://github.com/qemu/qemu/commit/c6986f16a7022ccfb73d91bc7676c8e= 1d15e5342=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/i386/kvm/kvm.c=0D =0D Log Message:=0D -----------=0D KVM: x86: do not fail if software breakpoint has already been removed=0D= =0D If kvm_arch_remove_sw_breakpoint finds that a software breakpoint does no= t=0D have an INT3 instruction, it fails. This can happen if one sets a=0D software breakpoint in a kernel module and then reloads it. gdb then=0D thinks the breakpoint cannot be deleted and there is no way to add it=0D back.=0D =0D Suggested-by: Maxim Levitsky =0D Reviewed-by: Maxim Levitsky =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 2c933ac6a883606b85f8cf271bfb40379d077e97=0D https://github.com/qemu/qemu/commit/2c933ac6a883606b85f8cf271bfb403= 79d077e97=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M hw/intc/apic.c=0D =0D Log Message:=0D -----------=0D KVM: x86: deprecate -M kernel-irqchip=3Doff except for -M isapc=0D =0D The userspace local APIC is basically untested and does not support many=0D= features such as TSC deadline timer, x2APIC or PV spinlocks. On the=0D other hand, the PIT and IOAPIC are okay as they are not tied to=0D the processor and are tested with -M kernel-irqchip=3Dsplit.=0D =0D Therefore, deprecate the local APIC and, with it, limit=0D -M kernel-irqchip=3Doff to the ISA PC machine type, which does not=0D have a local APIC at all.=0D =0D Reviewed-by: Maxim Levitsky =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 9f34101db00eabd8f424e98b481c2394e6509198=0D https://github.com/qemu/qemu/commit/9f34101db00eabd8f424e98b481c239= 4e6509198=0D Author: Kostiantyn Kostiuk =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M qga/vss-win32/meson.build=0D =0D Log Message:=0D -----------=0D qga-vss: Use dynamic linking for GLib=0D =0D The current GLib version implements the DllMain function. DllMain is also= =0D present in the provider.cpp code. So in the case of static linking, the=0D= DllMain redefinition error occurs. For now, just switch to dynamic linkin= g=0D and revert this patch when the issue will be solved.=0D =0D See Glib issue for more details https://gitlab.gnome.org/GNOME/glib/-/iss= ues/692=0D =0D Signed-off-by: Kostiantyn Kostiuk =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: a9b1315f86d9323587b340bd3bf83b9d66a55563=0D https://github.com/qemu/qemu/commit/a9b1315f86d9323587b340bd3bf83b9= d66a55563=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M chardev/char-socket.c=0D M chardev/char.c=0D M gdbstub.c=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D chardev: add nodelay option=0D =0D The "delay" option was introduced as a way to enable Nagle's algorithm=0D= with ",nodelay". Since the short form for boolean options has now been=0D= deprecated, introduce a more properly named "nodelay" option. The "delay= "=0D option remains as an undocumented option.=0D =0D "delay" and "nodelay" are mutually exclusive. Because the check is=0D done at consumption time, the code also rejects them if one of the=0D two is specified via -set.=0D =0D Based-on: <20210226080526.651705-1-pbonzini@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 0bd5a2eb7927189c40ca5394079b1c0e88cea7cb=0D https://github.com/qemu/qemu/commit/0bd5a2eb7927189c40ca5394079b1c0= e88cea7cb=0D Author: Kevin Wolf =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Check for wellformed id in user_creatable_add_type()=0D =0D Most code paths for creating a user creatable object go through=0D QemuOpts, which ensures that the provided 'id' option is actually a=0D valid identifier.=0D =0D However, there are some code paths that don't go through QemuOpts:=0D qemu-storage-daemon --object (since commit 8db1efd3) and QMP object-add=0D= (since it was first introduced in commit cff8b2c6). We need to have the=0D= same validity check for those, too.=0D =0D This adds the check and makes it print the same error message as=0D QemuOpts on failure.=0D =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210302171623.49709-1-kwolf@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 10b6ee1616f984c1889d0851226a9ff14b35ac58=0D https://github.com/qemu/qemu/commit/10b6ee1616f984c1889d0851226a9ff= 14b35ac58=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D vl.c: do not execute trace_init_backends() before daemonizing=0D =0D Commit v5.2.0-190-g0546c0609c ("vl: split various early command line=0D options to a separate function") moved the trace backend init code to=0D the qemu_process_early_options(). Which is now being called before=0D os_daemonize() via qemu_maybe_daemonize().=0D =0D Turns out that this change of order causes a problem when executing=0D QEMU in daemon mode and with CONFIG_TRACE_SIMPLE. The trace thread=0D is now being created by the parent, and the parent is left waiting for=0D= a trace file flush that was registered via st_init(). The result is=0D that the parent process never exits.=0D =0D To reproduce, fire up a QEMU process with -daemonize and with=0D CONFIG_TRACE_SIMPLE enabled. Two QEMU process will be left in the=0D host:=0D =0D $ sudo ./x86_64-softmmu/qemu-system-x86_64 -S -no-user-config -nodefaults= \=0D -nographic -machine none,accel=3Dkvm:tcg -daemonize=0D =0D $ ps axf | grep qemu=0D 529710 pts/3 S+ 0:00 | \_ grep --color=3Dauto qemu=0D 529697 ? Ssl 0:00 \_ ./x86_64-softmmu/qemu-system-x86_64 -S -= no-user-config -nodefaults -nographic -machine none,accel=3Dkvm:tcg -daem= onize=0D 529699 ? Sl 0:00 \_ ./x86_64-softmmu/qemu-system-x86_64 = -S -no-user-config -nodefaults -nographic -machine none,accel=3Dkvm:tcg -= daemonize=0D =0D The parent thread is hang in flush_trace_file:=0D =0D $ sudo gdb ./x86_64-softmmu/qemu-system-x86_64 529697=0D (..)=0D (gdb) bt=0D #0 0x00007f9dac6a137d in syscall () at /lib64/libc.so.6=0D #1 0x00007f9dacc3c4f3 in g_cond_wait () at /lib64/libglib-2.0.so.0=0D #2 0x0000555d12f952da in flush_trace_file (wait=3Dtrue) at ../trace/sim= ple.c:140=0D #3 0x0000555d12f95b4c in st_flush_trace_buffer () at ../trace/simple.c:= 383=0D #4 0x00007f9dac5e43a7 in __run_exit_handlers () at /lib64/libc.so.6=0D #5 0x00007f9dac5e4550 in on_exit () at /lib64/libc.so.6=0D #6 0x0000555d12d454de in os_daemonize () at ../os-posix.c:255=0D #7 0x0000555d12d0bd5c in qemu_maybe_daemonize (pid_file=3D0x0) at ../so= ftmmu/vl.c:2408=0D #8 0x0000555d12d0e566 in qemu_init (argc=3D8, argv=3D0x7fffc594d9b8, en= vp=3D0x7fffc594da00) at ../softmmu/vl.c:3459=0D #9 0x0000555d128edac1 in main (argc=3D8, argv=3D0x7fffc594d9b8, envp=3D= 0x7fffc594da00) at ../softmmu/main.c:49=0D (gdb)=0D =0D Aside from the 'zombie' process in the host, this is directly impacting=0D= Libvirt. Libvirt waits for the parent process to exit to be sure that the= =0D QMP monitor is available in the daemonized process to fetch QEMU=0D capabilities, and as is now Libvirt hangs at daemon start waiting=0D for the parent thread to exit.=0D =0D The fix is simple: just move the trace backend related code back to=0D be executed after daemonizing.=0D =0D Fixes: 0546c0609cb5a8d90c1cbac8e0d64b5a048bbb19=0D Reviewed-by: Paolo Bonzini =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210105181437.538366-2-danielhb413@gmail.com>=0D Acked-by: Stefan Hajnoczi =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: e0a8f99355c32b48c9ef867127075b5267ae23d8=0D https://github.com/qemu/qemu/commit/e0a8f99355c32b48c9ef867127075b5= 267ae23d8=0D Author: Keqian Zhu =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M accel/kvm/kvm-all.c=0D =0D Log Message:=0D -----------=0D accel: kvm: Fix memory waste under mismatch page size=0D =0D When handle dirty log, we face qemu_real_host_page_size and=0D TARGET_PAGE_SIZE. The first one is the granule of KVM dirty=0D bitmap, and the second one is the granule of QEMU dirty bitmap.=0D =0D As qemu_real_host_page_size >=3D TARGET_PAGE_SIZE (kvm_init()=0D enforced it), misuse TARGET_PAGE_SIZE to init kvmslot dirty_bmap=0D may waste memory. For example, when qemu_real_host_page_size is=0D 64K and TARGET_PAGE_SIZE is 4K, it wastes 93.75% (15/16) memory.=0D =0D Signed-off-by: Keqian Zhu =0D Reviewed-by: Andrew Jones =0D Reviewed-by: Peter Xu =0D Message-Id: <20201217014941.22872-2-zhukeqian1@huawei.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 3920552846e881bafa9f9aad0bb1a6eef874d7fb=0D https://github.com/qemu/qemu/commit/3920552846e881bafa9f9aad0bb1a6e= ef874d7fb=0D Author: Keqian Zhu =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M accel/kvm/kvm-all.c=0D =0D Log Message:=0D -----------=0D accel: kvm: Add aligment assert for kvm_log_clear_one_slot=0D =0D The parameters start and size are transfered from QEMU memory=0D emulation layer. It can promise that they are TARGET_PAGE_SIZE=0D aligned. However, KVM needs they are qemu_real_page_size aligned.=0D =0D Though no caller breaks this aligned requirement currently, we'd=0D better add an explicit assert to avoid future breaking.=0D =0D Signed-off-by: Keqian Zhu =0D Acked-by: Peter Xu =0D Reviewed-by: Andrew Jones =0D Message-Id: <20201217014941.22872-3-zhukeqian1@huawei.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: faabca42cc4ff51110116dfe44d420c668b4d8d8=0D https://github.com/qemu/qemu/commit/faabca42cc4ff51110116dfe44d420c= 668b4d8d8=0D Author: Peng Liang =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/lsi53c895a.c=0D =0D Log Message:=0D -----------=0D lsilogic: Use PCIDevice::exit instead of DeviceState::unrealize=0D =0D PCI_DEVICE has overwritten DeviceState::unrealize (pci_qdev_unrealize).=0D= However, LSI53C895A, which is a subclass of PCI_DEVICE, overwrites it=0D again and doesn't save the parent's implementation so the PCI_DEVICE's=0D= implementation of DeviceState::unrealize will never be called when=0D unrealize a LSI53C895A device. And it will lead to memory leak and=0D unplug failure.=0D =0D For a PCI device, it's better to implement PCIDevice::exit instead of=0D DeviceState::unrealize. So let's change to use PCIDevice::exit.=0D =0D Fixes: a8632434c7e9 ("lsi: implement I/O memory space for Memory Move ins= tructions")=0D Cc: qemu-stable@nongnu.org=0D Signed-off-by: Peng Liang =0D Message-Id: <20210302133016.1221081-1-liangpeng10@huawei.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 64d70277114b069579c96e6daf83922b9eacc383=0D https://github.com/qemu/qemu/commit/64d70277114b069579c96e6daf83922= b9eacc383=0D Author: David Edmondson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M include/hw/elf_ops.h=0D =0D Log Message:=0D -----------=0D elf_ops: correct loading of 32 bit PVH kernel=0D =0D Because sizeof(struct elf64_note) =3D=3D sizeof(struct elf32_note),=0D attempting to use the size of the currently defined struct elf_note as=0D= a discriminator for whether the object being loaded is 64 bit in=0D load_elf() fails.=0D =0D Instead, take advantage of the existing glue parameter SZ, which is=0D defined as 32 or 64 in the respective variants of load_elf().=0D =0D Fixes: 696aa04c84c6 ("elf-ops.h: Add get_elf_note_type()")=0D Signed-off-by: David Edmondson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Stefano Garzarella =0D Message-Id: <20210302090315.3031492-2-david.edmondson@oracle.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: e20e182ea0ab5c16557603f457fe0db445b63726=0D https://github.com/qemu/qemu/commit/e20e182ea0ab5c16557603f457fe0db= 445b63726=0D Author: David Edmondson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/i386/x86.c=0D =0D Log Message:=0D -----------=0D x86/pvh: extract only 4 bytes of start address for 32 bit kernels=0D =0D When loading the PVH start address from a 32 bit ELF note, extract=0D only the appropriate number of bytes.=0D =0D Fixes: ab969087da65 ("pvh: Boot uncompressed kernel using direct boot ABI= ")=0D Signed-off-by: David Edmondson =0D Reviewed-by: Stefano Garzarella =0D Message-Id: <20210302090315.3031492-3-david.edmondson@oracle.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: f7544edcd32e602af1aae86714dc7c32350d5d7c=0D https://github.com/qemu/qemu/commit/f7544edcd32e602af1aae86714dc7c3= 2350d5d7c=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M block/blkdebug.c=0D M include/qemu/config-file.h=0D M softmmu/vl.c=0D M util/qemu-config.c=0D =0D Log Message:=0D -----------=0D qemu-config: add error propagation to qemu_config_parse=0D =0D This enables some simplification of vl.c via error_fatal, and improves=0D= error messages. Before:=0D =0D $ ./qemu-system-x86_64 -readconfig .=0D qemu-system-x86_64: error reading file=0D qemu-system-x86_64: -readconfig .: read config .: Invalid argument=0D $ /usr/libexec/qemu-kvm -readconfig foo=0D qemu-kvm: -readconfig foo: read config foo: No such file or directory=0D= =0D After:=0D =0D $ ./qemu-system-x86_64 -readconfig .=0D qemu-system-x86_64: -readconfig .: Cannot read config file: Is a direct= ory=0D $ ./qemu-system-x86_64 -readconfig foo=0D qemu-system-x86_64: -readconfig foo: Could not open 'foo': No such file= or directory=0D =0D Signed-off-by: Paolo Bonzini =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Markus Armbruster =0D Message-Id: <20210226170816.231173-1-pbonzini@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 41af878b96582fc8c83303ab8921e40468403702=0D https://github.com/qemu/qemu/commit/41af878b96582fc8c83303ab8921e40= 468403702=0D Author: Hannes Reinecke =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M include/scsi/utils.h=0D M scsi/utils.c=0D =0D Log Message:=0D -----------=0D scsi: Rename linux-specific SG_ERR codes to generic SCSI_HOST error cod= es=0D =0D We really should make a distinction between legitimate sense codes=0D (ie if one is running against an emulated block device or for=0D pass-through sense codes), and the intermediate errors generated=0D during processing of the command, which really are not sense codes=0D but refer to some specific internal status. And this internal=0D state is not necessarily linux-specific, but rather can refer to=0D the qemu implementation itself.=0D So rename the linux-only SG_ERR codes to SCSI_HOST codes and make=0D them available generally.=0D =0D Signed-off-by: Hannes Reinecke =0D Message-Id: <20201116184041.60465-5-hare@suse.de>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: db66a15cb80f09da24a5311a3f3b8f0c1835bf71=0D https://github.com/qemu/qemu/commit/db66a15cb80f09da24a5311a3f3b8f0= c1835bf71=0D Author: Hannes Reinecke =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M include/scsi/utils.h=0D M scsi/utils.c=0D =0D Log Message:=0D -----------=0D scsi: Add mapping for generic SCSI_HOST status to sense codes=0D =0D As we don't have a driver-specific mapping (yet) we should provide=0D for a detailed mapping from host_status to SCSI sense codes.=0D =0D Signed-off-by: Hannes Reinecke =0D Message-Id: <20201116184041.60465-6-hare@suse.de>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 9738c657208800298a7d68272b861fb2dc49fee1=0D https://github.com/qemu/qemu/commit/9738c657208800298a7d68272b861fb= 2dc49fee1=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-generic.c=0D =0D Log Message:=0D -----------=0D scsi-generic: do not snoop the output of failed commands=0D =0D If a READ CAPACITY command would fail, for example s->qdev.blocksize woul= d be=0D set to zero and cause a division by zero on the next use.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: a108557bbff8a3f44233982f015f996426411be8=0D https://github.com/qemu/qemu/commit/a108557bbff8a3f44233982f015f996= 426411be8=0D Author: Hannes Reinecke =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D M hw/scsi/scsi-generic.c=0D M include/scsi/utils.h=0D M scsi/qemu-pr-helper.c=0D M scsi/utils.c=0D =0D Log Message:=0D -----------=0D scsi: inline sg_io_sense_from_errno() into the callers.=0D =0D Currently sg_io_sense_from_errno() converts the two input parameters=0D 'errno' and 'io_hdr' into sense code and SCSI status. Having=0D split the function off into scsi_sense_from_errno() and=0D scsi_sense_from_host_status(), both of which are available generically,=0D= we now inline the logic in the callers so that scsi-disk and=0D scsi-generic will be able to pass host_status to the HBA.=0D =0D Signed-off-by: Hannes Reinecke =0D Message-Id: <20201116184041.60465-7-hare@suse.de>=0D [Put together from "scsi-disk: Add sg_io callback to evaluate status"=0D and what remains of "scsi: split sg_io_sense_from_errno() in two functio= ns",=0D with many other fixes. - Paolo]=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: f3126d65b393c015e8f87763fdccee99bb1119af=0D https://github.com/qemu/qemu/commit/f3126d65b393c015e8f87763fdccee9= 9bb1119af=0D Author: Hannes Reinecke =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-bus.c=0D M hw/scsi/scsi-disk.c=0D M hw/scsi/scsi-generic.c=0D M hw/scsi/virtio-scsi.c=0D M hw/scsi/vmw_pvscsi.c=0D M include/hw/scsi/scsi.h=0D =0D Log Message:=0D -----------=0D scsi: move host_status handling into SCSI drivers=0D =0D Some SCSI drivers like virtio have an internal mapping for the=0D host_status. This patch moves the host_status translation into=0D the SCSI drivers to allow those drivers to set up the correct=0D values.=0D =0D Signed-off-by: Hannes Reinecke .=0D [Added default handling to avoid touching all drivers. - Paolo]=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: fe636424caabb4e8b5b96d8a994f58e321bd71d9=0D https://github.com/qemu/qemu/commit/fe636424caabb4e8b5b96d8a994f58e= 321bd71d9=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M util/qemu-option.c=0D =0D Log Message:=0D -----------=0D qemu-option: do not suggest using the delay option=0D =0D The "delay" option was a hack that was introduced to allow writing "nodel= ay".=0D We are adding a "nodelay" option to be used as "nodelay=3Don", so recomme= nd it=0D instead of "delay".=0D =0D This is quite ugly, but a proper deprecation of "delay"=0D cannot be done if QEMU starts suggesting it. Since it's the=0D only case I opted for this very much ad-hoc patch.=0D =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: ff012d9a52ea2ee9223ad5c78d19c0c6b6898690=0D https://github.com/qemu/qemu/commit/ff012d9a52ea2ee9223ad5c78d19c0c= 6b6898690=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M Makefile=0D =0D Log Message:=0D -----------=0D build-sys: invoke ninja with -d keepdepfile=0D =0D After reading the dependency file, ninja just deletes it, in the name=0D of cleanliness I guess. However this complicates debugging unnecessarily= =0D compared to good old "-include *.d". Use the keepdepfile debugging=0D option to make it easier to see what is going on.=0D =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210215122103.63933-1-pbonzini@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: dc1d91ac567c49cf07d8312c97b4a02e25047d50=0D https://github.com/qemu/qemu/commit/dc1d91ac567c49cf07d8312c97b4a02= e25047d50=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tests/fp/meson.build=0D M tests/meson.build=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D meson: adjust timeouts for some slower tests=0D =0D Adjust the timeouts for the benchmarks (Meson 0.57 allows 0 to mean=0D infinite) and for the longest running tests. These are the=0D times that I measured and the corresponding timeouts. For generic=0D qtests, the target that reported the longest runtime is included.=0D =0D unit tests:=0D test-crypto-tlscredsx509 13.15s 45s=0D test-crypto-tlssession 14.12s 45s=0D =0D qtests:=0D qos-test 21.26s 60s (i386)=0D ahci-test 22.18s 60s=0D pxe-test 26.51s 60s=0D boot-serial-test 28.02s 60s (sparc)=0D prom-env-test 28.86s 60s=0D bios-tables-test 50.17s 120s (aarch64)=0D test-hmp 57.15s 120s (aarch64)=0D npcm7xx_pwm-test 71.27s 150s=0D migration-test 97.09s 150s (aarch64)=0D qom-test 139.20s 240s (aarch64)=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 9f45a641097b0a54c673fe3399c7a8ccb6f06af1=0D https://github.com/qemu/qemu/commit/9f45a641097b0a54c673fe3399c7a8c= cb6f06af1=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M trace/control.c=0D =0D Log Message:=0D -----------=0D trace: fix "-trace file=3D..."=0D =0D Because trace_opt_parse always deletes the options it has parsed,=0D trace_init_file's call to qemu_find_opts_singleton always=0D creates an empty -trace option group. Therefore, the subsequent=0D qemu_opt_get(opts, "file") always returns NULL.=0D =0D To fix this, save the last "-trace file=3D..." option in a global=0D variable and use it later in trace_init_file.=0D =0D This is similar to what was done before commit 92eecfff32 ("trace:=0D remove argument from trace_init_file", 2020-11-11), except contained=0D within trace/control.c and without memory leaks.=0D =0D Fixes: 92eecfff32 ("trace: remove argument from trace_init_file", 2020-11= -11)=0D Cc: stefanha@redhat.com=0D Reported-by: armbru@redhat.com=0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210209145759.141231-2-pbonzini@redhat.com>=0D =0D =0D Commit: 7520c4f0847093aefa87f23113f28d5d1d574aed=0D https://github.com/qemu/qemu/commit/7520c4f0847093aefa87f23113f28d5= d1d574aed=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D trace: skip qemu_set_log_filename if no "-D" option was passed=0D =0D When the "simple" backend is not active but the "log" backend is,=0D both "-trace file=3D" and "-D" will result in a call to=0D qemu_set_log_filename. Unfortunately, QEMU was also calling=0D qemu_set_log_filename if "-D" was not passed, so the "-trace=0D file=3D" option had no effect and the tracepoints went back to=0D stderr.=0D =0D Fortunately we can just skip qemu_set_log_filename in that case,=0D because the log backend will initialize itself just fine as soon=0D as qemu_set_log is called, also in qemu_process_early_options.=0D =0D Cc: stefanha@redhat.com=0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210209145759.141231-3-pbonzini@redhat.com>=0D =0D =0D Commit: c715343fd96bcf93263fda38d81af815fdb5a7fa=0D https://github.com/qemu/qemu/commit/c715343fd96bcf93263fda38d81af81= 5fdb5a7fa=0D Author: Daniele Buono =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M meson.build=0D =0D Log Message:=0D -----------=0D meson: Stop if cfi is enabled with system slirp=0D =0D For CFI, we need to compile slirp as a static library together with qemu.= =0D This is because we register slirp functions as callbacks for QEMU Timers.= =0D When using a system-wide shared libslirp, the type information for the=0D= callback is missing and the timer call produces a false positive with CFI= .=0D =0D With this patch, meson will stop if CFI is enabled with system-wide slirp= .=0D =0D In 6.1 we will introduce a new interface to slirp where the callback is=0D= passed as an enum rather than a function pointer.=0D =0D Signed-off-by: Daniele Buono =0D Message-Id: <20210304025939.9164-1-dbuono@linux.vnet.ibm.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 0436c55edf6b357ff56e2a5bf688df8636f83456=0D https://github.com/qemu/qemu/commit/0436c55edf6b357ff56e2a5bf688df8= 636f83456=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M Makefile=0D M accel/kvm/kvm-all.c=0D M block/blkdebug.c=0D M chardev/char-socket.c=0D M chardev/char.c=0D M docs/system/deprecated.rst=0D M gdbstub.c=0D M hw/i386/x86.c=0D M hw/intc/apic.c=0D M hw/scsi/lsi53c895a.c=0D M hw/scsi/scsi-bus.c=0D M hw/scsi/scsi-disk.c=0D M hw/scsi/scsi-generic.c=0D M hw/scsi/virtio-scsi.c=0D M hw/scsi/vmw_pvscsi.c=0D M include/hw/elf_ops.h=0D M include/hw/scsi/scsi.h=0D M include/qemu/config-file.h=0D M include/scsi/utils.h=0D M meson.build=0D M qemu-options.hx=0D M qga/vss-win32/meson.build=0D M qom/object_interfaces.c=0D M scsi/qemu-pr-helper.c=0D M scsi/utils.c=0D M softmmu/vl.c=0D M target/i386/kvm/kvm.c=0D M tests/fp/meson.build=0D M tests/meson.build=0D M tests/qtest/meson.build=0D M trace/control.c=0D M util/qemu-config.c=0D M util/qemu-option.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream'= into staging=0D =0D * fix tracing vs -daemonize (Daniel)=0D * detect invalid CFI configuration (Daniele)=0D * 32-bit PVH fix (David)=0D * forward SCSI passthrough host-status to the SCSI HBA (Hannes)=0D * detect ill-formed id in QMP object-add (Kevin)=0D * miscellaneous bugfixes and cleanups (Keqian, Kostiantyn, myself, Peng L= iang)=0D * add nodelay option for chardev (myself)=0D * deprecate -M kernel-irqchip=3Doff on x86 (myself)=0D * keep .d files (myself)=0D * Fix -trace file (myself)=0D =0D # gpg: Signature made Sat 06 Mar 2021 10:43:12 GMT=0D # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7A= E83=0D # gpg: issuer "pbonzini@redhat.com"=0D # gpg: Good signature from "Paolo Bonzini " [full]=0D # gpg: aka "Paolo Bonzini " [full]=0D= # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 = 69B1=0D # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 = AE83=0D =0D * remotes/bonzini-gitlab/tags/for-upstream: (23 commits)=0D meson: Stop if cfi is enabled with system slirp=0D trace: skip qemu_set_log_filename if no "-D" option was passed=0D trace: fix "-trace file=3D..."=0D meson: adjust timeouts for some slower tests=0D build-sys: invoke ninja with -d keepdepfile=0D qemu-option: do not suggest using the delay option=0D scsi: move host_status handling into SCSI drivers=0D scsi: inline sg_io_sense_from_errno() into the callers.=0D scsi-generic: do not snoop the output of failed commands=0D scsi: Add mapping for generic SCSI_HOST status to sense codes=0D scsi: Rename linux-specific SG_ERR codes to generic SCSI_HOST error cod= es=0D qemu-config: add error propagation to qemu_config_parse=0D x86/pvh: extract only 4 bytes of start address for 32 bit kernels=0D elf_ops: correct loading of 32 bit PVH kernel=0D lsilogic: Use PCIDevice::exit instead of DeviceState::unrealize=0D accel: kvm: Add aligment assert for kvm_log_clear_one_slot=0D accel: kvm: Fix memory waste under mismatch page size=0D vl.c: do not execute trace_init_backends() before daemonizing=0D qom: Check for wellformed id in user_creatable_add_type()=0D chardev: add nodelay option=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/138d2931979c...0436c55edf6b= =0D From MAILER-DAEMON Mon Mar 08 10:45:51 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJI4s-0001W1-Vu for mharc-qemu-commits@gnu.org; Mon, 08 Mar 2021 10:45:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:56664) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJI4r-0001TI-CD for qemu-commits@nongnu.org; Mon, 08 Mar 2021 10:45:49 -0500 Received: from out-22.smtp.github.com ([192.30.252.205]:42425 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJI4n-0001RD-7F for qemu-commits@nongnu.org; Mon, 08 Mar 2021 10:45:48 -0500 Received: from github.com (hubbernetes-node-12bad67.ac4-iad.github.net [10.52.200.86]) by smtp.github.com (Postfix) with ESMTPA id 7CDEE56006E for ; Mon, 8 Mar 2021 07:45:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615218344; bh=ywarelGbmv12IEihwjiuG5T0Word9n747r2pvmiXxZc=; h=Date:From:To:Subject:From; b=tnswVqeGhGOHNLp+Oo6Ez9zqa6L7jicGo7PiJvx3DlckjV330lwmsfUHUxyOSALc3 29gKeKp1VwwJNm/x1SIzQ9DUEVu8Yc2YiAXKQikGn565L2oFILLB2TJoWBwDHM9eou JxMtpay/sIRUCgA+ms+rj45oBtGlvK/62XVI6V1o= Date: Mon, 08 Mar 2021 07:45:44 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] c6986f: KVM: x86: do not fail if software breakpoint has a... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Mar 2021 15:45:49 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: c6986f16a7022ccfb73d91bc7676c8e1d15e5342=0D https://github.com/qemu/qemu/commit/c6986f16a7022ccfb73d91bc7676c8e= 1d15e5342=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/i386/kvm/kvm.c=0D =0D Log Message:=0D -----------=0D KVM: x86: do not fail if software breakpoint has already been removed=0D= =0D If kvm_arch_remove_sw_breakpoint finds that a software breakpoint does no= t=0D have an INT3 instruction, it fails. This can happen if one sets a=0D software breakpoint in a kernel module and then reloads it. gdb then=0D thinks the breakpoint cannot be deleted and there is no way to add it=0D back.=0D =0D Suggested-by: Maxim Levitsky =0D Reviewed-by: Maxim Levitsky =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 2c933ac6a883606b85f8cf271bfb40379d077e97=0D https://github.com/qemu/qemu/commit/2c933ac6a883606b85f8cf271bfb403= 79d077e97=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M hw/intc/apic.c=0D =0D Log Message:=0D -----------=0D KVM: x86: deprecate -M kernel-irqchip=3Doff except for -M isapc=0D =0D The userspace local APIC is basically untested and does not support many=0D= features such as TSC deadline timer, x2APIC or PV spinlocks. On the=0D other hand, the PIT and IOAPIC are okay as they are not tied to=0D the processor and are tested with -M kernel-irqchip=3Dsplit.=0D =0D Therefore, deprecate the local APIC and, with it, limit=0D -M kernel-irqchip=3Doff to the ISA PC machine type, which does not=0D have a local APIC at all.=0D =0D Reviewed-by: Maxim Levitsky =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 9f34101db00eabd8f424e98b481c2394e6509198=0D https://github.com/qemu/qemu/commit/9f34101db00eabd8f424e98b481c239= 4e6509198=0D Author: Kostiantyn Kostiuk =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M qga/vss-win32/meson.build=0D =0D Log Message:=0D -----------=0D qga-vss: Use dynamic linking for GLib=0D =0D The current GLib version implements the DllMain function. DllMain is also= =0D present in the provider.cpp code. So in the case of static linking, the=0D= DllMain redefinition error occurs. For now, just switch to dynamic linkin= g=0D and revert this patch when the issue will be solved.=0D =0D See Glib issue for more details https://gitlab.gnome.org/GNOME/glib/-/iss= ues/692=0D =0D Signed-off-by: Kostiantyn Kostiuk =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: a9b1315f86d9323587b340bd3bf83b9d66a55563=0D https://github.com/qemu/qemu/commit/a9b1315f86d9323587b340bd3bf83b9= d66a55563=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M chardev/char-socket.c=0D M chardev/char.c=0D M gdbstub.c=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D chardev: add nodelay option=0D =0D The "delay" option was introduced as a way to enable Nagle's algorithm=0D= with ",nodelay". Since the short form for boolean options has now been=0D= deprecated, introduce a more properly named "nodelay" option. The "delay= "=0D option remains as an undocumented option.=0D =0D "delay" and "nodelay" are mutually exclusive. Because the check is=0D done at consumption time, the code also rejects them if one of the=0D two is specified via -set.=0D =0D Based-on: <20210226080526.651705-1-pbonzini@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 0bd5a2eb7927189c40ca5394079b1c0e88cea7cb=0D https://github.com/qemu/qemu/commit/0bd5a2eb7927189c40ca5394079b1c0= e88cea7cb=0D Author: Kevin Wolf =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Check for wellformed id in user_creatable_add_type()=0D =0D Most code paths for creating a user creatable object go through=0D QemuOpts, which ensures that the provided 'id' option is actually a=0D valid identifier.=0D =0D However, there are some code paths that don't go through QemuOpts:=0D qemu-storage-daemon --object (since commit 8db1efd3) and QMP object-add=0D= (since it was first introduced in commit cff8b2c6). We need to have the=0D= same validity check for those, too.=0D =0D This adds the check and makes it print the same error message as=0D QemuOpts on failure.=0D =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210302171623.49709-1-kwolf@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 10b6ee1616f984c1889d0851226a9ff14b35ac58=0D https://github.com/qemu/qemu/commit/10b6ee1616f984c1889d0851226a9ff= 14b35ac58=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D vl.c: do not execute trace_init_backends() before daemonizing=0D =0D Commit v5.2.0-190-g0546c0609c ("vl: split various early command line=0D options to a separate function") moved the trace backend init code to=0D the qemu_process_early_options(). Which is now being called before=0D os_daemonize() via qemu_maybe_daemonize().=0D =0D Turns out that this change of order causes a problem when executing=0D QEMU in daemon mode and with CONFIG_TRACE_SIMPLE. The trace thread=0D is now being created by the parent, and the parent is left waiting for=0D= a trace file flush that was registered via st_init(). The result is=0D that the parent process never exits.=0D =0D To reproduce, fire up a QEMU process with -daemonize and with=0D CONFIG_TRACE_SIMPLE enabled. Two QEMU process will be left in the=0D host:=0D =0D $ sudo ./x86_64-softmmu/qemu-system-x86_64 -S -no-user-config -nodefaults= \=0D -nographic -machine none,accel=3Dkvm:tcg -daemonize=0D =0D $ ps axf | grep qemu=0D 529710 pts/3 S+ 0:00 | \_ grep --color=3Dauto qemu=0D 529697 ? Ssl 0:00 \_ ./x86_64-softmmu/qemu-system-x86_64 -S -= no-user-config -nodefaults -nographic -machine none,accel=3Dkvm:tcg -daem= onize=0D 529699 ? Sl 0:00 \_ ./x86_64-softmmu/qemu-system-x86_64 = -S -no-user-config -nodefaults -nographic -machine none,accel=3Dkvm:tcg -= daemonize=0D =0D The parent thread is hang in flush_trace_file:=0D =0D $ sudo gdb ./x86_64-softmmu/qemu-system-x86_64 529697=0D (..)=0D (gdb) bt=0D #0 0x00007f9dac6a137d in syscall () at /lib64/libc.so.6=0D #1 0x00007f9dacc3c4f3 in g_cond_wait () at /lib64/libglib-2.0.so.0=0D #2 0x0000555d12f952da in flush_trace_file (wait=3Dtrue) at ../trace/sim= ple.c:140=0D #3 0x0000555d12f95b4c in st_flush_trace_buffer () at ../trace/simple.c:= 383=0D #4 0x00007f9dac5e43a7 in __run_exit_handlers () at /lib64/libc.so.6=0D #5 0x00007f9dac5e4550 in on_exit () at /lib64/libc.so.6=0D #6 0x0000555d12d454de in os_daemonize () at ../os-posix.c:255=0D #7 0x0000555d12d0bd5c in qemu_maybe_daemonize (pid_file=3D0x0) at ../so= ftmmu/vl.c:2408=0D #8 0x0000555d12d0e566 in qemu_init (argc=3D8, argv=3D0x7fffc594d9b8, en= vp=3D0x7fffc594da00) at ../softmmu/vl.c:3459=0D #9 0x0000555d128edac1 in main (argc=3D8, argv=3D0x7fffc594d9b8, envp=3D= 0x7fffc594da00) at ../softmmu/main.c:49=0D (gdb)=0D =0D Aside from the 'zombie' process in the host, this is directly impacting=0D= Libvirt. Libvirt waits for the parent process to exit to be sure that the= =0D QMP monitor is available in the daemonized process to fetch QEMU=0D capabilities, and as is now Libvirt hangs at daemon start waiting=0D for the parent thread to exit.=0D =0D The fix is simple: just move the trace backend related code back to=0D be executed after daemonizing.=0D =0D Fixes: 0546c0609cb5a8d90c1cbac8e0d64b5a048bbb19=0D Reviewed-by: Paolo Bonzini =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210105181437.538366-2-danielhb413@gmail.com>=0D Acked-by: Stefan Hajnoczi =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: e0a8f99355c32b48c9ef867127075b5267ae23d8=0D https://github.com/qemu/qemu/commit/e0a8f99355c32b48c9ef867127075b5= 267ae23d8=0D Author: Keqian Zhu =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M accel/kvm/kvm-all.c=0D =0D Log Message:=0D -----------=0D accel: kvm: Fix memory waste under mismatch page size=0D =0D When handle dirty log, we face qemu_real_host_page_size and=0D TARGET_PAGE_SIZE. The first one is the granule of KVM dirty=0D bitmap, and the second one is the granule of QEMU dirty bitmap.=0D =0D As qemu_real_host_page_size >=3D TARGET_PAGE_SIZE (kvm_init()=0D enforced it), misuse TARGET_PAGE_SIZE to init kvmslot dirty_bmap=0D may waste memory. For example, when qemu_real_host_page_size is=0D 64K and TARGET_PAGE_SIZE is 4K, it wastes 93.75% (15/16) memory.=0D =0D Signed-off-by: Keqian Zhu =0D Reviewed-by: Andrew Jones =0D Reviewed-by: Peter Xu =0D Message-Id: <20201217014941.22872-2-zhukeqian1@huawei.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 3920552846e881bafa9f9aad0bb1a6eef874d7fb=0D https://github.com/qemu/qemu/commit/3920552846e881bafa9f9aad0bb1a6e= ef874d7fb=0D Author: Keqian Zhu =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M accel/kvm/kvm-all.c=0D =0D Log Message:=0D -----------=0D accel: kvm: Add aligment assert for kvm_log_clear_one_slot=0D =0D The parameters start and size are transfered from QEMU memory=0D emulation layer. It can promise that they are TARGET_PAGE_SIZE=0D aligned. However, KVM needs they are qemu_real_page_size aligned.=0D =0D Though no caller breaks this aligned requirement currently, we'd=0D better add an explicit assert to avoid future breaking.=0D =0D Signed-off-by: Keqian Zhu =0D Acked-by: Peter Xu =0D Reviewed-by: Andrew Jones =0D Message-Id: <20201217014941.22872-3-zhukeqian1@huawei.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: faabca42cc4ff51110116dfe44d420c668b4d8d8=0D https://github.com/qemu/qemu/commit/faabca42cc4ff51110116dfe44d420c= 668b4d8d8=0D Author: Peng Liang =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/lsi53c895a.c=0D =0D Log Message:=0D -----------=0D lsilogic: Use PCIDevice::exit instead of DeviceState::unrealize=0D =0D PCI_DEVICE has overwritten DeviceState::unrealize (pci_qdev_unrealize).=0D= However, LSI53C895A, which is a subclass of PCI_DEVICE, overwrites it=0D again and doesn't save the parent's implementation so the PCI_DEVICE's=0D= implementation of DeviceState::unrealize will never be called when=0D unrealize a LSI53C895A device. And it will lead to memory leak and=0D unplug failure.=0D =0D For a PCI device, it's better to implement PCIDevice::exit instead of=0D DeviceState::unrealize. So let's change to use PCIDevice::exit.=0D =0D Fixes: a8632434c7e9 ("lsi: implement I/O memory space for Memory Move ins= tructions")=0D Cc: qemu-stable@nongnu.org=0D Signed-off-by: Peng Liang =0D Message-Id: <20210302133016.1221081-1-liangpeng10@huawei.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 64d70277114b069579c96e6daf83922b9eacc383=0D https://github.com/qemu/qemu/commit/64d70277114b069579c96e6daf83922= b9eacc383=0D Author: David Edmondson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M include/hw/elf_ops.h=0D =0D Log Message:=0D -----------=0D elf_ops: correct loading of 32 bit PVH kernel=0D =0D Because sizeof(struct elf64_note) =3D=3D sizeof(struct elf32_note),=0D attempting to use the size of the currently defined struct elf_note as=0D= a discriminator for whether the object being loaded is 64 bit in=0D load_elf() fails.=0D =0D Instead, take advantage of the existing glue parameter SZ, which is=0D defined as 32 or 64 in the respective variants of load_elf().=0D =0D Fixes: 696aa04c84c6 ("elf-ops.h: Add get_elf_note_type()")=0D Signed-off-by: David Edmondson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Stefano Garzarella =0D Message-Id: <20210302090315.3031492-2-david.edmondson@oracle.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: e20e182ea0ab5c16557603f457fe0db445b63726=0D https://github.com/qemu/qemu/commit/e20e182ea0ab5c16557603f457fe0db= 445b63726=0D Author: David Edmondson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/i386/x86.c=0D =0D Log Message:=0D -----------=0D x86/pvh: extract only 4 bytes of start address for 32 bit kernels=0D =0D When loading the PVH start address from a 32 bit ELF note, extract=0D only the appropriate number of bytes.=0D =0D Fixes: ab969087da65 ("pvh: Boot uncompressed kernel using direct boot ABI= ")=0D Signed-off-by: David Edmondson =0D Reviewed-by: Stefano Garzarella =0D Message-Id: <20210302090315.3031492-3-david.edmondson@oracle.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: f7544edcd32e602af1aae86714dc7c32350d5d7c=0D https://github.com/qemu/qemu/commit/f7544edcd32e602af1aae86714dc7c3= 2350d5d7c=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M block/blkdebug.c=0D M include/qemu/config-file.h=0D M softmmu/vl.c=0D M util/qemu-config.c=0D =0D Log Message:=0D -----------=0D qemu-config: add error propagation to qemu_config_parse=0D =0D This enables some simplification of vl.c via error_fatal, and improves=0D= error messages. Before:=0D =0D $ ./qemu-system-x86_64 -readconfig .=0D qemu-system-x86_64: error reading file=0D qemu-system-x86_64: -readconfig .: read config .: Invalid argument=0D $ /usr/libexec/qemu-kvm -readconfig foo=0D qemu-kvm: -readconfig foo: read config foo: No such file or directory=0D= =0D After:=0D =0D $ ./qemu-system-x86_64 -readconfig .=0D qemu-system-x86_64: -readconfig .: Cannot read config file: Is a direct= ory=0D $ ./qemu-system-x86_64 -readconfig foo=0D qemu-system-x86_64: -readconfig foo: Could not open 'foo': No such file= or directory=0D =0D Signed-off-by: Paolo Bonzini =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Markus Armbruster =0D Message-Id: <20210226170816.231173-1-pbonzini@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 41af878b96582fc8c83303ab8921e40468403702=0D https://github.com/qemu/qemu/commit/41af878b96582fc8c83303ab8921e40= 468403702=0D Author: Hannes Reinecke =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M include/scsi/utils.h=0D M scsi/utils.c=0D =0D Log Message:=0D -----------=0D scsi: Rename linux-specific SG_ERR codes to generic SCSI_HOST error cod= es=0D =0D We really should make a distinction between legitimate sense codes=0D (ie if one is running against an emulated block device or for=0D pass-through sense codes), and the intermediate errors generated=0D during processing of the command, which really are not sense codes=0D but refer to some specific internal status. And this internal=0D state is not necessarily linux-specific, but rather can refer to=0D the qemu implementation itself.=0D So rename the linux-only SG_ERR codes to SCSI_HOST codes and make=0D them available generally.=0D =0D Signed-off-by: Hannes Reinecke =0D Message-Id: <20201116184041.60465-5-hare@suse.de>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: db66a15cb80f09da24a5311a3f3b8f0c1835bf71=0D https://github.com/qemu/qemu/commit/db66a15cb80f09da24a5311a3f3b8f0= c1835bf71=0D Author: Hannes Reinecke =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M include/scsi/utils.h=0D M scsi/utils.c=0D =0D Log Message:=0D -----------=0D scsi: Add mapping for generic SCSI_HOST status to sense codes=0D =0D As we don't have a driver-specific mapping (yet) we should provide=0D for a detailed mapping from host_status to SCSI sense codes.=0D =0D Signed-off-by: Hannes Reinecke =0D Message-Id: <20201116184041.60465-6-hare@suse.de>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 9738c657208800298a7d68272b861fb2dc49fee1=0D https://github.com/qemu/qemu/commit/9738c657208800298a7d68272b861fb= 2dc49fee1=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-generic.c=0D =0D Log Message:=0D -----------=0D scsi-generic: do not snoop the output of failed commands=0D =0D If a READ CAPACITY command would fail, for example s->qdev.blocksize woul= d be=0D set to zero and cause a division by zero on the next use.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: a108557bbff8a3f44233982f015f996426411be8=0D https://github.com/qemu/qemu/commit/a108557bbff8a3f44233982f015f996= 426411be8=0D Author: Hannes Reinecke =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D M hw/scsi/scsi-generic.c=0D M include/scsi/utils.h=0D M scsi/qemu-pr-helper.c=0D M scsi/utils.c=0D =0D Log Message:=0D -----------=0D scsi: inline sg_io_sense_from_errno() into the callers.=0D =0D Currently sg_io_sense_from_errno() converts the two input parameters=0D 'errno' and 'io_hdr' into sense code and SCSI status. Having=0D split the function off into scsi_sense_from_errno() and=0D scsi_sense_from_host_status(), both of which are available generically,=0D= we now inline the logic in the callers so that scsi-disk and=0D scsi-generic will be able to pass host_status to the HBA.=0D =0D Signed-off-by: Hannes Reinecke =0D Message-Id: <20201116184041.60465-7-hare@suse.de>=0D [Put together from "scsi-disk: Add sg_io callback to evaluate status"=0D and what remains of "scsi: split sg_io_sense_from_errno() in two functio= ns",=0D with many other fixes. - Paolo]=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: f3126d65b393c015e8f87763fdccee99bb1119af=0D https://github.com/qemu/qemu/commit/f3126d65b393c015e8f87763fdccee9= 9bb1119af=0D Author: Hannes Reinecke =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-bus.c=0D M hw/scsi/scsi-disk.c=0D M hw/scsi/scsi-generic.c=0D M hw/scsi/virtio-scsi.c=0D M hw/scsi/vmw_pvscsi.c=0D M include/hw/scsi/scsi.h=0D =0D Log Message:=0D -----------=0D scsi: move host_status handling into SCSI drivers=0D =0D Some SCSI drivers like virtio have an internal mapping for the=0D host_status. This patch moves the host_status translation into=0D the SCSI drivers to allow those drivers to set up the correct=0D values.=0D =0D Signed-off-by: Hannes Reinecke .=0D [Added default handling to avoid touching all drivers. - Paolo]=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: fe636424caabb4e8b5b96d8a994f58e321bd71d9=0D https://github.com/qemu/qemu/commit/fe636424caabb4e8b5b96d8a994f58e= 321bd71d9=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M util/qemu-option.c=0D =0D Log Message:=0D -----------=0D qemu-option: do not suggest using the delay option=0D =0D The "delay" option was a hack that was introduced to allow writing "nodel= ay".=0D We are adding a "nodelay" option to be used as "nodelay=3Don", so recomme= nd it=0D instead of "delay".=0D =0D This is quite ugly, but a proper deprecation of "delay"=0D cannot be done if QEMU starts suggesting it. Since it's the=0D only case I opted for this very much ad-hoc patch.=0D =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: ff012d9a52ea2ee9223ad5c78d19c0c6b6898690=0D https://github.com/qemu/qemu/commit/ff012d9a52ea2ee9223ad5c78d19c0c= 6b6898690=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M Makefile=0D =0D Log Message:=0D -----------=0D build-sys: invoke ninja with -d keepdepfile=0D =0D After reading the dependency file, ninja just deletes it, in the name=0D of cleanliness I guess. However this complicates debugging unnecessarily= =0D compared to good old "-include *.d". Use the keepdepfile debugging=0D option to make it easier to see what is going on.=0D =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210215122103.63933-1-pbonzini@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: dc1d91ac567c49cf07d8312c97b4a02e25047d50=0D https://github.com/qemu/qemu/commit/dc1d91ac567c49cf07d8312c97b4a02= e25047d50=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tests/fp/meson.build=0D M tests/meson.build=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D meson: adjust timeouts for some slower tests=0D =0D Adjust the timeouts for the benchmarks (Meson 0.57 allows 0 to mean=0D infinite) and for the longest running tests. These are the=0D times that I measured and the corresponding timeouts. For generic=0D qtests, the target that reported the longest runtime is included.=0D =0D unit tests:=0D test-crypto-tlscredsx509 13.15s 45s=0D test-crypto-tlssession 14.12s 45s=0D =0D qtests:=0D qos-test 21.26s 60s (i386)=0D ahci-test 22.18s 60s=0D pxe-test 26.51s 60s=0D boot-serial-test 28.02s 60s (sparc)=0D prom-env-test 28.86s 60s=0D bios-tables-test 50.17s 120s (aarch64)=0D test-hmp 57.15s 120s (aarch64)=0D npcm7xx_pwm-test 71.27s 150s=0D migration-test 97.09s 150s (aarch64)=0D qom-test 139.20s 240s (aarch64)=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 9f45a641097b0a54c673fe3399c7a8ccb6f06af1=0D https://github.com/qemu/qemu/commit/9f45a641097b0a54c673fe3399c7a8c= cb6f06af1=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M trace/control.c=0D =0D Log Message:=0D -----------=0D trace: fix "-trace file=3D..."=0D =0D Because trace_opt_parse always deletes the options it has parsed,=0D trace_init_file's call to qemu_find_opts_singleton always=0D creates an empty -trace option group. Therefore, the subsequent=0D qemu_opt_get(opts, "file") always returns NULL.=0D =0D To fix this, save the last "-trace file=3D..." option in a global=0D variable and use it later in trace_init_file.=0D =0D This is similar to what was done before commit 92eecfff32 ("trace:=0D remove argument from trace_init_file", 2020-11-11), except contained=0D within trace/control.c and without memory leaks.=0D =0D Fixes: 92eecfff32 ("trace: remove argument from trace_init_file", 2020-11= -11)=0D Cc: stefanha@redhat.com=0D Reported-by: armbru@redhat.com=0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210209145759.141231-2-pbonzini@redhat.com>=0D =0D =0D Commit: 7520c4f0847093aefa87f23113f28d5d1d574aed=0D https://github.com/qemu/qemu/commit/7520c4f0847093aefa87f23113f28d5= d1d574aed=0D Author: Paolo Bonzini =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D trace: skip qemu_set_log_filename if no "-D" option was passed=0D =0D When the "simple" backend is not active but the "log" backend is,=0D both "-trace file=3D" and "-D" will result in a call to=0D qemu_set_log_filename. Unfortunately, QEMU was also calling=0D qemu_set_log_filename if "-D" was not passed, so the "-trace=0D file=3D" option had no effect and the tracepoints went back to=0D stderr.=0D =0D Fortunately we can just skip qemu_set_log_filename in that case,=0D because the log backend will initialize itself just fine as soon=0D as qemu_set_log is called, also in qemu_process_early_options.=0D =0D Cc: stefanha@redhat.com=0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210209145759.141231-3-pbonzini@redhat.com>=0D =0D =0D Commit: c715343fd96bcf93263fda38d81af815fdb5a7fa=0D https://github.com/qemu/qemu/commit/c715343fd96bcf93263fda38d81af81= 5fdb5a7fa=0D Author: Daniele Buono =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M meson.build=0D =0D Log Message:=0D -----------=0D meson: Stop if cfi is enabled with system slirp=0D =0D For CFI, we need to compile slirp as a static library together with qemu.= =0D This is because we register slirp functions as callbacks for QEMU Timers.= =0D When using a system-wide shared libslirp, the type information for the=0D= callback is missing and the timer call produces a false positive with CFI= .=0D =0D With this patch, meson will stop if CFI is enabled with system-wide slirp= .=0D =0D In 6.1 we will introduce a new interface to slirp where the callback is=0D= passed as an enum rather than a function pointer.=0D =0D Signed-off-by: Daniele Buono =0D Message-Id: <20210304025939.9164-1-dbuono@linux.vnet.ibm.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 0436c55edf6b357ff56e2a5bf688df8636f83456=0D https://github.com/qemu/qemu/commit/0436c55edf6b357ff56e2a5bf688df8= 636f83456=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M Makefile=0D M accel/kvm/kvm-all.c=0D M block/blkdebug.c=0D M chardev/char-socket.c=0D M chardev/char.c=0D M docs/system/deprecated.rst=0D M gdbstub.c=0D M hw/i386/x86.c=0D M hw/intc/apic.c=0D M hw/scsi/lsi53c895a.c=0D M hw/scsi/scsi-bus.c=0D M hw/scsi/scsi-disk.c=0D M hw/scsi/scsi-generic.c=0D M hw/scsi/virtio-scsi.c=0D M hw/scsi/vmw_pvscsi.c=0D M include/hw/elf_ops.h=0D M include/hw/scsi/scsi.h=0D M include/qemu/config-file.h=0D M include/scsi/utils.h=0D M meson.build=0D M qemu-options.hx=0D M qga/vss-win32/meson.build=0D M qom/object_interfaces.c=0D M scsi/qemu-pr-helper.c=0D M scsi/utils.c=0D M softmmu/vl.c=0D M target/i386/kvm/kvm.c=0D M tests/fp/meson.build=0D M tests/meson.build=0D M tests/qtest/meson.build=0D M trace/control.c=0D M util/qemu-config.c=0D M util/qemu-option.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream'= into staging=0D =0D * fix tracing vs -daemonize (Daniel)=0D * detect invalid CFI configuration (Daniele)=0D * 32-bit PVH fix (David)=0D * forward SCSI passthrough host-status to the SCSI HBA (Hannes)=0D * detect ill-formed id in QMP object-add (Kevin)=0D * miscellaneous bugfixes and cleanups (Keqian, Kostiantyn, myself, Peng L= iang)=0D * add nodelay option for chardev (myself)=0D * deprecate -M kernel-irqchip=3Doff on x86 (myself)=0D * keep .d files (myself)=0D * Fix -trace file (myself)=0D =0D # gpg: Signature made Sat 06 Mar 2021 10:43:12 GMT=0D # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7A= E83=0D # gpg: issuer "pbonzini@redhat.com"=0D # gpg: Good signature from "Paolo Bonzini " [full]=0D # gpg: aka "Paolo Bonzini " [full]=0D= # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 = 69B1=0D # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 = AE83=0D =0D * remotes/bonzini-gitlab/tags/for-upstream: (23 commits)=0D meson: Stop if cfi is enabled with system slirp=0D trace: skip qemu_set_log_filename if no "-D" option was passed=0D trace: fix "-trace file=3D..."=0D meson: adjust timeouts for some slower tests=0D build-sys: invoke ninja with -d keepdepfile=0D qemu-option: do not suggest using the delay option=0D scsi: move host_status handling into SCSI drivers=0D scsi: inline sg_io_sense_from_errno() into the callers.=0D scsi-generic: do not snoop the output of failed commands=0D scsi: Add mapping for generic SCSI_HOST status to sense codes=0D scsi: Rename linux-specific SG_ERR codes to generic SCSI_HOST error cod= es=0D qemu-config: add error propagation to qemu_config_parse=0D x86/pvh: extract only 4 bytes of start address for 32 bit kernels=0D elf_ops: correct loading of 32 bit PVH kernel=0D lsilogic: Use PCIDevice::exit instead of DeviceState::unrealize=0D accel: kvm: Add aligment assert for kvm_log_clear_one_slot=0D accel: kvm: Fix memory waste under mismatch page size=0D vl.c: do not execute trace_init_backends() before daemonizing=0D qom: Check for wellformed id in user_creatable_add_type()=0D chardev: add nodelay option=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/138d2931979c...0436c55edf6b= =0D From MAILER-DAEMON Mon Mar 08 10:51:34 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJIAQ-0007kB-5g for mharc-qemu-commits@gnu.org; Mon, 08 Mar 2021 10:51:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:58138) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJIAO-0007gL-5X for qemu-commits@nongnu.org; Mon, 08 Mar 2021 10:51:32 -0500 Received: from out-26.smtp.github.com ([192.30.252.209]:47139 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJIAL-000409-8v for qemu-commits@nongnu.org; Mon, 08 Mar 2021 10:51:31 -0500 Received: from github.com (hubbernetes-node-597a55e.ash1-iad.github.net [10.56.115.45]) by smtp.github.com (Postfix) with ESMTPA id 8F2385E0704 for ; Mon, 8 Mar 2021 07:51:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615218688; bh=Y2tHnHbdyFX9QwN+16nojOTGkGMjLA2azgwWlFSqp3g=; h=Date:From:To:Subject:From; b=GpIoH10mJeqf12hDxYxAXqCU3HaWGrupzfYiS+v9aLezHI5Uh4W+f3Yj6x7VRcp3J YQUqn57JxoEi2nYOuFbzkyejRF7EEtCP8b/J1+shM0KDFm7uL5HCUOqILpTNprucCl rTLtDXKZbJrF3O57xvtSRA1LlkxWyzoCoeCEDysU= Date: Mon, 08 Mar 2021 07:51:28 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 8d2b06: target/sh4: Fix code style for checkpatch.pl X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Mar 2021 15:51:32 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 8d2b06fbc2967b0e53d86e24e572fb58dcb59ad7=0D https://github.com/qemu/qemu/commit/8d2b06fbc2967b0e53d86e24e572fb5= 8dcb59ad7=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/sh4/helper.c=0D =0D Log Message:=0D -----------=0D target/sh4: Fix code style for checkpatch.pl=0D =0D We are going to move this code, fix its style first.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210127232151.3523581-2-f4bug@amsat.org>=0D =0D =0D Commit: 53e047c2db0aba27e873c99bc789120157548203=0D https://github.com/qemu/qemu/commit/53e047c2db0aba27e873c99bc789120= 157548203=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/sh4/helper.c=0D =0D Log Message:=0D -----------=0D target/sh4: Replace magic value by MMUAccessType definitions=0D =0D Replace the 0/1/2 magic values by the corresponding MMUAccessType.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210127232151.3523581-3-f4bug@amsat.org>=0D =0D =0D Commit: 31ffda71338348915f54e997edc12d9e30425438=0D https://github.com/qemu/qemu/commit/31ffda71338348915f54e997edc12d9= e30425438=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/sh4/helper.c=0D =0D Log Message:=0D -----------=0D target/sh4: Remove unused 'int access_type' argument=0D =0D get_mmu_address() and get_physical_address() don't use their=0D 'int access_type' argument: remove it along with ACCESS_INT=0D in superh_cpu_tlb_fill().=0D =0D Suggested-by: Richard Henderson =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: be617b44fef9747f0529234ad4d1dfbc88971e30=0D https://github.com/qemu/qemu/commit/be617b44fef9747f0529234ad4d1dfb= c88971e30=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/sh4/helper.c=0D =0D Log Message:=0D -----------=0D target/sh4: Let get_physical_address() use MMUAccessType access_type=0D= =0D superh_cpu_tlb_fill() already provides a access_type variable of=0D type MMUAccessType, and it is passed along, but casted as integer=0D and renamed 'rw'.=0D Simply replace 'int rw' by 'MMUAccessType access_type'.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210127232151.3523581-5-f4bug@amsat.org>=0D =0D =0D Commit: f32393ac0abe33525d9496737fdb37e9016256ba=0D https://github.com/qemu/qemu/commit/f32393ac0abe33525d9496737fdb37e= 9016256ba=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/sh4/cpu.h=0D =0D Log Message:=0D -----------=0D target/sh4: Remove unused definitions=0D =0D Remove these confusing and unused definitions.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210127232151.3523581-6-f4bug@amsat.org>=0D =0D =0D Commit: d044adc21ac6088a414bc6a32a598d9ad89f8016=0D https://github.com/qemu/qemu/commit/d044adc21ac6088a414bc6a32a598d9= ad89f8016=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/block/tc58128.c=0D M include/hw/sh4/sh.h=0D =0D Log Message:=0D -----------=0D hw/sh4: Add missing license=0D =0D This code was introduced in commit 27c7ca7e775,=0D ("SHIX board emulation (Samuel Tardieu)"). Use=0D the same license.=0D =0D Cc: Samuel Tardieu =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-2-f4bug@amsat.org>=0D =0D =0D Commit: c3c7153f95ed48c0491a70d3be1f11990752fd04=0D https://github.com/qemu/qemu/commit/c3c7153f95ed48c0491a70d3be1f119= 90752fd04=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/sh4/Kconfig=0D =0D Log Message:=0D -----------=0D hw/sh4: Add missing Kconfig dependency on SH7750 for the R2D board=0D =0D r2d_init() calls sh7750_init() so depends on SH7750.Harmless=0D at the moment because nothing actually uses CONFIG_SH7750=0D (hw/sh4/meson.build always compiles sh7750.c and sh7750_regnames.c=0D unconditionally).=0D =0D Fixes: 7ab58d4c841 ("sh4-softmmu.mak: express dependencies with Kconfig")= =0D Reported-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-3-f4bug@amsat.org>=0D =0D =0D Commit: 5d07a6985a80b20d5857825c6e5804ba5a2542d1=0D https://github.com/qemu/qemu/commit/5d07a6985a80b20d5857825c6e5804b= a5a2542d1=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/intc/Kconfig=0D M hw/intc/meson.build=0D M hw/sh4/Kconfig=0D =0D Log Message:=0D -----------=0D hw/intc: Introduce SH_INTC Kconfig entry=0D =0D We want to be able to use the 'SH4' config for architecture=0D specific features. Add more fine-grained selection by adding=0D a CONFIG_SH_INTC selector for the SH4 interrupt controller.=0D =0D Suggested-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-4-f4bug@amsat.org>=0D =0D =0D Commit: 7ae5c8bb6e57b08927a0f9ecae610abda0484ec6=0D https://github.com/qemu/qemu/commit/7ae5c8bb6e57b08927a0f9ecae610ab= da0484ec6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/char/Kconfig=0D M hw/char/meson.build=0D M hw/sh4/Kconfig=0D =0D Log Message:=0D -----------=0D hw/char: Introduce SH_SCI Kconfig entry=0D =0D We want to be able to use the 'SH4' config for architecture=0D specific features. Add more fine-grained selection by adding=0D a CONFIG_SH_SCI selector for the SH4 serial controller.=0D =0D Add the missing MAINTAINERS entries.=0D =0D Suggested-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-5-f4bug@amsat.org>=0D =0D =0D Commit: 25e79527a882eebdbbe8b7408d17f81a29de7d4b=0D https://github.com/qemu/qemu/commit/25e79527a882eebdbbe8b7408d17f81= a29de7d4b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/sh4/Kconfig=0D M hw/timer/Kconfig=0D M hw/timer/meson.build=0D =0D Log Message:=0D -----------=0D hw/timer: Introduce SH_TIMER Kconfig entry=0D =0D We want to be able to use the 'SH4' config for architecture=0D specific features. Add more fine-grained selection by adding=0D a CONFIG_SH_TIMER selector for the SH4 timer control unit.=0D =0D Add the missing MAINTAINERS entries.=0D =0D Suggested-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-6-f4bug@amsat.org>=0D =0D =0D Commit: 475e70bde6cbde2d38d612b19107229a4ff42f11=0D https://github.com/qemu/qemu/commit/475e70bde6cbde2d38d612b19107229= a4ff42f11=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/block/Kconfig=0D M hw/block/meson.build=0D M hw/sh4/Kconfig=0D =0D Log Message:=0D -----------=0D hw/block: Introduce TC58128 eeprom Kconfig entry=0D =0D Add more fine-grained selection by adding a CONFIG_TC58128=0D selector for the TC58128 eeprom.=0D =0D As this device is only used by the Shix machine, add an entry=0D to the proper section in MAINTAINERS.=0D =0D Suggested-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-7-f4bug@amsat.org>=0D =0D =0D Commit: c64bd101fe1c47d550d02ee19543c9e400af9258=0D https://github.com/qemu/qemu/commit/c64bd101fe1c47d550d02ee19543c9e= 400af9258=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/pci-host/Kconfig=0D M hw/pci-host/meson.build=0D A hw/pci-host/sh_pci.c=0D M hw/sh4/Kconfig=0D M hw/sh4/meson.build=0D R hw/sh4/sh_pci.c=0D =0D Log Message:=0D -----------=0D hw/pci-host: Introduce SH_PCI Kconfig entry=0D =0D We want to be able to use the 'SH4' config for architecture=0D specific features. Add more fine-grained selection by adding=0D a CONFIG_SH_PCI selector for the SH4 PCI controller.=0D Move the file with the other PCI host devices in hw/pci-host=0D and add its missing MAINTAINERS entries.=0D =0D Suggested-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-8-f4bug@amsat.org>=0D =0D =0D Commit: c64dea94bd8597697b722994cbbb91a6bd0a9f8e=0D https://github.com/qemu/qemu/commit/c64dea94bd8597697b722994cbbb91a= 6bd0a9f8e=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/sh4/Kconfig=0D =0D Log Message:=0D -----------=0D hw/sh4: Remove now unused CONFIG_SH4 from Kconfig=0D =0D As replaced the generic CONFIG_SH4 by more fine-grained=0D selectors, we can remove this now unused config variable.=0D =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-9-f4bug@amsat.org>=0D =0D =0D Commit: ef95ca038295bdf6749cbce426b281c21a08971e=0D https://github.com/qemu/qemu/commit/ef95ca038295bdf6749cbce426b281c= 21a08971e=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/sh4/sh7750_regs.h=0D =0D Log Message:=0D -----------=0D hw/sh4/sh7750_regs: Replace link to license by its full content=0D =0D This file is borrowed from the RTEMS source code, which comes=0D with a GPL-2.0-or-later license with a header exception.=0D =0D Expand the GPL-2.0-or-later license in place to not be dependent=0D on a 3rd party website. This also fix the misleading comment "The=0D license and distribution terms for this file may be found in the=0D file LICENSE in this distribution" referring to the RTEMS distribution=0D= and not to the QEMU one.=0D =0D Suggested-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Peter Maydell =0D Message-Id: <20210222185605.2714192-1-f4bug@amsat.org>=0D =0D =0D Commit: 229a834518b950d56fd1bc94923276504d0ee9d4=0D https://github.com/qemu/qemu/commit/229a834518b950d56fd1bc949232765= 04d0ee9d4=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/block/Kconfig=0D M hw/block/meson.build=0D M hw/block/tc58128.c=0D M hw/char/Kconfig=0D M hw/char/meson.build=0D M hw/intc/Kconfig=0D M hw/intc/meson.build=0D M hw/pci-host/Kconfig=0D M hw/pci-host/meson.build=0D A hw/pci-host/sh_pci.c=0D M hw/sh4/Kconfig=0D M hw/sh4/meson.build=0D M hw/sh4/sh7750_regs.h=0D R hw/sh4/sh_pci.c=0D M hw/timer/Kconfig=0D M hw/timer/meson.build=0D M include/hw/sh4/sh.h=0D M target/sh4/cpu.h=0D M target/sh4/helper.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-202103= 06' into staging=0D =0D Renesas patches queue=0D =0D - MMU prototype cleanups=0D - Clarify licenses=0D - Fine-grained Kconfig entries for SH-4 devices=0D =0D # gpg: Signature made Sat 06 Mar 2021 15:30:46 GMT=0D # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC= 0DE=0D # gpg: Good signature from "Philippe Mathieu-Daud=C3=A9 (F4BUG) " [full]=0D # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD = C0DE=0D =0D * remotes/philmd-gitlab/tags/renesas-20210306:=0D hw/sh4/sh7750_regs: Replace link to license by its full content=0D hw/sh4: Remove now unused CONFIG_SH4 from Kconfig=0D hw/pci-host: Introduce SH_PCI Kconfig entry=0D hw/block: Introduce TC58128 eeprom Kconfig entry=0D hw/timer: Introduce SH_TIMER Kconfig entry=0D hw/char: Introduce SH_SCI Kconfig entry=0D hw/intc: Introduce SH_INTC Kconfig entry=0D hw/sh4: Add missing Kconfig dependency on SH7750 for the R2D board=0D hw/sh4: Add missing license=0D target/sh4: Remove unused definitions=0D target/sh4: Let get_physical_address() use MMUAccessType access_type=0D= target/sh4: Remove unused 'int access_type' argument=0D target/sh4: Replace magic value by MMUAccessType definitions=0D target/sh4: Fix code style for checkpatch.pl=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/0436c55edf6b...229a834518b9= =0D From MAILER-DAEMON Mon Mar 08 15:08:00 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJMAa-00054R-7q for mharc-qemu-commits@gnu.org; Mon, 08 Mar 2021 15:08:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:58670) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJMAY-000505-22 for qemu-commits@nongnu.org; Mon, 08 Mar 2021 15:07:58 -0500 Received: from out-22.smtp.github.com ([192.30.252.205]:55269 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJMAV-0006WM-4f for qemu-commits@nongnu.org; Mon, 08 Mar 2021 15:07:57 -0500 Received: from github.com (hubbernetes-node-bea49b0.ac4-iad.github.net [10.52.207.42]) by smtp.github.com (Postfix) with ESMTPA id 6CADD560D77 for ; Mon, 8 Mar 2021 12:07:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615234074; bh=fnCWyBphrAZBQVE0QURGTQfJa0xagQS5/qonTZtya68=; h=Date:From:To:Subject:From; b=nV6kWACWlmZ9EC9zUVTHyqJQdskU9y2mdSorpPWomJx00ZAEWMjYKgdYL6HDi8gmx pPP2al7asRgLn+baGU5BXrQ8UYO66WjD/V8TJerbUG2Ie5pkzcQzKoT7cc5N7IeZ4H +Ce6xqn6JkiuePAnGL6MD4ia45PW6j01yo1JJeFo= Date: Mon, 08 Mar 2021 12:07:54 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 8d2b06: target/sh4: Fix code style for checkpatch.pl X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Mar 2021 20:07:58 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 8d2b06fbc2967b0e53d86e24e572fb58dcb59ad7=0D https://github.com/qemu/qemu/commit/8d2b06fbc2967b0e53d86e24e572fb5= 8dcb59ad7=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/sh4/helper.c=0D =0D Log Message:=0D -----------=0D target/sh4: Fix code style for checkpatch.pl=0D =0D We are going to move this code, fix its style first.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210127232151.3523581-2-f4bug@amsat.org>=0D =0D =0D Commit: 53e047c2db0aba27e873c99bc789120157548203=0D https://github.com/qemu/qemu/commit/53e047c2db0aba27e873c99bc789120= 157548203=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/sh4/helper.c=0D =0D Log Message:=0D -----------=0D target/sh4: Replace magic value by MMUAccessType definitions=0D =0D Replace the 0/1/2 magic values by the corresponding MMUAccessType.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210127232151.3523581-3-f4bug@amsat.org>=0D =0D =0D Commit: 31ffda71338348915f54e997edc12d9e30425438=0D https://github.com/qemu/qemu/commit/31ffda71338348915f54e997edc12d9= e30425438=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/sh4/helper.c=0D =0D Log Message:=0D -----------=0D target/sh4: Remove unused 'int access_type' argument=0D =0D get_mmu_address() and get_physical_address() don't use their=0D 'int access_type' argument: remove it along with ACCESS_INT=0D in superh_cpu_tlb_fill().=0D =0D Suggested-by: Richard Henderson =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: be617b44fef9747f0529234ad4d1dfbc88971e30=0D https://github.com/qemu/qemu/commit/be617b44fef9747f0529234ad4d1dfb= c88971e30=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/sh4/helper.c=0D =0D Log Message:=0D -----------=0D target/sh4: Let get_physical_address() use MMUAccessType access_type=0D= =0D superh_cpu_tlb_fill() already provides a access_type variable of=0D type MMUAccessType, and it is passed along, but casted as integer=0D and renamed 'rw'.=0D Simply replace 'int rw' by 'MMUAccessType access_type'.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210127232151.3523581-5-f4bug@amsat.org>=0D =0D =0D Commit: f32393ac0abe33525d9496737fdb37e9016256ba=0D https://github.com/qemu/qemu/commit/f32393ac0abe33525d9496737fdb37e= 9016256ba=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/sh4/cpu.h=0D =0D Log Message:=0D -----------=0D target/sh4: Remove unused definitions=0D =0D Remove these confusing and unused definitions.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210127232151.3523581-6-f4bug@amsat.org>=0D =0D =0D Commit: d044adc21ac6088a414bc6a32a598d9ad89f8016=0D https://github.com/qemu/qemu/commit/d044adc21ac6088a414bc6a32a598d9= ad89f8016=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/block/tc58128.c=0D M include/hw/sh4/sh.h=0D =0D Log Message:=0D -----------=0D hw/sh4: Add missing license=0D =0D This code was introduced in commit 27c7ca7e775,=0D ("SHIX board emulation (Samuel Tardieu)"). Use=0D the same license.=0D =0D Cc: Samuel Tardieu =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-2-f4bug@amsat.org>=0D =0D =0D Commit: c3c7153f95ed48c0491a70d3be1f11990752fd04=0D https://github.com/qemu/qemu/commit/c3c7153f95ed48c0491a70d3be1f119= 90752fd04=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/sh4/Kconfig=0D =0D Log Message:=0D -----------=0D hw/sh4: Add missing Kconfig dependency on SH7750 for the R2D board=0D =0D r2d_init() calls sh7750_init() so depends on SH7750.Harmless=0D at the moment because nothing actually uses CONFIG_SH7750=0D (hw/sh4/meson.build always compiles sh7750.c and sh7750_regnames.c=0D unconditionally).=0D =0D Fixes: 7ab58d4c841 ("sh4-softmmu.mak: express dependencies with Kconfig")= =0D Reported-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-3-f4bug@amsat.org>=0D =0D =0D Commit: 5d07a6985a80b20d5857825c6e5804ba5a2542d1=0D https://github.com/qemu/qemu/commit/5d07a6985a80b20d5857825c6e5804b= a5a2542d1=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/intc/Kconfig=0D M hw/intc/meson.build=0D M hw/sh4/Kconfig=0D =0D Log Message:=0D -----------=0D hw/intc: Introduce SH_INTC Kconfig entry=0D =0D We want to be able to use the 'SH4' config for architecture=0D specific features. Add more fine-grained selection by adding=0D a CONFIG_SH_INTC selector for the SH4 interrupt controller.=0D =0D Suggested-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-4-f4bug@amsat.org>=0D =0D =0D Commit: 7ae5c8bb6e57b08927a0f9ecae610abda0484ec6=0D https://github.com/qemu/qemu/commit/7ae5c8bb6e57b08927a0f9ecae610ab= da0484ec6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/char/Kconfig=0D M hw/char/meson.build=0D M hw/sh4/Kconfig=0D =0D Log Message:=0D -----------=0D hw/char: Introduce SH_SCI Kconfig entry=0D =0D We want to be able to use the 'SH4' config for architecture=0D specific features. Add more fine-grained selection by adding=0D a CONFIG_SH_SCI selector for the SH4 serial controller.=0D =0D Add the missing MAINTAINERS entries.=0D =0D Suggested-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-5-f4bug@amsat.org>=0D =0D =0D Commit: 25e79527a882eebdbbe8b7408d17f81a29de7d4b=0D https://github.com/qemu/qemu/commit/25e79527a882eebdbbe8b7408d17f81= a29de7d4b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/sh4/Kconfig=0D M hw/timer/Kconfig=0D M hw/timer/meson.build=0D =0D Log Message:=0D -----------=0D hw/timer: Introduce SH_TIMER Kconfig entry=0D =0D We want to be able to use the 'SH4' config for architecture=0D specific features. Add more fine-grained selection by adding=0D a CONFIG_SH_TIMER selector for the SH4 timer control unit.=0D =0D Add the missing MAINTAINERS entries.=0D =0D Suggested-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-6-f4bug@amsat.org>=0D =0D =0D Commit: 475e70bde6cbde2d38d612b19107229a4ff42f11=0D https://github.com/qemu/qemu/commit/475e70bde6cbde2d38d612b19107229= a4ff42f11=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/block/Kconfig=0D M hw/block/meson.build=0D M hw/sh4/Kconfig=0D =0D Log Message:=0D -----------=0D hw/block: Introduce TC58128 eeprom Kconfig entry=0D =0D Add more fine-grained selection by adding a CONFIG_TC58128=0D selector for the TC58128 eeprom.=0D =0D As this device is only used by the Shix machine, add an entry=0D to the proper section in MAINTAINERS.=0D =0D Suggested-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-7-f4bug@amsat.org>=0D =0D =0D Commit: c64bd101fe1c47d550d02ee19543c9e400af9258=0D https://github.com/qemu/qemu/commit/c64bd101fe1c47d550d02ee19543c9e= 400af9258=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/pci-host/Kconfig=0D M hw/pci-host/meson.build=0D A hw/pci-host/sh_pci.c=0D M hw/sh4/Kconfig=0D M hw/sh4/meson.build=0D R hw/sh4/sh_pci.c=0D =0D Log Message:=0D -----------=0D hw/pci-host: Introduce SH_PCI Kconfig entry=0D =0D We want to be able to use the 'SH4' config for architecture=0D specific features. Add more fine-grained selection by adding=0D a CONFIG_SH_PCI selector for the SH4 PCI controller.=0D Move the file with the other PCI host devices in hw/pci-host=0D and add its missing MAINTAINERS entries.=0D =0D Suggested-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-8-f4bug@amsat.org>=0D =0D =0D Commit: c64dea94bd8597697b722994cbbb91a6bd0a9f8e=0D https://github.com/qemu/qemu/commit/c64dea94bd8597697b722994cbbb91a= 6bd0a9f8e=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/sh4/Kconfig=0D =0D Log Message:=0D -----------=0D hw/sh4: Remove now unused CONFIG_SH4 from Kconfig=0D =0D As replaced the generic CONFIG_SH4 by more fine-grained=0D selectors, we can remove this now unused config variable.=0D =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210222141514.2646278-9-f4bug@amsat.org>=0D =0D =0D Commit: ef95ca038295bdf6749cbce426b281c21a08971e=0D https://github.com/qemu/qemu/commit/ef95ca038295bdf6749cbce426b281c= 21a08971e=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M hw/sh4/sh7750_regs.h=0D =0D Log Message:=0D -----------=0D hw/sh4/sh7750_regs: Replace link to license by its full content=0D =0D This file is borrowed from the RTEMS source code, which comes=0D with a GPL-2.0-or-later license with a header exception.=0D =0D Expand the GPL-2.0-or-later license in place to not be dependent=0D on a 3rd party website. This also fix the misleading comment "The=0D license and distribution terms for this file may be found in the=0D file LICENSE in this distribution" referring to the RTEMS distribution=0D= and not to the QEMU one.=0D =0D Suggested-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Peter Maydell =0D Message-Id: <20210222185605.2714192-1-f4bug@amsat.org>=0D =0D =0D Commit: 229a834518b950d56fd1bc94923276504d0ee9d4=0D https://github.com/qemu/qemu/commit/229a834518b950d56fd1bc949232765= 04d0ee9d4=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/block/Kconfig=0D M hw/block/meson.build=0D M hw/block/tc58128.c=0D M hw/char/Kconfig=0D M hw/char/meson.build=0D M hw/intc/Kconfig=0D M hw/intc/meson.build=0D M hw/pci-host/Kconfig=0D M hw/pci-host/meson.build=0D A hw/pci-host/sh_pci.c=0D M hw/sh4/Kconfig=0D M hw/sh4/meson.build=0D M hw/sh4/sh7750_regs.h=0D R hw/sh4/sh_pci.c=0D M hw/timer/Kconfig=0D M hw/timer/meson.build=0D M include/hw/sh4/sh.h=0D M target/sh4/cpu.h=0D M target/sh4/helper.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-202103= 06' into staging=0D =0D Renesas patches queue=0D =0D - MMU prototype cleanups=0D - Clarify licenses=0D - Fine-grained Kconfig entries for SH-4 devices=0D =0D # gpg: Signature made Sat 06 Mar 2021 15:30:46 GMT=0D # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC= 0DE=0D # gpg: Good signature from "Philippe Mathieu-Daud=C3=A9 (F4BUG) " [full]=0D # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD = C0DE=0D =0D * remotes/philmd-gitlab/tags/renesas-20210306:=0D hw/sh4/sh7750_regs: Replace link to license by its full content=0D hw/sh4: Remove now unused CONFIG_SH4 from Kconfig=0D hw/pci-host: Introduce SH_PCI Kconfig entry=0D hw/block: Introduce TC58128 eeprom Kconfig entry=0D hw/timer: Introduce SH_TIMER Kconfig entry=0D hw/char: Introduce SH_SCI Kconfig entry=0D hw/intc: Introduce SH_INTC Kconfig entry=0D hw/sh4: Add missing Kconfig dependency on SH7750 for the R2D board=0D hw/sh4: Add missing license=0D target/sh4: Remove unused definitions=0D target/sh4: Let get_physical_address() use MMUAccessType access_type=0D= target/sh4: Remove unused 'int access_type' argument=0D target/sh4: Replace magic value by MMUAccessType definitions=0D target/sh4: Fix code style for checkpatch.pl=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/0436c55edf6b...229a834518b9= =0D From MAILER-DAEMON Mon Mar 08 15:13:29 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJMFt-0006kS-35 for mharc-qemu-commits@gnu.org; Mon, 08 Mar 2021 15:13:29 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59480) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJMFq-0006k0-Pw for qemu-commits@nongnu.org; Mon, 08 Mar 2021 15:13:26 -0500 Received: from out-18.smtp.github.com ([192.30.252.201]:44281 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJMFn-0000el-WA for qemu-commits@nongnu.org; Mon, 08 Mar 2021 15:13:26 -0500 Received: from github.com (hubbernetes-node-10a0ca5.va3-iad.github.net [10.48.120.81]) by smtp.github.com (Postfix) with ESMTPA id 453DE3404A5 for ; Mon, 8 Mar 2021 12:13:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615234403; bh=zfpCUIFLQ6eBgzPzhHxxqyN32iv5fe/GLQmmFwGc7eo=; h=Date:From:To:Subject:From; b=Y8BISDBn2oaRL5z5QJeEWYWyH8YN2BRitnx39rqF/fFbmJiOJJPp+XqMZ+SDFzsNz J7UgC7ltuV7jrd8ZOWKifPSlbrPaY8nzu5PcDL5lpFVzZnbUdCyLylu7Q74VxBYnNM GFDWqvdG/TPRPEzAXv3E9jtE0ZxJLn+P0x+PMxHM= Date: Mon, 08 Mar 2021 12:13:23 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 707b45: tcg/aarch64: Fix constant subtraction in tcg_out_a... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Mar 2021 20:13:27 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 707b45a2475e25709f0dee00f8fdf39d346ed21e=0D https://github.com/qemu/qemu/commit/707b45a2475e25709f0dee00f8fdf39= d346ed21e=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/aarch64/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/aarch64: Fix constant subtraction in tcg_out_addsub2=0D =0D An hppa guest executing=0D =0D 0x000000000000e05c: ldil L%10000,r4=0D 0x000000000000e060: ldo 0(r4),r4=0D 0x000000000000e064: sub r3,r4,sp=0D =0D produces=0D =0D ---- 000000000000e064 000000000000e068=0D sub2_i32 tmp0,tmp4,r3,$0x1,$0x10000,$0x0=0D =0D after folding and constant propagation. Then we hit=0D =0D tcg-target.c.inc:640: tcg_out_insn_3401: Assertion `aimm <=3D 0xfff' fail= ed.=0D =0D because aimm is in fact -16, but unsigned.=0D =0D The ((bl < 0) ^ sub) condition which negates bl is incorrect and will=0D always lead to this abort. If the constant is positive, sub will make=0D= it negative; if the constant is negative, sub will keep it negative.=0D =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 6c2c7772f69bcd7e7a88308fd6aaf19debb7ada4=0D https://github.com/qemu/qemu/commit/6c2c7772f69bcd7e7a88308fd6aaf19= debb7ada4=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/aarch64/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/aarch64: Fix I3617_CMLE0=0D =0D Fix a typo in the encodeing of the cmle (zero) instruction.=0D =0D Fixes: 14e4c1e2355 ("tcg/aarch64: Add vector operations")=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: d81bad24dfea6ec0331599de1f31d822aba9dae1=0D https://github.com/qemu/qemu/commit/d81bad24dfea6ec0331599de1f31d82= 2aba9dae1=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/aarch64/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/aarch64: Fix generation of "scalar" vector operations=0D =0D For some vector operations, "1D" is not a valid type, and there=0D are separate instructions for the 64-bit scalar operation.=0D =0D Tested-by: Stefan Weil =0D Buglink: https://bugs.launchpad.net/qemu/+bug/1916112=0D Fixes: 14e4c1e2355 ("tcg/aarch64: Add vector operations")=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: dc09f047eddec8f4a1991c4f5f4a428d7aa3f2c0=0D https://github.com/qemu/qemu/commit/dc09f047eddec8f4a1991c4f5f4a428= d7aa3f2c0=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Use exec/cpu_ldst.h interfaces=0D =0D Use the provided cpu_ldst.h interfaces. This fixes the build vs=0D the unconverted uses of g2h(), adds missed memory trace events,=0D and correctly recognizes when a SIGSEGV belongs to the guest via=0D set_helper_retaddr().=0D =0D Fixes: 3e8f1628e864=0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: db6b7d0c6936cd209e3e8d95aea61ad29ceef5e6=0D https://github.com/qemu/qemu/commit/db6b7d0c6936cd209e3e8d95aea61ad= 29ceef5e6=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tcg.c=0D =0D Log Message:=0D -----------=0D tcg: Split out tcg_raise_tb_overflow=0D =0D Allow other places in tcg to restart with a smaller tb.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 0610067ec032eb7fab3c3f68ec3fea5adbf4ec40=0D https://github.com/qemu/qemu/commit/0610067ec032eb7fab3c3f68ec3fea5= adbf4ec40=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tcg.c=0D =0D Log Message:=0D -----------=0D tcg: Manage splitwx in tc_ptr_to_region_tree by hand=0D =0D The use in tcg_tb_lookup is given a random pc that comes from the pc=0D of a signal handler. Do not assert that the pointer is already within=0D= the code gen buffer at all, much less the writable mirror of it.=0D =0D Fixes: db0c51a3803=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: c764f8cc2ca6cbdd16dd6dfdce0cff0ac25559fd=0D https://github.com/qemu/qemu/commit/c764f8cc2ca6cbdd16dd6dfdce0cff0= ac25559fd=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge identical cases in generation (arithmetic opcodes)=0D =0D Use CASE_32_64 and CASE_64 to reduce ifdefs and merge=0D cases that are identical between 32-bit and 64-bit hosts.=0D =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>=0D [PMD: Split patch as 1/5]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210218232840.1760806-2-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 1e9ac76625535047ba5e5864d2f199dae502e623=0D https://github.com/qemu/qemu/commit/1e9ac76625535047ba5e5864d2f199d= ae502e623=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge identical cases in generation (exchange opcodes)=0D =0D Use CASE_32_64 and CASE_64 to reduce ifdefs and merge=0D cases that are identical between 32-bit and 64-bit hosts.=0D =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>=0D [PMD: Split patch as 2/5]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210218232840.1760806-3-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: da9a5e0b413fbfdbc938918a9519cb124cb3ec95=0D https://github.com/qemu/qemu/commit/da9a5e0b413fbfdbc938918a9519cb1= 24cb3ec95=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge identical cases in generation (deposit opcode)=0D =0D Use CASE_32_64 and CASE_64 to reduce ifdefs and merge=0D cases that are identical between 32-bit and 64-bit hosts.=0D =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>=0D [PMD: Split patch as 3/5]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210218232840.1760806-4-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 88c3e909039b94507fe3c58bc291c97b638d694d=0D https://github.com/qemu/qemu/commit/88c3e909039b94507fe3c58bc291c97= b638d694d=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge identical cases in generation (conditional opcodes)=0D =0D Use CASE_32_64 and CASE_64 to reduce ifdefs and merge=0D cases that are identical between 32-bit and 64-bit hosts.=0D =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>=0D [PMD: Split patch as 4/5]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210218232840.1760806-5-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: a73605a73c67943855b633e13bf3a2275126dd0a=0D https://github.com/qemu/qemu/commit/a73605a73c67943855b633e13bf3a22= 75126dd0a=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge identical cases in generation (load/store opcodes)=0D =0D Use CASE_32_64 and CASE_64 to reduce ifdefs and merge=0D cases that are identical between 32-bit and 64-bit hosts.=0D =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>=0D [PMD: Split patch as 5/5]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210218232840.1760806-6-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: a7391bc0157bf20f41ff14dbf2ec66ec60cb633c=0D https://github.com/qemu/qemu/commit/a7391bc0157bf20f41ff14dbf2ec66e= c60cb633c=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_read_r8=0D =0D Use explicit casts for ext8u opcodes, and allow truncation=0D to happen with the store for st8 opcodes.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 9758c8cbbdeaefc4e065c7614a6d10c9db810c25=0D https://github.com/qemu/qemu/commit/9758c8cbbdeaefc4e065c7614a6d10c= 9db810c25=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_read_r8s=0D =0D Use explicit casts for ext8s opcodes.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 0dd0170cb1f697f4d8b8d6fa0243363f22c9649e=0D https://github.com/qemu/qemu/commit/0dd0170cb1f697f4d8b8d6fa0243363= f22c9649e=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_read_r16=0D =0D Use explicit casts for ext16u opcodes, and allow truncation=0D to happen with the store for st16 opcodes, and with the call=0D for bswap16 opcodes.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 994edd6719c32b7e9fec15d6f098ae8b899f806b=0D https://github.com/qemu/qemu/commit/994edd6719c32b7e9fec15d6f098ae8= b899f806b=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_read_r16s=0D =0D Use explicit casts for ext16s opcodes.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 984ae87314e24fa272d9c868307236b5caff0a30=0D https://github.com/qemu/qemu/commit/984ae87314e24fa272d9c868307236b= 5caff0a30=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_read_r32=0D =0D Use explicit casts for ext32u opcodes, and allow truncation=0D to happen for other users.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: dcf2af266237457344d18a52083b37e3affeb5a7=0D https://github.com/qemu/qemu/commit/dcf2af266237457344d18a52083b37e= 3affeb5a7=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_read_r32s=0D =0D Use explicit casts for ext32s opcodes.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 09c8b8b90d1bf8b5a48190f190440cf49b6cead9=0D https://github.com/qemu/qemu/commit/09c8b8b90d1bf8b5a48190f190440cf= 49b6cead9=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Reduce use of tci_read_r64=0D =0D In all cases restricted to 64-bit hosts, tcg_read_r is=0D identical. We retain the 64-bit symbol for the single=0D case of INDEX_op_qemu_st_i64.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: dd2bb20e41d54410a685517f41ec86cc7d87b36b=0D https://github.com/qemu/qemu/commit/dd2bb20e41d54410a685517f41ec86c= c7d87b36b=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge basic arithmetic operations=0D =0D This includes add, sub, mul, and, or, xor.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 13a1d64045cf0ea6a0f1f317dfaaa3995d9d4863=0D https://github.com/qemu/qemu/commit/13a1d64045cf0ea6a0f1f317dfaaa39= 95d9d4863=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge extension operations=0D =0D This includes ext8s, ext8u, ext16s, ext16u.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: fe2b13bb7c5c53791de5ce1d94c74440f9758cbf=0D https://github.com/qemu/qemu/commit/fe2b13bb7c5c53791de5ce1d94c7444= 0f9758cbf=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge bswap operations=0D =0D This includes bswap16 and bswap32.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 9e9acb7b348570f8a9ed62fcbad299424fe61501=0D https://github.com/qemu/qemu/commit/9e9acb7b348570f8a9ed62fcbad2994= 24fe61501=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge mov, not and neg operations=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 6f04cb1c8f481cf02fbc4657fefba985a1fe725f=0D https://github.com/qemu/qemu/commit/6f04cb1c8f481cf02fbc4657fefba98= 5a1fe725f=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M accel/tcg/cpu-exec.c=0D M accel/tcg/tcg-runtime.c=0D M include/exec/tb-lookup.h=0D =0D Log Message:=0D -----------=0D accel/tcg: rename tb_lookup__cpu_state and hoist state extraction=0D =0D Having a function return either and valid TB and some system state=0D seems excessive. It will make the subsequent re-factoring easier if we=0D= lookup the current state where we are.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210224165811.11567-2-alex.bennee@linaro.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: c0ae396a81e13e5a09846f86a702bc61733a8885=0D https://github.com/qemu/qemu/commit/c0ae396a81e13e5a09846f86a702bc6= 1733a8885=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M accel/tcg/cpu-exec.c=0D M accel/tcg/tcg-runtime.c=0D M accel/tcg/translate-all.c=0D M include/exec/exec-all.h=0D M include/exec/tb-lookup.h=0D M softmmu/physmem.c=0D =0D Log Message:=0D -----------=0D accel/tcg: move CF_CLUSTER calculation to curr_cflags=0D =0D There is nothing special about this compile flag that doesn't mean we=0D can't just compute it with curr_cflags() which we should be using when=0D= building a new set.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210224165811.11567-3-alex.bennee@linaro.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: bf253ac606de4a934e41ba178bf4f1338c554cec=0D https://github.com/qemu/qemu/commit/bf253ac606de4a934e41ba178bf4f13= 38c554cec=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M accel/tcg/cpu-exec.c=0D M accel/tcg/tcg-runtime.c=0D M accel/tcg/translate-all.c=0D M include/exec/exec-all.h=0D M include/exec/tb-lookup.h=0D =0D Log Message:=0D -----------=0D accel/tcg: drop the use of CF_HASH_MASK and rename params=0D =0D We don't really deal in cf_mask most of the time. The one time it's=0D relevant is when we want to remove an invalidated TB from the QHT=0D lookup. Everywhere else we should be looking up things without=0D CF_INVALID set.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210224165811.11567-4-alex.bennee@linaro.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 872ebd884dd68ecef4c6f9f86c5da519f18bd31e=0D https://github.com/qemu/qemu/commit/872ebd884dd68ecef4c6f9f86c5da51= 9f18bd31e=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M include/exec/exec-all.h=0D =0D Log Message:=0D -----------=0D include/exec: lightly re-arrange TranslationBlock=0D =0D Lets make sure all the flags we compare when looking up blocks are=0D together in the same place.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210224165811.11567-5-alex.bennee@linaro.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 6cc9d67c6f682cf04eea2d6e64a252b63a7eccdf=0D https://github.com/qemu/qemu/commit/6cc9d67c6f682cf04eea2d6e64a252b= 63a7eccdf=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M accel/tcg/cpu-exec.c=0D M accel/tcg/tcg-accel-ops-mttcg.c=0D M accel/tcg/tcg-accel-ops-rr.c=0D M accel/tcg/tcg-accel-ops.c=0D M accel/tcg/tcg-accel-ops.h=0D M accel/tcg/translate-all.c=0D M include/exec/exec-all.h=0D M include/hw/core/cpu.h=0D M linux-user/main.c=0D M linux-user/sh4/signal.c=0D M linux-user/syscall.c=0D =0D Log Message:=0D -----------=0D accel/tcg: Precompute curr_cflags into cpu->tcg_cflags=0D =0D The primary motivation is to remove a dozen insns along=0D the fast-path in tb_lookup. As a byproduct, this allows=0D us to completely remove parallel_cpus.=0D =0D Reviewed-by: Alex Benn=C3=A9e =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 74fd46ed44f60a230804dc1050bae76eb9420ecb=0D https://github.com/qemu/qemu/commit/74fd46ed44f60a230804dc1050bae76= eb9420ecb=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M accel/tcg/cpu-exec.c=0D M accel/tcg/tcg-accel-ops-mttcg.c=0D M accel/tcg/tcg-accel-ops-rr.c=0D M accel/tcg/tcg-accel-ops.c=0D M accel/tcg/tcg-accel-ops.h=0D M accel/tcg/tcg-runtime.c=0D M accel/tcg/translate-all.c=0D M include/exec/exec-all.h=0D M include/exec/tb-lookup.h=0D M include/hw/core/cpu.h=0D M linux-user/main.c=0D M linux-user/sh4/signal.c=0D M linux-user/syscall.c=0D M softmmu/physmem.c=0D M tcg/aarch64/tcg-target.c.inc=0D M tcg/tcg.c=0D M tcg/tci.c=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210306= ' into staging=0D =0D TCI build fix and cleanup=0D Streamline tb_lookup=0D Fixes for tcg/aarch64=0D =0D # gpg: Signature made Sat 06 Mar 2021 21:34:46 GMT=0D # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E2= 15F=0D # gpg: issuer "richard.henderson@linaro.org"=0D # gpg: Good signature from "Richard Henderson " [full]=0D # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E = 215F=0D =0D * remotes/rth-gitlab/tags/pull-tcg-20210306: (27 commits)=0D accel/tcg: Precompute curr_cflags into cpu->tcg_cflags=0D include/exec: lightly re-arrange TranslationBlock=0D accel/tcg: drop the use of CF_HASH_MASK and rename params=0D accel/tcg: move CF_CLUSTER calculation to curr_cflags=0D accel/tcg: rename tb_lookup__cpu_state and hoist state extraction=0D tcg/tci: Merge mov, not and neg operations=0D tcg/tci: Merge bswap operations=0D tcg/tci: Merge extension operations=0D tcg/tci: Merge basic arithmetic operations=0D tcg/tci: Reduce use of tci_read_r64=0D tcg/tci: Remove tci_read_r32s=0D tcg/tci: Remove tci_read_r32=0D tcg/tci: Remove tci_read_r16s=0D tcg/tci: Remove tci_read_r16=0D tcg/tci: Remove tci_read_r8s=0D tcg/tci: Remove tci_read_r8=0D tcg/tci: Merge identical cases in generation (load/store opcodes)=0D tcg/tci: Merge identical cases in generation (conditional opcodes)=0D tcg/tci: Merge identical cases in generation (deposit opcode)=0D tcg/tci: Merge identical cases in generation (exchange opcodes)=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/229a834518b9...74fd46ed44f6= =0D From MAILER-DAEMON Tue Mar 09 06:22:00 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJaR5-0007A2-D4 for mharc-qemu-commits@gnu.org; Tue, 09 Mar 2021 06:22:00 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34690) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJaR4-00079R-3u for qemu-commits@nongnu.org; Tue, 09 Mar 2021 06:21:58 -0500 Received: from out-21.smtp.github.com ([192.30.252.204]:59251 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJaQy-0001oY-Ks for qemu-commits@nongnu.org; Tue, 09 Mar 2021 06:21:57 -0500 Received: from github.com (hubbernetes-node-c16bbf9.ac4-iad.github.net [10.52.125.49]) by smtp.github.com (Postfix) with ESMTPA id 068145203ED for ; Tue, 9 Mar 2021 03:21:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615288912; bh=jDMSewUAw3B5ZA4mK61/gjWF7Va94+iPeU6PZIqT9LE=; h=Date:From:To:Subject:From; b=rFr4E1bH1gs4cjdCSTueKaJTU36AEqHRaa+pJgoH+U1oV4nOIzYNLBjcYgnIB2QbE EYvDL2/TldhS5j81gMEFcEH1nDpZ0up11d7NNBpiSfFUYpLrEwAfbgw0tzQ6Q5VT5M dwoqdYzI3vivgUa9X/KSu5AvOu4ElrErzgvGbbyk= Date: Tue, 09 Mar 2021 03:21:52 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 707b45: tcg/aarch64: Fix constant subtraction in tcg_out_a... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 09 Mar 2021 11:21:58 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 707b45a2475e25709f0dee00f8fdf39d346ed21e=0D https://github.com/qemu/qemu/commit/707b45a2475e25709f0dee00f8fdf39= d346ed21e=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/aarch64/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/aarch64: Fix constant subtraction in tcg_out_addsub2=0D =0D An hppa guest executing=0D =0D 0x000000000000e05c: ldil L%10000,r4=0D 0x000000000000e060: ldo 0(r4),r4=0D 0x000000000000e064: sub r3,r4,sp=0D =0D produces=0D =0D ---- 000000000000e064 000000000000e068=0D sub2_i32 tmp0,tmp4,r3,$0x1,$0x10000,$0x0=0D =0D after folding and constant propagation. Then we hit=0D =0D tcg-target.c.inc:640: tcg_out_insn_3401: Assertion `aimm <=3D 0xfff' fail= ed.=0D =0D because aimm is in fact -16, but unsigned.=0D =0D The ((bl < 0) ^ sub) condition which negates bl is incorrect and will=0D always lead to this abort. If the constant is positive, sub will make=0D= it negative; if the constant is negative, sub will keep it negative.=0D =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 6c2c7772f69bcd7e7a88308fd6aaf19debb7ada4=0D https://github.com/qemu/qemu/commit/6c2c7772f69bcd7e7a88308fd6aaf19= debb7ada4=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/aarch64/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/aarch64: Fix I3617_CMLE0=0D =0D Fix a typo in the encodeing of the cmle (zero) instruction.=0D =0D Fixes: 14e4c1e2355 ("tcg/aarch64: Add vector operations")=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: d81bad24dfea6ec0331599de1f31d822aba9dae1=0D https://github.com/qemu/qemu/commit/d81bad24dfea6ec0331599de1f31d82= 2aba9dae1=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/aarch64/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/aarch64: Fix generation of "scalar" vector operations=0D =0D For some vector operations, "1D" is not a valid type, and there=0D are separate instructions for the 64-bit scalar operation.=0D =0D Tested-by: Stefan Weil =0D Buglink: https://bugs.launchpad.net/qemu/+bug/1916112=0D Fixes: 14e4c1e2355 ("tcg/aarch64: Add vector operations")=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: dc09f047eddec8f4a1991c4f5f4a428d7aa3f2c0=0D https://github.com/qemu/qemu/commit/dc09f047eddec8f4a1991c4f5f4a428= d7aa3f2c0=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Use exec/cpu_ldst.h interfaces=0D =0D Use the provided cpu_ldst.h interfaces. This fixes the build vs=0D the unconverted uses of g2h(), adds missed memory trace events,=0D and correctly recognizes when a SIGSEGV belongs to the guest via=0D set_helper_retaddr().=0D =0D Fixes: 3e8f1628e864=0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: db6b7d0c6936cd209e3e8d95aea61ad29ceef5e6=0D https://github.com/qemu/qemu/commit/db6b7d0c6936cd209e3e8d95aea61ad= 29ceef5e6=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tcg.c=0D =0D Log Message:=0D -----------=0D tcg: Split out tcg_raise_tb_overflow=0D =0D Allow other places in tcg to restart with a smaller tb.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 0610067ec032eb7fab3c3f68ec3fea5adbf4ec40=0D https://github.com/qemu/qemu/commit/0610067ec032eb7fab3c3f68ec3fea5= adbf4ec40=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tcg.c=0D =0D Log Message:=0D -----------=0D tcg: Manage splitwx in tc_ptr_to_region_tree by hand=0D =0D The use in tcg_tb_lookup is given a random pc that comes from the pc=0D of a signal handler. Do not assert that the pointer is already within=0D= the code gen buffer at all, much less the writable mirror of it.=0D =0D Fixes: db0c51a3803=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: c764f8cc2ca6cbdd16dd6dfdce0cff0ac25559fd=0D https://github.com/qemu/qemu/commit/c764f8cc2ca6cbdd16dd6dfdce0cff0= ac25559fd=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge identical cases in generation (arithmetic opcodes)=0D =0D Use CASE_32_64 and CASE_64 to reduce ifdefs and merge=0D cases that are identical between 32-bit and 64-bit hosts.=0D =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>=0D [PMD: Split patch as 1/5]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210218232840.1760806-2-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 1e9ac76625535047ba5e5864d2f199dae502e623=0D https://github.com/qemu/qemu/commit/1e9ac76625535047ba5e5864d2f199d= ae502e623=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge identical cases in generation (exchange opcodes)=0D =0D Use CASE_32_64 and CASE_64 to reduce ifdefs and merge=0D cases that are identical between 32-bit and 64-bit hosts.=0D =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>=0D [PMD: Split patch as 2/5]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210218232840.1760806-3-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: da9a5e0b413fbfdbc938918a9519cb124cb3ec95=0D https://github.com/qemu/qemu/commit/da9a5e0b413fbfdbc938918a9519cb1= 24cb3ec95=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge identical cases in generation (deposit opcode)=0D =0D Use CASE_32_64 and CASE_64 to reduce ifdefs and merge=0D cases that are identical between 32-bit and 64-bit hosts.=0D =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>=0D [PMD: Split patch as 3/5]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210218232840.1760806-4-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 88c3e909039b94507fe3c58bc291c97b638d694d=0D https://github.com/qemu/qemu/commit/88c3e909039b94507fe3c58bc291c97= b638d694d=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge identical cases in generation (conditional opcodes)=0D =0D Use CASE_32_64 and CASE_64 to reduce ifdefs and merge=0D cases that are identical between 32-bit and 64-bit hosts.=0D =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>=0D [PMD: Split patch as 4/5]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210218232840.1760806-5-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: a73605a73c67943855b633e13bf3a2275126dd0a=0D https://github.com/qemu/qemu/commit/a73605a73c67943855b633e13bf3a22= 75126dd0a=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge identical cases in generation (load/store opcodes)=0D =0D Use CASE_32_64 and CASE_64 to reduce ifdefs and merge=0D cases that are identical between 32-bit and 64-bit hosts.=0D =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210217202036.1724901-5-richard.henderson@linaro.org>=0D [PMD: Split patch as 5/5]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210218232840.1760806-6-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: a7391bc0157bf20f41ff14dbf2ec66ec60cb633c=0D https://github.com/qemu/qemu/commit/a7391bc0157bf20f41ff14dbf2ec66e= c60cb633c=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_read_r8=0D =0D Use explicit casts for ext8u opcodes, and allow truncation=0D to happen with the store for st8 opcodes.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 9758c8cbbdeaefc4e065c7614a6d10c9db810c25=0D https://github.com/qemu/qemu/commit/9758c8cbbdeaefc4e065c7614a6d10c= 9db810c25=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_read_r8s=0D =0D Use explicit casts for ext8s opcodes.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 0dd0170cb1f697f4d8b8d6fa0243363f22c9649e=0D https://github.com/qemu/qemu/commit/0dd0170cb1f697f4d8b8d6fa0243363= f22c9649e=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_read_r16=0D =0D Use explicit casts for ext16u opcodes, and allow truncation=0D to happen with the store for st16 opcodes, and with the call=0D for bswap16 opcodes.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 994edd6719c32b7e9fec15d6f098ae8b899f806b=0D https://github.com/qemu/qemu/commit/994edd6719c32b7e9fec15d6f098ae8= b899f806b=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_read_r16s=0D =0D Use explicit casts for ext16s opcodes.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 984ae87314e24fa272d9c868307236b5caff0a30=0D https://github.com/qemu/qemu/commit/984ae87314e24fa272d9c868307236b= 5caff0a30=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_read_r32=0D =0D Use explicit casts for ext32u opcodes, and allow truncation=0D to happen for other users.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: dcf2af266237457344d18a52083b37e3affeb5a7=0D https://github.com/qemu/qemu/commit/dcf2af266237457344d18a52083b37e= 3affeb5a7=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_read_r32s=0D =0D Use explicit casts for ext32s opcodes.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 09c8b8b90d1bf8b5a48190f190440cf49b6cead9=0D https://github.com/qemu/qemu/commit/09c8b8b90d1bf8b5a48190f190440cf= 49b6cead9=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Reduce use of tci_read_r64=0D =0D In all cases restricted to 64-bit hosts, tcg_read_r is=0D identical. We retain the 64-bit symbol for the single=0D case of INDEX_op_qemu_st_i64.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: dd2bb20e41d54410a685517f41ec86cc7d87b36b=0D https://github.com/qemu/qemu/commit/dd2bb20e41d54410a685517f41ec86c= c7d87b36b=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge basic arithmetic operations=0D =0D This includes add, sub, mul, and, or, xor.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 13a1d64045cf0ea6a0f1f317dfaaa3995d9d4863=0D https://github.com/qemu/qemu/commit/13a1d64045cf0ea6a0f1f317dfaaa39= 95d9d4863=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge extension operations=0D =0D This includes ext8s, ext8u, ext16s, ext16u.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: fe2b13bb7c5c53791de5ce1d94c74440f9758cbf=0D https://github.com/qemu/qemu/commit/fe2b13bb7c5c53791de5ce1d94c7444= 0f9758cbf=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge bswap operations=0D =0D This includes bswap16 and bswap32.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 9e9acb7b348570f8a9ed62fcbad299424fe61501=0D https://github.com/qemu/qemu/commit/9e9acb7b348570f8a9ed62fcbad2994= 24fe61501=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Merge mov, not and neg operations=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 6f04cb1c8f481cf02fbc4657fefba985a1fe725f=0D https://github.com/qemu/qemu/commit/6f04cb1c8f481cf02fbc4657fefba98= 5a1fe725f=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M accel/tcg/cpu-exec.c=0D M accel/tcg/tcg-runtime.c=0D M include/exec/tb-lookup.h=0D =0D Log Message:=0D -----------=0D accel/tcg: rename tb_lookup__cpu_state and hoist state extraction=0D =0D Having a function return either and valid TB and some system state=0D seems excessive. It will make the subsequent re-factoring easier if we=0D= lookup the current state where we are.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210224165811.11567-2-alex.bennee@linaro.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: c0ae396a81e13e5a09846f86a702bc61733a8885=0D https://github.com/qemu/qemu/commit/c0ae396a81e13e5a09846f86a702bc6= 1733a8885=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M accel/tcg/cpu-exec.c=0D M accel/tcg/tcg-runtime.c=0D M accel/tcg/translate-all.c=0D M include/exec/exec-all.h=0D M include/exec/tb-lookup.h=0D M softmmu/physmem.c=0D =0D Log Message:=0D -----------=0D accel/tcg: move CF_CLUSTER calculation to curr_cflags=0D =0D There is nothing special about this compile flag that doesn't mean we=0D can't just compute it with curr_cflags() which we should be using when=0D= building a new set.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210224165811.11567-3-alex.bennee@linaro.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: bf253ac606de4a934e41ba178bf4f1338c554cec=0D https://github.com/qemu/qemu/commit/bf253ac606de4a934e41ba178bf4f13= 38c554cec=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M accel/tcg/cpu-exec.c=0D M accel/tcg/tcg-runtime.c=0D M accel/tcg/translate-all.c=0D M include/exec/exec-all.h=0D M include/exec/tb-lookup.h=0D =0D Log Message:=0D -----------=0D accel/tcg: drop the use of CF_HASH_MASK and rename params=0D =0D We don't really deal in cf_mask most of the time. The one time it's=0D relevant is when we want to remove an invalidated TB from the QHT=0D lookup. Everywhere else we should be looking up things without=0D CF_INVALID set.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210224165811.11567-4-alex.bennee@linaro.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 872ebd884dd68ecef4c6f9f86c5da519f18bd31e=0D https://github.com/qemu/qemu/commit/872ebd884dd68ecef4c6f9f86c5da51= 9f18bd31e=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M include/exec/exec-all.h=0D =0D Log Message:=0D -----------=0D include/exec: lightly re-arrange TranslationBlock=0D =0D Lets make sure all the flags we compare when looking up blocks are=0D together in the same place.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210224165811.11567-5-alex.bennee@linaro.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 6cc9d67c6f682cf04eea2d6e64a252b63a7eccdf=0D https://github.com/qemu/qemu/commit/6cc9d67c6f682cf04eea2d6e64a252b= 63a7eccdf=0D Author: Richard Henderson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M accel/tcg/cpu-exec.c=0D M accel/tcg/tcg-accel-ops-mttcg.c=0D M accel/tcg/tcg-accel-ops-rr.c=0D M accel/tcg/tcg-accel-ops.c=0D M accel/tcg/tcg-accel-ops.h=0D M accel/tcg/translate-all.c=0D M include/exec/exec-all.h=0D M include/hw/core/cpu.h=0D M linux-user/main.c=0D M linux-user/sh4/signal.c=0D M linux-user/syscall.c=0D =0D Log Message:=0D -----------=0D accel/tcg: Precompute curr_cflags into cpu->tcg_cflags=0D =0D The primary motivation is to remove a dozen insns along=0D the fast-path in tb_lookup. As a byproduct, this allows=0D us to completely remove parallel_cpus.=0D =0D Reviewed-by: Alex Benn=C3=A9e =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 74fd46ed44f60a230804dc1050bae76eb9420ecb=0D https://github.com/qemu/qemu/commit/74fd46ed44f60a230804dc1050bae76= eb9420ecb=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M accel/tcg/cpu-exec.c=0D M accel/tcg/tcg-accel-ops-mttcg.c=0D M accel/tcg/tcg-accel-ops-rr.c=0D M accel/tcg/tcg-accel-ops.c=0D M accel/tcg/tcg-accel-ops.h=0D M accel/tcg/tcg-runtime.c=0D M accel/tcg/translate-all.c=0D M include/exec/exec-all.h=0D M include/exec/tb-lookup.h=0D M include/hw/core/cpu.h=0D M linux-user/main.c=0D M linux-user/sh4/signal.c=0D M linux-user/syscall.c=0D M softmmu/physmem.c=0D M tcg/aarch64/tcg-target.c.inc=0D M tcg/tcg.c=0D M tcg/tci.c=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210306= ' into staging=0D =0D TCI build fix and cleanup=0D Streamline tb_lookup=0D Fixes for tcg/aarch64=0D =0D # gpg: Signature made Sat 06 Mar 2021 21:34:46 GMT=0D # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E2= 15F=0D # gpg: issuer "richard.henderson@linaro.org"=0D # gpg: Good signature from "Richard Henderson " [full]=0D # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E = 215F=0D =0D * remotes/rth-gitlab/tags/pull-tcg-20210306: (27 commits)=0D accel/tcg: Precompute curr_cflags into cpu->tcg_cflags=0D include/exec: lightly re-arrange TranslationBlock=0D accel/tcg: drop the use of CF_HASH_MASK and rename params=0D accel/tcg: move CF_CLUSTER calculation to curr_cflags=0D accel/tcg: rename tb_lookup__cpu_state and hoist state extraction=0D tcg/tci: Merge mov, not and neg operations=0D tcg/tci: Merge bswap operations=0D tcg/tci: Merge extension operations=0D tcg/tci: Merge basic arithmetic operations=0D tcg/tci: Reduce use of tci_read_r64=0D tcg/tci: Remove tci_read_r32s=0D tcg/tci: Remove tci_read_r32=0D tcg/tci: Remove tci_read_r16s=0D tcg/tci: Remove tci_read_r16=0D tcg/tci: Remove tci_read_r8s=0D tcg/tci: Remove tci_read_r8=0D tcg/tci: Merge identical cases in generation (load/store opcodes)=0D tcg/tci: Merge identical cases in generation (conditional opcodes)=0D tcg/tci: Merge identical cases in generation (deposit opcode)=0D tcg/tci: Merge identical cases in generation (exchange opcodes)=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/229a834518b9...74fd46ed44f6= =0D From MAILER-DAEMON Tue Mar 09 06:27:58 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJaWs-0003JE-G8 for mharc-qemu-commits@gnu.org; Tue, 09 Mar 2021 06:27:58 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:36418) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJaWq-0003GH-B1 for qemu-commits@nongnu.org; Tue, 09 Mar 2021 06:27:56 -0500 Received: from out-24.smtp.github.com ([192.30.252.207]:49323) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJaWo-0005P6-GT for qemu-commits@nongnu.org; Tue, 09 Mar 2021 06:27:56 -0500 Received: from github.com (hubbernetes-node-30ea504.ac4-iad.github.net [10.52.201.36]) by smtp.github.com (Postfix) with ESMTPA id C1DEF6006BE for ; Tue, 9 Mar 2021 03:27:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615289273; bh=7OxvfoZ4nWMXVFIYGPCtxMbSKSk2tz9KI7lLXJYgGJ0=; h=Date:From:To:Subject:From; b=xHV5weD5Gw25gXQnKHyDwYL5a2v/XqWL3osHhh/xaokLa66gqDC6VOy3+hP3mgNu9 3nMwqrvu1Ok93BvIuWZDJ8XMlJFfRNbag+yU0a5gJv/55+F4Y00EujPd9HgRT5PwNV C4opkv6tV/D1110PvXPv8/5F7p2gC9tQzfy23zGs= Date: Tue, 09 Mar 2021 03:27:53 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] b33311: exec: Poison Hexagon target-specific definitions X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 09 Mar 2021 11:27:56 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: b33311c67033849f31856d19f8e7252a77ea9216=0D https://github.com/qemu/qemu/commit/b33311c67033849f31856d19f8e7252= a77ea9216=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M include/exec/poison.h=0D =0D Log Message:=0D -----------=0D exec: Poison Hexagon target-specific definitions=0D =0D Commit 3e7a84eeccc ("Hexagon build infrastructure") added Hexagon=0D definitions that should be poisoned on target independent device=0D code, but forgot to update "exec/poison.h". Do it now.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Taylor Simpson =0D Message-Id: <20210219135754.1968100-1-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 66a1807b8e384145664ccc98e432901c4df33f4e=0D https://github.com/qemu/qemu/commit/66a1807b8e384145664ccc98e432901= c4df33f4e=0D Author: Taylor Simpson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/hexagon/macros.h=0D =0D Log Message:=0D -----------=0D target/hexagon: Fix shift amount check in fASHIFTL/fLSHIFTR=0D =0D Fixes: a646e99cb90 ("Hexagon (target/hexagon) macros")=0D Eliminate the following Coverity CIDs (Bad bit shift operation)=0D 325227=0D 325292=0D 325425=0D 325526=0D 325561=0D 325564=0D 325578=0D 325637=0D 325736=0D 325748=0D 325786=0D 325815=0D 325837=0D =0D Signed-off-by: Taylor Simpson =0D Message-Id: <1614879425-9259-1-git-send-email-tsimpson@quicinc.com>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 2526e69efd8e386573212bf3ea05171a727a598b=0D https://github.com/qemu/qemu/commit/2526e69efd8e386573212bf3ea05171= a727a598b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/hexagon/opcodes.c=0D =0D Log Message:=0D -----------=0D target/hexagon/opcodes: Add missing varargs cleanup=0D =0D Fix a trivial incorrect usage of variable argument macros detected=0D by Coverity (missing_va_end: va_end was not called for ap).=0D =0D Fixes: Coverity CID 1446720 (VARARGS)=0D Fixes: e3c00c2ed75 ("Hexagon (target/hexagon) opcode data structures")=0D= Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Taylor Simpson =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Taylor Simpson =0D Message-Id: <20210223111253.2831285-1-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: bb5643ff61291deb1d198f343a03828c5ead993f=0D https://github.com/qemu/qemu/commit/bb5643ff61291deb1d198f343a03828= c5ead993f=0D Author: Peter Maydell =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/exec/poison.h=0D M target/hexagon/macros.h=0D M target/hexagon/opcodes.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210306= ' into staging=0D =0D Add hexagon to include/exec/poison.h=0D Two Coverity fixes for target/hexagon/=0D =0D # gpg: Signature made Sun 07 Mar 2021 01:37:05 GMT=0D # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E2= 15F=0D # gpg: issuer "richard.henderson@linaro.org"=0D # gpg: Good signature from "Richard Henderson " [full]=0D # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E = 215F=0D =0D * remotes/rth-gitlab/tags/pull-hex-20210306:=0D target/hexagon/opcodes: Add missing varargs cleanup=0D target/hexagon: Fix shift amount check in fASHIFTL/fLSHIFTR=0D exec: Poison Hexagon target-specific definitions=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/74fd46ed44f6...bb5643ff6129= =0D From MAILER-DAEMON Tue Mar 09 08:50:21 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJckf-0003zb-69 for mharc-qemu-commits@gnu.org; Tue, 09 Mar 2021 08:50:21 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:57448) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJckc-0003vY-Su for qemu-commits@nongnu.org; Tue, 09 Mar 2021 08:50:18 -0500 Received: from out-27.smtp.github.com ([192.30.252.210]:50919) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJckZ-0005hX-Hm for qemu-commits@nongnu.org; Tue, 09 Mar 2021 08:50:18 -0500 Received: from github.com (hubbernetes-node-8acdce7.ash1-iad.github.net [10.56.110.74]) by smtp.github.com (Postfix) with ESMTPA id A5C8790079E for ; Tue, 9 Mar 2021 05:50:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615297814; bh=B7M3+zJMp8kxjTOMWYO1gEzMJv5FRqzWfjVkZ5oIlJE=; h=Date:From:To:Subject:From; b=F/hfCkvLrR/0CkqkGWRW2vSStSKpNxYrEcdYuDw2Ncdiusfu6Q1tt5Q7Mb6HOorNh q8EuF9RR3cnsn1vs0fDlwkqJ51ZIM67s1uAmBSayAbEyaqecUbZlAhCVe2giJpMcan VpLmLO1GY2MsR4b2BsmdWiPX3T4qfUm7TowPUlW8= Date: Tue, 09 Mar 2021 05:50:14 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.210; envelope-from=noreply@github.com; helo=out-27.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] b33311: exec: Poison Hexagon target-specific definitions X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 09 Mar 2021 13:50:19 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: b33311c67033849f31856d19f8e7252a77ea9216=0D https://github.com/qemu/qemu/commit/b33311c67033849f31856d19f8e7252= a77ea9216=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M include/exec/poison.h=0D =0D Log Message:=0D -----------=0D exec: Poison Hexagon target-specific definitions=0D =0D Commit 3e7a84eeccc ("Hexagon build infrastructure") added Hexagon=0D definitions that should be poisoned on target independent device=0D code, but forgot to update "exec/poison.h". Do it now.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Taylor Simpson =0D Message-Id: <20210219135754.1968100-1-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 66a1807b8e384145664ccc98e432901c4df33f4e=0D https://github.com/qemu/qemu/commit/66a1807b8e384145664ccc98e432901= c4df33f4e=0D Author: Taylor Simpson =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/hexagon/macros.h=0D =0D Log Message:=0D -----------=0D target/hexagon: Fix shift amount check in fASHIFTL/fLSHIFTR=0D =0D Fixes: a646e99cb90 ("Hexagon (target/hexagon) macros")=0D Eliminate the following Coverity CIDs (Bad bit shift operation)=0D 325227=0D 325292=0D 325425=0D 325526=0D 325561=0D 325564=0D 325578=0D 325637=0D 325736=0D 325748=0D 325786=0D 325815=0D 325837=0D =0D Signed-off-by: Taylor Simpson =0D Message-Id: <1614879425-9259-1-git-send-email-tsimpson@quicinc.com>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 2526e69efd8e386573212bf3ea05171a727a598b=0D https://github.com/qemu/qemu/commit/2526e69efd8e386573212bf3ea05171= a727a598b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-06 (Sat, 06 Mar 2021)=0D =0D Changed paths:=0D M target/hexagon/opcodes.c=0D =0D Log Message:=0D -----------=0D target/hexagon/opcodes: Add missing varargs cleanup=0D =0D Fix a trivial incorrect usage of variable argument macros detected=0D by Coverity (missing_va_end: va_end was not called for ap).=0D =0D Fixes: Coverity CID 1446720 (VARARGS)=0D Fixes: e3c00c2ed75 ("Hexagon (target/hexagon) opcode data structures")=0D= Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Taylor Simpson =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Taylor Simpson =0D Message-Id: <20210223111253.2831285-1-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: bb5643ff61291deb1d198f343a03828c5ead993f=0D https://github.com/qemu/qemu/commit/bb5643ff61291deb1d198f343a03828= c5ead993f=0D Author: Peter Maydell =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/exec/poison.h=0D M target/hexagon/macros.h=0D M target/hexagon/opcodes.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-hex-20210306= ' into staging=0D =0D Add hexagon to include/exec/poison.h=0D Two Coverity fixes for target/hexagon/=0D =0D # gpg: Signature made Sun 07 Mar 2021 01:37:05 GMT=0D # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E2= 15F=0D # gpg: issuer "richard.henderson@linaro.org"=0D # gpg: Good signature from "Richard Henderson " [full]=0D # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E = 215F=0D =0D * remotes/rth-gitlab/tags/pull-hex-20210306:=0D target/hexagon/opcodes: Add missing varargs cleanup=0D target/hexagon: Fix shift amount check in fASHIFTL/fLSHIFTR=0D exec: Poison Hexagon target-specific definitions=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/74fd46ed44f6...bb5643ff6129= =0D From MAILER-DAEMON Tue Mar 09 08:56:24 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJcqV-0007Ss-LM for mharc-qemu-commits@gnu.org; Tue, 09 Mar 2021 08:56:23 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59582) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJcqS-0007R3-Bs for qemu-commits@nongnu.org; Tue, 09 Mar 2021 08:56:21 -0500 Received: from out-25.smtp.github.com ([192.30.252.208]:38465 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJcqO-0000DP-6O for qemu-commits@nongnu.org; Tue, 09 Mar 2021 08:56:19 -0500 Received: from github.com (hubbernetes-node-a076f1e.ash1-iad.github.net [10.56.120.55]) by smtp.github.com (Postfix) with ESMTPA id 810B9840D7E for ; Tue, 9 Mar 2021 05:56:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615298175; bh=QxdE1S03ba5wydgcrToN1P0etdHD/SyIgkHiUz5kR4A=; h=Date:From:To:Subject:From; b=nTUyihuW2++h3c5Ut64+3jj78tlW1akGG6pyI75NVhum83b/H294RlDvwaCgshkih Ccpvtjq6Tx2uylMee/yUcok71QoNXhpBHatAqvN70wIFxKDCkdWslwbsaYp6duMOXf gjYAiDTJJMO3fWgEUTdbnhP42cDzO/+y2PxhG1OQ= Date: Tue, 09 Mar 2021 05:56:15 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 94d5c7: esp: checkpatch fixes X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 09 Mar 2021 13:56:21 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 94d5c79d32fd9f17bfa26ddfbe56dcfbcef20d2c=0D https://github.com/qemu/qemu/commit/94d5c79d32fd9f17bfa26ddfbe56dcf= bcef20d2c=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: checkpatch fixes=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-2-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 84fbefedfecafba2b339d17c9133225467b90c2e=0D https://github.com/qemu/qemu/commit/84fbefedfecafba2b339d17c9133225= 467b90c2e=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/dma/sparc32_dma.c=0D M hw/m68k/q800.c=0D M hw/mips/jazz.c=0D M hw/scsi/esp.c=0D M hw/sparc/sun4m.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: rename existing ESP QOM type to SYSBUS_ESP=0D =0D The existing ESP QOM type currently represents a sysbus device with an em= bedded=0D ESP state. Rename the type to SYSBUS_ESP accordingly.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-3-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: eb169c76d092b289a6a150b725e8fb2de990379b=0D https://github.com/qemu/qemu/commit/eb169c76d092b289a6a150b725e8fb2= de990379b=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp-pci.c=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: QOMify the internal ESP device state=0D =0D Make this new QOM device state a child device of both the sysbus-esp and = esp-pci=0D implementations.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-4-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 0bd005be782d9492afe3cc6fc494d8c3b477e5b8=0D https://github.com/qemu/qemu/commit/0bd005be782d9492afe3cc6fc494d8c= 3b477e5b8=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp-pci.c=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: add vmstate_esp version to embedded ESPState=0D =0D The QOM object representing ESPState is currently embedded within both th= e=0D SYSBUS_ESP and PCI_ESP devices with migration state handled by embedding=0D= vmstate_esp within each device using VMSTATE_STRUCT.=0D =0D Since the vmstate_esp fields are embedded directly within the migration=0D= stream, the incoming vmstate_esp version_id is lost. The only version inf= ormation=0D available is that from vmstate_sysbus_esp_scsi and vmstate_esp_pci_scsi, = but=0D those versions represent their respective devices and not that of the und= erlying=0D ESPState.=0D =0D Resolve this by adding a new version-dependent field in vmstate_sysbus_es= p_scsi=0D and vmstate_esp_pci_scsi which stores the vmstate_esp version_id field wi= thin=0D ESPState to be used to allow migration from older QEMU versions.=0D =0D Finally bump the vmstate_esp version to 5 to cover the upcoming ESPState = changes=0D within this patch series.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-5-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 0097d3ec17cf9e5a55dc33bee412a380f757ff23=0D https://github.com/qemu/qemu/commit/0097d3ec17cf9e5a55dc33bee412a38= 0f757ff23=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M hw/scsi/trace-events=0D =0D Log Message:=0D -----------=0D esp: add trace event when receiving a TI command=0D =0D This enables us to determine whether the command being issued is for a DM= A or a=0D non-DMA transfer.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-6-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: b630c075a24ee6b20890b32118de7ead4025a633=0D https://github.com/qemu/qemu/commit/b630c075a24ee6b20890b32118de7ea= d4025a633=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: fix esp_reg_read() trace event=0D =0D Move the trace event to the end of the function so that it correctly repo= rts=0D the returned value if it doesn't come directly from the rregs array.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-7-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 960ebfd94e8f6ea879472e7efb84b1704f685d39=0D https://github.com/qemu/qemu/commit/960ebfd94e8f6ea879472e7efb84b17= 04f685d39=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M hw/scsi/trace-events=0D =0D Log Message:=0D -----------=0D esp: add PDMA trace events=0D =0D This will become more useful later when trying to debug mixed FIFO and PD= MA=0D requests.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-8-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 4ca2ba6fb0bdf1099a742a361d1e2ad227c3bbf4=0D https://github.com/qemu/qemu/commit/4ca2ba6fb0bdf1099a742a361d1e2ad= 227c3bbf4=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: determine transfer direction directly from SCSI phase=0D =0D The transfer direction is currently determined by checking the sign of ti= _size=0D but as this series progresses ti_size can be zero at the end of the trans= fer.=0D =0D Use the SCSI phase to determine the transfer direction as used in other S= CSI=0D controller implementations.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-9-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: c47b5835f5b8f971b10ecf5965117ffa3500d0ce=0D https://github.com/qemu/qemu/commit/c47b5835f5b8f971b10ecf5965117ff= a3500d0ce=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: introduce esp_get_tc() and esp_set_tc()=0D =0D These functions simplify reading and writing the TC register value withou= t having to=0D manually shift each individual 8-bit value.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-10-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: c04ed569b014126927760e4607385719bd66bff9=0D https://github.com/qemu/qemu/commit/c04ed569b014126927760e460738571= 9bd66bff9=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: introduce esp_get_stc()=0D =0D This function simplifies reading the STC register value without having to= manually=0D shift each individual 8-bit value.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-11-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 96676c2f749d9da99ee03ec0eee342bd7d09de26=0D https://github.com/qemu/qemu/commit/96676c2f749d9da99ee03ec0eee342b= d7d09de26=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: apply transfer length adjustment when STC is zero at TC load time=0D= =0D Perform the length adjustment whereby a value of 0 in the STC represents=0D= a transfer length of 0x10000 at the point where the TC is loaded at the=0D= start of a DMA command rather than just when a TI (Transfer Information)=0D= command is executed. This better matches the description as given in the=0D= datasheet.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-12-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 5eb7a23fb22f10f09cecba61e7bf61cecaee3f96=0D https://github.com/qemu/qemu/commit/5eb7a23fb22f10f09cecba61e7bf61c= ecaee3f96=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: remove dma_counter from ESPState=0D =0D The value of dma_counter is set once at the start of the transfer and rem= ains=0D the same until the transfer is complete. This allows the check in esp_tra= nsfer_data=0D to be simplified since dma_left will always be non-zero until the transfe= r is=0D completed.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-13-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 6cc88d6bf932a905ce36e933dc078eeb6b54ac92=0D https://github.com/qemu/qemu/commit/6cc88d6bf932a905ce36e933dc078ee= b6b54ac92=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: remove dma_left from ESPState=0D =0D The ESP device already keeps track of the remaining bytes left to transfe= r via=0D its TC (transfer counter) register which is decremented for each byte tha= t=0D is transferred across the SCSI bus.=0D =0D Switch the transfer logic to use the value of TC instead of dma_left and = then=0D remove dma_left completely, adding logic to the vmstate_esp post_load() f= unction=0D to transfer the old dma_left value to the TC register during migration fr= om=0D older versions.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-14-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: b76624de5062fdf874a377ade84af90c62903833=0D https://github.com/qemu/qemu/commit/b76624de5062fdf874a377ade84af90= c62903833=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: remove minlen restriction in handle_ti=0D =0D The limiting of DMA transfers to the maximum size of the available data i= s already=0D handled by esp_do_dma() and do_dma_pdma_cb().=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-15-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 761bef75dd0bcad72e6041172f9bb573c9237ee4=0D https://github.com/qemu/qemu/commit/761bef75dd0bcad72e6041172f9bb57= 3c9237ee4=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: introduce esp_pdma_read() and esp_pdma_write() functions=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-16-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 6e3fafa8bb0c22b57db1f7e2c7edf41545ba5294=0D https://github.com/qemu/qemu/commit/6e3fafa8bb0c22b57db1f7e2c7edf41= 545ba5294=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: use pdma_origin directly in esp_pdma_read()/esp_pdma_write()=0D =0D This is the first step in removing get_pdma_buf() from esp.c.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-17-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 8da90e819452e77eefeedc38d1e00a03f2735ab2=0D https://github.com/qemu/qemu/commit/8da90e819452e77eefeedc38d1e00a0= 3f2735ab2=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: move pdma_len and TC logic into esp_pdma_read()/esp_pdma_write()=0D= =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-18-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: bb0bc7bbc9764a5e9e81756819838c5db88652b8=0D https://github.com/qemu/qemu/commit/bb0bc7bbc9764a5e9e81756819838c5= db88652b8=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: accumulate SCSI commands for PDMA transfers in cmdbuf instead of p= dma_buf=0D =0D ESP SCSI commands are already accumulated in cmdbuf and so there is no ne= ed to=0D keep a separate pdma_buf buffer. Accumulate SCSI commands for PDMA transf= ers in=0D cmdbuf instead of pdma_buf so update cmdlen accordingly and change pdma_o= rigin=0D for PDMA transfers to CMD which allows the PDMA origin to be removed.=0D =0D This commit also removes a stray memcpy() from get_cmd() which is a no-op= because=0D cmdlen is always zero at the start of a command.=0D =0D Notionally the removal of pdma_buf from vmstate_esp_pdma also breaks migr= ation=0D compatibility for the PDMA subsection until its complete removal by the e= nd of=0D the series.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-19-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: c959f218437c8828490267d42f42f9aa851dd8ea=0D https://github.com/qemu/qemu/commit/c959f218437c8828490267d42f42f9a= a851dd8ea=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: remove buf parameter from do_cmd()=0D =0D Now that all SCSI commands are accumulated in cmdbuf, remove the buf para= meter=0D from do_cmd() since this always points to cmdbuf.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-20-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: cfcea0f9d76f56d1a756a5ead28f5a8900b750e3=0D https://github.com/qemu/qemu/commit/cfcea0f9d76f56d1a756a5ead28f5a8= 900b750e3=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: remove the buf and buflen parameters from get_cmd()=0D =0D Now that all SCSI commands are accumulated in cmdbuf, remove the buf and = buflen=0D parameters from get_cmd() since these always reference cmdbuf and ESP_CMD= BUF_SZ=0D respectively.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-21-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 2c573cfe19cd3f4cad7540ec542c40e54305d56a=0D https://github.com/qemu/qemu/commit/2c573cfe19cd3f4cad7540ec542c40e= 54305d56a=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: remove redundant pdma_start from ESPState=0D =0D Now that PDMA SCSI commands are accumulated in cmdbuf in the same way as = normal=0D commands, the existing logic for locating the start of the SCSI command i= n=0D cmdbuf via cmdlen can be used. This enables the PDMA-specific pdma_start = and=0D also get_pdma_buf() to be removed.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-22-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 93efe2e6243d0192ed0e383a3e3e91b0ce1d9063=0D https://github.com/qemu/qemu/commit/93efe2e6243d0192ed0e383a3e3e91b= 0ce1d9063=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: move PDMA length adjustments into esp_pdma_read()/esp_pdma_write()= =0D =0D Here the updates to async_len and ti_size are moved into the correspondin= g=0D esp_pdma_read()/esp_pdma_write() function to eliminate the reference to=0D= pdma_cur in do_dma_pdma_cb().=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-23-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: ad7f468c4252ee83f6e150c11ae02f71f6d467ef=0D https://github.com/qemu/qemu/commit/ad7f468c4252ee83f6e150c11ae02f7= 1f6d467ef=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: use ti_wptr/ti_rptr to manage the current FIFO position for PDMA=0D= =0D This eliminates the last user of the PDMA-specific pdma_cur variable whic= h can=0D now be removed.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-24-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 3c421400fff80054aec9b805a0622b63e372f572=0D https://github.com/qemu/qemu/commit/3c421400fff80054aec9b805a0622b6= 3e372f572=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: use in-built TC to determine PDMA transfer length=0D =0D Real hardware simply counts down using the in-built TC to determine when = the=0D the PDMA request is complete. Use the TC to determine the PDMA transfer l= ength=0D which then enables us to remove the redundant pdma_len variable.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-25-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 02abe246889398a108a3f92428b9f1f87e32de81=0D https://github.com/qemu/qemu/commit/02abe246889398a108a3f92428b9f1f= 87e32de81=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: remove CMD pdma_origin=0D =0D The cmdbuf is really just a copy of FIFO data (including extra message ph= ase=0D bytes) so its pdma_origin is effectively TI. Fortunately we already know = when=0D we are receiving a SCSI command since do_cmd =3D=3D 1 which enables us to= =0D distinguish between the two cases in esp_pdma_read()/esp_pdma_write().=0D= =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-26-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: c7bce09c0595b235ad367a12bae54cb04b33025b=0D https://github.com/qemu/qemu/commit/c7bce09c0595b235ad367a12bae54cb= 04b33025b=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: rename get_cmd_cb() to esp_select()=0D =0D This better describes the purpose of the function.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-27-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 496913153a9d5d0b200c2ac30a541f9f294f55aa=0D https://github.com/qemu/qemu/commit/496913153a9d5d0b200c2ac30a541f9= f294f55aa=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: fix PDMA target selection=0D =0D Currently the target selection for PDMA is done after the SCSI command ha= s been=0D delivered which is not correct. Perform target selection as part of the i= nitial=0D get_cmd() call when the command is submitted: if no target is present, do= n't=0D raise DRQ.=0D =0D If the target is present then switch to the command phase since the MacOS= toolbox=0D ROM checks for this before attempting to submit the SCSI command.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-28-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 82141c8b2237d186177c430eba985dda54245ad9=0D https://github.com/qemu/qemu/commit/82141c8b2237d186177c430eba985dd= a54245ad9=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: use FIFO for PDMA transfers between initiator and device=0D =0D PDMA as implemented on the Quadra 800 uses DREQ to load data into the FIF= O=0D up to a maximum of 16 bytes at a time. The MacOS toolbox ROM requires thi= s=0D because it mixes FIFO and PDMA transfers whilst checking the FIFO status=0D= and counter registers to ensure success.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-29-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 43d02df31b8679dcc69c4ffcdb6cc658e1d348f7=0D https://github.com/qemu/qemu/commit/43d02df31b8679dcc69c4ffcdb6cc65= 8e1d348f7=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: remove pdma_origin from ESPState=0D =0D Now that all data is transferred via the FIFO (ti_buf) there is no need t= o track=0D the source buffer being used for the data transfer. This also eliminates = the=0D need for a separate subsection for PDMA state migration.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-30-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: cf1b8286007a5a12f7d42d484b8ac0e031038e2e=0D https://github.com/qemu/qemu/commit/cf1b8286007a5a12f7d42d484b8ac0e= 031038e2e=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: add 4 byte PDMA read and write transfers=0D =0D The MacOS toolbox ROM performs 4 byte reads/writes when transferring data= to=0D and from the target. Since the SCSI bus is 16-bits wide, use the memory A= PI=0D to split a 4 byte access into 2 x 2 byte accesses.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-31-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: bb27b13d183a4fdf8d63072861e03d320e41cb0e=0D https://github.com/qemu/qemu/commit/bb27b13d183a4fdf8d63072861e03d3= 20e41cb0e=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: implement FIFO flush command=0D =0D At this point it is now possible to properly implement the FIFO flush com= mand=0D without causing guest errors.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-32-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: cf47a41e055f6f90a2cecdb9eb3c4cebfde23f2a=0D https://github.com/qemu/qemu/commit/cf47a41e055f6f90a2cecdb9eb3c4ce= bfde23f2a=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: latch individual bits in ESP_RINTR register=0D =0D Currently the ESP_RINTR register is set to a specific value as required w= ithin=0D the ESP state machine. In order to implement the upcoming deferred interr= upt=0D functionality it is necessary to set individual bits within ESP_RINTR so = that=0D a deferred interrupt will not overwrite the value of any other interrupt = bits.=0D =0D This also requires fixing up a few locations where the ESP_RINTR and ESP_= RSEQ=0D registers are set/reset unexpectedly.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-33-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 4e78f3bf357e0ef2f67e372097f2be8fe0521814=0D https://github.com/qemu/qemu/commit/4e78f3bf357e0ef2f67e372097f2be8= fe0521814=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: defer command completion interrupt on incoming data transfers=0D =0D The MacOS toolbox ROM issues a command to the ESP controller as part of i= ts=0D "FAST" SCSI routines and then proceeds to read the incoming data soon aft= er=0D receiving the command completion interrupt.=0D =0D Unfortunately due to SCSI block transfers being asynchronous the incoming= data=0D may not yet be present causing an underflow error. Resolve this by waitin= g for=0D the SCSI subsystem transfer_data callback before raising the command comp= letion=0D interrupt.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-34-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 4aaa6ac38393e6657869da528ad8c35657e23f84=0D https://github.com/qemu/qemu/commit/4aaa6ac38393e6657869da528ad8c35= 657e23f84=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: remove old deferred command completion mechanism=0D =0D Commit ea84a44250 "scsi: esp: Defer command completion until previous int= errupts=0D have been handled" provided a mechanism to delay the command completion i= nterrupt=0D until ESP_RINTR is read after the command has completed.=0D =0D With the previous fixes for latching the ESP_RINTR bits and deferring the= setting=0D of the command completion interrupt for incoming data to the SCSI callbac= k, this=0D workaround is no longer required and can be removed.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-35-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 4e0ed62937d0498295457c2e1d8282a24ba140cb=0D https://github.com/qemu/qemu/commit/4e0ed62937d0498295457c2e1d8282a= 24ba140cb=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: raise interrupt after every non-DMA byte transferred to the FIFO=0D= =0D This matches the description in the datasheet and is required as support = for=0D non-DMA transfers is added.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-36-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 20c8d2ed6ae159b5840a46364bb679278f172576=0D https://github.com/qemu/qemu/commit/20c8d2ed6ae159b5840a46364bb6792= 78f172576=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: add maxlen parameter to get_cmd()=0D =0D Some guests use a mixture of DMA and non-DMA transfers in combination wit= h the=0D SATN and stop command to transfer message out phase and command phase byt= es to=0D the target. Prepare for the next commit by adding a maxlen parameter to=0D= get_cmd() to allow partial transfers.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-37-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 799d90d818ba38997e9f5de2163bbfc96256ac0b=0D https://github.com/qemu/qemu/commit/799d90d818ba38997e9f5de2163bbfc= 96256ac0b=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: transition to message out phase after SATN and stop command=0D =0D The SCSI bus should remain in the message out phase after the SATN and st= op=0D command rather than transitioning to the command phase. A new ESPState va= riable=0D cmdbuf_cdb_offset is added which stores the offset of the CDB from the st= art=0D of cmdbuf when accumulating extended message out phase data.=0D =0D Currently any extended message out data is discarded in do_cmd() before t= he CDB=0D is processed in do_busid_cmd().=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-38-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 042879fc3fc02b67d907b462020c975f6fb1f5ae=0D https://github.com/qemu/qemu/commit/042879fc3fc02b67d907b462020c975= f6fb1f5ae=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: convert ti_buf from array to Fifo8=0D =0D Rename TI_BUFSZ to ESP_FIFO_SZ since this constant is really describing t= he size=0D of the FIFO and is not directly related to the TI size.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-39-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 023666da792ac465e43dee3bacb21bb781de5cdb=0D https://github.com/qemu/qemu/commit/023666da792ac465e43dee3bacb21bb= 781de5cdb=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: convert cmdbuf from array to Fifo8=0D =0D Rename ESP_CMDBUF_SZ to ESP_CMDFIFO_SZ and cmdbuf_cdb_offset to cmdfifo_c= db_offset=0D to indicate that the command buffer type has changed from an array to a F= ifo8.=0D =0D This also enables us to remove the ESPState field cmdlen since the comman= d length=0D is now simply the number of elements used in cmdfifo.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-40-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 238ec4d7d4dba29c8d6d8766351d1dedf84008e0=0D https://github.com/qemu/qemu/commit/238ec4d7d4dba29c8d6d8766351d1de= df84008e0=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: add trivial implementation of the ESP_RFLAGS register=0D =0D The bottom 5 bits contain the number of bytes remaining in the FIFO which= is=0D trivial to implement with Fifo8 (the remaining bits are unimplemented and= left=0D as 0 for now).=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-41-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 1b9e48a5bdbc96833113f249909af0d30a76cc25=0D https://github.com/qemu/qemu/commit/1b9e48a5bdbc96833113f249909af0d= 30a76cc25=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: implement non-DMA transfers in PDMA mode=0D =0D The MacOS toolbox ROM uses non-DMA TI commands to handle the first/last b= yte=0D of an unaligned 16-bit transfer to memory.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-42-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 7aa6baee7c8a54473f28c6fa1e980a9ff7989036=0D https://github.com/qemu/qemu/commit/7aa6baee7c8a54473f28c6fa1e980a9= ff7989036=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: add support for unaligned accesses=0D =0D When the MacOS toolbox ROM transfers data from a target device to an unal= igned=0D memory address, the first/last byte of a 16-bit transfer needs to be hand= led=0D separately. This means that the first byte is preloaded into the FIFO bef= ore=0D the transfer, or the last byte remains in the FIFO after the transfer.=0D= =0D The result of this is that the PDMA routines must be updated so that the = FIFO=0D is loaded/unloaded if the last 16-bit word is used (rather than the last = byte)=0D and any remaining byte from a FIFO wraparound is handled correctly.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-43-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: b2ae1009d7cca2701e17eae55ae2d44fd22c942a=0D https://github.com/qemu/qemu/commit/b2ae1009d7cca2701e17eae55ae2d44= fd22c942a=0D Author: Peter Maydell =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/dma/sparc32_dma.c=0D M hw/m68k/q800.c=0D M hw/mips/jazz.c=0D M hw/scsi/esp-pci.c=0D M hw/scsi/esp.c=0D M hw/scsi/trace-events=0D M hw/sparc/sun4m.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20210307= ' into staging=0D =0D qemu-sparc queue=0D =0D # gpg: Signature made Sun 07 Mar 2021 12:07:13 GMT=0D # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F3= 21F=0D # gpg: issuer "mark.cave-ayland@ilande.co.uk"=0D # gpg: Good signature from "Mark Cave-Ayland " [full]=0D # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F = 321F=0D =0D * remotes/mcayland/tags/qemu-sparc-20210307: (42 commits)=0D esp: add support for unaligned accesses=0D esp: implement non-DMA transfers in PDMA mode=0D esp: add trivial implementation of the ESP_RFLAGS register=0D esp: convert cmdbuf from array to Fifo8=0D esp: convert ti_buf from array to Fifo8=0D esp: transition to message out phase after SATN and stop command=0D esp: add maxlen parameter to get_cmd()=0D esp: raise interrupt after every non-DMA byte transferred to the FIFO=0D= esp: remove old deferred command completion mechanism=0D esp: defer command completion interrupt on incoming data transfers=0D esp: latch individual bits in ESP_RINTR register=0D esp: implement FIFO flush command=0D esp: add 4 byte PDMA read and write transfers=0D esp: remove pdma_origin from ESPState=0D esp: use FIFO for PDMA transfers between initiator and device=0D esp: fix PDMA target selection=0D esp: rename get_cmd_cb() to esp_select()=0D esp: remove CMD pdma_origin=0D esp: use in-built TC to determine PDMA transfer length=0D esp: use ti_wptr/ti_rptr to manage the current FIFO position for PDMA=0D= ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/bb5643ff6129...b2ae1009d7cc= =0D From MAILER-DAEMON Tue Mar 09 11:09:41 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJevV-0004b3-On for mharc-qemu-commits@gnu.org; Tue, 09 Mar 2021 11:09:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:41640) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJevU-0004X5-8E for qemu-commits@nongnu.org; Tue, 09 Mar 2021 11:09:40 -0500 Received: from out-20.smtp.github.com ([192.30.252.203]:53139) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJevP-0008EU-NG for qemu-commits@nongnu.org; Tue, 09 Mar 2021 11:09:39 -0500 Received: from github.com (hubbernetes-node-d6861dd.va3-iad.github.net [10.48.119.75]) by smtp.github.com (Postfix) with ESMTPA id 06DF0E05C8 for ; Tue, 9 Mar 2021 08:09:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615306175; bh=bUZfl1DlZwmZDx7tMZyQlTmvvCizatjh2p65zMnPsyk=; h=Date:From:To:Subject:From; b=YzqhoDQfP10v695OeJ0SbXzPbJAz7IWyilskhW8kfPpDNPNcLBwin8zch2o6DQHvx P+9XAgoL70HN034eja96mug1ZScAbWZgcJep4pHdi6OGzyBjxxuCu4+YY9BPOyMNDd 9uoGAGYJDxGWt+yLjTHoaDL8mgIO6DjI3eDiMD3U= Date: Tue, 09 Mar 2021 08:09:35 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.203; envelope-from=noreply@github.com; helo=out-20.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 94d5c7: esp: checkpatch fixes X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 09 Mar 2021 16:09:40 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 94d5c79d32fd9f17bfa26ddfbe56dcfbcef20d2c=0D https://github.com/qemu/qemu/commit/94d5c79d32fd9f17bfa26ddfbe56dcf= bcef20d2c=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: checkpatch fixes=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-2-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 84fbefedfecafba2b339d17c9133225467b90c2e=0D https://github.com/qemu/qemu/commit/84fbefedfecafba2b339d17c9133225= 467b90c2e=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/dma/sparc32_dma.c=0D M hw/m68k/q800.c=0D M hw/mips/jazz.c=0D M hw/scsi/esp.c=0D M hw/sparc/sun4m.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: rename existing ESP QOM type to SYSBUS_ESP=0D =0D The existing ESP QOM type currently represents a sysbus device with an em= bedded=0D ESP state. Rename the type to SYSBUS_ESP accordingly.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-3-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: eb169c76d092b289a6a150b725e8fb2de990379b=0D https://github.com/qemu/qemu/commit/eb169c76d092b289a6a150b725e8fb2= de990379b=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp-pci.c=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: QOMify the internal ESP device state=0D =0D Make this new QOM device state a child device of both the sysbus-esp and = esp-pci=0D implementations.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-4-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 0bd005be782d9492afe3cc6fc494d8c3b477e5b8=0D https://github.com/qemu/qemu/commit/0bd005be782d9492afe3cc6fc494d8c= 3b477e5b8=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp-pci.c=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: add vmstate_esp version to embedded ESPState=0D =0D The QOM object representing ESPState is currently embedded within both th= e=0D SYSBUS_ESP and PCI_ESP devices with migration state handled by embedding=0D= vmstate_esp within each device using VMSTATE_STRUCT.=0D =0D Since the vmstate_esp fields are embedded directly within the migration=0D= stream, the incoming vmstate_esp version_id is lost. The only version inf= ormation=0D available is that from vmstate_sysbus_esp_scsi and vmstate_esp_pci_scsi, = but=0D those versions represent their respective devices and not that of the und= erlying=0D ESPState.=0D =0D Resolve this by adding a new version-dependent field in vmstate_sysbus_es= p_scsi=0D and vmstate_esp_pci_scsi which stores the vmstate_esp version_id field wi= thin=0D ESPState to be used to allow migration from older QEMU versions.=0D =0D Finally bump the vmstate_esp version to 5 to cover the upcoming ESPState = changes=0D within this patch series.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-5-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 0097d3ec17cf9e5a55dc33bee412a380f757ff23=0D https://github.com/qemu/qemu/commit/0097d3ec17cf9e5a55dc33bee412a38= 0f757ff23=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M hw/scsi/trace-events=0D =0D Log Message:=0D -----------=0D esp: add trace event when receiving a TI command=0D =0D This enables us to determine whether the command being issued is for a DM= A or a=0D non-DMA transfer.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-6-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: b630c075a24ee6b20890b32118de7ead4025a633=0D https://github.com/qemu/qemu/commit/b630c075a24ee6b20890b32118de7ea= d4025a633=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: fix esp_reg_read() trace event=0D =0D Move the trace event to the end of the function so that it correctly repo= rts=0D the returned value if it doesn't come directly from the rregs array.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-7-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 960ebfd94e8f6ea879472e7efb84b1704f685d39=0D https://github.com/qemu/qemu/commit/960ebfd94e8f6ea879472e7efb84b17= 04f685d39=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M hw/scsi/trace-events=0D =0D Log Message:=0D -----------=0D esp: add PDMA trace events=0D =0D This will become more useful later when trying to debug mixed FIFO and PD= MA=0D requests.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-8-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 4ca2ba6fb0bdf1099a742a361d1e2ad227c3bbf4=0D https://github.com/qemu/qemu/commit/4ca2ba6fb0bdf1099a742a361d1e2ad= 227c3bbf4=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: determine transfer direction directly from SCSI phase=0D =0D The transfer direction is currently determined by checking the sign of ti= _size=0D but as this series progresses ti_size can be zero at the end of the trans= fer.=0D =0D Use the SCSI phase to determine the transfer direction as used in other S= CSI=0D controller implementations.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-9-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: c47b5835f5b8f971b10ecf5965117ffa3500d0ce=0D https://github.com/qemu/qemu/commit/c47b5835f5b8f971b10ecf5965117ff= a3500d0ce=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: introduce esp_get_tc() and esp_set_tc()=0D =0D These functions simplify reading and writing the TC register value withou= t having to=0D manually shift each individual 8-bit value.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-10-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: c04ed569b014126927760e4607385719bd66bff9=0D https://github.com/qemu/qemu/commit/c04ed569b014126927760e460738571= 9bd66bff9=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: introduce esp_get_stc()=0D =0D This function simplifies reading the STC register value without having to= manually=0D shift each individual 8-bit value.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-11-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 96676c2f749d9da99ee03ec0eee342bd7d09de26=0D https://github.com/qemu/qemu/commit/96676c2f749d9da99ee03ec0eee342b= d7d09de26=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: apply transfer length adjustment when STC is zero at TC load time=0D= =0D Perform the length adjustment whereby a value of 0 in the STC represents=0D= a transfer length of 0x10000 at the point where the TC is loaded at the=0D= start of a DMA command rather than just when a TI (Transfer Information)=0D= command is executed. This better matches the description as given in the=0D= datasheet.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-12-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 5eb7a23fb22f10f09cecba61e7bf61cecaee3f96=0D https://github.com/qemu/qemu/commit/5eb7a23fb22f10f09cecba61e7bf61c= ecaee3f96=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: remove dma_counter from ESPState=0D =0D The value of dma_counter is set once at the start of the transfer and rem= ains=0D the same until the transfer is complete. This allows the check in esp_tra= nsfer_data=0D to be simplified since dma_left will always be non-zero until the transfe= r is=0D completed.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-13-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 6cc88d6bf932a905ce36e933dc078eeb6b54ac92=0D https://github.com/qemu/qemu/commit/6cc88d6bf932a905ce36e933dc078ee= b6b54ac92=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: remove dma_left from ESPState=0D =0D The ESP device already keeps track of the remaining bytes left to transfe= r via=0D its TC (transfer counter) register which is decremented for each byte tha= t=0D is transferred across the SCSI bus.=0D =0D Switch the transfer logic to use the value of TC instead of dma_left and = then=0D remove dma_left completely, adding logic to the vmstate_esp post_load() f= unction=0D to transfer the old dma_left value to the TC register during migration fr= om=0D older versions.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-14-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: b76624de5062fdf874a377ade84af90c62903833=0D https://github.com/qemu/qemu/commit/b76624de5062fdf874a377ade84af90= c62903833=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: remove minlen restriction in handle_ti=0D =0D The limiting of DMA transfers to the maximum size of the available data i= s already=0D handled by esp_do_dma() and do_dma_pdma_cb().=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-15-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 761bef75dd0bcad72e6041172f9bb573c9237ee4=0D https://github.com/qemu/qemu/commit/761bef75dd0bcad72e6041172f9bb57= 3c9237ee4=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: introduce esp_pdma_read() and esp_pdma_write() functions=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-16-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 6e3fafa8bb0c22b57db1f7e2c7edf41545ba5294=0D https://github.com/qemu/qemu/commit/6e3fafa8bb0c22b57db1f7e2c7edf41= 545ba5294=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: use pdma_origin directly in esp_pdma_read()/esp_pdma_write()=0D =0D This is the first step in removing get_pdma_buf() from esp.c.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-17-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 8da90e819452e77eefeedc38d1e00a03f2735ab2=0D https://github.com/qemu/qemu/commit/8da90e819452e77eefeedc38d1e00a0= 3f2735ab2=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: move pdma_len and TC logic into esp_pdma_read()/esp_pdma_write()=0D= =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-18-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: bb0bc7bbc9764a5e9e81756819838c5db88652b8=0D https://github.com/qemu/qemu/commit/bb0bc7bbc9764a5e9e81756819838c5= db88652b8=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: accumulate SCSI commands for PDMA transfers in cmdbuf instead of p= dma_buf=0D =0D ESP SCSI commands are already accumulated in cmdbuf and so there is no ne= ed to=0D keep a separate pdma_buf buffer. Accumulate SCSI commands for PDMA transf= ers in=0D cmdbuf instead of pdma_buf so update cmdlen accordingly and change pdma_o= rigin=0D for PDMA transfers to CMD which allows the PDMA origin to be removed.=0D =0D This commit also removes a stray memcpy() from get_cmd() which is a no-op= because=0D cmdlen is always zero at the start of a command.=0D =0D Notionally the removal of pdma_buf from vmstate_esp_pdma also breaks migr= ation=0D compatibility for the PDMA subsection until its complete removal by the e= nd of=0D the series.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-19-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: c959f218437c8828490267d42f42f9aa851dd8ea=0D https://github.com/qemu/qemu/commit/c959f218437c8828490267d42f42f9a= a851dd8ea=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: remove buf parameter from do_cmd()=0D =0D Now that all SCSI commands are accumulated in cmdbuf, remove the buf para= meter=0D from do_cmd() since this always points to cmdbuf.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-20-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: cfcea0f9d76f56d1a756a5ead28f5a8900b750e3=0D https://github.com/qemu/qemu/commit/cfcea0f9d76f56d1a756a5ead28f5a8= 900b750e3=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: remove the buf and buflen parameters from get_cmd()=0D =0D Now that all SCSI commands are accumulated in cmdbuf, remove the buf and = buflen=0D parameters from get_cmd() since these always reference cmdbuf and ESP_CMD= BUF_SZ=0D respectively.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-21-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 2c573cfe19cd3f4cad7540ec542c40e54305d56a=0D https://github.com/qemu/qemu/commit/2c573cfe19cd3f4cad7540ec542c40e= 54305d56a=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: remove redundant pdma_start from ESPState=0D =0D Now that PDMA SCSI commands are accumulated in cmdbuf in the same way as = normal=0D commands, the existing logic for locating the start of the SCSI command i= n=0D cmdbuf via cmdlen can be used. This enables the PDMA-specific pdma_start = and=0D also get_pdma_buf() to be removed.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-22-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 93efe2e6243d0192ed0e383a3e3e91b0ce1d9063=0D https://github.com/qemu/qemu/commit/93efe2e6243d0192ed0e383a3e3e91b= 0ce1d9063=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: move PDMA length adjustments into esp_pdma_read()/esp_pdma_write()= =0D =0D Here the updates to async_len and ti_size are moved into the correspondin= g=0D esp_pdma_read()/esp_pdma_write() function to eliminate the reference to=0D= pdma_cur in do_dma_pdma_cb().=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-23-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: ad7f468c4252ee83f6e150c11ae02f71f6d467ef=0D https://github.com/qemu/qemu/commit/ad7f468c4252ee83f6e150c11ae02f7= 1f6d467ef=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: use ti_wptr/ti_rptr to manage the current FIFO position for PDMA=0D= =0D This eliminates the last user of the PDMA-specific pdma_cur variable whic= h can=0D now be removed.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-24-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 3c421400fff80054aec9b805a0622b63e372f572=0D https://github.com/qemu/qemu/commit/3c421400fff80054aec9b805a0622b6= 3e372f572=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: use in-built TC to determine PDMA transfer length=0D =0D Real hardware simply counts down using the in-built TC to determine when = the=0D the PDMA request is complete. Use the TC to determine the PDMA transfer l= ength=0D which then enables us to remove the redundant pdma_len variable.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-25-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 02abe246889398a108a3f92428b9f1f87e32de81=0D https://github.com/qemu/qemu/commit/02abe246889398a108a3f92428b9f1f= 87e32de81=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: remove CMD pdma_origin=0D =0D The cmdbuf is really just a copy of FIFO data (including extra message ph= ase=0D bytes) so its pdma_origin is effectively TI. Fortunately we already know = when=0D we are receiving a SCSI command since do_cmd =3D=3D 1 which enables us to= =0D distinguish between the two cases in esp_pdma_read()/esp_pdma_write().=0D= =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-26-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: c7bce09c0595b235ad367a12bae54cb04b33025b=0D https://github.com/qemu/qemu/commit/c7bce09c0595b235ad367a12bae54cb= 04b33025b=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: rename get_cmd_cb() to esp_select()=0D =0D This better describes the purpose of the function.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-27-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 496913153a9d5d0b200c2ac30a541f9f294f55aa=0D https://github.com/qemu/qemu/commit/496913153a9d5d0b200c2ac30a541f9= f294f55aa=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: fix PDMA target selection=0D =0D Currently the target selection for PDMA is done after the SCSI command ha= s been=0D delivered which is not correct. Perform target selection as part of the i= nitial=0D get_cmd() call when the command is submitted: if no target is present, do= n't=0D raise DRQ.=0D =0D If the target is present then switch to the command phase since the MacOS= toolbox=0D ROM checks for this before attempting to submit the SCSI command.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-28-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 82141c8b2237d186177c430eba985dda54245ad9=0D https://github.com/qemu/qemu/commit/82141c8b2237d186177c430eba985dd= a54245ad9=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: use FIFO for PDMA transfers between initiator and device=0D =0D PDMA as implemented on the Quadra 800 uses DREQ to load data into the FIF= O=0D up to a maximum of 16 bytes at a time. The MacOS toolbox ROM requires thi= s=0D because it mixes FIFO and PDMA transfers whilst checking the FIFO status=0D= and counter registers to ensure success.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-29-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 43d02df31b8679dcc69c4ffcdb6cc658e1d348f7=0D https://github.com/qemu/qemu/commit/43d02df31b8679dcc69c4ffcdb6cc65= 8e1d348f7=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: remove pdma_origin from ESPState=0D =0D Now that all data is transferred via the FIFO (ti_buf) there is no need t= o track=0D the source buffer being used for the data transfer. This also eliminates = the=0D need for a separate subsection for PDMA state migration.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-30-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: cf1b8286007a5a12f7d42d484b8ac0e031038e2e=0D https://github.com/qemu/qemu/commit/cf1b8286007a5a12f7d42d484b8ac0e= 031038e2e=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: add 4 byte PDMA read and write transfers=0D =0D The MacOS toolbox ROM performs 4 byte reads/writes when transferring data= to=0D and from the target. Since the SCSI bus is 16-bits wide, use the memory A= PI=0D to split a 4 byte access into 2 x 2 byte accesses.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-31-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: bb27b13d183a4fdf8d63072861e03d320e41cb0e=0D https://github.com/qemu/qemu/commit/bb27b13d183a4fdf8d63072861e03d3= 20e41cb0e=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: implement FIFO flush command=0D =0D At this point it is now possible to properly implement the FIFO flush com= mand=0D without causing guest errors.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-32-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: cf47a41e055f6f90a2cecdb9eb3c4cebfde23f2a=0D https://github.com/qemu/qemu/commit/cf47a41e055f6f90a2cecdb9eb3c4ce= bfde23f2a=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: latch individual bits in ESP_RINTR register=0D =0D Currently the ESP_RINTR register is set to a specific value as required w= ithin=0D the ESP state machine. In order to implement the upcoming deferred interr= upt=0D functionality it is necessary to set individual bits within ESP_RINTR so = that=0D a deferred interrupt will not overwrite the value of any other interrupt = bits.=0D =0D This also requires fixing up a few locations where the ESP_RINTR and ESP_= RSEQ=0D registers are set/reset unexpectedly.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-33-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 4e78f3bf357e0ef2f67e372097f2be8fe0521814=0D https://github.com/qemu/qemu/commit/4e78f3bf357e0ef2f67e372097f2be8= fe0521814=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: defer command completion interrupt on incoming data transfers=0D =0D The MacOS toolbox ROM issues a command to the ESP controller as part of i= ts=0D "FAST" SCSI routines and then proceeds to read the incoming data soon aft= er=0D receiving the command completion interrupt.=0D =0D Unfortunately due to SCSI block transfers being asynchronous the incoming= data=0D may not yet be present causing an underflow error. Resolve this by waitin= g for=0D the SCSI subsystem transfer_data callback before raising the command comp= letion=0D interrupt.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-34-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 4aaa6ac38393e6657869da528ad8c35657e23f84=0D https://github.com/qemu/qemu/commit/4aaa6ac38393e6657869da528ad8c35= 657e23f84=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: remove old deferred command completion mechanism=0D =0D Commit ea84a44250 "scsi: esp: Defer command completion until previous int= errupts=0D have been handled" provided a mechanism to delay the command completion i= nterrupt=0D until ESP_RINTR is read after the command has completed.=0D =0D With the previous fixes for latching the ESP_RINTR bits and deferring the= setting=0D of the command completion interrupt for incoming data to the SCSI callbac= k, this=0D workaround is no longer required and can be removed.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-35-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 4e0ed62937d0498295457c2e1d8282a24ba140cb=0D https://github.com/qemu/qemu/commit/4e0ed62937d0498295457c2e1d8282a= 24ba140cb=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: raise interrupt after every non-DMA byte transferred to the FIFO=0D= =0D This matches the description in the datasheet and is required as support = for=0D non-DMA transfers is added.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-36-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 20c8d2ed6ae159b5840a46364bb679278f172576=0D https://github.com/qemu/qemu/commit/20c8d2ed6ae159b5840a46364bb6792= 78f172576=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: add maxlen parameter to get_cmd()=0D =0D Some guests use a mixture of DMA and non-DMA transfers in combination wit= h the=0D SATN and stop command to transfer message out phase and command phase byt= es to=0D the target. Prepare for the next commit by adding a maxlen parameter to=0D= get_cmd() to allow partial transfers.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-37-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 799d90d818ba38997e9f5de2163bbfc96256ac0b=0D https://github.com/qemu/qemu/commit/799d90d818ba38997e9f5de2163bbfc= 96256ac0b=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: transition to message out phase after SATN and stop command=0D =0D The SCSI bus should remain in the message out phase after the SATN and st= op=0D command rather than transitioning to the command phase. A new ESPState va= riable=0D cmdbuf_cdb_offset is added which stores the offset of the CDB from the st= art=0D of cmdbuf when accumulating extended message out phase data.=0D =0D Currently any extended message out data is discarded in do_cmd() before t= he CDB=0D is processed in do_busid_cmd().=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-38-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 042879fc3fc02b67d907b462020c975f6fb1f5ae=0D https://github.com/qemu/qemu/commit/042879fc3fc02b67d907b462020c975= f6fb1f5ae=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: convert ti_buf from array to Fifo8=0D =0D Rename TI_BUFSZ to ESP_FIFO_SZ since this constant is really describing t= he size=0D of the FIFO and is not directly related to the TI size.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-39-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 023666da792ac465e43dee3bacb21bb781de5cdb=0D https://github.com/qemu/qemu/commit/023666da792ac465e43dee3bacb21bb= 781de5cdb=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: convert cmdbuf from array to Fifo8=0D =0D Rename ESP_CMDBUF_SZ to ESP_CMDFIFO_SZ and cmdbuf_cdb_offset to cmdfifo_c= db_offset=0D to indicate that the command buffer type has changed from an array to a F= ifo8.=0D =0D This also enables us to remove the ESPState field cmdlen since the comman= d length=0D is now simply the number of elements used in cmdfifo.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-40-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 238ec4d7d4dba29c8d6d8766351d1dedf84008e0=0D https://github.com/qemu/qemu/commit/238ec4d7d4dba29c8d6d8766351d1de= df84008e0=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: add trivial implementation of the ESP_RFLAGS register=0D =0D The bottom 5 bits contain the number of bytes remaining in the FIFO which= is=0D trivial to implement with Fifo8 (the remaining bits are unimplemented and= left=0D as 0 for now).=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-41-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 1b9e48a5bdbc96833113f249909af0d30a76cc25=0D https://github.com/qemu/qemu/commit/1b9e48a5bdbc96833113f249909af0d= 30a76cc25=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D esp: implement non-DMA transfers in PDMA mode=0D =0D The MacOS toolbox ROM uses non-DMA TI commands to handle the first/last b= yte=0D of an unaligned 16-bit transfer to memory.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-42-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: 7aa6baee7c8a54473f28c6fa1e980a9ff7989036=0D https://github.com/qemu/qemu/commit/7aa6baee7c8a54473f28c6fa1e980a9= ff7989036=0D Author: Mark Cave-Ayland =0D Date: 2021-03-07 (Sun, 07 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/esp.c=0D =0D Log Message:=0D -----------=0D esp: add support for unaligned accesses=0D =0D When the MacOS toolbox ROM transfers data from a target device to an unal= igned=0D memory address, the first/last byte of a 16-bit transfer needs to be hand= led=0D separately. This means that the first byte is preloaded into the FIFO bef= ore=0D the transfer, or the last byte remains in the FIFO after the transfer.=0D= =0D The result of this is that the PDMA routines must be updated so that the = FIFO=0D is loaded/unloaded if the last 16-bit word is used (rather than the last = byte)=0D and any remaining byte from a FIFO wraparound is handled correctly.=0D =0D Signed-off-by: Mark Cave-Ayland =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210304221103.6369-43-mark.cave-ayland@ilande.co.uk>=0D =0D =0D Commit: b2ae1009d7cca2701e17eae55ae2d44fd22c942a=0D https://github.com/qemu/qemu/commit/b2ae1009d7cca2701e17eae55ae2d44= fd22c942a=0D Author: Peter Maydell =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/dma/sparc32_dma.c=0D M hw/m68k/q800.c=0D M hw/mips/jazz.c=0D M hw/scsi/esp-pci.c=0D M hw/scsi/esp.c=0D M hw/scsi/trace-events=0D M hw/sparc/sun4m.c=0D M include/hw/scsi/esp.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20210307= ' into staging=0D =0D qemu-sparc queue=0D =0D # gpg: Signature made Sun 07 Mar 2021 12:07:13 GMT=0D # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F3= 21F=0D # gpg: issuer "mark.cave-ayland@ilande.co.uk"=0D # gpg: Good signature from "Mark Cave-Ayland " [full]=0D # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F = 321F=0D =0D * remotes/mcayland/tags/qemu-sparc-20210307: (42 commits)=0D esp: add support for unaligned accesses=0D esp: implement non-DMA transfers in PDMA mode=0D esp: add trivial implementation of the ESP_RFLAGS register=0D esp: convert cmdbuf from array to Fifo8=0D esp: convert ti_buf from array to Fifo8=0D esp: transition to message out phase after SATN and stop command=0D esp: add maxlen parameter to get_cmd()=0D esp: raise interrupt after every non-DMA byte transferred to the FIFO=0D= esp: remove old deferred command completion mechanism=0D esp: defer command completion interrupt on incoming data transfers=0D esp: latch individual bits in ESP_RINTR register=0D esp: implement FIFO flush command=0D esp: add 4 byte PDMA read and write transfers=0D esp: remove pdma_origin from ESPState=0D esp: use FIFO for PDMA transfers between initiator and device=0D esp: fix PDMA target selection=0D esp: rename get_cmd_cb() to esp_select()=0D esp: remove CMD pdma_origin=0D esp: use in-built TC to determine PDMA transfer length=0D esp: use ti_wptr/ti_rptr to manage the current FIFO position for PDMA=0D= ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/bb5643ff6129...b2ae1009d7cc= =0D From MAILER-DAEMON Tue Mar 09 11:15:47 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJf1N-0004CO-K1 for mharc-qemu-commits@gnu.org; Tue, 09 Mar 2021 11:15:47 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:43466) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJf1K-000476-PW for qemu-commits@nongnu.org; Tue, 09 Mar 2021 11:15:42 -0500 Received: from out-17.smtp.github.com ([192.30.252.200]:42135 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJf1G-0000se-VQ for qemu-commits@nongnu.org; Tue, 09 Mar 2021 11:15:42 -0500 Received: from github.com (hubbernetes-node-fa11bf0.va3-iad.github.net [10.48.109.27]) by smtp.github.com (Postfix) with ESMTPA id 31FCB5C07DD for ; Tue, 9 Mar 2021 08:15:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615306538; bh=Tk0xcDVS9GNsxl8hNOHhnG7Ho/j8wcT/BJGRpU7o2uA=; h=Date:From:To:Subject:From; b=A/FSGM+w7LvgkmwojZnq4q2CnYYCZM7mgX24V7WGcdo68iDCn5eP2larJLXgj0sdI +9f5cmwb6dBeG85+uK+woYRa4Irewcnr/yAk8ppoPAtEIUAhVVCEcKK61ht1YcLLeG f9u/69nIsUBaWw7loteLxQsgKE2DicFvF2cKh8ms= Date: Tue, 09 Mar 2021 08:15:38 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] abf06e: docs/system: add a gentle prompt for the complexit... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 09 Mar 2021 16:15:43 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: abf06e0f076a8ed489501f9d6f719c7b451d13f0=0D https://github.com/qemu/qemu/commit/abf06e0f076a8ed489501f9d6f719c7= b451d13f0=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/system/quickstart.rst=0D M docs/system/targets.rst=0D =0D Log Message:=0D -----------=0D docs/system: add a gentle prompt for the complexity to come=0D =0D We all know the QEMU command line can become a fiendishly complex=0D beast. Lets gently prepare our user for the horrors to come by=0D referencing where other example command lines can be found in the=0D manual.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Stefan Hajnoczi =0D Reviewed-by: John Snow =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210305092328.31792-3-alex.bennee@linaro.org>=0D =0D =0D Commit: 92ab8765fa8a086dd0a3411a5f6e00c153ceefc9=0D https://github.com/qemu/qemu/commit/92ab8765fa8a086dd0a3411a5f6e00c= 153ceefc9=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D A tests/docker/test-tcg=0D =0D Log Message:=0D -----------=0D tests/docker: add a test-tcg for building then running check-tcg=0D =0D This is mostly useful for verifying containers will work on the CI=0D setup.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210305092328.31792-4-alex.bennee@linaro.org>=0D =0D =0D Commit: c38cef87e8f828cb3e554fc9bceb4e895a8f2b41=0D https://github.com/qemu/qemu/commit/c38cef87e8f828cb3e554fc9bceb4e8= 95a8f2b41=0D Author: Alessandro Di Federico =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M tests/docker/Makefile.include=0D A tests/docker/dockerfiles/debian-hexagon-cross.docker=0D A tests/docker/dockerfiles/debian-hexagon-cross.docker.d/build-toolch= ain.sh=0D =0D Log Message:=0D -----------=0D docker: Add Hexagon image=0D =0D [PMD: Base on qemu/debian10, add missing EXTRA_FILES, remove X86]=0D =0D Signed-off-by: Alessandro Di Federico =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Brian Cain =0D Message-Id: <20210228222314.304787-2-f4bug@amsat.org>=0D [AJB: add build-dep for QEMU, include in MAINTAINERS]=0D Signed-off-by: Alex Benn=C3=A9e =0D =0D squash! docker: Add Hexagon image=0D Message-Id: <20210305092328.31792-5-alex.bennee@linaro.org>=0D =0D =0D Commit: 5d9be7ac160ec38fa2bc2c6ecfe20a75978b893e=0D https://github.com/qemu/qemu/commit/5d9be7ac160ec38fa2bc2c6ecfe20a7= 5978b893e=0D Author: Alessandro Di Federico =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/tcg/configure.sh=0D =0D Log Message:=0D -----------=0D tests/tcg: Use Hexagon Docker image=0D =0D [PMD: Split from 'Add Hexagon Docker image' patch]=0D =0D Signed-off-by: Alessandro Di Federico =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210228222314.304787-5-f4bug@amsat.org>=0D Message-Id: <20210305092328.31792-6-alex.bennee@linaro.org>=0D =0D =0D Commit: 9047fa308ef4349eafa33291d76f770577ce6ac7=0D https://github.com/qemu/qemu/commit/9047fa308ef4349eafa33291d76f770= 577ce6ac7=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab: add build-user-hexagon test=0D =0D We special case this as the container with the cross compiler for the=0D tests takes so long to build it is manually uploaded into the=0D registry.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210305092328.31792-7-alex.bennee@linaro.org>=0D =0D =0D Commit: 0ec009a5b642a632058f0734a8bb280f86482bd4=0D https://github.com/qemu/qemu/commit/0ec009a5b642a632058f0734a8bb280= f86482bd4=0D Author: Daniele Buono =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Allow custom # of parallel linkers=0D =0D Define a new variable LD_JOBS, that can be used to select=0D the maximum number of linking jobs to be executed in parallel.=0D If the variable is not defined, maintain the default given by=0D make -j=0D =0D Currently, make parallelism at build time is based on the number=0D of cpus available.=0D =0D This doesn't work well with LTO at linking, because with LTO the=0D linker has to load in memory all the intermediate object files=0D for optimization.=0D The end result is that, if the gitlab runner happens to run two=0D linking processes at the same time, the job will fail with an=0D out-of-memory error,=0D =0D This patch leverages the ability to maintain high parallelism at=0D compile time, but limit the number of linkers executed in parallel.=0D =0D Signed-off-by: Daniele Buono =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210304030948.9367-2-dbuono@linux.vnet.ibm.com>=0D Message-Id: <20210305092328.31792-8-alex.bennee@linaro.org>=0D =0D =0D Commit: 70365a8c4267d0636e5ee56baae1215e8c10188b=0D https://github.com/qemu/qemu/commit/70365a8c4267d0636e5ee56baae1215= e8c10188b=0D Author: Daniele Buono =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Add jobs to test CFI flags=0D =0D QEMU has had options to enable control-flow integrity features=0D for a few months now. Add two sets of build/check/acceptance=0D jobs to ensure the binary produced is working fine.=0D =0D The three sets allow testing of x86_64 binaries for x86_64, s390x,=0D ppc64 and aarch64 targets=0D =0D [AJB: tweak job names to avoid brands]=0D =0D Signed-off-by: Daniele Buono =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210304030948.9367-3-dbuono@linux.vnet.ibm.com>=0D Message-Id: <20210305092328.31792-9-alex.bennee@linaro.org>=0D =0D =0D Commit: 2141d3265aab4c4798a54f6f75d690d10d9b88d6=0D https://github.com/qemu/qemu/commit/2141d3265aab4c4798a54f6f75d690d= 10d9b88d6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/docker/dockerfiles/debian10.docker=0D =0D Log Message:=0D -----------=0D tests/docker: Use --arch-only when building Debian cross image=0D =0D When building a Docker image based on debian10.docker on=0D a non-x86 host, we get:=0D =0D [2/4] RUN apt update && DEBIAN_FRONTEND=3Dnoninteractive eatmydata = apt build-dep -yy qemu=0D Reading package lists... Done=0D Building dependency tree=0D Reading state information... Done=0D Some packages could not be installed. This may mean that you have=0D requested an impossible situation or if you are using the unstable=0D distribution that some required packages have not yet been created=0D or been moved out of Incoming.=0D The following information may help to resolve the situation:=0D =0D The following packages have unmet dependencies:=0D builddeps:qemu : Depends: gcc-s390x-linux-gnu but it is not installable= =0D Depends: gcc-alpha-linux-gnu but it is not installable= =0D E: Unable to correct problems, you have held broken packages.=0D =0D Fix by using the --arch-only option suggested here:=0D https://bugs.launchpad.net/ubuntu/+source/qemu/+bug/1866032/comments/1=0D= =0D Suggested-by: Christian Ehrhardt =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alex Benn=C3=A9e =0D Message-Id: <20210223211115.2971565-1-f4bug@amsat.org>=0D Message-Id: <20210305092328.31792-10-alex.bennee@linaro.org>=0D =0D =0D Commit: 3bfe19665e7b005c01a5f3c1d22613ca5bdd7239=0D https://github.com/qemu/qemu/commit/3bfe19665e7b005c01a5f3c1d22613c= a5bdd7239=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M .editorconfig=0D =0D Log Message:=0D -----------=0D .editorconfig: update the automatic mode setting for Emacs=0D =0D It seems the editor specific keywords have been deprecated in the main=0D= editorconfig plugin:=0D =0D https://github.com/editorconfig/editorconfig-emacs#file-type-file_type_= ext-file_type_emacs=0D =0D Update the keywords to the suggested one and point users at the=0D extension.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210305144839.6558-1-alex.bennee@linaro.org>=0D =0D =0D Commit: caa53efa56fe2b0818380ff7ee4458417ec731f8=0D https://github.com/qemu/qemu/commit/caa53efa56fe2b0818380ff7ee44584= 17ec731f8=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/virt.c=0D M include/hw/arm/virt.h=0D M include/hw/boards.h=0D =0D Log Message:=0D -----------=0D hw/board: promote fdt from ARM VirtMachineState to MachineState=0D =0D The use of FDT's is quite common across our various platforms. To=0D allow the guest loader to tweak it we need to make it available in=0D the generic state. This creates the field and migrates the initial=0D user to use the generic field. Other boards will be updated in later=0D patches.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303173642.3805-2-alex.bennee@linaro.org>=0D =0D =0D Commit: 689bcfda517f86eff7184c3c89e981b7c7bbc4e4=0D https://github.com/qemu/qemu/commit/689bcfda517f86eff7184c3c89e981b= 7c7bbc4e4=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/virt.c=0D M include/hw/riscv/virt.h=0D =0D Log Message:=0D -----------=0D hw/riscv: migrate fdt field to generic MachineState=0D =0D This is a mechanical change to make the fdt available through=0D MachineState.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303173642.3805-3-alex.bennee@linaro.org>=0D =0D =0D Commit: 80fb65d7e57455784d0d658af19d4cae850d0b83=0D https://github.com/qemu/qemu/commit/80fb65d7e57455784d0d658af19d4ca= e850d0b83=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M include/sysemu/device_tree.h=0D M softmmu/device_tree.c=0D =0D Log Message:=0D -----------=0D device_tree: add qemu_fdt_setprop_string_array helper=0D =0D A string array in device tree is simply a series of \0 terminated=0D strings next to each other. As libfdt doesn't support that directly=0D we need to build it ourselves.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Message-Id: <20210303173642.3805-4-alex.bennee@linaro.org>=0D =0D =0D Commit: dc7e7ca170c7f9d5e08e658387d818d2564babc4=0D https://github.com/qemu/qemu/commit/dc7e7ca170c7f9d5e08e658387d818d= 2564babc4=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A hw/core/guest-loader.c=0D A hw/core/guest-loader.h=0D M hw/core/meson.build=0D =0D Log Message:=0D -----------=0D hw/core: implement a guest-loader to support static hypervisor guests=0D= =0D Hypervisors, especially type-1 ones, need the firmware/bootcode to put=0D= their initial guest somewhere in memory and pass the information to it=0D= via platform data. The guest-loader is modelled after the generic=0D loader for exactly this sort of purpose:=0D =0D $QEMU $ARGS -kernel ~/xen.git/xen/xen \=0D -append "dom0_mem=3D1G,max:1G loglvl=3Dall guest_loglvl=3Dall" \=0D -device guest-loader,addr=3D0x42000000,kernel=3DImage,bootargs=3D"roo= t=3D/dev/sda2 ro console=3Dhvc0 earlyprintk=3Dxen" \=0D -device guest-loader,addr=3D0x47000000,initrd=3Drootfs.cpio=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303173642.3805-5-alex.bennee@linaro.org>=0D =0D =0D Commit: 2c7932db32c86a8b9244c7cf0182be141ee47495=0D https://github.com/qemu/qemu/commit/2c7932db32c86a8b9244c7cf0182be1= 41ee47495=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D R docs/generic-loader.txt=0D A docs/system/generic-loader.rst=0D M docs/system/index.rst=0D =0D Log Message:=0D -----------=0D docs: move generic-loader documentation into the main manual=0D =0D We might as well surface this useful information in the manual so=0D users can find it easily. It is a fairly simple conversion to rst with=0D= the only textual fixes being QemuOps to QemuOpts.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Message-Id: <20210303173642.3805-6-alex.bennee@linaro.org>=0D =0D =0D Commit: 1ad5284d3feae0394b151d2e781e6e9605ec963a=0D https://github.com/qemu/qemu/commit/1ad5284d3feae0394b151d2e781e6e9= 605ec963a=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A docs/system/guest-loader.rst=0D M docs/system/index.rst=0D =0D Log Message:=0D -----------=0D docs: add some documentation for the guest-loader=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Message-Id: <20210303173642.3805-7-alex.bennee@linaro.org>=0D =0D =0D Commit: c6a5e0df4f2dc97722a5750dd9c265278b8830a0=0D https://github.com/qemu/qemu/commit/c6a5e0df4f2dc97722a5750dd9c2652= 78b8830a0=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A tests/acceptance/boot_xen.py=0D =0D Log Message:=0D -----------=0D tests/avocado: add boot_xen tests=0D =0D These tests make sure we can boot the Xen hypervisor with a Dom0=0D kernel using the guest-loader. We currently have to use a kernel I=0D built myself because there are issues using the Debian kernel images.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Tested-by: Cleber Rosa =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Cleber Rosa =0D Message-Id: <20210303173642.3805-8-alex.bennee@linaro.org>=0D =0D =0D Commit: 802f149f5a86574b7a161346b5ebdd7df647557b=0D https://github.com/qemu/qemu/commit/802f149f5a86574b7a161346b5ebdd7= df647557b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M gdbstub.c=0D M hw/mips/malta.c=0D M hw/semihosting/arm-compat-semi.c=0D M hw/semihosting/config.c=0D M hw/semihosting/console.c=0D R include/hw/semihosting/console.h=0D R include/hw/semihosting/semihost.h=0D A include/semihosting/console.h=0D A include/semihosting/semihost.h=0D M linux-user/aarch64/cpu_loop.c=0D M linux-user/arm/cpu_loop.c=0D M linux-user/riscv/cpu_loop.c=0D M linux-user/semihost.c=0D M softmmu/vl.c=0D M stubs/semihost.c=0D M target/arm/helper.c=0D M target/arm/m_helper.c=0D M target/arm/translate-a64.c=0D M target/arm/translate.c=0D M target/lm32/helper.c=0D M target/m68k/op_helper.c=0D M target/mips/cpu.c=0D M target/mips/mips-semi.c=0D M target/mips/translate.c=0D M target/nios2/helper.c=0D M target/riscv/cpu_helper.c=0D M target/unicore32/helper.c=0D M target/xtensa/translate.c=0D M target/xtensa/xtensa-semi.c=0D =0D Log Message:=0D -----------=0D semihosting: Move include/hw/semihosting/ -> include/semihosting/=0D =0D We want to move the semihosting code out of hw/ in the next patch.=0D =0D This patch contains the mechanical steps, created using:=0D =0D $ git mv include/hw/semihosting/ include/=0D $ sed -i s,hw/semihosting,semihosting, $(git grep -l hw/semihosting)=0D= =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210226131356.3964782-2-f4bug@amsat.org>=0D Message-Id: <20210305135451.15427-2-alex.bennee@linaro.org>=0D =0D =0D Commit: 8109b8cadf5979a29b4b6e1ca7288bc0ee676426=0D https://github.com/qemu/qemu/commit/8109b8cadf5979a29b4b6e1ca7288bc= 0ee676426=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M Kconfig=0D M MAINTAINERS=0D M hw/Kconfig=0D M hw/meson.build=0D R hw/semihosting/Kconfig=0D R hw/semihosting/arm-compat-semi.c=0D R hw/semihosting/common-semi.h=0D R hw/semihosting/config.c=0D R hw/semihosting/console.c=0D R hw/semihosting/meson.build=0D M meson.build=0D A semihosting/Kconfig=0D A semihosting/arm-compat-semi.c=0D A semihosting/common-semi.h=0D A semihosting/config.c=0D A semihosting/console.c=0D A semihosting/meson.build=0D =0D Log Message:=0D -----------=0D semihosting: Move hw/semihosting/ -> semihosting/=0D =0D With the exception of hw/core/, the hw/ directory only contains=0D device models used in system emulation. Semihosting is also used=0D by user emulation. As a generic feature, move it out of hw/ directory.=0D= =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210226131356.3964782-3-f4bug@amsat.org>=0D Message-Id: <20210305135451.15427-3-alex.bennee@linaro.org>=0D =0D =0D Commit: 750efa2ec476a3056e32a8c6a9f433ad2d5dfe6b=0D https://github.com/qemu/qemu/commit/750efa2ec476a3056e32a8c6a9f433a= d2d5dfe6b=0D Author: Peter Maydell =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M .editorconfig=0D M .gitlab-ci.yml=0D M Kconfig=0D M MAINTAINERS=0D R docs/generic-loader.txt=0D A docs/system/generic-loader.rst=0D A docs/system/guest-loader.rst=0D M docs/system/index.rst=0D M docs/system/quickstart.rst=0D M docs/system/targets.rst=0D M gdbstub.c=0D M hw/Kconfig=0D M hw/arm/virt.c=0D A hw/core/guest-loader.c=0D A hw/core/guest-loader.h=0D M hw/core/meson.build=0D M hw/meson.build=0D M hw/mips/malta.c=0D M hw/riscv/virt.c=0D R hw/semihosting/Kconfig=0D R hw/semihosting/arm-compat-semi.c=0D R hw/semihosting/common-semi.h=0D R hw/semihosting/config.c=0D R hw/semihosting/console.c=0D R hw/semihosting/meson.build=0D M include/hw/arm/virt.h=0D M include/hw/boards.h=0D M include/hw/riscv/virt.h=0D R include/hw/semihosting/console.h=0D R include/hw/semihosting/semihost.h=0D A include/semihosting/console.h=0D A include/semihosting/semihost.h=0D M include/sysemu/device_tree.h=0D M linux-user/aarch64/cpu_loop.c=0D M linux-user/arm/cpu_loop.c=0D M linux-user/riscv/cpu_loop.c=0D M linux-user/semihost.c=0D M meson.build=0D A semihosting/Kconfig=0D A semihosting/arm-compat-semi.c=0D A semihosting/common-semi.h=0D A semihosting/config.c=0D A semihosting/console.c=0D A semihosting/meson.build=0D M softmmu/device_tree.c=0D M softmmu/vl.c=0D M stubs/semihost.c=0D M target/arm/helper.c=0D M target/arm/m_helper.c=0D M target/arm/translate-a64.c=0D M target/arm/translate.c=0D M target/lm32/helper.c=0D M target/m68k/op_helper.c=0D M target/mips/cpu.c=0D M target/mips/mips-semi.c=0D M target/mips/translate.c=0D M target/nios2/helper.c=0D M target/riscv/cpu_helper.c=0D M target/unicore32/helper.c=0D M target/xtensa/translate.c=0D M target/xtensa/xtensa-semi.c=0D A tests/acceptance/boot_xen.py=0D M tests/docker/Makefile.include=0D A tests/docker/dockerfiles/debian-hexagon-cross.docker=0D A tests/docker/dockerfiles/debian-hexagon-cross.docker.d/build-toolch= ain.sh=0D M tests/docker/dockerfiles/debian10.docker=0D A tests/docker/test-tcg=0D M tests/tcg/configure.sh=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-docs-xe= n-updates-080321-1' into staging=0D =0D Testing, guest-loader and other misc tweaks=0D =0D - add warning text to quickstart example=0D - add support for hexagon check-tcg tests=0D - add CFI tests to CI=0D - use --arch-only for docker pre-requisites=0D - fix .editorconfig for emacs=0D - add guest-loader for Xen-like hypervisor testing=0D - move generic-loader docs into manual proper=0D - move semihosting out of hw/=0D =0D # gpg: Signature made Mon 08 Mar 2021 12:26:59 GMT=0D # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2= A44=0D # gpg: Good signature from "Alex Benn=C3=A9e (Master Work Key) " [full]=0D # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E = 2A44=0D =0D * remotes/stsquad/tags/pull-testing-docs-xen-updates-080321-1:=0D semihosting: Move hw/semihosting/ -> semihosting/=0D semihosting: Move include/hw/semihosting/ -> include/semihosting/=0D tests/avocado: add boot_xen tests=0D docs: add some documentation for the guest-loader=0D docs: move generic-loader documentation into the main manual=0D hw/core: implement a guest-loader to support static hypervisor guests=0D= device_tree: add qemu_fdt_setprop_string_array helper=0D hw/riscv: migrate fdt field to generic MachineState=0D hw/board: promote fdt from ARM VirtMachineState to MachineState=0D .editorconfig: update the automatic mode setting for Emacs=0D tests/docker: Use --arch-only when building Debian cross image=0D gitlab-ci.yml: Add jobs to test CFI flags=0D gitlab-ci.yml: Allow custom # of parallel linkers=0D gitlab: add build-user-hexagon test=0D tests/tcg: Use Hexagon Docker image=0D docker: Add Hexagon image=0D tests/docker: add a test-tcg for building then running check-tcg=0D docs/system: add a gentle prompt for the complexity to come=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/b2ae1009d7cc...750efa2ec476= =0D From MAILER-DAEMON Tue Mar 09 16:32:12 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJjxX-0001eq-Sd for mharc-qemu-commits@gnu.org; Tue, 09 Mar 2021 16:32:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33864) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJjxW-0001cb-J6 for qemu-commits@nongnu.org; Tue, 09 Mar 2021 16:32:06 -0500 Received: from out-28.smtp.github.com ([192.30.252.211]:47283) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJjxS-0004CG-0L for qemu-commits@nongnu.org; Tue, 09 Mar 2021 16:32:06 -0500 Received: from github.com (hubbernetes-node-7b2eefe.ash1-iad.github.net [10.56.102.81]) by smtp.github.com (Postfix) with ESMTPA id 933E89008E7 for ; Tue, 9 Mar 2021 13:31:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615325515; bh=lLowXKUUZt3zxNMhcifcTAS7Y6FY63i4iIn7XnHJ/iQ=; h=Date:From:To:Subject:From; b=mFoCsWOZauxHNCh+/i/O+RsUt8ZTvq8vksM3CD8RKV1HW9PYgggKoDz7KSrlCoqg/ Hi1Bd/CwN8T/gQtRzCtcSvzTTBdvEF+Gjgl60R9aNcpSezcSki5GGypvs9u+8Nn5bo CsyqK1dbEv1Uj/NBqJTH4hoiQgq2KWgLglgdWBv8= Date: Tue, 09 Mar 2021 13:31:55 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -46 X-Spam_score: -4.7 X-Spam_bar: ---- X-Spam_report: (-4.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] fa818b: iotests: Drop deprecated 'props' from object-add X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 09 Mar 2021 21:32:06 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: fa818b2febfc090acb9b2e69c1c2a4e4b38aee83=0D https://github.com/qemu/qemu/commit/fa818b2febfc090acb9b2e69c1c2a4e= 4b38aee83=0D Author: Alberto Garcia =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/087=0D M tests/qemu-iotests/184=0D M tests/qemu-iotests/218=0D M tests/qemu-iotests/235=0D M tests/qemu-iotests/245=0D M tests/qemu-iotests/258=0D M tests/qemu-iotests/258.out=0D M tests/qemu-iotests/295=0D M tests/qemu-iotests/296=0D =0D Log Message:=0D -----------=0D iotests: Drop deprecated 'props' from object-add=0D =0D Signed-off-by: Alberto Garcia =0D Message-Id: <20210222115737.2993-1-berto@igalia.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: bdc4c4c5e372756a5ba3fb3a61e585b02f0dd7f4=0D https://github.com/qemu/qemu/commit/bdc4c4c5e372756a5ba3fb3a61e585b= 02f0dd7f4=0D Author: Max Reitz =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/backup.c=0D =0D Log Message:=0D -----------=0D backup: Remove nodes from job in .clean()=0D =0D The block job holds a reference to the backup-top node (because it is=0D passed as the main job BDS to block_job_create()). Therefore,=0D bdrv_backup_top_drop() cannot delete the backup-top node (replacing it=0D= by its child does not affect the job parent, because that has=0D .stay_at_node set). That is a problem, because all of its I/O functions=0D= assume the BlockCopyState (s->bcs) to be valid and that it has a=0D filtered child; but after bdrv_backup_top_drop(), neither of those=0D things are true.=0D =0D It does not make sense to add new parents to backup-top after=0D backup_clean(), so we should detach it from the job before=0D bdrv_backup_top_drop(). Because there is no function to do that for a=0D= single node, just detach all of the job's nodes -- the job does not do=0D= anything past backup_clean() anyway.=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210219153348.41861-2-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 705dde27c6c53b73d2aa139b5b2a0ea490153e5b=0D https://github.com/qemu/qemu/commit/705dde27c6c53b73d2aa139b5b2a0ea= 490153e5b=0D Author: Max Reitz =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/backup-top.c=0D =0D Log Message:=0D -----------=0D backup-top: Refuse I/O in inactive state=0D =0D When the backup-top node transitions from active to inactive in=0D bdrv_backup_top_drop(), the BlockCopyState is freed and the filtered=0D child is removed, so the node effectively becomes unusable.=0D =0D However, noone told its I/O functions this, so they will happily=0D continue accessing bs->backing and s->bcs. Prevent that by aborting=0D early when s->active is false.=0D =0D (After the preceding patch, the node should be gone after=0D bdrv_backup_top_drop(), so this should largely be a theoretical problem.=0D= But still, better to be safe than sorry, and also I think it just makes=0D= sense to check s->active in the I/O functions.)=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210219153348.41861-3-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e41799409281eab19c17692d1c52cb4cef7f5494=0D https://github.com/qemu/qemu/commit/e41799409281eab19c17692d1c52cb4= cef7f5494=0D Author: Max Reitz =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/283=0D M tests/qemu-iotests/283.out=0D =0D Log Message:=0D -----------=0D iotests/283: Check that finalize drops backup-top=0D =0D Without any of HEAD^ or HEAD^^ applied, qemu will most likely crash on=0D= the qemu-io invocation, for a variety of immediate reasons. The=0D underlying problem is generally a use-after-free access into=0D backup-top's BlockCopyState.=0D =0D With only HEAD^ applied, qemu-io will run into an EIO (which is not=0D capture by the output, but you can see that the qemu-io invocation will=0D= be accepted (i.e., qemu-io will run) in contrast to the reference=0D output, where the node name cannot be found), and qemu will then crash=0D= in query-named-block-nodes: bdrv_get_allocated_file_size() detects=0D backup-top to be a filter and passes the request through to its child.=0D= However, after bdrv_backup_top_drop(), that child is NULL, so the=0D recursive call crashes.=0D =0D With HEAD^^ applied, this test should pass.=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210219153348.41861-4-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 4aa6fc69e8d2d64d37af382854ff5b12675248c2=0D https://github.com/qemu/qemu/commit/4aa6fc69e8d2d64d37af382854ff5b1= 2675248c2=0D Author: Eric Blake =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/300=0D =0D Log Message:=0D -----------=0D iotests: Fix up python style in 300=0D =0D Break some long lines, and relax our type hints to be more generic to=0D any JSON, in order to more easily permit the additional JSON depth now=0D= possible in migration parameters. Detected by iotest 297.=0D =0D Fixes: ca4bfec41d56=0D (qemu-iotests: 300: Add test case for modifying persistence of bitmap)=0D= Reported-by: Kevin Wolf =0D Signed-off-by: Eric Blake =0D Message-Id: <20210215220518.1745469-1-eblake@redhat.com>=0D Reviewed-by: John Snow =0D Reviewed-by: Vladimir Sementsov-Ogievskiy =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 3b6ad6230e902168f63315e47933025b016f546e=0D https://github.com/qemu/qemu/commit/3b6ad6230e902168f63315e47933025= b016f546e=0D Author: Stefano Garzarella =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M blockjob.c=0D =0D Log Message:=0D -----------=0D blockjob: report a better error message=0D =0D When a block job fails, we report strerror(-job->job.ret) error=0D message, also if the job set an error object.=0D Let's report a better error message using error_get_pretty(job->job.err).= =0D =0D If an error object was not set, strerror(-job->ret) is used as fallback,=0D= as explained in include/qemu/job.h:=0D =0D typedef struct Job {=0D ...=0D /**=0D * Error object for a failed job.=0D * If job->ret is nonzero and an error object was not set, it will be= set=0D * to strerror(-job->ret) during job_completed.=0D */=0D Error *err;=0D }=0D =0D In block_job_query() there can be a transient where 'job.err' is not set=0D= by a scheduled bottom half. In that case we use strerror(-job->ret) as it= =0D was before.=0D =0D Suggested-by: Kevin Wolf =0D Signed-off-by: Stefano Garzarella =0D Message-Id: <20210225103633.76746-1-sgarzare@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: a5ef35052e66721e9f943b2b9a91176536b4d896=0D https://github.com/qemu/qemu/commit/a5ef35052e66721e9f943b2b9a91176= 536b4d896=0D Author: Paolo Bonzini =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D storage-daemon: report unexpected arguments on the fly=0D =0D If the first character of optstring is '-', then each nonoption argv=0D element is handled as if it were the argument of an option with character= =0D code 1. This removes the reordering of the argv array, and enables usage= =0D of loc_set_cmdline to provide better error messages.=0D =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210301152844.291799-2-pbonzini@redhat.com>=0D Reviewed-by: Eric Blake =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 501a4b3681c90bbcf610fbbd6335c26af30668d7=0D https://github.com/qemu/qemu/commit/501a4b3681c90bbcf610fbbd6335c26= af30668d7=0D Author: Paolo Bonzini =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D storage-daemon: include current command line option in the errors=0D =0D Use the location management facilities that the emulator uses, so that=0D= the current command line option appears in the error message.=0D =0D Before:=0D =0D $ storage-daemon/qemu-storage-daemon --nbd key..=3D=0D qemu-storage-daemon: Invalid parameter 'key..'=0D =0D After:=0D =0D $ storage-daemon/qemu-storage-daemon --nbd key..=3D=0D qemu-storage-daemon: --nbd key..=3D: Invalid parameter 'key..'=0D =0D Reviewed-by: Eric Blake =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210301152844.291799-3-pbonzini@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 03d2b412aaf2078425f8472f31c8a9c2340969eb=0D https://github.com/qemu/qemu/commit/03d2b412aaf2078425f8472f31c8a9c= 2340969eb=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-storage-daemon.rst=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qemu-storage-daemon: add --pidfile option=0D =0D Daemons often have a --pidfile option where the pid is written to a file=0D= so that scripts can stop the daemon by sending a signal.=0D =0D The pid file also acts as a lock to prevent multiple instances of the=0D daemon from launching for a given pid file.=0D =0D QEMU, qemu-nbd, qemu-ga, virtiofsd, and qemu-pr-helper all support the=0D= --pidfile option. Add it to qemu-storage-daemon too.=0D =0D Reported-by: Richard W.M. Jones =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210302142746.170535-1-stefanha@redhat.com>=0D Reviewed-by: Richard W.M. Jones =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 3f14b909ebe7296eef6d4b1a1ed5f602ab129602=0D https://github.com/qemu/qemu/commit/3f14b909ebe7296eef6d4b1a1ed5f60= 2ab129602=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-storage-daemon.rst=0D =0D Log Message:=0D -----------=0D docs: show how to spawn qemu-storage-daemon with fd passing=0D =0D The QMP monitor, NBD server, and vhost-user-blk export all support file=0D= descriptor passing. This is a useful technique because it allows the=0D parent process to spawn and wait for qemu-storage-daemon without busy=0D waiting, which may delay startup due to arbitrary sleep() calls.=0D =0D This Python example is inspired by the test case written for libnbd by=0D= Richard W.M. Jones :=0D https://gitlab.com/nbdkit/libnbd/-/commit/89113f484effb0e6c322314ba75c1cb= e07a04543=0D =0D Thanks to Daniel P. Berrang=C3=A9 for suggestions o= n=0D how to get this working. Now let's document it!=0D =0D Reported-by: Richard W.M. Jones =0D Cc: Kevin Wolf =0D Cc: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210301172728.135331-2-stefanha@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Richard W.M. Jones =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e246bf3ddc4d61d03227373fecfdcd4fec3508db=0D https://github.com/qemu/qemu/commit/e246bf3ddc4d61d03227373fecfdcd4= fec3508db=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-storage-daemon.rst=0D =0D Log Message:=0D -----------=0D docs: replace insecure /tmp examples in qsd docs=0D =0D World-writeable directories have security issues. Avoid showing them in=0D= the documentation since someone might accidentally use them in=0D situations where they are insecure.=0D =0D There tend to be 3 security problems:=0D 1. Denial of service. An adversary may be able to create the file=0D beforehand, consume all space/inodes, etc to sabotage us.=0D 2. Impersonation. An adversary may be able to create a listen socket and=0D= accept incoming connections that were meant for us.=0D 3. Unauthenticated client access. An adversary may be able to connect to=0D= us if we did not set the uid/gid and permissions correctly.=0D =0D These can be prevented or mitigated with private /tmp, carefully setting=0D= the umask, etc but that requires special action and does not apply to=0D all situations. Just avoid using /tmp in examples.=0D =0D Reported-by: Richard W.M. Jones =0D Reported-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210301172728.135331-3-stefanha@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Richard W.M. Jones =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 535255b43898d2e96744057eb86f8497d4d7a461=0D https://github.com/qemu/qemu/commit/535255b43898d2e96744057eb86f849= 7d4d7a461=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/block/vhost-user-blk.c=0D =0D Log Message:=0D -----------=0D vhost-user-blk: fix blkcfg->num_queues endianness=0D =0D Treat the num_queues field as virtio-endian. On big-endian hosts the=0D vhost-user-blk num_queues field was in the wrong endianness.=0D =0D Move the blkcfg.num_queues store operation from realize to=0D vhost_user_blk_update_config() so feature negotiation has finished and=0D= we know the endianness of the device. VIRTIO 1.0 devices are=0D little-endian, but in case someone wants to use legacy VIRTIO we support=0D= all endianness cases.=0D =0D Cc: qemu-stable@nongnu.org=0D Signed-off-by: Stefan Hajnoczi =0D Reviewed-by: Raphael Norwitz =0D Reviewed-by: Michael S. Tsirkin =0D Message-Id: <20210223144653.811468-2-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 9fb7bb06986741b7fd8427fac9f22177ca38dcff=0D https://github.com/qemu/qemu/commit/9fb7bb06986741b7fd8427fac9f2217= 7ca38dcff=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/libqos/libqtest.h=0D M tests/qtest/libqtest.c=0D =0D Log Message:=0D -----------=0D libqtest: add qtest_socket_server()=0D =0D Add an API that returns a new UNIX domain socket in the listen state.=0D The code for this was already there but only used internally in=0D init_socket().=0D =0D This new API will be used by vhost-user-blk-test.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210223144653.811468-3-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 7a23c523762371fd26a7a9ecfa8f16b64618a1ad=0D https://github.com/qemu/qemu/commit/7a23c523762371fd26a7a9ecfa8f16b= 64618a1ad=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/libqos/libqtest.h=0D M tests/qtest/libqtest.c=0D =0D Log Message:=0D -----------=0D libqtest: add qtest_kill_qemu()=0D =0D Tests that manage multiple processes may wish to kill QEMU before=0D destroying the QTestState. Expose a function to do that.=0D =0D The vhost-user-blk-test testcase will need this.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210223144653.811468-4-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e1fa7f5591c219a94f039754f6fbe58e757e7af6=0D https://github.com/qemu/qemu/commit/e1fa7f5591c219a94f039754f6fbe58= e757e7af6=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/libqos/libqtest.h=0D M tests/qtest/libqtest.c=0D =0D Log Message:=0D -----------=0D libqtest: add qtest_remove_abrt_handler()=0D =0D Add a function to remove previously-added abrt handler functions.=0D =0D Now that a symmetric pair of add/remove functions exists we can also=0D balance the SIGABRT handler installation. The signal handler was=0D installed each time qtest_add_abrt_handler() was called. Now it is=0D installed when the abrt handler list becomes non-empty and removed again=0D= when the list becomes empty.=0D =0D The qtest_remove_abrt_handler() function will be used by=0D vhost-user-blk-test.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210223144653.811468-5-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: a4f1542af58fd6ab061e594d4e161f1c8b4a4372=0D https://github.com/qemu/qemu/commit/a4f1542af58fd6ab061e594d4e161f1= c8b4a4372=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: fix blk_size double byteswap=0D =0D The config->blk_size field is little-endian. Use the native-endian=0D blk_size variable to avoid double byteswapping.=0D =0D Fixes: 11f60f7eaee2630dd6fa0c3a8c49f792e46c4cf1 ("block/export: make vhos= t-user-blk config space little-endian")=0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-8-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 524bac0744e5abf95856fb9e31c01fd2ef102188=0D https://github.com/qemu/qemu/commit/524bac0744e5abf95856fb9e31c01fd= 2ef102188=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: use VIRTIO_BLK_SECTOR_BITS=0D =0D Use VIRTIO_BLK_SECTOR_BITS and VIRTIO_BLK_SECTOR_SIZE when dealing with=0D= virtio-blk sector numbers. Although the values happen to be the same as=0D= BDRV_SECTOR_BITS and BDRV_SECTOR_SIZE, they are conceptually different.=0D= This makes it clearer when we are dealing with virtio-blk sector units.=0D= =0D Use VIRTIO_BLK_SECTOR_BITS in vu_blk_initialize_config(). Later patches=0D= will use it the new constants the virtqueue request processing code=0D path.=0D =0D Suggested-by: Max Reitz =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-9-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e44362ce317bcc46d409ed6c4a5ed2b46804bcbf=0D https://github.com/qemu/qemu/commit/e44362ce317bcc46d409ed6c4a5ed2b= 46804bcbf=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: fix vhost-user-blk export sector number calculation=0D =0D The driver is supposed to honor the blk_size field but the protocol=0D still uses 512-byte sector numbers. It is incorrect to multiply=0D req->sector_num by blk_size.=0D =0D VIRTIO 1.1 5.2.5 Device Initialization says:=0D =0D blk_size can be read to determine the optimal sector size for the=0D driver to use. This does not affect the units used in the protocol=0D (always 512 bytes), but awareness of the correct value can affect=0D performance.=0D =0D Fixes: 3578389bcf76c824a5d82e6586a6f0c71e56f2aa ("block/export: vhost-use= r block device backend server")=0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-10-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: db4eadf9f10e19f864d70d1df3a90fbda31b8c06=0D https://github.com/qemu/qemu/commit/db4eadf9f10e19f864d70d1df3a90fb= da31b8c06=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: port virtio-blk discard/write zeroes input validation=0D =0D Validate discard/write zeroes the same way we do for virtio-blk. Some of=0D= these checks are mandated by the VIRTIO specification, others are=0D internal to QEMU.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-11-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 05ae4e674e3d47342a7660ae7bc55b393e09f4c7=0D https://github.com/qemu/qemu/commit/05ae4e674e3d47342a7660ae7bc55b3= 93e09f4c7=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: port virtio-blk read/write range check=0D =0D Check that the sector number and byte count are valid.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-13-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 35f428ba39718711177036ddf112e9299e7f20b2=0D https://github.com/qemu/qemu/commit/35f428ba39718711177036ddf112e92= 99e7f20b2=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/dirty-bitmap.c=0D M block/qcow2-bitmap.c=0D M include/block/dirty-bitmap.h=0D =0D Log Message:=0D -----------=0D qcow2-bitmap: make bytes_covered_by_bitmap_cluster() public=0D =0D Rename bytes_covered_by_bitmap_cluster() to=0D bdrv_dirty_bitmap_serialization_coverage() and make it public.=0D It is needed as we are going to share it with bitmap loading in=0D parallels format.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Eric Blake =0D Reviewed-by: Denis V. Lunev =0D Message-Id: <20210224104707.88430-2-vsementsov@virtuozzo.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 67ae4ace9bce25d37be8dd97630ed336c29d6b72=0D https://github.com/qemu/qemu/commit/67ae4ace9bce25d37be8dd97630ed33= 6c29d6b72=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/interop/parallels.txt=0D =0D Log Message:=0D -----------=0D parallels.txt: fix bitmap L1 table description=0D =0D Actually L1 table entry offset is in 512 bytes sectors. Fix the spec.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-3-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e0b5207f54e45ccb7c733e736add47f7b06c5867=0D https://github.com/qemu/qemu/commit/e0b5207f54e45ccb7c733e736add47f= 7b06c5867=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/parallels.c=0D M block/parallels.h=0D =0D Log Message:=0D -----------=0D block/parallels: BDRVParallelsState: add cluster_size field=0D =0D We are going to use it in more places, calculating=0D "s->tracks << BDRV_SECTOR_BITS" doesn't look good.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-4-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: baefd977002e72402f2cc42b11f2cb11b96aae9e=0D https://github.com/qemu/qemu/commit/baefd977002e72402f2cc42b11f2cb1= 1b96aae9e=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/meson.build=0D A block/parallels-ext.c=0D M block/parallels.c=0D M block/parallels.h=0D =0D Log Message:=0D -----------=0D parallels: support bitmap extension for read-only mode=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-5-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 55b116302f26c50772fd8b73f9af13b091461ae5=0D https://github.com/qemu/qemu/commit/55b116302f26c50772fd8b73f9af13b= 091461ae5=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/iotests.py=0D =0D Log Message:=0D -----------=0D iotests.py: add unarchive_sample_image() helper=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-6-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: c203c3b813be4a012b45cc6e33a2c18512071b1c=0D https://github.com/qemu/qemu/commit/c203c3b813be4a012b45cc6e33a2c18= 512071b1c=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D A tests/qemu-iotests/sample_images/parallels-with-bitmap.bz2=0D A tests/qemu-iotests/sample_images/parallels-with-bitmap.sh=0D A tests/qemu-iotests/tests/parallels-read-bitmap=0D A tests/qemu-iotests/tests/parallels-read-bitmap.out=0D =0D Log Message:=0D -----------=0D iotests: add parallels-read-bitmap test=0D =0D Test support for reading bitmap from parallels image format.=0D parallels-with-bitmap.bz2 is generated on Virtuozzo by=0D parallels-with-bitmap.sh=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-7-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: a960c4b484a3d2cce892f870dba749132402a2f7=0D https://github.com/qemu/qemu/commit/a960c4b484a3d2cce892f870dba7491= 32402a2f7=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: update parallels block driver=0D =0D Add new parallels-ext.c and myself as co-maintainer.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210304095151.19358-1-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: ef809f709de81aef01bbb7403b87cbe2ac7e0c10=0D https://github.com/qemu/qemu/commit/ef809f709de81aef01bbb7403b87cbe= 2ac7e0c10=0D Author: Kevin Wolf =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-storage-daemon.rst=0D =0D Log Message:=0D -----------=0D docs: qsd: Explain --export nbd,name=3D... default=0D =0D The 'name' option for NBD exports is optional. Add a note that the=0D default for the option is the node name (people could otherwise expect=0D= that it's the empty string like for qemu-nbd).=0D =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210305094856.18964-1-kwolf@redhat.com>=0D Reviewed-by: Max Reitz =0D Reviewed-by: Eric Blake =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 785ec4b1b968906ea1d22f753a3b199be946550b=0D https://github.com/qemu/qemu/commit/785ec4b1b968906ea1d22f753a3b199= be946550b=0D Author: Connor Kuehl =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block.c=0D M tests/qemu-iotests/030=0D M tests/qemu-iotests/040=0D M tests/qemu-iotests/051.pc.out=0D M tests/qemu-iotests/081.out=0D M tests/qemu-iotests/085.out=0D M tests/qemu-iotests/087.out=0D M tests/qemu-iotests/206.out=0D M tests/qemu-iotests/210.out=0D M tests/qemu-iotests/211.out=0D M tests/qemu-iotests/212.out=0D M tests/qemu-iotests/213.out=0D M tests/qemu-iotests/223.out=0D M tests/qemu-iotests/237.out=0D M tests/qemu-iotests/245=0D M tests/qemu-iotests/249.out=0D M tests/qemu-iotests/283.out=0D M tests/qemu-iotests/300=0D =0D Log Message:=0D -----------=0D block: Clarify error messages pertaining to 'node-name'=0D =0D Some error messages contain ambiguous representations of the 'node-name'=0D= parameter. This can be particularly confusing when exchanging QMP=0D messages (C =3D client, S =3D server):=0D =0D C: {"execute": "block_resize", "arguments": { "device": "my_file", "size"= : 26843545600 }}=0D S: {"error": {"class": "GenericError", "desc": "Cannot find device=3Dmy_f= ile nor node_name=3D"}}=0D = ^^^^^^^^^=0D =0D This error message suggests one could send a message with a key called=0D= 'node_name':=0D =0D C: {"execute": "block_resize", "arguments": { "node_name": "my_file", "si= ze": 26843545600 }}=0D ^^^^^^^^^=0D =0D but using the underscore is actually incorrect, the parameter should be=0D= 'node-name':=0D =0D S: {"error": {"class": "GenericError", "desc": "Parameter 'node_name' is = unexpected"}}=0D =0D This behavior was uncovered in bz1651437, but I ended up going down a=0D rabbit hole looking for other areas where this miscommunication might=0D occur and changing those accordingly as well.=0D =0D Fixes: https://bugzilla.redhat.com/1651437=0D Signed-off-by: Connor Kuehl =0D Message-Id: <20210305151929.1947331-2-ckuehl@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: ef2e38a1a1d2915b148c4a49f61626e62c46fbb6=0D https://github.com/qemu/qemu/commit/ef2e38a1a1d2915b148c4a49f61626e= 62c46fbb6=0D Author: Connor Kuehl =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M blockdev.c=0D M tests/qemu-iotests/245=0D =0D Log Message:=0D -----------=0D blockdev: Clarify error messages pertaining to 'node-name'=0D =0D Signed-off-by: Connor Kuehl =0D Message-Id: <20210305151929.1947331-3-ckuehl@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: a557b00469bca61a058fc1db4855503cac1c3219=0D https://github.com/qemu/qemu/commit/a557b00469bca61a058fc1db4855503= cac1c3219=0D Author: Peter Maydell =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M block.c=0D M block/backup-top.c=0D M block/backup.c=0D M block/dirty-bitmap.c=0D M block/export/vhost-user-blk-server.c=0D M block/meson.build=0D A block/parallels-ext.c=0D M block/parallels.c=0D M block/parallels.h=0D M block/qcow2-bitmap.c=0D M blockdev.c=0D M blockjob.c=0D M docs/interop/parallels.txt=0D M docs/tools/qemu-storage-daemon.rst=0D M hw/block/vhost-user-blk.c=0D M include/block/dirty-bitmap.h=0D M storage-daemon/qemu-storage-daemon.c=0D M tests/qemu-iotests/030=0D M tests/qemu-iotests/040=0D M tests/qemu-iotests/051.pc.out=0D M tests/qemu-iotests/081.out=0D M tests/qemu-iotests/085.out=0D M tests/qemu-iotests/087=0D M tests/qemu-iotests/087.out=0D M tests/qemu-iotests/184=0D M tests/qemu-iotests/206.out=0D M tests/qemu-iotests/210.out=0D M tests/qemu-iotests/211.out=0D M tests/qemu-iotests/212.out=0D M tests/qemu-iotests/213.out=0D M tests/qemu-iotests/218=0D M tests/qemu-iotests/223.out=0D M tests/qemu-iotests/235=0D M tests/qemu-iotests/237.out=0D M tests/qemu-iotests/245=0D M tests/qemu-iotests/249.out=0D M tests/qemu-iotests/258=0D M tests/qemu-iotests/258.out=0D M tests/qemu-iotests/283=0D M tests/qemu-iotests/283.out=0D M tests/qemu-iotests/295=0D M tests/qemu-iotests/296=0D M tests/qemu-iotests/300=0D M tests/qemu-iotests/iotests.py=0D A tests/qemu-iotests/sample_images/parallels-with-bitmap.bz2=0D A tests/qemu-iotests/sample_images/parallels-with-bitmap.sh=0D A tests/qemu-iotests/tests/parallels-read-bitmap=0D A tests/qemu-iotests/tests/parallels-read-bitmap.out=0D M tests/qtest/libqos/libqtest.h=0D M tests/qtest/libqtest.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into sta= ging=0D =0D Block layer patches:=0D =0D - qemu-storage-daemon: add --pidfile option=0D - qemu-storage-daemon: CLI error messages include the option name now=0D - vhost-user-blk export: Misc fixes=0D - docs: Improvements for qemu-storage-daemon documentation=0D - parallels: load bitmap extension=0D - backup-top: Don't crash on post-finalize accesses=0D - Improve error messages related to node-name options=0D - iotests improvements=0D =0D # gpg: Signature made Mon 08 Mar 2021 17:01:41 GMT=0D # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2= FD6=0D # gpg: issuer "kwolf@redhat.com"=0D # gpg: Good signature from "Kevin Wolf " [full]=0D # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F = 2FD6=0D =0D * remotes/kevin/tags/for-upstream: (30 commits)=0D blockdev: Clarify error messages pertaining to 'node-name'=0D block: Clarify error messages pertaining to 'node-name'=0D docs: qsd: Explain --export nbd,name=3D... default=0D MAINTAINERS: update parallels block driver=0D iotests: add parallels-read-bitmap test=0D iotests.py: add unarchive_sample_image() helper=0D parallels: support bitmap extension for read-only mode=0D block/parallels: BDRVParallelsState: add cluster_size field=0D parallels.txt: fix bitmap L1 table description=0D qcow2-bitmap: make bytes_covered_by_bitmap_cluster() public=0D block/export: port virtio-blk read/write range check=0D block/export: port virtio-blk discard/write zeroes input validation=0D block/export: fix vhost-user-blk export sector number calculation=0D block/export: use VIRTIO_BLK_SECTOR_BITS=0D block/export: fix blk_size double byteswap=0D libqtest: add qtest_remove_abrt_handler()=0D libqtest: add qtest_kill_qemu()=0D libqtest: add qtest_socket_server()=0D vhost-user-blk: fix blkcfg->num_queues endianness=0D docs: replace insecure /tmp examples in qsd docs=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/750efa2ec476...a557b00469bc= =0D From MAILER-DAEMON Wed Mar 10 06:05:34 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJwek-00013R-7c for mharc-qemu-commits@gnu.org; Wed, 10 Mar 2021 06:05:34 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:46056) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJweh-00010Z-V2 for qemu-commits@nongnu.org; Wed, 10 Mar 2021 06:05:31 -0500 Received: from out-28.smtp.github.com ([192.30.252.211]:40607) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJweZ-0004hG-7K for qemu-commits@nongnu.org; Wed, 10 Mar 2021 06:05:31 -0500 Received: from github.com (hubbernetes-node-5170624.ash1-iad.github.net [10.56.117.57]) by smtp.github.com (Postfix) with ESMTPA id C404D90004A for ; Wed, 10 Mar 2021 03:05:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615374318; bh=HHCa5BZ0y3O9EMCCRrI5ANYtf9PgwEaacuW8fj/iQJo=; h=Date:From:To:Subject:From; b=H0+1pjSDITfu0pq98zDlVZtd0hfBtzBK167OX/0IKNKpokG/ByRuqeiR/XU7m+2Y8 jG6r2YvMj42JAifYHeGol3Hi40VmlfnZbB5GYKD6y3VfYa7v3tnD+fzJfQafi6rCAH Z6gTHyC6RVQfp80GwovL0ghgv2yPWk8n6uP2boC0= Date: Wed, 10 Mar 2021 03:05:18 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -46 X-Spam_score: -4.7 X-Spam_bar: ---- X-Spam_report: (-4.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] fa818b: iotests: Drop deprecated 'props' from object-add X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Mar 2021 11:05:32 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: fa818b2febfc090acb9b2e69c1c2a4e4b38aee83=0D https://github.com/qemu/qemu/commit/fa818b2febfc090acb9b2e69c1c2a4e= 4b38aee83=0D Author: Alberto Garcia =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/087=0D M tests/qemu-iotests/184=0D M tests/qemu-iotests/218=0D M tests/qemu-iotests/235=0D M tests/qemu-iotests/245=0D M tests/qemu-iotests/258=0D M tests/qemu-iotests/258.out=0D M tests/qemu-iotests/295=0D M tests/qemu-iotests/296=0D =0D Log Message:=0D -----------=0D iotests: Drop deprecated 'props' from object-add=0D =0D Signed-off-by: Alberto Garcia =0D Message-Id: <20210222115737.2993-1-berto@igalia.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: bdc4c4c5e372756a5ba3fb3a61e585b02f0dd7f4=0D https://github.com/qemu/qemu/commit/bdc4c4c5e372756a5ba3fb3a61e585b= 02f0dd7f4=0D Author: Max Reitz =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/backup.c=0D =0D Log Message:=0D -----------=0D backup: Remove nodes from job in .clean()=0D =0D The block job holds a reference to the backup-top node (because it is=0D passed as the main job BDS to block_job_create()). Therefore,=0D bdrv_backup_top_drop() cannot delete the backup-top node (replacing it=0D= by its child does not affect the job parent, because that has=0D .stay_at_node set). That is a problem, because all of its I/O functions=0D= assume the BlockCopyState (s->bcs) to be valid and that it has a=0D filtered child; but after bdrv_backup_top_drop(), neither of those=0D things are true.=0D =0D It does not make sense to add new parents to backup-top after=0D backup_clean(), so we should detach it from the job before=0D bdrv_backup_top_drop(). Because there is no function to do that for a=0D= single node, just detach all of the job's nodes -- the job does not do=0D= anything past backup_clean() anyway.=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210219153348.41861-2-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 705dde27c6c53b73d2aa139b5b2a0ea490153e5b=0D https://github.com/qemu/qemu/commit/705dde27c6c53b73d2aa139b5b2a0ea= 490153e5b=0D Author: Max Reitz =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/backup-top.c=0D =0D Log Message:=0D -----------=0D backup-top: Refuse I/O in inactive state=0D =0D When the backup-top node transitions from active to inactive in=0D bdrv_backup_top_drop(), the BlockCopyState is freed and the filtered=0D child is removed, so the node effectively becomes unusable.=0D =0D However, noone told its I/O functions this, so they will happily=0D continue accessing bs->backing and s->bcs. Prevent that by aborting=0D early when s->active is false.=0D =0D (After the preceding patch, the node should be gone after=0D bdrv_backup_top_drop(), so this should largely be a theoretical problem.=0D= But still, better to be safe than sorry, and also I think it just makes=0D= sense to check s->active in the I/O functions.)=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210219153348.41861-3-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e41799409281eab19c17692d1c52cb4cef7f5494=0D https://github.com/qemu/qemu/commit/e41799409281eab19c17692d1c52cb4= cef7f5494=0D Author: Max Reitz =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/283=0D M tests/qemu-iotests/283.out=0D =0D Log Message:=0D -----------=0D iotests/283: Check that finalize drops backup-top=0D =0D Without any of HEAD^ or HEAD^^ applied, qemu will most likely crash on=0D= the qemu-io invocation, for a variety of immediate reasons. The=0D underlying problem is generally a use-after-free access into=0D backup-top's BlockCopyState.=0D =0D With only HEAD^ applied, qemu-io will run into an EIO (which is not=0D capture by the output, but you can see that the qemu-io invocation will=0D= be accepted (i.e., qemu-io will run) in contrast to the reference=0D output, where the node name cannot be found), and qemu will then crash=0D= in query-named-block-nodes: bdrv_get_allocated_file_size() detects=0D backup-top to be a filter and passes the request through to its child.=0D= However, after bdrv_backup_top_drop(), that child is NULL, so the=0D recursive call crashes.=0D =0D With HEAD^^ applied, this test should pass.=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210219153348.41861-4-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 4aa6fc69e8d2d64d37af382854ff5b12675248c2=0D https://github.com/qemu/qemu/commit/4aa6fc69e8d2d64d37af382854ff5b1= 2675248c2=0D Author: Eric Blake =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/300=0D =0D Log Message:=0D -----------=0D iotests: Fix up python style in 300=0D =0D Break some long lines, and relax our type hints to be more generic to=0D any JSON, in order to more easily permit the additional JSON depth now=0D= possible in migration parameters. Detected by iotest 297.=0D =0D Fixes: ca4bfec41d56=0D (qemu-iotests: 300: Add test case for modifying persistence of bitmap)=0D= Reported-by: Kevin Wolf =0D Signed-off-by: Eric Blake =0D Message-Id: <20210215220518.1745469-1-eblake@redhat.com>=0D Reviewed-by: John Snow =0D Reviewed-by: Vladimir Sementsov-Ogievskiy =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 3b6ad6230e902168f63315e47933025b016f546e=0D https://github.com/qemu/qemu/commit/3b6ad6230e902168f63315e47933025= b016f546e=0D Author: Stefano Garzarella =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M blockjob.c=0D =0D Log Message:=0D -----------=0D blockjob: report a better error message=0D =0D When a block job fails, we report strerror(-job->job.ret) error=0D message, also if the job set an error object.=0D Let's report a better error message using error_get_pretty(job->job.err).= =0D =0D If an error object was not set, strerror(-job->ret) is used as fallback,=0D= as explained in include/qemu/job.h:=0D =0D typedef struct Job {=0D ...=0D /**=0D * Error object for a failed job.=0D * If job->ret is nonzero and an error object was not set, it will be= set=0D * to strerror(-job->ret) during job_completed.=0D */=0D Error *err;=0D }=0D =0D In block_job_query() there can be a transient where 'job.err' is not set=0D= by a scheduled bottom half. In that case we use strerror(-job->ret) as it= =0D was before.=0D =0D Suggested-by: Kevin Wolf =0D Signed-off-by: Stefano Garzarella =0D Message-Id: <20210225103633.76746-1-sgarzare@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: a5ef35052e66721e9f943b2b9a91176536b4d896=0D https://github.com/qemu/qemu/commit/a5ef35052e66721e9f943b2b9a91176= 536b4d896=0D Author: Paolo Bonzini =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D storage-daemon: report unexpected arguments on the fly=0D =0D If the first character of optstring is '-', then each nonoption argv=0D element is handled as if it were the argument of an option with character= =0D code 1. This removes the reordering of the argv array, and enables usage= =0D of loc_set_cmdline to provide better error messages.=0D =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210301152844.291799-2-pbonzini@redhat.com>=0D Reviewed-by: Eric Blake =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 501a4b3681c90bbcf610fbbd6335c26af30668d7=0D https://github.com/qemu/qemu/commit/501a4b3681c90bbcf610fbbd6335c26= af30668d7=0D Author: Paolo Bonzini =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D storage-daemon: include current command line option in the errors=0D =0D Use the location management facilities that the emulator uses, so that=0D= the current command line option appears in the error message.=0D =0D Before:=0D =0D $ storage-daemon/qemu-storage-daemon --nbd key..=3D=0D qemu-storage-daemon: Invalid parameter 'key..'=0D =0D After:=0D =0D $ storage-daemon/qemu-storage-daemon --nbd key..=3D=0D qemu-storage-daemon: --nbd key..=3D: Invalid parameter 'key..'=0D =0D Reviewed-by: Eric Blake =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210301152844.291799-3-pbonzini@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 03d2b412aaf2078425f8472f31c8a9c2340969eb=0D https://github.com/qemu/qemu/commit/03d2b412aaf2078425f8472f31c8a9c= 2340969eb=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-storage-daemon.rst=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qemu-storage-daemon: add --pidfile option=0D =0D Daemons often have a --pidfile option where the pid is written to a file=0D= so that scripts can stop the daemon by sending a signal.=0D =0D The pid file also acts as a lock to prevent multiple instances of the=0D daemon from launching for a given pid file.=0D =0D QEMU, qemu-nbd, qemu-ga, virtiofsd, and qemu-pr-helper all support the=0D= --pidfile option. Add it to qemu-storage-daemon too.=0D =0D Reported-by: Richard W.M. Jones =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210302142746.170535-1-stefanha@redhat.com>=0D Reviewed-by: Richard W.M. Jones =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 3f14b909ebe7296eef6d4b1a1ed5f602ab129602=0D https://github.com/qemu/qemu/commit/3f14b909ebe7296eef6d4b1a1ed5f60= 2ab129602=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-storage-daemon.rst=0D =0D Log Message:=0D -----------=0D docs: show how to spawn qemu-storage-daemon with fd passing=0D =0D The QMP monitor, NBD server, and vhost-user-blk export all support file=0D= descriptor passing. This is a useful technique because it allows the=0D parent process to spawn and wait for qemu-storage-daemon without busy=0D waiting, which may delay startup due to arbitrary sleep() calls.=0D =0D This Python example is inspired by the test case written for libnbd by=0D= Richard W.M. Jones :=0D https://gitlab.com/nbdkit/libnbd/-/commit/89113f484effb0e6c322314ba75c1cb= e07a04543=0D =0D Thanks to Daniel P. Berrang=C3=A9 for suggestions o= n=0D how to get this working. Now let's document it!=0D =0D Reported-by: Richard W.M. Jones =0D Cc: Kevin Wolf =0D Cc: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210301172728.135331-2-stefanha@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Richard W.M. Jones =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e246bf3ddc4d61d03227373fecfdcd4fec3508db=0D https://github.com/qemu/qemu/commit/e246bf3ddc4d61d03227373fecfdcd4= fec3508db=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-storage-daemon.rst=0D =0D Log Message:=0D -----------=0D docs: replace insecure /tmp examples in qsd docs=0D =0D World-writeable directories have security issues. Avoid showing them in=0D= the documentation since someone might accidentally use them in=0D situations where they are insecure.=0D =0D There tend to be 3 security problems:=0D 1. Denial of service. An adversary may be able to create the file=0D beforehand, consume all space/inodes, etc to sabotage us.=0D 2. Impersonation. An adversary may be able to create a listen socket and=0D= accept incoming connections that were meant for us.=0D 3. Unauthenticated client access. An adversary may be able to connect to=0D= us if we did not set the uid/gid and permissions correctly.=0D =0D These can be prevented or mitigated with private /tmp, carefully setting=0D= the umask, etc but that requires special action and does not apply to=0D all situations. Just avoid using /tmp in examples.=0D =0D Reported-by: Richard W.M. Jones =0D Reported-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210301172728.135331-3-stefanha@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Richard W.M. Jones =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 535255b43898d2e96744057eb86f8497d4d7a461=0D https://github.com/qemu/qemu/commit/535255b43898d2e96744057eb86f849= 7d4d7a461=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/block/vhost-user-blk.c=0D =0D Log Message:=0D -----------=0D vhost-user-blk: fix blkcfg->num_queues endianness=0D =0D Treat the num_queues field as virtio-endian. On big-endian hosts the=0D vhost-user-blk num_queues field was in the wrong endianness.=0D =0D Move the blkcfg.num_queues store operation from realize to=0D vhost_user_blk_update_config() so feature negotiation has finished and=0D= we know the endianness of the device. VIRTIO 1.0 devices are=0D little-endian, but in case someone wants to use legacy VIRTIO we support=0D= all endianness cases.=0D =0D Cc: qemu-stable@nongnu.org=0D Signed-off-by: Stefan Hajnoczi =0D Reviewed-by: Raphael Norwitz =0D Reviewed-by: Michael S. Tsirkin =0D Message-Id: <20210223144653.811468-2-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 9fb7bb06986741b7fd8427fac9f22177ca38dcff=0D https://github.com/qemu/qemu/commit/9fb7bb06986741b7fd8427fac9f2217= 7ca38dcff=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/libqos/libqtest.h=0D M tests/qtest/libqtest.c=0D =0D Log Message:=0D -----------=0D libqtest: add qtest_socket_server()=0D =0D Add an API that returns a new UNIX domain socket in the listen state.=0D The code for this was already there but only used internally in=0D init_socket().=0D =0D This new API will be used by vhost-user-blk-test.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210223144653.811468-3-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 7a23c523762371fd26a7a9ecfa8f16b64618a1ad=0D https://github.com/qemu/qemu/commit/7a23c523762371fd26a7a9ecfa8f16b= 64618a1ad=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/libqos/libqtest.h=0D M tests/qtest/libqtest.c=0D =0D Log Message:=0D -----------=0D libqtest: add qtest_kill_qemu()=0D =0D Tests that manage multiple processes may wish to kill QEMU before=0D destroying the QTestState. Expose a function to do that.=0D =0D The vhost-user-blk-test testcase will need this.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210223144653.811468-4-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e1fa7f5591c219a94f039754f6fbe58e757e7af6=0D https://github.com/qemu/qemu/commit/e1fa7f5591c219a94f039754f6fbe58= e757e7af6=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/libqos/libqtest.h=0D M tests/qtest/libqtest.c=0D =0D Log Message:=0D -----------=0D libqtest: add qtest_remove_abrt_handler()=0D =0D Add a function to remove previously-added abrt handler functions.=0D =0D Now that a symmetric pair of add/remove functions exists we can also=0D balance the SIGABRT handler installation. The signal handler was=0D installed each time qtest_add_abrt_handler() was called. Now it is=0D installed when the abrt handler list becomes non-empty and removed again=0D= when the list becomes empty.=0D =0D The qtest_remove_abrt_handler() function will be used by=0D vhost-user-blk-test.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210223144653.811468-5-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: a4f1542af58fd6ab061e594d4e161f1c8b4a4372=0D https://github.com/qemu/qemu/commit/a4f1542af58fd6ab061e594d4e161f1= c8b4a4372=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: fix blk_size double byteswap=0D =0D The config->blk_size field is little-endian. Use the native-endian=0D blk_size variable to avoid double byteswapping.=0D =0D Fixes: 11f60f7eaee2630dd6fa0c3a8c49f792e46c4cf1 ("block/export: make vhos= t-user-blk config space little-endian")=0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-8-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 524bac0744e5abf95856fb9e31c01fd2ef102188=0D https://github.com/qemu/qemu/commit/524bac0744e5abf95856fb9e31c01fd= 2ef102188=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: use VIRTIO_BLK_SECTOR_BITS=0D =0D Use VIRTIO_BLK_SECTOR_BITS and VIRTIO_BLK_SECTOR_SIZE when dealing with=0D= virtio-blk sector numbers. Although the values happen to be the same as=0D= BDRV_SECTOR_BITS and BDRV_SECTOR_SIZE, they are conceptually different.=0D= This makes it clearer when we are dealing with virtio-blk sector units.=0D= =0D Use VIRTIO_BLK_SECTOR_BITS in vu_blk_initialize_config(). Later patches=0D= will use it the new constants the virtqueue request processing code=0D path.=0D =0D Suggested-by: Max Reitz =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-9-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e44362ce317bcc46d409ed6c4a5ed2b46804bcbf=0D https://github.com/qemu/qemu/commit/e44362ce317bcc46d409ed6c4a5ed2b= 46804bcbf=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: fix vhost-user-blk export sector number calculation=0D =0D The driver is supposed to honor the blk_size field but the protocol=0D still uses 512-byte sector numbers. It is incorrect to multiply=0D req->sector_num by blk_size.=0D =0D VIRTIO 1.1 5.2.5 Device Initialization says:=0D =0D blk_size can be read to determine the optimal sector size for the=0D driver to use. This does not affect the units used in the protocol=0D (always 512 bytes), but awareness of the correct value can affect=0D performance.=0D =0D Fixes: 3578389bcf76c824a5d82e6586a6f0c71e56f2aa ("block/export: vhost-use= r block device backend server")=0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-10-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: db4eadf9f10e19f864d70d1df3a90fbda31b8c06=0D https://github.com/qemu/qemu/commit/db4eadf9f10e19f864d70d1df3a90fb= da31b8c06=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: port virtio-blk discard/write zeroes input validation=0D =0D Validate discard/write zeroes the same way we do for virtio-blk. Some of=0D= these checks are mandated by the VIRTIO specification, others are=0D internal to QEMU.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-11-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 05ae4e674e3d47342a7660ae7bc55b393e09f4c7=0D https://github.com/qemu/qemu/commit/05ae4e674e3d47342a7660ae7bc55b3= 93e09f4c7=0D Author: Stefan Hajnoczi =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: port virtio-blk read/write range check=0D =0D Check that the sector number and byte count are valid.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210223144653.811468-13-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 35f428ba39718711177036ddf112e9299e7f20b2=0D https://github.com/qemu/qemu/commit/35f428ba39718711177036ddf112e92= 99e7f20b2=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/dirty-bitmap.c=0D M block/qcow2-bitmap.c=0D M include/block/dirty-bitmap.h=0D =0D Log Message:=0D -----------=0D qcow2-bitmap: make bytes_covered_by_bitmap_cluster() public=0D =0D Rename bytes_covered_by_bitmap_cluster() to=0D bdrv_dirty_bitmap_serialization_coverage() and make it public.=0D It is needed as we are going to share it with bitmap loading in=0D parallels format.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Eric Blake =0D Reviewed-by: Denis V. Lunev =0D Message-Id: <20210224104707.88430-2-vsementsov@virtuozzo.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 67ae4ace9bce25d37be8dd97630ed336c29d6b72=0D https://github.com/qemu/qemu/commit/67ae4ace9bce25d37be8dd97630ed33= 6c29d6b72=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/interop/parallels.txt=0D =0D Log Message:=0D -----------=0D parallels.txt: fix bitmap L1 table description=0D =0D Actually L1 table entry offset is in 512 bytes sectors. Fix the spec.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-3-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e0b5207f54e45ccb7c733e736add47f7b06c5867=0D https://github.com/qemu/qemu/commit/e0b5207f54e45ccb7c733e736add47f= 7b06c5867=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/parallels.c=0D M block/parallels.h=0D =0D Log Message:=0D -----------=0D block/parallels: BDRVParallelsState: add cluster_size field=0D =0D We are going to use it in more places, calculating=0D "s->tracks << BDRV_SECTOR_BITS" doesn't look good.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-4-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: baefd977002e72402f2cc42b11f2cb11b96aae9e=0D https://github.com/qemu/qemu/commit/baefd977002e72402f2cc42b11f2cb1= 1b96aae9e=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/meson.build=0D A block/parallels-ext.c=0D M block/parallels.c=0D M block/parallels.h=0D =0D Log Message:=0D -----------=0D parallels: support bitmap extension for read-only mode=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-5-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 55b116302f26c50772fd8b73f9af13b091461ae5=0D https://github.com/qemu/qemu/commit/55b116302f26c50772fd8b73f9af13b= 091461ae5=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/iotests.py=0D =0D Log Message:=0D -----------=0D iotests.py: add unarchive_sample_image() helper=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-6-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: c203c3b813be4a012b45cc6e33a2c18512071b1c=0D https://github.com/qemu/qemu/commit/c203c3b813be4a012b45cc6e33a2c18= 512071b1c=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D A tests/qemu-iotests/sample_images/parallels-with-bitmap.bz2=0D A tests/qemu-iotests/sample_images/parallels-with-bitmap.sh=0D A tests/qemu-iotests/tests/parallels-read-bitmap=0D A tests/qemu-iotests/tests/parallels-read-bitmap.out=0D =0D Log Message:=0D -----------=0D iotests: add parallels-read-bitmap test=0D =0D Test support for reading bitmap from parallels image format.=0D parallels-with-bitmap.bz2 is generated on Virtuozzo by=0D parallels-with-bitmap.sh=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210224104707.88430-7-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: a960c4b484a3d2cce892f870dba749132402a2f7=0D https://github.com/qemu/qemu/commit/a960c4b484a3d2cce892f870dba7491= 32402a2f7=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: update parallels block driver=0D =0D Add new parallels-ext.c and myself as co-maintainer.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210304095151.19358-1-vsementsov@virtuozzo.com>=0D Reviewed-by: Denis V. Lunev =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: ef809f709de81aef01bbb7403b87cbe2ac7e0c10=0D https://github.com/qemu/qemu/commit/ef809f709de81aef01bbb7403b87cbe= 2ac7e0c10=0D Author: Kevin Wolf =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-storage-daemon.rst=0D =0D Log Message:=0D -----------=0D docs: qsd: Explain --export nbd,name=3D... default=0D =0D The 'name' option for NBD exports is optional. Add a note that the=0D default for the option is the node name (people could otherwise expect=0D= that it's the empty string like for qemu-nbd).=0D =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210305094856.18964-1-kwolf@redhat.com>=0D Reviewed-by: Max Reitz =0D Reviewed-by: Eric Blake =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 785ec4b1b968906ea1d22f753a3b199be946550b=0D https://github.com/qemu/qemu/commit/785ec4b1b968906ea1d22f753a3b199= be946550b=0D Author: Connor Kuehl =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block.c=0D M tests/qemu-iotests/030=0D M tests/qemu-iotests/040=0D M tests/qemu-iotests/051.pc.out=0D M tests/qemu-iotests/081.out=0D M tests/qemu-iotests/085.out=0D M tests/qemu-iotests/087.out=0D M tests/qemu-iotests/206.out=0D M tests/qemu-iotests/210.out=0D M tests/qemu-iotests/211.out=0D M tests/qemu-iotests/212.out=0D M tests/qemu-iotests/213.out=0D M tests/qemu-iotests/223.out=0D M tests/qemu-iotests/237.out=0D M tests/qemu-iotests/245=0D M tests/qemu-iotests/249.out=0D M tests/qemu-iotests/283.out=0D M tests/qemu-iotests/300=0D =0D Log Message:=0D -----------=0D block: Clarify error messages pertaining to 'node-name'=0D =0D Some error messages contain ambiguous representations of the 'node-name'=0D= parameter. This can be particularly confusing when exchanging QMP=0D messages (C =3D client, S =3D server):=0D =0D C: {"execute": "block_resize", "arguments": { "device": "my_file", "size"= : 26843545600 }}=0D S: {"error": {"class": "GenericError", "desc": "Cannot find device=3Dmy_f= ile nor node_name=3D"}}=0D = ^^^^^^^^^=0D =0D This error message suggests one could send a message with a key called=0D= 'node_name':=0D =0D C: {"execute": "block_resize", "arguments": { "node_name": "my_file", "si= ze": 26843545600 }}=0D ^^^^^^^^^=0D =0D but using the underscore is actually incorrect, the parameter should be=0D= 'node-name':=0D =0D S: {"error": {"class": "GenericError", "desc": "Parameter 'node_name' is = unexpected"}}=0D =0D This behavior was uncovered in bz1651437, but I ended up going down a=0D rabbit hole looking for other areas where this miscommunication might=0D occur and changing those accordingly as well.=0D =0D Fixes: https://bugzilla.redhat.com/1651437=0D Signed-off-by: Connor Kuehl =0D Message-Id: <20210305151929.1947331-2-ckuehl@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: ef2e38a1a1d2915b148c4a49f61626e62c46fbb6=0D https://github.com/qemu/qemu/commit/ef2e38a1a1d2915b148c4a49f61626e= 62c46fbb6=0D Author: Connor Kuehl =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M blockdev.c=0D M tests/qemu-iotests/245=0D =0D Log Message:=0D -----------=0D blockdev: Clarify error messages pertaining to 'node-name'=0D =0D Signed-off-by: Connor Kuehl =0D Message-Id: <20210305151929.1947331-3-ckuehl@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: a557b00469bca61a058fc1db4855503cac1c3219=0D https://github.com/qemu/qemu/commit/a557b00469bca61a058fc1db4855503= cac1c3219=0D Author: Peter Maydell =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M block.c=0D M block/backup-top.c=0D M block/backup.c=0D M block/dirty-bitmap.c=0D M block/export/vhost-user-blk-server.c=0D M block/meson.build=0D A block/parallels-ext.c=0D M block/parallels.c=0D M block/parallels.h=0D M block/qcow2-bitmap.c=0D M blockdev.c=0D M blockjob.c=0D M docs/interop/parallels.txt=0D M docs/tools/qemu-storage-daemon.rst=0D M hw/block/vhost-user-blk.c=0D M include/block/dirty-bitmap.h=0D M storage-daemon/qemu-storage-daemon.c=0D M tests/qemu-iotests/030=0D M tests/qemu-iotests/040=0D M tests/qemu-iotests/051.pc.out=0D M tests/qemu-iotests/081.out=0D M tests/qemu-iotests/085.out=0D M tests/qemu-iotests/087=0D M tests/qemu-iotests/087.out=0D M tests/qemu-iotests/184=0D M tests/qemu-iotests/206.out=0D M tests/qemu-iotests/210.out=0D M tests/qemu-iotests/211.out=0D M tests/qemu-iotests/212.out=0D M tests/qemu-iotests/213.out=0D M tests/qemu-iotests/218=0D M tests/qemu-iotests/223.out=0D M tests/qemu-iotests/235=0D M tests/qemu-iotests/237.out=0D M tests/qemu-iotests/245=0D M tests/qemu-iotests/249.out=0D M tests/qemu-iotests/258=0D M tests/qemu-iotests/258.out=0D M tests/qemu-iotests/283=0D M tests/qemu-iotests/283.out=0D M tests/qemu-iotests/295=0D M tests/qemu-iotests/296=0D M tests/qemu-iotests/300=0D M tests/qemu-iotests/iotests.py=0D A tests/qemu-iotests/sample_images/parallels-with-bitmap.bz2=0D A tests/qemu-iotests/sample_images/parallels-with-bitmap.sh=0D A tests/qemu-iotests/tests/parallels-read-bitmap=0D A tests/qemu-iotests/tests/parallels-read-bitmap.out=0D M tests/qtest/libqos/libqtest.h=0D M tests/qtest/libqtest.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into sta= ging=0D =0D Block layer patches:=0D =0D - qemu-storage-daemon: add --pidfile option=0D - qemu-storage-daemon: CLI error messages include the option name now=0D - vhost-user-blk export: Misc fixes=0D - docs: Improvements for qemu-storage-daemon documentation=0D - parallels: load bitmap extension=0D - backup-top: Don't crash on post-finalize accesses=0D - Improve error messages related to node-name options=0D - iotests improvements=0D =0D # gpg: Signature made Mon 08 Mar 2021 17:01:41 GMT=0D # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2= FD6=0D # gpg: issuer "kwolf@redhat.com"=0D # gpg: Good signature from "Kevin Wolf " [full]=0D # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F = 2FD6=0D =0D * remotes/kevin/tags/for-upstream: (30 commits)=0D blockdev: Clarify error messages pertaining to 'node-name'=0D block: Clarify error messages pertaining to 'node-name'=0D docs: qsd: Explain --export nbd,name=3D... default=0D MAINTAINERS: update parallels block driver=0D iotests: add parallels-read-bitmap test=0D iotests.py: add unarchive_sample_image() helper=0D parallels: support bitmap extension for read-only mode=0D block/parallels: BDRVParallelsState: add cluster_size field=0D parallels.txt: fix bitmap L1 table description=0D qcow2-bitmap: make bytes_covered_by_bitmap_cluster() public=0D block/export: port virtio-blk read/write range check=0D block/export: port virtio-blk discard/write zeroes input validation=0D block/export: fix vhost-user-blk export sector number calculation=0D block/export: use VIRTIO_BLK_SECTOR_BITS=0D block/export: fix blk_size double byteswap=0D libqtest: add qtest_remove_abrt_handler()=0D libqtest: add qtest_kill_qemu()=0D libqtest: add qtest_socket_server()=0D vhost-user-blk: fix blkcfg->num_queues endianness=0D docs: replace insecure /tmp examples in qsd docs=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/b2ae1009d7cc...a557b00469bc= =0D From MAILER-DAEMON Wed Mar 10 06:11:04 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJwk4-0005MM-M4 for mharc-qemu-commits@gnu.org; Wed, 10 Mar 2021 06:11:04 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:47478) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJwk3-0005L3-Jk for qemu-commits@nongnu.org; Wed, 10 Mar 2021 06:11:03 -0500 Received: from out-22.smtp.github.com ([192.30.252.205]:56627 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJwjy-00089L-Bt for qemu-commits@nongnu.org; Wed, 10 Mar 2021 06:11:03 -0500 Received: from github.com (hubbernetes-node-04e59b4.ac4-iad.github.net [10.52.211.53]) by smtp.github.com (Postfix) with ESMTPA id A6A4A560748 for ; Wed, 10 Mar 2021 03:10:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615374657; bh=9FsTMLK0KOe0zk7IGxqKZ/iwaxO8KD/zLKVrDRwOIcE=; h=Date:From:To:Subject:From; b=1539cOcreyztIH9O71QENvghPOOiOWFC5E1Co/rMWtcP0Y9TweNdgHSgtCNB2UOtk Hk1AN0Cs//EbBPZV7heBRRVkPLuGBfwECPS0cmDW5yChKDqJflVCNQTrsmtEwMAkMQ xZB2de/vhvXwaWVbqVMOkHAs2p1zRTBjBpw+mwDk= Date: Wed, 10 Mar 2021 03:10:57 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 5ee0ab: clock: Add ClockEvent parameter to callbacks X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Mar 2021 11:11:03 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 5ee0abed51231949ef91d7f8e1115be69ed91e93=0D https://github.com/qemu/qemu/commit/5ee0abed51231949ef91d7f8e1115be= 69ed91e93=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/clocks.rst=0D M hw/adc/npcm7xx_adc.c=0D M hw/arm/armsse.c=0D M hw/char/cadence_uart.c=0D M hw/char/ibex_uart.c=0D M hw/char/pl011.c=0D M hw/core/clock.c=0D M hw/core/qdev-clock.c=0D M hw/mips/cps.c=0D M hw/misc/bcm2835_cprman.c=0D M hw/misc/npcm7xx_clk.c=0D M hw/misc/npcm7xx_pwm.c=0D M hw/misc/zynq_slcr.c=0D M hw/timer/cmsdk-apb-dualtimer.c=0D M hw/timer/cmsdk-apb-timer.c=0D M hw/timer/npcm7xx_timer.c=0D M hw/watchdog/cmsdk-apb-watchdog.c=0D M include/hw/clock.h=0D M include/hw/qdev-clock.h=0D M target/mips/cpu.c=0D =0D Log Message:=0D -----------=0D clock: Add ClockEvent parameter to callbacks=0D =0D The Clock framework allows users to specify a callback which is=0D called after the clock's period has been updated. Some users need to=0D also have a callback which is called before the clock period is=0D updated.=0D =0D As the first step in adding support for notifying Clock users on=0D pre-update events, add an argument to the ClockCallback to specify=0D what event is being notified, and add an argument to the various=0D functions for registering a callback to specify which events are=0D of interest to that callback.=0D =0D Note that the documentation update renders correct the previously=0D incorrect claim in 'Adding a new clock' that callbacks "will be=0D explained in a following section".=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Luc Michel =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-2-peter.maydell@linaro.org=0D =0D =0D Commit: e4341623a3b87e7eca87d42b7b88da967cd21c49=0D https://github.com/qemu/qemu/commit/e4341623a3b87e7eca87d42b7b88da9= 67cd21c49=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/clocks.rst=0D M hw/core/clock.c=0D M include/hw/clock.h=0D =0D Log Message:=0D -----------=0D clock: Add ClockPreUpdate callback event type=0D =0D Add a new callback event type ClockPreUpdate, which is called on=0D period changes before the period is updated.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Luc Michel =0D Reviewed-by: Hao Wu =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219144617.4782-3-peter.maydell@linaro.org=0D =0D =0D Commit: cd3a53b727d2f86e9db795cee69cc142332ca079=0D https://github.com/qemu/qemu/commit/cd3a53b727d2f86e9db795cee69cc14= 2332ca079=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/clocks.rst=0D M include/hw/clock.h=0D =0D Log Message:=0D -----------=0D clock: Add clock_ns_to_ticks() function=0D =0D Add a clock_ns_to_ticks() function which does the opposite of=0D clock_ticks_to_ns(): given a duration in nanoseconds, it returns the=0D number of clock ticks that would happen in that time. This is useful=0D for devices that have a free running counter register whose value can=0D be calculated when it is read.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Luc Michel =0D Reviewed-by: Hao Wu =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219144617.4782-4-peter.maydell@linaro.org=0D =0D =0D Commit: c7db11b0992f8d97107ec30139ffe1a09559c77e=0D https://github.com/qemu/qemu/commit/c7db11b0992f8d97107ec30139ffe1a= 09559c77e=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/npcm7xx_timer.c=0D =0D Log Message:=0D -----------=0D hw/timer/npcm7xx_timer: Use new clock_ns_to_ticks()=0D =0D Use the new clock_ns_to_ticks() function in npcm7xx_timer where=0D appropriate.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Luc Michel =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Hao Wu =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219144617.4782-5-peter.maydell@linaro.org=0D =0D =0D Commit: 419a7f8075e24734ee22c3ceef6a446ba5306b27=0D https://github.com/qemu/qemu/commit/419a7f8075e24734ee22c3ceef6a446= ba5306b27=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M hw/misc/iotkit-sysctl.c=0D A include/hw/arm/armsse-version.h=0D M include/hw/misc/iotkit-sysctl.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Introduce SSE subsystem version property=0D =0D We model Arm "Subsystems for Embedded" SoC subsystems using generic=0D code which is split into various sub-devices which are configurable=0D by QOM properties to handle the behaviour differences between the SSE=0D subsystems we implement. Currently the only sub-device which needs=0D to change is the IOTKIT_SYSCTL device, and we do this with a mix of=0D properties that directly specify divergent behaviours (eg=0D CPUWAIT_RST) and passing it the SYS_VERSION register value as a way=0D for it to distinguish IoTKit from SSE-200.=0D =0D The "pass SYS_VERSION" approach is already a bit hacky, since the=0D IOTKIT_SYSCTL device has to know that the different part of the=0D register value happens to be bits [31:28]. For SSE-300 this register=0D is renamed SOC_IDENTITY and has a different format entirely, all of=0D whose fields can be configured by the SoC integrator when they=0D integrate the SSE into their SoC, and so "pass SYS_VERSION" breaks=0D down completely.=0D =0D Switch to using a simple integer property representing an=0D internal-to-QEMU enumeration of the SSE flavour. For the moment we=0D only need this in IOTKIT_SYSCTL, but as we add SSE-300 support a few=0D of the other devices will also need to know.=0D =0D We define and permit a value for the SSE-300 so we can start using=0D it in subsequent commits which add SSE-300 support.=0D =0D The now-redundant is_sse200 flag in IoTKitSysCtl will be removed=0D in the following commit.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-6-peter.maydell@linaro.org=0D =0D =0D Commit: 1cbd6fe4b8d5ae77de583b298d7834c8abe6ff46=0D https://github.com/qemu/qemu/commit/1cbd6fe4b8d5ae77de583b298d7834c= 8abe6ff46=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D M include/hw/misc/iotkit-sysctl.h=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Remove is_sse200 flag=0D =0D Remove the is_sse200 flag in favour of just directly testing the new=0D sse_version field.=0D =0D Since some of these registers exist in the SSE-300 but some do not or=0D have different behaviour, we expand out the if() statements in the=0D read and write functions into switch()es, so we have an easy place to=0D put SSE-300 specific behaviour.=0D =0D (Until we do add the SSE-300 behaviour, the thing preventing us=0D reaching the "unreachable" default cases is that armsse.c doesn't=0D yet pass us an ARMSSE_SSE300 version.)=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-7-peter.maydell@linaro.org=0D =0D =0D Commit: 0eb6b0ad16dfb3c4834c6943c3132b8d96294730=0D https://github.com/qemu/qemu/commit/0eb6b0ad16dfb3c4834c6943c3132b8= d96294730=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M hw/misc/iotkit-secctl.c=0D M include/hw/misc/iotkit-secctl.h=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values=0D =0D The versions of the Secure Access Configuration Register Block=0D and Non-secure Access Configuration Register Block in the SSE-300=0D are the same as those in the SSE-200, but the CIDR/PIDR ID=0D register values are different.=0D =0D Plumb through the sse-version property and use it to select=0D the correct ID register values.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-8-peter.maydell@linaro.org=0D =0D =0D Commit: 407664539d76523222a4a4a3ef273645593f75b2=0D https://github.com/qemu/qemu/commit/407664539d76523222a4a4a3ef27364= 5593f75b2=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M hw/misc/iotkit-sysinfo.c=0D M include/hw/misc/iotkit-sysinfo.h=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysinfo.c: Implement SSE-300 PID register values=0D =0D The version of the SYSINFO Register Block in the SSE-300 has=0D different CIDR/PIDR register values to the SSE-200; pass in=0D the sse-version property and use it to select the correct=0D ID register values.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-9-peter.maydell@linaro.org=0D =0D =0D Commit: c89cef3a2cdfb355258890db8cfd2175add5bbee=0D https://github.com/qemu/qemu/commit/c89cef3a2cdfb355258890db8cfd217= 5add5bbee=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D =0D Log Message:=0D -----------=0D hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300=0D =0D In the SSE-300, the format of the SYS_CONFIG0 register has changed again;= =0D pass through the correct value to the SYSINFO register block device.=0D =0D We drop the old SysConfigFormat enum, which was implemented in the=0D hope that different flavours of SSE would share the same format;=0D since they all seem to be different and we now have an sse_version=0D enum to key off, just use that.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-10-peter.maydell@linaro.org=0D =0D =0D Commit: 446587a914cfa57c2ce529056a9ca2215bde7111=0D https://github.com/qemu/qemu/commit/446587a914cfa57c2ce529056a9ca22= 15bde7111=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M hw/misc/iotkit-sysinfo.c=0D M include/hw/misc/iotkit-sysinfo.h=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR=0D =0D For SSE-300, the SYSINFO register block has two new registers:=0D =0D * SYS_CONFIG1 indicates the config for a potential CPU2 and CPU3;=0D since the SSE-300 can only be configured with a single CPU it=0D is always zero=0D =0D * IIDR is the subsystem implementation identity register;=0D its value is set by the SoC integrator, so we plumb this in from=0D the armsse.c code as we do with SYS_VERSION and SYS_CONFIG=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-11-peter.maydell@linaro.org=0D =0D =0D Commit: 0d10df30384c22c5f683cbfebc42cee6cf83fed4=0D https://github.com/qemu/qemu/commit/0d10df30384c22c5f683cbfebc42cee= 6cf83fed4=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/arm/Kconfig=0D M hw/timer/Kconfig=0D M hw/timer/meson.build=0D A hw/timer/sse-counter.c=0D M hw/timer/trace-events=0D A include/hw/timer/sse-counter.h=0D =0D Log Message:=0D -----------=0D hw/timer/sse-counter: Model the SSE Subsystem System Counter=0D =0D The SSE-300 includes a counter module; implement a model of it.=0D =0D This counter is documented in the SSE-123 Example Subsystem=0D Technical Reference Manual:=0D https://developer.arm.com/documentation/101370/latest/=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-12-peter.maydell@linaro.org=0D =0D =0D Commit: 0b8ceee822ae6d3bc4033c9b406c5f8d8c71ee6d=0D https://github.com/qemu/qemu/commit/0b8ceee822ae6d3bc4033c9b406c5f8= d8c71ee6d=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/arm/Kconfig=0D M hw/timer/Kconfig=0D M hw/timer/meson.build=0D A hw/timer/sse-timer.c=0D M hw/timer/trace-events=0D A include/hw/timer/sse-timer.h=0D =0D Log Message:=0D -----------=0D hw/timer/sse-timer: Model the SSE Subsystem System Timer=0D =0D The SSE-300 includes some timers which are a different kind to=0D those in the SSE-200. Model them.=0D =0D These timers are documented in the SSE-123 Example Subsystem=0D Technical Reference Manual:=0D https://developer.arm.com/documentation/101370/latest/=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-13-peter.maydell@linaro.org=0D =0D =0D Commit: 31b0c6b17691b16175cb4bb01068df15d3b3b08c=0D https://github.com/qemu/qemu/commit/31b0c6b17691b16175cb4bb01068df1= 5d3b3b08c=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour=0D= =0D The SSE-300's iokit-sysctl device is similar to the SSE-200, but=0D some registers have moved address or have different behaviours.=0D In this commit we add case statements for the registers where=0D the SSE-300 and SSE-200 have the same behaviour. Some registers=0D are the same on all SSE versions and so need no code change at all.=0D Putting both of these categories together covers:=0D =0D 0x0 SECDBGSTAT=0D 0x4 SECDBGSET=0D 0x8 SECDBGCLR=0D 0xc SCSECCTRL=0D 0x10 CLK_CFG0 -- this is like SSE-200 FCLK_DIV but with a=0D different set of clocks being controlled; our implementation=0D is a dummy reads-as-written anyway=0D 0x14 CLK_CFG1 -- similar to SSE-200 SYSCLK_DIV; our implementation=0D is a dummy=0D 0x18 CLK_FORCE -- similar to SSE-200 but different bit allocations;=0D we have a dummy implementation=0D 0x100 RESET_SYNDROME -- bit allocation differs from SSE-200 but our=0D implementation is a dummy=0D 0x104 RESET_MASK -- bit allocation differs from SSE-200 but our=0D implementation is a dummy=0D 0x108 SWRESET=0D 0x10c GRETREG=0D 0x200 PDCM_PD_SYS_SENSE -- some bit allocations differ, but our=0D implementation is a dummy=0D =0D We also need to migrate the state of these registers which are shared=0D between the SSE-200 and SSE-300, so update the vmstate 'needed'=0D function to do this.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-14-peter.maydell@linaro.org=0D =0D =0D Commit: 92ecf2d5eeaecec2454e95acf2416162538c1225=0D https://github.com/qemu/qemu/commit/92ecf2d5eeaecec2454e95acf241616= 2538c1225=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300=0D =0D In the SSE-300 the CPU_WAIT and NMI_ENABLE registers have=0D moved offsets, so they are now where the SSE-200's WICCTRL=0D and EWCTRL were. The SSE-300 does not have WICCTLR or EWCTRL=0D at all, and the old offsets are reserved:=0D =0D Offset SSE-200 SSE-300=0D -----------------------------------=0D 0x118 CPUWAIT reserved=0D 0x118 NMI_ENABLE reserved=0D 0x120 WICCTRL CPUWAIT=0D 0x124 EWCTRL NMI_ENABLE=0D =0D Handle this reshuffle, and the fact that SSE-300 has only=0D one CPU and so only one active bit in CPUWAIT.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-15-peter.maydell@linaro.org=0D =0D =0D Commit: 246dbeb76319fdaa7030403ea0273617331f6a44=0D https://github.com/qemu/qemu/commit/246dbeb76319fdaa7030403ea027361= 7331f6a44=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Handle INITSVTOR* for SSE-300=0D =0D The SSE-300 has only one CPU and so no INITSVTOR1. It does=0D have INITSVTOR0, but unlike the SSE-200 this register now=0D has a LOCK bit which can be set to 1 to prevent any further=0D writes to the register. Implement these differences.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-16-peter.maydell@linaro.org=0D =0D =0D Commit: 2672a6ca72311bdf97f9e324ab2e71ff60bd2db9=0D https://github.com/qemu/qemu/commit/2672a6ca72311bdf97f9e324ab2e71f= f60bd2db9=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D M include/hw/misc/iotkit-sysctl.h=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL regis= ter=0D =0D The SSE-300 has a new PWRCTRL register at offset 0x1fc (previously=0D reserved). This register controls accessibility of some registers=0D in the Power Policy Units (PPUs). Since QEMU doesn't implement=0D the PPUs, we don't need to implement any real behaviour for this=0D register, so we just handle the UNLOCK bit which controls whether=0D writes to the register itself are permitted and otherwise make it=0D be reads-as-written.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-17-peter.maydell@linaro.org=0D =0D =0D Commit: c5ffe6c8dd5623f1893f54971e23e7c1ddf094ee=0D https://github.com/qemu/qemu/commit/c5ffe6c8dd5623f1893f54971e23e7c= 1ddf094ee=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D M include/hw/misc/iotkit-sysctl.h=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE regist= ers=0D =0D The sysctl PDCM_PD_*_SENSE registers control various power domains in=0D the system and allow the guest to configure which conditions keep a=0D power domain awake and what power state to use when the domain is in=0D a low power state. QEMU doesn't model power domains, so for us these=0D registers are dummy reads-as-written implementations.=0D =0D The SSE-300 has a different power domain setup, so the set of=0D registers is slightly different:=0D =0D Offset SSE-200 SSE-300=0D ---------------------------------------------------=0D 0x200 PDCM_PD_SYS_SENSE PDCM_PD_SYS_SENSE=0D 0x204 reserved PDCM_PD_CPU0_SENSE=0D 0x208 reserved reserved=0D 0x20c PDCM_PD_SRAM0_SENSE reserved=0D 0x210 PDCM_PD_SRAM1_SENSE reserved=0D 0x214 PDCM_PD_SRAM2_SENSE PDCM_PD_VMR0_SENSE=0D 0x218 PDCM_PD_SRAM3_SENSE PDCM_PD_VMR1_SENSE=0D =0D Offsets 0x200 and 0x208 are the same for both, so handled in a=0D previous commit; here we deal with 0x204, 0x20c, 0x210, 0x214, 0x218.=0D =0D (We can safely add new lines to the SSE300 vmstate because no board=0D uses this device in an SSE300 yet.)=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-18-peter.maydell@linaro.org=0D =0D =0D Commit: 6069bbc904503dd4f4c2cfd7ff883300a6bddeeb=0D https://github.com/qemu/qemu/commit/6069bbc904503dd4f4c2cfd7ff88330= 0a6bddeeb=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Implement SSE-200 and SSE-300 PID register value= s=0D =0D The SSE-200 and SSE-300 have different PID register values from the=0D IoTKit for the sysctl register block. We incorrectly implemented the=0D SSE-200 with the same PID values as IoTKit. Fix the SSE-200 bug and=0D report these register values for SSE-300.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-19-peter.maydell@linaro.org=0D =0D =0D Commit: 370d75d935c4f58a3f94597a9e6609aefbc5bb34=0D https://github.com/qemu/qemu/commit/370d75d935c4f58a3f94597a9e6609a= efbc5bb34=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/Kconfig=0D M hw/misc/Kconfig=0D =0D Log Message:=0D -----------=0D hw/arm/Kconfig: Move ARMSSE_CPUID and ARMSSE_MHU stanzas to hw/misc=0D =0D The ARMSSE_CPUID and ARMSSE_MHU Kconfig stanzas are for the devices=0D implemented by hw/misc/cpuid.c and hw/misc/armsse-mhu.c. Move them=0D to hw/misc/Kconfig where they belong.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-20-peter.maydell@linaro.org=0D =0D =0D Commit: 4239b311467bea86578d9da3cd22909de69d7af7=0D https://github.com/qemu/qemu/commit/4239b311467bea86578d9da3cd22909= de69d7af7=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/arm/Kconfig=0D M hw/misc/Kconfig=0D A hw/misc/armsse-cpu-pwrctrl.c=0D M hw/misc/meson.build=0D M hw/misc/trace-events=0D A include/hw/misc/armsse-cpu-pwrctrl.h=0D =0D Log Message:=0D -----------=0D hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU_PWRCTRL register bloc= k=0D =0D The SSE-300 has a new register block CPU_PWRCTRL. There is one=0D instance of this per CPU in the system (so just one for the SSE-300),=0D and as well as the usual CIDR/PIDR ID registers it has just one=0D register, CPUPWRCFG. This register allows the guest to configure=0D behaviour of the system in power-down and deep-sleep states. Since=0D QEMU does not model those, we make the register a dummy=0D reads-as-written implementation.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-21-peter.maydell@linaro.org=0D =0D =0D Commit: 91eb4f64eb49ea8dc7e5ebf5fdb377008ee0b688=0D https://github.com/qemu/qemu/commit/91eb4f64eb49ea8dc7e5ebf5fdb3770= 08ee0b688=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Use an array for apb_ppc fields in the state structure=0D= =0D Convert the apb_ppc0 and apb_ppc1 fields in the ARMSSE state struct=0D to use an array instead of two separate fields. We already had one=0D place in the code that wanted to be able to refer to the PPC by=0D index, and we're about to add more code like that.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-22-peter.maydell@linaro.org=0D =0D =0D Commit: 3378873802afe8af0355c4fac3e11e6510fc1f27=0D https://github.com/qemu/qemu/commit/3378873802afe8af0355c4fac3e11e6= 510fc1f27=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Add a define for number of IRQs used by the SSE itself=0D= =0D The SSE uses 32 interrupts for its own devices, and then passes through=0D= its expansion IRQ inputs to the CPU's interrupts 33 and upward.=0D Add a define for the number of IRQs the SSE uses for itself, instead=0D of hardcoding 32.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-23-peter.maydell@linaro.org=0D =0D =0D Commit: e94d7723b5c0e7e51775ee8fc94a10e975392d0b=0D https://github.com/qemu/qemu/commit/e94d7723b5c0e7e51775ee8fc94a10e= 975392d0b=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Add framework for data-driven device placement=0D =0D The SSE-300 is mostly the same as the SSE-200, but it has moved some=0D of the devices in the memory map and uses different device types in=0D some cases. To accommodate this, add a framework where the placement=0D and wiring of some devices can be specified in a data table.=0D =0D This commit adds the framework for this data-driven device placement,=0D and makes the CMSDK APB timer devices use it. Subsequent commits=0D will convert the other devices which differ between SSE-200 and=0D SSE-300.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-24-peter.maydell@linaro.org=0D =0D =0D Commit: 7e8e25dbd385403569ce2df07b60b4f8a61f2266=0D https://github.com/qemu/qemu/commit/7e8e25dbd385403569ce2df07b60b4f= 8a61f2266=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Move dual-timer device into data-driven framework=0D =0D Move the CMSDK dualtimer device handling into the data-driven=0D device placement framework.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-25-peter.maydell@linaro.org=0D =0D =0D Commit: 1292b93289f8545f416f1d25ee701caa91d24415=0D https://github.com/qemu/qemu/commit/1292b93289f8545f416f1d25ee701ca= a91d24415=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Move watchdogs into data-driven framework=0D =0D Move the CMSDK watchdog device handling into the data-driven device=0D placement framework. This is slightly more complicated because these=0D devices might wire their IRQs up to the NMI line, and because one of=0D them uses the slow 32KHz clock rather than the main clock.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-26-peter.maydell@linaro.org=0D =0D =0D Commit: 99865afc66bafca6f734712a897c0b68460f7757=0D https://github.com/qemu/qemu/commit/99865afc66bafca6f734712a897c0b6= 8460f7757=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Move s32ktimer into data-driven framework=0D =0D Move the CMSDK timer that uses the S32K slow clock into the data-driven=0D= device placement framework.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-27-peter.maydell@linaro.org=0D =0D =0D Commit: 39bd0bb15f4849c24b1fe6a235f245479b8aac22=0D https://github.com/qemu/qemu/commit/39bd0bb15f4849c24b1fe6a235f2454= 79b8aac22=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Move sysinfo register block into data-driven framework=0D= =0D Move the sysinfo register block into the data-driven framework.=0D =0D While we are moving the code for configuring this device around,=0D regularize on using &error_abortw when setting the integer=0D properties: they are all simple DEFINE_PROP_UINT32 properties so the=0D setting can never fail.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-28-peter.maydell@linaro.org=0D =0D =0D Commit: 9de4ddb49595670fcbf8da16c3a6bceb083c34ce=0D https://github.com/qemu/qemu/commit/9de4ddb49595670fcbf8da16c3a6bce= b083c34ce=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Move sysctl register block into data-driven framework=0D= =0D Move the sysctl register block into the data-driven device placement=0D framework.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-29-peter.maydell@linaro.org=0D =0D =0D Commit: a459e849aa2b683fac20fc72db9b4b1d90a4b4b9=0D https://github.com/qemu/qemu/commit/a459e849aa2b683fac20fc72db9b4b1= d90a4b4b9=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Move PPUs into data-driven framework=0D =0D Move the PPUs into the data-driven device placement framework.=0D We don't implement them, so they are just TYPE_UNIMPLEMENTED stubs.=0D =0D Because the SSE-200 and the IotKit diverge here (the IoTKit does=0D not have the PPUs) we need to separate out the ARMSSEDeviceInfo=0D for the two variants, and only add the PPUs to the SSE-200.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-30-peter.maydell@linaro.org=0D =0D =0D Commit: 6fe8acb41ed5a4b033ae7b5f876968e568476129=0D https://github.com/qemu/qemu/commit/6fe8acb41ed5a4b033ae7b5f876968e= 568476129=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Add missing SSE-200 SYS_PPU=0D =0D We forgot to implement a TYPE_UNIMPLEMENTED_DEVICE stub=0D for the SYS_PPU in the SSE-200, which is at 0x50022000.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-31-peter.maydell@linaro.org=0D =0D =0D Commit: 1aa9e174b4b8de9ea52f9583c476e295065b96e3=0D https://github.com/qemu/qemu/commit/1aa9e174b4b8de9ea52f9583c476e29= 5065b96e3=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Indirect irq_is_common[] through ARMSSEInfo=0D =0D The SSE-300 has a slightly different set of shared-per-CPU interrupts,=0D= allow the irq_is_common[] array to be different per SSE variant.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-32-peter.maydell@linaro.org=0D =0D =0D Commit: 9febd175415dbc84e6ff7bda9bf6d90fe060181e=0D https://github.com/qemu/qemu/commit/9febd175415dbc84e6ff7bda9bf6d90= fe060181e=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Add support for SSE variants with a system counter=0D =0D The SSE-300 has a system counter device; add support for SSE=0D variants having this device.=0D =0D As with the existing devices like the cache control block, CPUID=0D block, etc, we don't try to make the MMIO addresses configurable. We=0D can do that if and when we need to model a future SSE variant which=0D has the counter in a different location.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-33-peter.maydell@linaro.org=0D =0D =0D Commit: f11de23158528c90b51c603c0cc3b2286e71d3fc=0D https://github.com/qemu/qemu/commit/f11de23158528c90b51c603c0cc3b22= 86e71d3fc=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Add support for TYPE_SSE_TIMER in ARMSSEDeviceInfo=0D =0D The SSE-300 has four timers of type TYPE_SSE_TIMER; add support in=0D the code for having these in an ARMSSEDeviceInfo array.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-34-peter.maydell@linaro.org=0D =0D =0D Commit: 4668b441cb667619916d4bc6a204f3df06730dfb=0D https://github.com/qemu/qemu/commit/4668b441cb667619916d4bc6a204f3d= f06730dfb=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block=0D =0D Support SSE variants like the SSE-300 with an ARMSSE_CPU_PWRCTRL register= =0D block. Because this block is per-CPU and does not clash with any of the=0D= SSE-200 devices, we handle it with a has_cpu_pwrctrl flag like the=0D existing has_cachectrl, has_cpusectrl and has_cpuid, rather than=0D trying to add per-CPU-device support to the devinfo array handling code.=0D= =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-35-peter.maydell@linaro.org=0D =0D =0D Commit: 8901bb414a2416a3ad3bc870770daaebb08c3aa8=0D https://github.com/qemu/qemu/commit/8901bb414a2416a3ad3bc870770daae= bb08c3aa8=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Add SSE-300 support=0D =0D Now we have sufficiently parameterised the code, we can add SSE-300=0D support by adding a new entry to the armsse_variants[] array.=0D =0D Note that the main watchdog (unlike the s32k watchdog) in the SSE-300=0D is a different device from the CMSDK watchdog; we don't have a model=0D of it so we leave it as a TYPE_UNIMPLEMENTED_DEVICE stub.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-36-peter.maydell@linaro.org=0D =0D =0D Commit: 8b4b5c23f92df5ebc2c4aa55b01d4e1d9d06548e=0D https://github.com/qemu/qemu/commit/8b4b5c23f92df5ebc2c4aa55b01d4e1= d9d06548e=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make UART overflow IRQ board-specific=0D =0D The AN547 puts the combined UART overflow IRQ at 48, not 47 like the=0D other images. Make this setting board-specific.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-37-peter.maydell@linaro.org=0D =0D =0D Commit: 7fa859914f58607bf874b9efecbe4be5726d91ac=0D https://github.com/qemu/qemu/commit/7fa859914f58607bf874b9efecbe4be= 5726d91ac=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-fpgaio.c=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate=0D =0D We've already broken migration compatibility for all the MPS=0D boards, so we might as well take advantage of this to simplify=0D the vmstate for the FPGAIO device by folding the counters=0D subsection into the main vmstate description.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-38-peter.maydell@linaro.org=0D =0D =0D Commit: 39901aea063fb4be77a89d7badfed3998ad8fb4a=0D https://github.com/qemu/qemu/commit/39901aea063fb4be77a89d7badfed39= 98ad8fb4a=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D M hw/misc/mps2-fpgaio.c=0D M include/hw/misc/mps2-fpgaio.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register=0D =0D For the AN547 image, the FPGAIO block has an extra DBGCTRL register,=0D which is used to control the SPNIDEN, SPIDEN, NPIDEN and DBGEN inputs=0D to the CPU. These signals control when the CPU permits use of the=0D external debug interface. Our CPU models don't implement the=0D external debug interface, so we model the register as=0D reads-as-written.=0D =0D Implement the register, with a property defining whether it is=0D present, and allow mps2-tz boards to specify that it is present.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-39-peter.maydell@linaro.org=0D =0D =0D Commit: 6ac80818941829c01363e9feeefe08e8bc693ab7=0D https://github.com/qemu/qemu/commit/6ac80818941829c01363e9feeefe08e= 8bc693ab7=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-scc.c=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-scc: Implement changes for AN547=0D =0D Implement the minor changes required to the SCC block for AN547 images:=0D= * CFG2 and CFG5 exist (like AN524)=0D * CFG3 is reserved (like AN524)=0D * CFG0 bit 1 is CPU_WAIT; we don't implement it, but note this=0D in the TODO comment=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-40-peter.maydell@linaro.org=0D =0D =0D Commit: ad28ca7e9fb99242d4b8ba22e5234f73db59bff4=0D https://github.com/qemu/qemu/commit/ad28ca7e9fb99242d4b8ba22e5234f7= 3db59bff4=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Support running APB peripherals on different clock=0D =0D The AN547 runs the APB peripherals outside the SSE-300 on a different=0D and slightly slower clock than it runs the SSE-300 with. Support=0D making the APB peripheral clock frequency board-specific. (For our=0D implementation only the UARTs actually take a clock.)=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-41-peter.maydell@linaro.org=0D =0D =0D Commit: 9fe1ea11264914d7e1303d903059acfecff98421=0D https://github.com/qemu/qemu/commit/9fe1ea11264914d7e1303d903059acf= ecff98421=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make initsvtor0 setting board-specific=0D =0D The AN547 configures the SSE-300 with a different initsvtor0=0D setting from its default; make this a board-specific setting.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-42-peter.maydell@linaro.org=0D =0D =0D Commit: eb09d533d87fd83c79dc659a882770c9897e73db=0D https://github.com/qemu/qemu/commit/eb09d533d87fd83c79dc659a882770c= 9897e73db=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Add new mps3-an547 board=0D =0D Add support for the mps3-an547 board; this is an SSE-300 based=0D FPGA image that runs on the MPS3.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-43-peter.maydell@linaro.org=0D =0D =0D Commit: dd750743ecd01352ad7697cabd58cb26abf11efd=0D https://github.com/qemu/qemu/commit/dd750743ecd01352ad7697cabd58cb2= 6abf11efd=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/mps2.rst=0D =0D Log Message:=0D -----------=0D docs/system/arm/mps2.rst: Document the new mps3-an547 board=0D =0D Add brief documentation of the new mps3-an547 board.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219144617.4782-44-peter.maydell@linaro.org=0D =0D =0D Commit: 1eca58aa1db79b077abf8c031c4d600998a5438d=0D https://github.com/qemu/qemu/commit/1eca58aa1db79b077abf8c031c4d600= 998a5438d=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M tests/qtest/meson.build=0D A tests/qtest/sse-timer-test.c=0D =0D Log Message:=0D -----------=0D tests/qtest/sse-timer-test: Add simple test of the SSE counter=0D =0D Add a simple qtest to exercise the new system counter device in the=0D SSE-300.=0D =0D We'll add tests of the system timer device here too, so this includes=0D scaffolding (register definitions, etc) for those.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219144617.4782-45-peter.maydell@linaro.org=0D =0D =0D Commit: f277d1c373edab24530e2c13b35323019dd12bce=0D https://github.com/qemu/qemu/commit/f277d1c373edab24530e2c13b353230= 19dd12bce=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/sse-timer-test.c=0D =0D Log Message:=0D -----------=0D tests/qtest/sse-timer-test: Test the system timer=0D =0D Add a test which tests various parts of the functionality of the=0D SSE system timer.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: bf7ca80386cd361a429c8eef4798bd2afe0219dc=0D https://github.com/qemu/qemu/commit/bf7ca80386cd361a429c8eef4798bd2= afe0219dc=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/sse-timer-test.c=0D =0D Log Message:=0D -----------=0D tests/qtest/sse-timer-test: Test counter scaling changes=0D =0D Test that when we change the scaling of the system counter that the=0D system timer responds appropriately.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 80485d88f90777648519ec39eb25f6f5ca28a80b=0D https://github.com/qemu/qemu/commit/80485d88f90777648519ec39eb25f6f= 5ca28a80b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.c=0D M target/arm/cpu_tcg.c=0D =0D Log Message:=0D -----------=0D target/arm: Restrict v7A TCG cpus to TCG accel=0D =0D KVM requires the target cpu to be at least ARMv8 architecture=0D (support on ARMv7 has been dropped in commit 82bf7ae84ce:=0D "target/arm: Remove KVM support for 32-bit Arm hosts").=0D =0D A KVM-only build won't be able to run TCG cpus, move the=0D v7A CPU definitions to cpu_tcg.c.=0D =0D Reported-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210306151801.2388182-1-f4bug@amsat.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: a7b5dffb2a58282bcebdd9b294b0e986abddc396=0D https://github.com/qemu/qemu/commit/a7b5dffb2a58282bcebdd9b294b0e98= 6abddc396=0D Author: Xuzhou Cheng =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/dma/Kconfig=0D M hw/dma/meson.build=0D A hw/dma/xlnx_csu_dma.c=0D A include/hw/dma/xlnx_csu_dma.h=0D =0D Log Message:=0D -----------=0D hw/dma: Implement a Xilinx CSU DMA model=0D =0D ZynqMP QSPI supports SPI transfer using DMA mode, but currently this=0D is unimplemented. When QSPI is programmed to use DMA mode, QEMU will=0D crash. This is observed when testing VxWorks 7.=0D =0D This adds a Xilinx CSU DMA model and the implementation is based on=0D https://github.com/Xilinx/qemu/blob/master/hw/dma/csu_stream_dma.c.=0D The DST part of the model is verified along with ZynqMP GQSPI model.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Tested-by: Edgar E. Iglesias =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-2-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 78407ba993962820d8709a0e3911cd955adcbb6e=0D https://github.com/qemu/qemu/commit/78407ba993962820d8709a0e3911cd9= 55adcbb6e=0D Author: Xuzhou Cheng =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/xlnx-zynqmp.c=0D M include/hw/arm/xlnx-zynqmp.h=0D =0D Log Message:=0D -----------=0D hw/arm: xlnx-zynqmp: Clean up coding convention issues=0D =0D There are some coding convention warnings in xlnx-zynqmp.c and=0D xlnx-zynqmp.h, as reported by:=0D =0D $ ./scripts/checkpatch.pl include/hw/arm/xlnx-zynqmp.h=0D $ ./scripts/checkpatch.pl hw/arm/xlnx-zynqmp.c=0D =0D Let's clean them up.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-3-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 12e8d8bac2308f4b015f4a1295da06a22b311de6=0D https://github.com/qemu/qemu/commit/12e8d8bac2308f4b015f4a1295da06a= 22b311de6=0D Author: Xuzhou Cheng =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/Kconfig=0D M hw/arm/xlnx-zynqmp.c=0D M include/hw/arm/xlnx-zynqmp.h=0D =0D Log Message:=0D -----------=0D hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI=0D =0D Add a Xilinx CSU DMA module to ZynqMP SoC, and connent the stream=0D link of GQSPI to CSU DMA.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-4-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 4ff0fa08ae1b8924dad1355dc51605d7eb6020e8=0D https://github.com/qemu/qemu/commit/4ff0fa08ae1b8924dad1355dc51605d= 7eb6020e8=0D Author: Xuzhou Cheng =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/ssi/xilinx_spips.c=0D =0D Log Message:=0D -----------=0D hw/ssi: xilinx_spips: Clean up coding convention issues=0D =0D There are some coding convention warnings in xilinx_spips.c,=0D as reported by:=0D =0D $ ./scripts/checkpatch.pl hw/ssi/xilinx_spips.c=0D =0D Let's clean them up.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Peter Maydell =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-5-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 45ddc397e0c1fea02163380786dfe0e253c7609d=0D https://github.com/qemu/qemu/commit/45ddc397e0c1fea02163380786dfe0e= 253c7609d=0D Author: Xuzhou Cheng =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/ssi/xilinx_spips.c=0D M include/hw/ssi/xilinx_spips.h=0D =0D Log Message:=0D -----------=0D hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips=0D= =0D Now that the Xilinx CSU DMA model is implemented, the existing=0D DMA related dead codes in the ZynqMP QSPI are useless and should=0D be removed. The maximum register number is also updated to only=0D include the QSPI registers.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-6-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: c2bdb23d50bbd703dfd8457f83c9b70888729fc6=0D https://github.com/qemu/qemu/commit/c2bdb23d50bbd703dfd8457f83c9b70= 888729fc6=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/renesas_tmr.c=0D =0D Log Message:=0D -----------=0D hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_=0D =0D The #defines INTERNAL and CASCADING represent different possible=0D values for the TCCR.CSS register field; prefix them with CSS_ to make=0D this more obvious, before we add more defines to represent the=0D other possible values of the field in the next commit.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219223241.16344-2-peter.maydell@linaro.org=0D =0D =0D Commit: da2140183ac3a04b1ccb861aeac1f2c048c71b66=0D https://github.com/qemu/qemu/commit/da2140183ac3a04b1ccb861aeac1f2c= 048c71b66=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/renesas_tmr.c=0D =0D Log Message:=0D -----------=0D hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()=0D =0D The read_tcnt() function calculates the TCNT register values for the=0D two channels of the timer module; it sets these up in the local=0D tcnt[] array, and eventually returns either one or both of them,=0D depending on whether the access is 8 or 16 bits. However, not all of=0D the code paths through this function set both elements of this array:=0D if the guest has programmed the TCCR.CSS register fields to values=0D which are either documented as not to be used or which QEMU does not=0D implement, then the function will return uninitialized data. (This=0D was spotted by Coverity.)=0D =0D Add the missing CSS cases to this code, so that we return a=0D consistent value instead of uninitialized data, and so the code=0D structure indicates what's happening.=0D =0D Fixes: CID 1429976=0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219223241.16344-3-peter.maydell@linaro.org=0D =0D =0D Commit: bd5664de7e6c3b793bde3c3344060536dc5d71b5=0D https://github.com/qemu/qemu/commit/bd5664de7e6c3b793bde3c334406053= 6dc5d71b5=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M docs/devel/clocks.rst=0D M docs/system/arm/mps2.rst=0D M hw/adc/npcm7xx_adc.c=0D M hw/arm/Kconfig=0D M hw/arm/armsse.c=0D M hw/arm/mps2-tz.c=0D M hw/arm/xlnx-zynqmp.c=0D M hw/char/cadence_uart.c=0D M hw/char/ibex_uart.c=0D M hw/char/pl011.c=0D M hw/core/clock.c=0D M hw/core/qdev-clock.c=0D M hw/dma/Kconfig=0D M hw/dma/meson.build=0D A hw/dma/xlnx_csu_dma.c=0D M hw/mips/cps.c=0D M hw/misc/Kconfig=0D A hw/misc/armsse-cpu-pwrctrl.c=0D M hw/misc/bcm2835_cprman.c=0D M hw/misc/iotkit-secctl.c=0D M hw/misc/iotkit-sysctl.c=0D M hw/misc/iotkit-sysinfo.c=0D M hw/misc/meson.build=0D M hw/misc/mps2-fpgaio.c=0D M hw/misc/mps2-scc.c=0D M hw/misc/npcm7xx_clk.c=0D M hw/misc/npcm7xx_pwm.c=0D M hw/misc/trace-events=0D M hw/misc/zynq_slcr.c=0D M hw/ssi/xilinx_spips.c=0D M hw/timer/Kconfig=0D M hw/timer/cmsdk-apb-dualtimer.c=0D M hw/timer/cmsdk-apb-timer.c=0D M hw/timer/meson.build=0D M hw/timer/npcm7xx_timer.c=0D M hw/timer/renesas_tmr.c=0D A hw/timer/sse-counter.c=0D A hw/timer/sse-timer.c=0D M hw/timer/trace-events=0D M hw/watchdog/cmsdk-apb-watchdog.c=0D A include/hw/arm/armsse-version.h=0D M include/hw/arm/armsse.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/clock.h=0D A include/hw/dma/xlnx_csu_dma.h=0D A include/hw/misc/armsse-cpu-pwrctrl.h=0D M include/hw/misc/iotkit-secctl.h=0D M include/hw/misc/iotkit-sysctl.h=0D M include/hw/misc/iotkit-sysinfo.h=0D M include/hw/misc/mps2-fpgaio.h=0D M include/hw/qdev-clock.h=0D M include/hw/ssi/xilinx_spips.h=0D A include/hw/timer/sse-counter.h=0D A include/hw/timer/sse-timer.h=0D M target/arm/cpu.c=0D M target/arm/cpu_tcg.c=0D M target/mips/cpu.c=0D M tests/qtest/meson.build=0D A tests/qtest/sse-timer-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10308-1' into staging=0D =0D * Add new mps3-an547 board=0D * target/arm: Restrict v7A TCG cpus to TCG accel=0D * Implement a Xilinx CSU DMA model=0D * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()=0D =0D # gpg: Signature made Mon 08 Mar 2021 17:32:02 GMT=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210308-1: (54 commits)=0D hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()=0D hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_=0D hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips=0D= hw/ssi: xilinx_spips: Clean up coding convention issues=0D hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI=0D hw/arm: xlnx-zynqmp: Clean up coding convention issues=0D hw/dma: Implement a Xilinx CSU DMA model=0D target/arm: Restrict v7A TCG cpus to TCG accel=0D tests/qtest/sse-timer-test: Test counter scaling changes=0D tests/qtest/sse-timer-test: Test the system timer=0D tests/qtest/sse-timer-test: Add simple test of the SSE counter=0D docs/system/arm/mps2.rst: Document the new mps3-an547 board=0D hw/arm/mps2-tz: Add new mps3-an547 board=0D hw/arm/mps2-tz: Make initsvtor0 setting board-specific=0D hw/arm/mps2-tz: Support running APB peripherals on different clock=0D hw/misc/mps2-scc: Implement changes for AN547=0D hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register=0D hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate=0D hw/arm/mps2-tz: Make UART overflow IRQ board-specific=0D hw/arm/armsse: Add SSE-300 support=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/a557b00469bc...bd5664de7e6c= =0D From MAILER-DAEMON Wed Mar 10 08:58:21 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lJzLu-0005n3-8b for mharc-qemu-commits@gnu.org; Wed, 10 Mar 2021 08:58:19 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:56448) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJzLo-0005lW-3v for qemu-commits@nongnu.org; Wed, 10 Mar 2021 08:58:13 -0500 Received: from out-25.smtp.github.com ([192.30.252.208]:47385 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lJzLk-0006vh-Lz for qemu-commits@nongnu.org; Wed, 10 Mar 2021 08:58:11 -0500 Received: from github.com (hubbernetes-node-f70f741.ash1-iad.github.net [10.56.115.69]) by smtp.github.com (Postfix) with ESMTPA id E3F9C84007D for ; Wed, 10 Mar 2021 05:58:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615384687; bh=rrBrjqrBjJ7FVOcazaT1hXemfXfZ8OC9U4K8ZhL8fF8=; h=Date:From:To:Subject:From; b=utWW5TC6Y+GsRJnHYvhGBsch7e2qIdsXhh72LmXokJtrSGTwHwawazBrl2ToBeqmQ 8mgfFvIWbXdEIyrDeaplTJ5B7W8m5iUKhyyMmPYU51OzAQLbWRRzK9gh5zmx0P9jdE cmMTKrqtGJa4li9x4+Fgb6dU3JqedNc5S1QimQeE= Date: Wed, 10 Mar 2021 05:58:07 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.243, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 355935: hw/dma: Implement a Xilinx CSU DMA model X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Mar 2021 13:58:13 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 35593573b25f8774ce16be8a7d703b7740964e81=0D https://github.com/qemu/qemu/commit/35593573b25f8774ce16be8a7d703b7= 740964e81=0D Author: Xuzhou Cheng =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/dma/Kconfig=0D M hw/dma/meson.build=0D A hw/dma/xlnx_csu_dma.c=0D A include/hw/dma/xlnx_csu_dma.h=0D =0D Log Message:=0D -----------=0D hw/dma: Implement a Xilinx CSU DMA model=0D =0D ZynqMP QSPI supports SPI transfer using DMA mode, but currently this=0D is unimplemented. When QSPI is programmed to use DMA mode, QEMU will=0D crash. This is observed when testing VxWorks 7.=0D =0D This adds a Xilinx CSU DMA model and the implementation is based on=0D https://github.com/Xilinx/qemu/blob/master/hw/dma/csu_stream_dma.c.=0D The DST part of the model is verified along with ZynqMP GQSPI model.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Tested-by: Edgar E. Iglesias =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-2-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 21bce3717e2cb70e3bea06e8684bae111c9f4dda=0D https://github.com/qemu/qemu/commit/21bce3717e2cb70e3bea06e8684bae1= 11c9f4dda=0D Author: Xuzhou Cheng =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/xlnx-zynqmp.c=0D M include/hw/arm/xlnx-zynqmp.h=0D =0D Log Message:=0D -----------=0D hw/arm: xlnx-zynqmp: Clean up coding convention issues=0D =0D There are some coding convention warnings in xlnx-zynqmp.c and=0D xlnx-zynqmp.h, as reported by:=0D =0D $ ./scripts/checkpatch.pl include/hw/arm/xlnx-zynqmp.h=0D $ ./scripts/checkpatch.pl hw/arm/xlnx-zynqmp.c=0D =0D Let's clean them up.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-3-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 668351a54883b6283e7ae94daf4d4eca1a071158=0D https://github.com/qemu/qemu/commit/668351a54883b6283e7ae94daf4d4ec= a1a071158=0D Author: Xuzhou Cheng =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/Kconfig=0D M hw/arm/xlnx-zynqmp.c=0D M include/hw/arm/xlnx-zynqmp.h=0D =0D Log Message:=0D -----------=0D hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI=0D =0D Add a Xilinx CSU DMA module to ZynqMP SoC, and connent the stream=0D link of GQSPI to CSU DMA.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-4-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 3754eed4206f2472b5f4e4c3d84a1d39f0cd5d7c=0D https://github.com/qemu/qemu/commit/3754eed4206f2472b5f4e4c3d84a1d3= 9f0cd5d7c=0D Author: Xuzhou Cheng =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ssi/xilinx_spips.c=0D =0D Log Message:=0D -----------=0D hw/ssi: xilinx_spips: Clean up coding convention issues=0D =0D There are some coding convention warnings in xilinx_spips.c,=0D as reported by:=0D =0D $ ./scripts/checkpatch.pl hw/ssi/xilinx_spips.c=0D =0D Let's clean them up.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Peter Maydell =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-5-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: d6bafaf45c5ff31ad7d7d87c3c3d37ae675684cc=0D https://github.com/qemu/qemu/commit/d6bafaf45c5ff31ad7d7d87c3c3d37a= e675684cc=0D Author: Xuzhou Cheng =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ssi/xilinx_spips.c=0D M include/hw/ssi/xilinx_spips.h=0D =0D Log Message:=0D -----------=0D hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips=0D= =0D Now that the Xilinx CSU DMA model is implemented, the existing=0D DMA related dead codes in the ZynqMP QSPI are useless and should=0D be removed. The maximum register number is also updated to only=0D include the QSPI registers.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-6-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 02f8fe11f7af92bacc6fc7f661ea5076e8a63e43=0D https://github.com/qemu/qemu/commit/02f8fe11f7af92bacc6fc7f661ea507= 6e8a63e43=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/renesas_tmr.c=0D =0D Log Message:=0D -----------=0D hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_=0D =0D The #defines INTERNAL and CASCADING represent different possible=0D values for the TCCR.CSS register field; prefix them with CSS_ to make=0D this more obvious, before we add more defines to represent the=0D other possible values of the field in the next commit.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219223241.16344-2-peter.maydell@linaro.org=0D =0D =0D Commit: 81b3ddaf8772ec6f88d372e52f9b433cfa46bc46=0D https://github.com/qemu/qemu/commit/81b3ddaf8772ec6f88d372e52f9b433= cfa46bc46=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/renesas_tmr.c=0D =0D Log Message:=0D -----------=0D hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()=0D =0D The read_tcnt() function calculates the TCNT register values for the=0D two channels of the timer module; it sets these up in the local=0D tcnt[] array, and eventually returns either one or both of them,=0D depending on whether the access is 8 or 16 bits. However, not all of=0D the code paths through this function set both elements of this array:=0D if the guest has programmed the TCCR.CSS register fields to values=0D which are either documented as not to be used or which QEMU does not=0D implement, then the function will return uninitialized data. (This=0D was spotted by Coverity.)=0D =0D Add the missing CSS cases to this code, so that we return a=0D consistent value instead of uninitialized data, and so the code=0D structure indicates what's happening.=0D =0D Fixes: CID 1429976=0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219223241.16344-3-peter.maydell@linaro.org=0D =0D =0D Commit: 5c6295a45b4fceac913c11abc62488c49c02b9fd=0D https://github.com/qemu/qemu/commit/5c6295a45b4fceac913c11abc62488c= 49c02b9fd=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M docs/devel/clocks.rst=0D M docs/system/arm/mps2.rst=0D M hw/adc/npcm7xx_adc.c=0D M hw/arm/Kconfig=0D M hw/arm/armsse.c=0D M hw/arm/mps2-tz.c=0D M hw/arm/xlnx-zynqmp.c=0D M hw/char/cadence_uart.c=0D M hw/char/ibex_uart.c=0D M hw/char/pl011.c=0D M hw/core/clock.c=0D M hw/core/qdev-clock.c=0D M hw/dma/Kconfig=0D M hw/dma/meson.build=0D A hw/dma/xlnx_csu_dma.c=0D M hw/mips/cps.c=0D M hw/misc/Kconfig=0D A hw/misc/armsse-cpu-pwrctrl.c=0D M hw/misc/bcm2835_cprman.c=0D M hw/misc/iotkit-secctl.c=0D M hw/misc/iotkit-sysctl.c=0D M hw/misc/iotkit-sysinfo.c=0D M hw/misc/meson.build=0D M hw/misc/mps2-fpgaio.c=0D M hw/misc/mps2-scc.c=0D M hw/misc/npcm7xx_clk.c=0D M hw/misc/npcm7xx_pwm.c=0D M hw/misc/trace-events=0D M hw/misc/zynq_slcr.c=0D M hw/ssi/xilinx_spips.c=0D M hw/timer/Kconfig=0D M hw/timer/cmsdk-apb-dualtimer.c=0D M hw/timer/cmsdk-apb-timer.c=0D M hw/timer/meson.build=0D M hw/timer/npcm7xx_timer.c=0D M hw/timer/renesas_tmr.c=0D A hw/timer/sse-counter.c=0D A hw/timer/sse-timer.c=0D M hw/timer/trace-events=0D M hw/watchdog/cmsdk-apb-watchdog.c=0D A include/hw/arm/armsse-version.h=0D M include/hw/arm/armsse.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/clock.h=0D A include/hw/dma/xlnx_csu_dma.h=0D A include/hw/misc/armsse-cpu-pwrctrl.h=0D M include/hw/misc/iotkit-secctl.h=0D M include/hw/misc/iotkit-sysctl.h=0D M include/hw/misc/iotkit-sysinfo.h=0D M include/hw/misc/mps2-fpgaio.h=0D M include/hw/qdev-clock.h=0D M include/hw/ssi/xilinx_spips.h=0D A include/hw/timer/sse-counter.h=0D A include/hw/timer/sse-timer.h=0D M target/arm/cpu.c=0D M target/arm/cpu_tcg.c=0D M target/mips/cpu.c=0D M tests/qtest/meson.build=0D A tests/qtest/sse-timer-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10310' into staging=0D =0D target-arm queue:=0D * Add new mps3-an547 board=0D * target/arm: Restrict v7A TCG cpus to TCG accel=0D * Implement a Xilinx CSU DMA model=0D * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()=0D =0D # gpg: Signature made Wed 10 Mar 2021 13:56:20 GMT=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210310: (54 commits)=0D hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()=0D hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_=0D hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips=0D= hw/ssi: xilinx_spips: Clean up coding convention issues=0D hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI=0D hw/arm: xlnx-zynqmp: Clean up coding convention issues=0D hw/dma: Implement a Xilinx CSU DMA model=0D target/arm: Restrict v7A TCG cpus to TCG accel=0D tests/qtest/sse-timer-test: Test counter scaling changes=0D tests/qtest/sse-timer-test: Test the system timer=0D tests/qtest/sse-timer-test: Add simple test of the SSE counter=0D docs/system/arm/mps2.rst: Document the new mps3-an547 board=0D hw/arm/mps2-tz: Add new mps3-an547 board=0D hw/arm/mps2-tz: Make initsvtor0 setting board-specific=0D hw/arm/mps2-tz: Support running APB peripherals on different clock=0D hw/misc/mps2-scc: Implement changes for AN547=0D hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register=0D hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate=0D hw/arm/mps2-tz: Make UART overflow IRQ board-specific=0D hw/arm/armsse: Add SSE-300 support=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/bd5664de7e6c...5c6295a45b4f= =0D From MAILER-DAEMON Wed Mar 10 12:20:27 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lK2VU-0003oG-1l for mharc-qemu-commits@gnu.org; Wed, 10 Mar 2021 12:20:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:36912) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK2VP-0003mz-JG for qemu-commits@nongnu.org; Wed, 10 Mar 2021 12:20:20 -0500 Received: from out-22.smtp.github.com ([192.30.252.205]:45089 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK2VH-0004R9-Ox for qemu-commits@nongnu.org; Wed, 10 Mar 2021 12:20:18 -0500 Received: from github.com (hubbernetes-node-bd9a92d.ac4-iad.github.net [10.52.200.13]) by smtp.github.com (Postfix) with ESMTPA id 8279D5603FE for ; Wed, 10 Mar 2021 09:20:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615396810; bh=7r46uj/vjjA7n53GdgajRS4o3apY8Bf4gdaGrr4WPnw=; h=Date:From:To:Subject:From; b=gCDrWqebyKhl0ZGfsg8qcaf2XU2YdEqpl+HhpoVyC/jUObRHXaNklydIKPFdzyVUr ujX/cbqR+yYTuIW9HYvmRCtDiY9k61RVMSV/VsIztH9/JyTE8KAXzgn3JvJmj1yz78 YM5TLV/OkOurfkv1qxhDO39X8/5Z2mophU2cnqnw= Date: Wed, 10 Mar 2021 09:20:10 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.243, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 5ee0ab: clock: Add ClockEvent parameter to callbacks X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Mar 2021 17:20:20 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 5ee0abed51231949ef91d7f8e1115be69ed91e93=0D https://github.com/qemu/qemu/commit/5ee0abed51231949ef91d7f8e1115be= 69ed91e93=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/clocks.rst=0D M hw/adc/npcm7xx_adc.c=0D M hw/arm/armsse.c=0D M hw/char/cadence_uart.c=0D M hw/char/ibex_uart.c=0D M hw/char/pl011.c=0D M hw/core/clock.c=0D M hw/core/qdev-clock.c=0D M hw/mips/cps.c=0D M hw/misc/bcm2835_cprman.c=0D M hw/misc/npcm7xx_clk.c=0D M hw/misc/npcm7xx_pwm.c=0D M hw/misc/zynq_slcr.c=0D M hw/timer/cmsdk-apb-dualtimer.c=0D M hw/timer/cmsdk-apb-timer.c=0D M hw/timer/npcm7xx_timer.c=0D M hw/watchdog/cmsdk-apb-watchdog.c=0D M include/hw/clock.h=0D M include/hw/qdev-clock.h=0D M target/mips/cpu.c=0D =0D Log Message:=0D -----------=0D clock: Add ClockEvent parameter to callbacks=0D =0D The Clock framework allows users to specify a callback which is=0D called after the clock's period has been updated. Some users need to=0D also have a callback which is called before the clock period is=0D updated.=0D =0D As the first step in adding support for notifying Clock users on=0D pre-update events, add an argument to the ClockCallback to specify=0D what event is being notified, and add an argument to the various=0D functions for registering a callback to specify which events are=0D of interest to that callback.=0D =0D Note that the documentation update renders correct the previously=0D incorrect claim in 'Adding a new clock' that callbacks "will be=0D explained in a following section".=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Luc Michel =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-2-peter.maydell@linaro.org=0D =0D =0D Commit: e4341623a3b87e7eca87d42b7b88da967cd21c49=0D https://github.com/qemu/qemu/commit/e4341623a3b87e7eca87d42b7b88da9= 67cd21c49=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/clocks.rst=0D M hw/core/clock.c=0D M include/hw/clock.h=0D =0D Log Message:=0D -----------=0D clock: Add ClockPreUpdate callback event type=0D =0D Add a new callback event type ClockPreUpdate, which is called on=0D period changes before the period is updated.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Luc Michel =0D Reviewed-by: Hao Wu =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219144617.4782-3-peter.maydell@linaro.org=0D =0D =0D Commit: cd3a53b727d2f86e9db795cee69cc142332ca079=0D https://github.com/qemu/qemu/commit/cd3a53b727d2f86e9db795cee69cc14= 2332ca079=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/clocks.rst=0D M include/hw/clock.h=0D =0D Log Message:=0D -----------=0D clock: Add clock_ns_to_ticks() function=0D =0D Add a clock_ns_to_ticks() function which does the opposite of=0D clock_ticks_to_ns(): given a duration in nanoseconds, it returns the=0D number of clock ticks that would happen in that time. This is useful=0D for devices that have a free running counter register whose value can=0D be calculated when it is read.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Luc Michel =0D Reviewed-by: Hao Wu =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219144617.4782-4-peter.maydell@linaro.org=0D =0D =0D Commit: c7db11b0992f8d97107ec30139ffe1a09559c77e=0D https://github.com/qemu/qemu/commit/c7db11b0992f8d97107ec30139ffe1a= 09559c77e=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/npcm7xx_timer.c=0D =0D Log Message:=0D -----------=0D hw/timer/npcm7xx_timer: Use new clock_ns_to_ticks()=0D =0D Use the new clock_ns_to_ticks() function in npcm7xx_timer where=0D appropriate.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Luc Michel =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Hao Wu =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219144617.4782-5-peter.maydell@linaro.org=0D =0D =0D Commit: 419a7f8075e24734ee22c3ceef6a446ba5306b27=0D https://github.com/qemu/qemu/commit/419a7f8075e24734ee22c3ceef6a446= ba5306b27=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M hw/misc/iotkit-sysctl.c=0D A include/hw/arm/armsse-version.h=0D M include/hw/misc/iotkit-sysctl.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Introduce SSE subsystem version property=0D =0D We model Arm "Subsystems for Embedded" SoC subsystems using generic=0D code which is split into various sub-devices which are configurable=0D by QOM properties to handle the behaviour differences between the SSE=0D subsystems we implement. Currently the only sub-device which needs=0D to change is the IOTKIT_SYSCTL device, and we do this with a mix of=0D properties that directly specify divergent behaviours (eg=0D CPUWAIT_RST) and passing it the SYS_VERSION register value as a way=0D for it to distinguish IoTKit from SSE-200.=0D =0D The "pass SYS_VERSION" approach is already a bit hacky, since the=0D IOTKIT_SYSCTL device has to know that the different part of the=0D register value happens to be bits [31:28]. For SSE-300 this register=0D is renamed SOC_IDENTITY and has a different format entirely, all of=0D whose fields can be configured by the SoC integrator when they=0D integrate the SSE into their SoC, and so "pass SYS_VERSION" breaks=0D down completely.=0D =0D Switch to using a simple integer property representing an=0D internal-to-QEMU enumeration of the SSE flavour. For the moment we=0D only need this in IOTKIT_SYSCTL, but as we add SSE-300 support a few=0D of the other devices will also need to know.=0D =0D We define and permit a value for the SSE-300 so we can start using=0D it in subsequent commits which add SSE-300 support.=0D =0D The now-redundant is_sse200 flag in IoTKitSysCtl will be removed=0D in the following commit.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-6-peter.maydell@linaro.org=0D =0D =0D Commit: 1cbd6fe4b8d5ae77de583b298d7834c8abe6ff46=0D https://github.com/qemu/qemu/commit/1cbd6fe4b8d5ae77de583b298d7834c= 8abe6ff46=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D M include/hw/misc/iotkit-sysctl.h=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Remove is_sse200 flag=0D =0D Remove the is_sse200 flag in favour of just directly testing the new=0D sse_version field.=0D =0D Since some of these registers exist in the SSE-300 but some do not or=0D have different behaviour, we expand out the if() statements in the=0D read and write functions into switch()es, so we have an easy place to=0D put SSE-300 specific behaviour.=0D =0D (Until we do add the SSE-300 behaviour, the thing preventing us=0D reaching the "unreachable" default cases is that armsse.c doesn't=0D yet pass us an ARMSSE_SSE300 version.)=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-7-peter.maydell@linaro.org=0D =0D =0D Commit: 0eb6b0ad16dfb3c4834c6943c3132b8d96294730=0D https://github.com/qemu/qemu/commit/0eb6b0ad16dfb3c4834c6943c3132b8= d96294730=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M hw/misc/iotkit-secctl.c=0D M include/hw/misc/iotkit-secctl.h=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-secctl.c: Implement SSE-300 PID register values=0D =0D The versions of the Secure Access Configuration Register Block=0D and Non-secure Access Configuration Register Block in the SSE-300=0D are the same as those in the SSE-200, but the CIDR/PIDR ID=0D register values are different.=0D =0D Plumb through the sse-version property and use it to select=0D the correct ID register values.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-8-peter.maydell@linaro.org=0D =0D =0D Commit: 407664539d76523222a4a4a3ef273645593f75b2=0D https://github.com/qemu/qemu/commit/407664539d76523222a4a4a3ef27364= 5593f75b2=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M hw/misc/iotkit-sysinfo.c=0D M include/hw/misc/iotkit-sysinfo.h=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysinfo.c: Implement SSE-300 PID register values=0D =0D The version of the SYSINFO Register Block in the SSE-300 has=0D different CIDR/PIDR register values to the SSE-200; pass in=0D the sse-version property and use it to select the correct=0D ID register values.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-9-peter.maydell@linaro.org=0D =0D =0D Commit: c89cef3a2cdfb355258890db8cfd2175add5bbee=0D https://github.com/qemu/qemu/commit/c89cef3a2cdfb355258890db8cfd217= 5add5bbee=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D =0D Log Message:=0D -----------=0D hw/arm/armsse.c: Use correct SYS_CONFIG0 register value for SSE-300=0D =0D In the SSE-300, the format of the SYS_CONFIG0 register has changed again;= =0D pass through the correct value to the SYSINFO register block device.=0D =0D We drop the old SysConfigFormat enum, which was implemented in the=0D hope that different flavours of SSE would share the same format;=0D since they all seem to be different and we now have an sse_version=0D enum to key off, just use that.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-10-peter.maydell@linaro.org=0D =0D =0D Commit: 446587a914cfa57c2ce529056a9ca2215bde7111=0D https://github.com/qemu/qemu/commit/446587a914cfa57c2ce529056a9ca22= 15bde7111=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M hw/misc/iotkit-sysinfo.c=0D M include/hw/misc/iotkit-sysinfo.h=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysinfo.c: Implement SYS_CONFIG1 and IIDR=0D =0D For SSE-300, the SYSINFO register block has two new registers:=0D =0D * SYS_CONFIG1 indicates the config for a potential CPU2 and CPU3;=0D since the SSE-300 can only be configured with a single CPU it=0D is always zero=0D =0D * IIDR is the subsystem implementation identity register;=0D its value is set by the SoC integrator, so we plumb this in from=0D the armsse.c code as we do with SYS_VERSION and SYS_CONFIG=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-11-peter.maydell@linaro.org=0D =0D =0D Commit: 0d10df30384c22c5f683cbfebc42cee6cf83fed4=0D https://github.com/qemu/qemu/commit/0d10df30384c22c5f683cbfebc42cee= 6cf83fed4=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/arm/Kconfig=0D M hw/timer/Kconfig=0D M hw/timer/meson.build=0D A hw/timer/sse-counter.c=0D M hw/timer/trace-events=0D A include/hw/timer/sse-counter.h=0D =0D Log Message:=0D -----------=0D hw/timer/sse-counter: Model the SSE Subsystem System Counter=0D =0D The SSE-300 includes a counter module; implement a model of it.=0D =0D This counter is documented in the SSE-123 Example Subsystem=0D Technical Reference Manual:=0D https://developer.arm.com/documentation/101370/latest/=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-12-peter.maydell@linaro.org=0D =0D =0D Commit: 0b8ceee822ae6d3bc4033c9b406c5f8d8c71ee6d=0D https://github.com/qemu/qemu/commit/0b8ceee822ae6d3bc4033c9b406c5f8= d8c71ee6d=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/arm/Kconfig=0D M hw/timer/Kconfig=0D M hw/timer/meson.build=0D A hw/timer/sse-timer.c=0D M hw/timer/trace-events=0D A include/hw/timer/sse-timer.h=0D =0D Log Message:=0D -----------=0D hw/timer/sse-timer: Model the SSE Subsystem System Timer=0D =0D The SSE-300 includes some timers which are a different kind to=0D those in the SSE-200. Model them.=0D =0D These timers are documented in the SSE-123 Example Subsystem=0D Technical Reference Manual:=0D https://developer.arm.com/documentation/101370/latest/=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-13-peter.maydell@linaro.org=0D =0D =0D Commit: 31b0c6b17691b16175cb4bb01068df15d3b3b08c=0D https://github.com/qemu/qemu/commit/31b0c6b17691b16175cb4bb01068df1= 5d3b3b08c=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Add SSE-300 cases which match SSE-200 behaviour=0D= =0D The SSE-300's iokit-sysctl device is similar to the SSE-200, but=0D some registers have moved address or have different behaviours.=0D In this commit we add case statements for the registers where=0D the SSE-300 and SSE-200 have the same behaviour. Some registers=0D are the same on all SSE versions and so need no code change at all.=0D Putting both of these categories together covers:=0D =0D 0x0 SECDBGSTAT=0D 0x4 SECDBGSET=0D 0x8 SECDBGCLR=0D 0xc SCSECCTRL=0D 0x10 CLK_CFG0 -- this is like SSE-200 FCLK_DIV but with a=0D different set of clocks being controlled; our implementation=0D is a dummy reads-as-written anyway=0D 0x14 CLK_CFG1 -- similar to SSE-200 SYSCLK_DIV; our implementation=0D is a dummy=0D 0x18 CLK_FORCE -- similar to SSE-200 but different bit allocations;=0D we have a dummy implementation=0D 0x100 RESET_SYNDROME -- bit allocation differs from SSE-200 but our=0D implementation is a dummy=0D 0x104 RESET_MASK -- bit allocation differs from SSE-200 but our=0D implementation is a dummy=0D 0x108 SWRESET=0D 0x10c GRETREG=0D 0x200 PDCM_PD_SYS_SENSE -- some bit allocations differ, but our=0D implementation is a dummy=0D =0D We also need to migrate the state of these registers which are shared=0D between the SSE-200 and SSE-300, so update the vmstate 'needed'=0D function to do this.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-14-peter.maydell@linaro.org=0D =0D =0D Commit: 92ecf2d5eeaecec2454e95acf2416162538c1225=0D https://github.com/qemu/qemu/commit/92ecf2d5eeaecec2454e95acf241616= 2538c1225=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Handle CPU_WAIT, NMI_ENABLE for SSE-300=0D =0D In the SSE-300 the CPU_WAIT and NMI_ENABLE registers have=0D moved offsets, so they are now where the SSE-200's WICCTRL=0D and EWCTRL were. The SSE-300 does not have WICCTLR or EWCTRL=0D at all, and the old offsets are reserved:=0D =0D Offset SSE-200 SSE-300=0D -----------------------------------=0D 0x118 CPUWAIT reserved=0D 0x118 NMI_ENABLE reserved=0D 0x120 WICCTRL CPUWAIT=0D 0x124 EWCTRL NMI_ENABLE=0D =0D Handle this reshuffle, and the fact that SSE-300 has only=0D one CPU and so only one active bit in CPUWAIT.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-15-peter.maydell@linaro.org=0D =0D =0D Commit: 246dbeb76319fdaa7030403ea0273617331f6a44=0D https://github.com/qemu/qemu/commit/246dbeb76319fdaa7030403ea027361= 7331f6a44=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Handle INITSVTOR* for SSE-300=0D =0D The SSE-300 has only one CPU and so no INITSVTOR1. It does=0D have INITSVTOR0, but unlike the SSE-200 this register now=0D has a LOCK bit which can be set to 1 to prevent any further=0D writes to the register. Implement these differences.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-16-peter.maydell@linaro.org=0D =0D =0D Commit: 2672a6ca72311bdf97f9e324ab2e71ff60bd2db9=0D https://github.com/qemu/qemu/commit/2672a6ca72311bdf97f9e324ab2e71f= f60bd2db9=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D M include/hw/misc/iotkit-sysctl.h=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Implement dummy version of SSE-300 PWRCTRL regis= ter=0D =0D The SSE-300 has a new PWRCTRL register at offset 0x1fc (previously=0D reserved). This register controls accessibility of some registers=0D in the Power Policy Units (PPUs). Since QEMU doesn't implement=0D the PPUs, we don't need to implement any real behaviour for this=0D register, so we just handle the UNLOCK bit which controls whether=0D writes to the register itself are permitted and otherwise make it=0D be reads-as-written.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-17-peter.maydell@linaro.org=0D =0D =0D Commit: c5ffe6c8dd5623f1893f54971e23e7c1ddf094ee=0D https://github.com/qemu/qemu/commit/c5ffe6c8dd5623f1893f54971e23e7c= 1ddf094ee=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D M include/hw/misc/iotkit-sysctl.h=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Handle SSE-300 changes to PDCM_PD_*_SENSE regist= ers=0D =0D The sysctl PDCM_PD_*_SENSE registers control various power domains in=0D the system and allow the guest to configure which conditions keep a=0D power domain awake and what power state to use when the domain is in=0D a low power state. QEMU doesn't model power domains, so for us these=0D registers are dummy reads-as-written implementations.=0D =0D The SSE-300 has a different power domain setup, so the set of=0D registers is slightly different:=0D =0D Offset SSE-200 SSE-300=0D ---------------------------------------------------=0D 0x200 PDCM_PD_SYS_SENSE PDCM_PD_SYS_SENSE=0D 0x204 reserved PDCM_PD_CPU0_SENSE=0D 0x208 reserved reserved=0D 0x20c PDCM_PD_SRAM0_SENSE reserved=0D 0x210 PDCM_PD_SRAM1_SENSE reserved=0D 0x214 PDCM_PD_SRAM2_SENSE PDCM_PD_VMR0_SENSE=0D 0x218 PDCM_PD_SRAM3_SENSE PDCM_PD_VMR1_SENSE=0D =0D Offsets 0x200 and 0x208 are the same for both, so handled in a=0D previous commit; here we deal with 0x204, 0x20c, 0x210, 0x214, 0x218.=0D =0D (We can safely add new lines to the SSE300 vmstate because no board=0D uses this device in an SSE300 yet.)=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-18-peter.maydell@linaro.org=0D =0D =0D Commit: 6069bbc904503dd4f4c2cfd7ff883300a6bddeeb=0D https://github.com/qemu/qemu/commit/6069bbc904503dd4f4c2cfd7ff88330= 0a6bddeeb=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/iotkit-sysctl.c=0D =0D Log Message:=0D -----------=0D hw/misc/iotkit-sysctl: Implement SSE-200 and SSE-300 PID register value= s=0D =0D The SSE-200 and SSE-300 have different PID register values from the=0D IoTKit for the sysctl register block. We incorrectly implemented the=0D SSE-200 with the same PID values as IoTKit. Fix the SSE-200 bug and=0D report these register values for SSE-300.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-19-peter.maydell@linaro.org=0D =0D =0D Commit: 370d75d935c4f58a3f94597a9e6609aefbc5bb34=0D https://github.com/qemu/qemu/commit/370d75d935c4f58a3f94597a9e6609a= efbc5bb34=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/Kconfig=0D M hw/misc/Kconfig=0D =0D Log Message:=0D -----------=0D hw/arm/Kconfig: Move ARMSSE_CPUID and ARMSSE_MHU stanzas to hw/misc=0D =0D The ARMSSE_CPUID and ARMSSE_MHU Kconfig stanzas are for the devices=0D implemented by hw/misc/cpuid.c and hw/misc/armsse-mhu.c. Move them=0D to hw/misc/Kconfig where they belong.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-20-peter.maydell@linaro.org=0D =0D =0D Commit: 4239b311467bea86578d9da3cd22909de69d7af7=0D https://github.com/qemu/qemu/commit/4239b311467bea86578d9da3cd22909= de69d7af7=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/arm/Kconfig=0D M hw/misc/Kconfig=0D A hw/misc/armsse-cpu-pwrctrl.c=0D M hw/misc/meson.build=0D M hw/misc/trace-events=0D A include/hw/misc/armsse-cpu-pwrctrl.h=0D =0D Log Message:=0D -----------=0D hw/misc/sse-cpu-pwrctrl: Implement SSE-300 CPU_PWRCTRL register bloc= k=0D =0D The SSE-300 has a new register block CPU_PWRCTRL. There is one=0D instance of this per CPU in the system (so just one for the SSE-300),=0D and as well as the usual CIDR/PIDR ID registers it has just one=0D register, CPUPWRCFG. This register allows the guest to configure=0D behaviour of the system in power-down and deep-sleep states. Since=0D QEMU does not model those, we make the register a dummy=0D reads-as-written implementation.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-21-peter.maydell@linaro.org=0D =0D =0D Commit: 91eb4f64eb49ea8dc7e5ebf5fdb377008ee0b688=0D https://github.com/qemu/qemu/commit/91eb4f64eb49ea8dc7e5ebf5fdb3770= 08ee0b688=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Use an array for apb_ppc fields in the state structure=0D= =0D Convert the apb_ppc0 and apb_ppc1 fields in the ARMSSE state struct=0D to use an array instead of two separate fields. We already had one=0D place in the code that wanted to be able to refer to the PPC by=0D index, and we're about to add more code like that.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-22-peter.maydell@linaro.org=0D =0D =0D Commit: 3378873802afe8af0355c4fac3e11e6510fc1f27=0D https://github.com/qemu/qemu/commit/3378873802afe8af0355c4fac3e11e6= 510fc1f27=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Add a define for number of IRQs used by the SSE itself=0D= =0D The SSE uses 32 interrupts for its own devices, and then passes through=0D= its expansion IRQ inputs to the CPU's interrupts 33 and upward.=0D Add a define for the number of IRQs the SSE uses for itself, instead=0D of hardcoding 32.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-23-peter.maydell@linaro.org=0D =0D =0D Commit: e94d7723b5c0e7e51775ee8fc94a10e975392d0b=0D https://github.com/qemu/qemu/commit/e94d7723b5c0e7e51775ee8fc94a10e= 975392d0b=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Add framework for data-driven device placement=0D =0D The SSE-300 is mostly the same as the SSE-200, but it has moved some=0D of the devices in the memory map and uses different device types in=0D some cases. To accommodate this, add a framework where the placement=0D and wiring of some devices can be specified in a data table.=0D =0D This commit adds the framework for this data-driven device placement,=0D and makes the CMSDK APB timer devices use it. Subsequent commits=0D will convert the other devices which differ between SSE-200 and=0D SSE-300.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-24-peter.maydell@linaro.org=0D =0D =0D Commit: 7e8e25dbd385403569ce2df07b60b4f8a61f2266=0D https://github.com/qemu/qemu/commit/7e8e25dbd385403569ce2df07b60b4f= 8a61f2266=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Move dual-timer device into data-driven framework=0D =0D Move the CMSDK dualtimer device handling into the data-driven=0D device placement framework.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-25-peter.maydell@linaro.org=0D =0D =0D Commit: 1292b93289f8545f416f1d25ee701caa91d24415=0D https://github.com/qemu/qemu/commit/1292b93289f8545f416f1d25ee701ca= a91d24415=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Move watchdogs into data-driven framework=0D =0D Move the CMSDK watchdog device handling into the data-driven device=0D placement framework. This is slightly more complicated because these=0D devices might wire their IRQs up to the NMI line, and because one of=0D them uses the slow 32KHz clock rather than the main clock.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-26-peter.maydell@linaro.org=0D =0D =0D Commit: 99865afc66bafca6f734712a897c0b68460f7757=0D https://github.com/qemu/qemu/commit/99865afc66bafca6f734712a897c0b6= 8460f7757=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Move s32ktimer into data-driven framework=0D =0D Move the CMSDK timer that uses the S32K slow clock into the data-driven=0D= device placement framework.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-27-peter.maydell@linaro.org=0D =0D =0D Commit: 39bd0bb15f4849c24b1fe6a235f245479b8aac22=0D https://github.com/qemu/qemu/commit/39bd0bb15f4849c24b1fe6a235f2454= 79b8aac22=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Move sysinfo register block into data-driven framework=0D= =0D Move the sysinfo register block into the data-driven framework.=0D =0D While we are moving the code for configuring this device around,=0D regularize on using &error_abortw when setting the integer=0D properties: they are all simple DEFINE_PROP_UINT32 properties so the=0D setting can never fail.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-28-peter.maydell@linaro.org=0D =0D =0D Commit: 9de4ddb49595670fcbf8da16c3a6bceb083c34ce=0D https://github.com/qemu/qemu/commit/9de4ddb49595670fcbf8da16c3a6bce= b083c34ce=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Move sysctl register block into data-driven framework=0D= =0D Move the sysctl register block into the data-driven device placement=0D framework.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-29-peter.maydell@linaro.org=0D =0D =0D Commit: a459e849aa2b683fac20fc72db9b4b1d90a4b4b9=0D https://github.com/qemu/qemu/commit/a459e849aa2b683fac20fc72db9b4b1= d90a4b4b9=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Move PPUs into data-driven framework=0D =0D Move the PPUs into the data-driven device placement framework.=0D We don't implement them, so they are just TYPE_UNIMPLEMENTED stubs.=0D =0D Because the SSE-200 and the IotKit diverge here (the IoTKit does=0D not have the PPUs) we need to separate out the ARMSSEDeviceInfo=0D for the two variants, and only add the PPUs to the SSE-200.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-30-peter.maydell@linaro.org=0D =0D =0D Commit: 6fe8acb41ed5a4b033ae7b5f876968e568476129=0D https://github.com/qemu/qemu/commit/6fe8acb41ed5a4b033ae7b5f876968e= 568476129=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Add missing SSE-200 SYS_PPU=0D =0D We forgot to implement a TYPE_UNIMPLEMENTED_DEVICE stub=0D for the SYS_PPU in the SSE-200, which is at 0x50022000.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-31-peter.maydell@linaro.org=0D =0D =0D Commit: 1aa9e174b4b8de9ea52f9583c476e295065b96e3=0D https://github.com/qemu/qemu/commit/1aa9e174b4b8de9ea52f9583c476e29= 5065b96e3=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Indirect irq_is_common[] through ARMSSEInfo=0D =0D The SSE-300 has a slightly different set of shared-per-CPU interrupts,=0D= allow the irq_is_common[] array to be different per SSE variant.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-32-peter.maydell@linaro.org=0D =0D =0D Commit: 9febd175415dbc84e6ff7bda9bf6d90fe060181e=0D https://github.com/qemu/qemu/commit/9febd175415dbc84e6ff7bda9bf6d90= fe060181e=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Add support for SSE variants with a system counter=0D =0D The SSE-300 has a system counter device; add support for SSE=0D variants having this device.=0D =0D As with the existing devices like the cache control block, CPUID=0D block, etc, we don't try to make the MMIO addresses configurable. We=0D can do that if and when we need to model a future SSE variant which=0D has the counter in a different location.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-33-peter.maydell@linaro.org=0D =0D =0D Commit: f11de23158528c90b51c603c0cc3b2286e71d3fc=0D https://github.com/qemu/qemu/commit/f11de23158528c90b51c603c0cc3b22= 86e71d3fc=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Add support for TYPE_SSE_TIMER in ARMSSEDeviceInfo=0D =0D The SSE-300 has four timers of type TYPE_SSE_TIMER; add support in=0D the code for having these in an ARMSSEDeviceInfo array.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-34-peter.maydell@linaro.org=0D =0D =0D Commit: 4668b441cb667619916d4bc6a204f3df06730dfb=0D https://github.com/qemu/qemu/commit/4668b441cb667619916d4bc6a204f3d= f06730dfb=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Support variants with ARMSSE_CPU_PWRCTRL block=0D =0D Support SSE variants like the SSE-300 with an ARMSSE_CPU_PWRCTRL register= =0D block. Because this block is per-CPU and does not clash with any of the=0D= SSE-200 devices, we handle it with a has_cpu_pwrctrl flag like the=0D existing has_cachectrl, has_cpusectrl and has_cpuid, rather than=0D trying to add per-CPU-device support to the devinfo array handling code.=0D= =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-35-peter.maydell@linaro.org=0D =0D =0D Commit: 8901bb414a2416a3ad3bc870770daaebb08c3aa8=0D https://github.com/qemu/qemu/commit/8901bb414a2416a3ad3bc870770daae= bb08c3aa8=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/armsse.c=0D M include/hw/arm/armsse.h=0D =0D Log Message:=0D -----------=0D hw/arm/armsse: Add SSE-300 support=0D =0D Now we have sufficiently parameterised the code, we can add SSE-300=0D support by adding a new entry to the armsse_variants[] array.=0D =0D Note that the main watchdog (unlike the s32k watchdog) in the SSE-300=0D is a different device from the CMSDK watchdog; we don't have a model=0D of it so we leave it as a TYPE_UNIMPLEMENTED_DEVICE stub.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-36-peter.maydell@linaro.org=0D =0D =0D Commit: 8b4b5c23f92df5ebc2c4aa55b01d4e1d9d06548e=0D https://github.com/qemu/qemu/commit/8b4b5c23f92df5ebc2c4aa55b01d4e1= d9d06548e=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make UART overflow IRQ board-specific=0D =0D The AN547 puts the combined UART overflow IRQ at 48, not 47 like the=0D other images. Make this setting board-specific.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-37-peter.maydell@linaro.org=0D =0D =0D Commit: 7fa859914f58607bf874b9efecbe4be5726d91ac=0D https://github.com/qemu/qemu/commit/7fa859914f58607bf874b9efecbe4be= 5726d91ac=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-fpgaio.c=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate=0D =0D We've already broken migration compatibility for all the MPS=0D boards, so we might as well take advantage of this to simplify=0D the vmstate for the FPGAIO device by folding the counters=0D subsection into the main vmstate description.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-38-peter.maydell@linaro.org=0D =0D =0D Commit: 39901aea063fb4be77a89d7badfed3998ad8fb4a=0D https://github.com/qemu/qemu/commit/39901aea063fb4be77a89d7badfed39= 98ad8fb4a=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D M hw/misc/mps2-fpgaio.c=0D M include/hw/misc/mps2-fpgaio.h=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register=0D =0D For the AN547 image, the FPGAIO block has an extra DBGCTRL register,=0D which is used to control the SPNIDEN, SPIDEN, NPIDEN and DBGEN inputs=0D to the CPU. These signals control when the CPU permits use of the=0D external debug interface. Our CPU models don't implement the=0D external debug interface, so we model the register as=0D reads-as-written.=0D =0D Implement the register, with a property defining whether it is=0D present, and allow mps2-tz boards to specify that it is present.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-39-peter.maydell@linaro.org=0D =0D =0D Commit: 6ac80818941829c01363e9feeefe08e8bc693ab7=0D https://github.com/qemu/qemu/commit/6ac80818941829c01363e9feeefe08e= 8bc693ab7=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/mps2-scc.c=0D =0D Log Message:=0D -----------=0D hw/misc/mps2-scc: Implement changes for AN547=0D =0D Implement the minor changes required to the SCC block for AN547 images:=0D= * CFG2 and CFG5 exist (like AN524)=0D * CFG3 is reserved (like AN524)=0D * CFG0 bit 1 is CPU_WAIT; we don't implement it, but note this=0D in the TODO comment=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-40-peter.maydell@linaro.org=0D =0D =0D Commit: ad28ca7e9fb99242d4b8ba22e5234f73db59bff4=0D https://github.com/qemu/qemu/commit/ad28ca7e9fb99242d4b8ba22e5234f7= 3db59bff4=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Support running APB peripherals on different clock=0D =0D The AN547 runs the APB peripherals outside the SSE-300 on a different=0D and slightly slower clock than it runs the SSE-300 with. Support=0D making the APB peripheral clock frequency board-specific. (For our=0D implementation only the UARTs actually take a clock.)=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-41-peter.maydell@linaro.org=0D =0D =0D Commit: 9fe1ea11264914d7e1303d903059acfecff98421=0D https://github.com/qemu/qemu/commit/9fe1ea11264914d7e1303d903059acf= ecff98421=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Make initsvtor0 setting board-specific=0D =0D The AN547 configures the SSE-300 with a different initsvtor0=0D setting from its default; make this a board-specific setting.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-42-peter.maydell@linaro.org=0D =0D =0D Commit: eb09d533d87fd83c79dc659a882770c9897e73db=0D https://github.com/qemu/qemu/commit/eb09d533d87fd83c79dc659a882770c= 9897e73db=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/mps2-tz.c=0D =0D Log Message:=0D -----------=0D hw/arm/mps2-tz: Add new mps3-an547 board=0D =0D Add support for the mps3-an547 board; this is an SSE-300 based=0D FPGA image that runs on the MPS3.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-id: 20210219144617.4782-43-peter.maydell@linaro.org=0D =0D =0D Commit: dd750743ecd01352ad7697cabd58cb26abf11efd=0D https://github.com/qemu/qemu/commit/dd750743ecd01352ad7697cabd58cb2= 6abf11efd=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/mps2.rst=0D =0D Log Message:=0D -----------=0D docs/system/arm/mps2.rst: Document the new mps3-an547 board=0D =0D Add brief documentation of the new mps3-an547 board.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219144617.4782-44-peter.maydell@linaro.org=0D =0D =0D Commit: 1eca58aa1db79b077abf8c031c4d600998a5438d=0D https://github.com/qemu/qemu/commit/1eca58aa1db79b077abf8c031c4d600= 998a5438d=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M tests/qtest/meson.build=0D A tests/qtest/sse-timer-test.c=0D =0D Log Message:=0D -----------=0D tests/qtest/sse-timer-test: Add simple test of the SSE counter=0D =0D Add a simple qtest to exercise the new system counter device in the=0D SSE-300.=0D =0D We'll add tests of the system timer device here too, so this includes=0D scaffolding (register definitions, etc) for those.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219144617.4782-45-peter.maydell@linaro.org=0D =0D =0D Commit: f277d1c373edab24530e2c13b35323019dd12bce=0D https://github.com/qemu/qemu/commit/f277d1c373edab24530e2c13b353230= 19dd12bce=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/sse-timer-test.c=0D =0D Log Message:=0D -----------=0D tests/qtest/sse-timer-test: Test the system timer=0D =0D Add a test which tests various parts of the functionality of the=0D SSE system timer.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: bf7ca80386cd361a429c8eef4798bd2afe0219dc=0D https://github.com/qemu/qemu/commit/bf7ca80386cd361a429c8eef4798bd2= afe0219dc=0D Author: Peter Maydell =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/sse-timer-test.c=0D =0D Log Message:=0D -----------=0D tests/qtest/sse-timer-test: Test counter scaling changes=0D =0D Test that when we change the scaling of the system counter that the=0D system timer responds appropriately.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 80485d88f90777648519ec39eb25f6f5ca28a80b=0D https://github.com/qemu/qemu/commit/80485d88f90777648519ec39eb25f6f= 5ca28a80b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.c=0D M target/arm/cpu_tcg.c=0D =0D Log Message:=0D -----------=0D target/arm: Restrict v7A TCG cpus to TCG accel=0D =0D KVM requires the target cpu to be at least ARMv8 architecture=0D (support on ARMv7 has been dropped in commit 82bf7ae84ce:=0D "target/arm: Remove KVM support for 32-bit Arm hosts").=0D =0D A KVM-only build won't be able to run TCG cpus, move the=0D v7A CPU definitions to cpu_tcg.c.=0D =0D Reported-by: Peter Maydell =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210306151801.2388182-1-f4bug@amsat.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 35593573b25f8774ce16be8a7d703b7740964e81=0D https://github.com/qemu/qemu/commit/35593573b25f8774ce16be8a7d703b7= 740964e81=0D Author: Xuzhou Cheng =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M hw/dma/Kconfig=0D M hw/dma/meson.build=0D A hw/dma/xlnx_csu_dma.c=0D A include/hw/dma/xlnx_csu_dma.h=0D =0D Log Message:=0D -----------=0D hw/dma: Implement a Xilinx CSU DMA model=0D =0D ZynqMP QSPI supports SPI transfer using DMA mode, but currently this=0D is unimplemented. When QSPI is programmed to use DMA mode, QEMU will=0D crash. This is observed when testing VxWorks 7.=0D =0D This adds a Xilinx CSU DMA model and the implementation is based on=0D https://github.com/Xilinx/qemu/blob/master/hw/dma/csu_stream_dma.c.=0D The DST part of the model is verified along with ZynqMP GQSPI model.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Tested-by: Edgar E. Iglesias =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-2-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 21bce3717e2cb70e3bea06e8684bae111c9f4dda=0D https://github.com/qemu/qemu/commit/21bce3717e2cb70e3bea06e8684bae1= 11c9f4dda=0D Author: Xuzhou Cheng =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/xlnx-zynqmp.c=0D M include/hw/arm/xlnx-zynqmp.h=0D =0D Log Message:=0D -----------=0D hw/arm: xlnx-zynqmp: Clean up coding convention issues=0D =0D There are some coding convention warnings in xlnx-zynqmp.c and=0D xlnx-zynqmp.h, as reported by:=0D =0D $ ./scripts/checkpatch.pl include/hw/arm/xlnx-zynqmp.h=0D $ ./scripts/checkpatch.pl hw/arm/xlnx-zynqmp.c=0D =0D Let's clean them up.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-3-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 668351a54883b6283e7ae94daf4d4eca1a071158=0D https://github.com/qemu/qemu/commit/668351a54883b6283e7ae94daf4d4ec= a1a071158=0D Author: Xuzhou Cheng =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/Kconfig=0D M hw/arm/xlnx-zynqmp.c=0D M include/hw/arm/xlnx-zynqmp.h=0D =0D Log Message:=0D -----------=0D hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI=0D =0D Add a Xilinx CSU DMA module to ZynqMP SoC, and connent the stream=0D link of GQSPI to CSU DMA.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-4-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 3754eed4206f2472b5f4e4c3d84a1d39f0cd5d7c=0D https://github.com/qemu/qemu/commit/3754eed4206f2472b5f4e4c3d84a1d3= 9f0cd5d7c=0D Author: Xuzhou Cheng =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ssi/xilinx_spips.c=0D =0D Log Message:=0D -----------=0D hw/ssi: xilinx_spips: Clean up coding convention issues=0D =0D There are some coding convention warnings in xilinx_spips.c,=0D as reported by:=0D =0D $ ./scripts/checkpatch.pl hw/ssi/xilinx_spips.c=0D =0D Let's clean them up.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Peter Maydell =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-5-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: d6bafaf45c5ff31ad7d7d87c3c3d37ae675684cc=0D https://github.com/qemu/qemu/commit/d6bafaf45c5ff31ad7d7d87c3c3d37a= e675684cc=0D Author: Xuzhou Cheng =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ssi/xilinx_spips.c=0D M include/hw/ssi/xilinx_spips.h=0D =0D Log Message:=0D -----------=0D hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips=0D= =0D Now that the Xilinx CSU DMA model is implemented, the existing=0D DMA related dead codes in the ZynqMP QSPI are useless and should=0D be removed. The maximum register number is also updated to only=0D include the QSPI registers.=0D =0D Signed-off-by: Xuzhou Cheng =0D Signed-off-by: Bin Meng =0D Reviewed-by: Edgar E. Iglesias =0D Message-id: 20210303135254.3970-6-bmeng.cn@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 02f8fe11f7af92bacc6fc7f661ea5076e8a63e43=0D https://github.com/qemu/qemu/commit/02f8fe11f7af92bacc6fc7f661ea507= 6e8a63e43=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/renesas_tmr.c=0D =0D Log Message:=0D -----------=0D hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_=0D =0D The #defines INTERNAL and CASCADING represent different possible=0D values for the TCCR.CSS register field; prefix them with CSS_ to make=0D this more obvious, before we add more defines to represent the=0D other possible values of the field in the next commit.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219223241.16344-2-peter.maydell@linaro.org=0D =0D =0D Commit: 81b3ddaf8772ec6f88d372e52f9b433cfa46bc46=0D https://github.com/qemu/qemu/commit/81b3ddaf8772ec6f88d372e52f9b433= cfa46bc46=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/renesas_tmr.c=0D =0D Log Message:=0D -----------=0D hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()=0D =0D The read_tcnt() function calculates the TCNT register values for the=0D two channels of the timer module; it sets these up in the local=0D tcnt[] array, and eventually returns either one or both of them,=0D depending on whether the access is 8 or 16 bits. However, not all of=0D the code paths through this function set both elements of this array:=0D if the guest has programmed the TCCR.CSS register fields to values=0D which are either documented as not to be used or which QEMU does not=0D implement, then the function will return uninitialized data. (This=0D was spotted by Coverity.)=0D =0D Add the missing CSS cases to this code, so that we return a=0D consistent value instead of uninitialized data, and so the code=0D structure indicates what's happening.=0D =0D Fixes: CID 1429976=0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210219223241.16344-3-peter.maydell@linaro.org=0D =0D =0D Commit: 5c6295a45b4fceac913c11abc62488c49c02b9fd=0D https://github.com/qemu/qemu/commit/5c6295a45b4fceac913c11abc62488c= 49c02b9fd=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M docs/devel/clocks.rst=0D M docs/system/arm/mps2.rst=0D M hw/adc/npcm7xx_adc.c=0D M hw/arm/Kconfig=0D M hw/arm/armsse.c=0D M hw/arm/mps2-tz.c=0D M hw/arm/xlnx-zynqmp.c=0D M hw/char/cadence_uart.c=0D M hw/char/ibex_uart.c=0D M hw/char/pl011.c=0D M hw/core/clock.c=0D M hw/core/qdev-clock.c=0D M hw/dma/Kconfig=0D M hw/dma/meson.build=0D A hw/dma/xlnx_csu_dma.c=0D M hw/mips/cps.c=0D M hw/misc/Kconfig=0D A hw/misc/armsse-cpu-pwrctrl.c=0D M hw/misc/bcm2835_cprman.c=0D M hw/misc/iotkit-secctl.c=0D M hw/misc/iotkit-sysctl.c=0D M hw/misc/iotkit-sysinfo.c=0D M hw/misc/meson.build=0D M hw/misc/mps2-fpgaio.c=0D M hw/misc/mps2-scc.c=0D M hw/misc/npcm7xx_clk.c=0D M hw/misc/npcm7xx_pwm.c=0D M hw/misc/trace-events=0D M hw/misc/zynq_slcr.c=0D M hw/ssi/xilinx_spips.c=0D M hw/timer/Kconfig=0D M hw/timer/cmsdk-apb-dualtimer.c=0D M hw/timer/cmsdk-apb-timer.c=0D M hw/timer/meson.build=0D M hw/timer/npcm7xx_timer.c=0D M hw/timer/renesas_tmr.c=0D A hw/timer/sse-counter.c=0D A hw/timer/sse-timer.c=0D M hw/timer/trace-events=0D M hw/watchdog/cmsdk-apb-watchdog.c=0D A include/hw/arm/armsse-version.h=0D M include/hw/arm/armsse.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/clock.h=0D A include/hw/dma/xlnx_csu_dma.h=0D A include/hw/misc/armsse-cpu-pwrctrl.h=0D M include/hw/misc/iotkit-secctl.h=0D M include/hw/misc/iotkit-sysctl.h=0D M include/hw/misc/iotkit-sysinfo.h=0D M include/hw/misc/mps2-fpgaio.h=0D M include/hw/qdev-clock.h=0D M include/hw/ssi/xilinx_spips.h=0D A include/hw/timer/sse-counter.h=0D A include/hw/timer/sse-timer.h=0D M target/arm/cpu.c=0D M target/arm/cpu_tcg.c=0D M target/mips/cpu.c=0D M tests/qtest/meson.build=0D A tests/qtest/sse-timer-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10310' into staging=0D =0D target-arm queue:=0D * Add new mps3-an547 board=0D * target/arm: Restrict v7A TCG cpus to TCG accel=0D * Implement a Xilinx CSU DMA model=0D * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()=0D =0D # gpg: Signature made Wed 10 Mar 2021 13:56:20 GMT=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210310: (54 commits)=0D hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()=0D hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_=0D hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips=0D= hw/ssi: xilinx_spips: Clean up coding convention issues=0D hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI=0D hw/arm: xlnx-zynqmp: Clean up coding convention issues=0D hw/dma: Implement a Xilinx CSU DMA model=0D target/arm: Restrict v7A TCG cpus to TCG accel=0D tests/qtest/sse-timer-test: Test counter scaling changes=0D tests/qtest/sse-timer-test: Test the system timer=0D tests/qtest/sse-timer-test: Add simple test of the SSE counter=0D docs/system/arm/mps2.rst: Document the new mps3-an547 board=0D hw/arm/mps2-tz: Add new mps3-an547 board=0D hw/arm/mps2-tz: Make initsvtor0 setting board-specific=0D hw/arm/mps2-tz: Support running APB peripherals on different clock=0D hw/misc/mps2-scc: Implement changes for AN547=0D hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register=0D hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate=0D hw/arm/mps2-tz: Make UART overflow IRQ board-specific=0D hw/arm/armsse: Add SSE-300 support=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/a557b00469bc...5c6295a45b4f= =0D From MAILER-DAEMON Wed Mar 10 12:28:40 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lK2dU-0004c1-Hm for mharc-qemu-commits@gnu.org; Wed, 10 Mar 2021 12:28:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:40044) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK2dO-0004YB-HG for qemu-commits@nongnu.org; Wed, 10 Mar 2021 12:28:35 -0500 Received: from out-20.smtp.github.com ([192.30.252.203]:36605) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK2dK-0006C0-0c for qemu-commits@nongnu.org; Wed, 10 Mar 2021 12:28:33 -0500 Received: from github.com (hubbernetes-node-60c55af.va3-iad.github.net [10.48.121.66]) by smtp.github.com (Postfix) with ESMTPA id 2670CE0901 for ; Wed, 10 Mar 2021 09:28:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615397308; bh=0ZZVeWJdsmOqTyVZdXOSSS3cpDcJHSUmsspQRcB3H6o=; h=Date:From:To:Subject:From; b=aAfcuvjpbsTgfuLcCbcqDatN/g4j4taMCcTTaLNaLO5AvHvezvqFKUlefWgCBIWjG FuOJpo+8ugdlDfscDXocP3hAZImAOt2kBB7ZLf1HGyKVl6+SdQTLnBd1ypv/YJhk9M R0oYKZwt2esFkzOejskPQNT3TqXjOeiuarLHJCvw= Date: Wed, 10 Mar 2021 09:28:28 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.203; envelope-from=noreply@github.com; helo=out-20.smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.243, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] d6eb39: qtest: delete superfluous inclusions of qtest.h X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Mar 2021 17:28:36 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: d6eb39b554afa43392983e472de124ad8e6ee46e=0D https://github.com/qemu/qemu/commit/d6eb39b554afa43392983e472de124a= d8e6ee46e=0D Author: Chen Qun =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M accel/tcg/cpu-exec.c=0D M blockdev.c=0D M hw/9pfs/9p.c=0D M hw/arm/armv7m.c=0D M hw/arm/mainstone.c=0D M hw/arm/xlnx-zcu102.c=0D M hw/arm/z2.c=0D M hw/i386/pc.c=0D M hw/misc/ivshmem.c=0D M hw/ppc/ppc440_bamboo.c=0D M hw/ppc/prep.c=0D M hw/ppc/sam460ex.c=0D M hw/ppc/spapr_caps.c=0D M hw/ppc/spapr_pci_vfio.c=0D M hw/ppc/spapr_vio.c=0D M hw/ppc/virtex_ml507.c=0D M hw/riscv/spike.c=0D M hw/rx/rx62n.c=0D M net/net.c=0D M softmmu/cpu-timers.c=0D M target/ppc/translate_init.c.inc=0D M util/main-loop.c=0D M util/qemu-timer.c=0D =0D Log Message:=0D -----------=0D qtest: delete superfluous inclusions of qtest.h=0D =0D There are 23 files that include the "sysemu/qtest.h",=0D but they do not use any qtest functions.=0D =0D Signed-off-by: Chen Qun =0D Acked-by: Markus Armbruster =0D Message-Id: <20210226081414.205946-1-kuhn.chenqun@huawei.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 9f3a24cf1f9a3a0e94102c69d92c3a8eea7debc4=0D https://github.com/qemu/qemu/commit/9f3a24cf1f9a3a0e94102c69d92c3a8= eea7debc4=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D docker: Alpine build job depends on Alpine container=0D =0D Add missing dependency build-system-alpine -> amd64-alpine-container.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303130646.1494015-2-philmd@redhat.com>=0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 1925468ddbf9931dc5e05278483840f33eabca8b=0D https://github.com/qemu/qemu/commit/1925468ddbf9931dc5e05278483840f= 33eabca8b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.d/edk2.yml=0D =0D Log Message:=0D -----------=0D docker: EDK2 build job depends on EDK2 container=0D =0D Add missing dependency build-edk2 -> docker-edk2.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303130646.1494015-3-philmd@redhat.com>=0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Acked-by: Laszlo Ersek =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 91e9c47e50a8f790a2abc1797c14b0d2e9ea6da3=0D https://github.com/qemu/qemu/commit/91e9c47e50a8f790a2abc1797c14b0d= 2e9ea6da3=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.d/opensbi.yml=0D =0D Log Message:=0D -----------=0D docker: OpenSBI build job depends on OpenSBI container=0D =0D Add missing dependency build-opensbi -> docker-opensbi.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303130646.1494015-4-philmd@redhat.com>=0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: c2f4c1a8bae9c48d6141f8fb4874b584b26153b0=0D https://github.com/qemu/qemu/commit/c2f4c1a8bae9c48d6141f8fb4874b58= 4b26153b0=0D Author: Thomas Huth =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M scripts/mtest2make.py=0D =0D Log Message:=0D -----------=0D meson: Re-enable the possibility to run "make check SPEED=3Dslow"=0D =0D "make check SPEED=3Dslow" got lost in the conversion of the build=0D system to meson - the tests were always running in "quick" mode.=0D Fix it by passing the "-m" parameter to the test harness at the=0D right spot in scripts/mtest2make.py.=0D =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210218172313.2217440-1-thuth@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 2faf56bd9563e86fd9295b8ada9ee5198712cd2f=0D https://github.com/qemu/qemu/commit/2faf56bd9563e86fd9295b8ada9ee51= 98712cd2f=0D Author: Cleber Rosa =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M scripts/ci/gitlab-pipeline-status=0D =0D Log Message:=0D -----------=0D scripts/ci/gitlab-pipeline-status: split utlity function for HTTP GET=0D= =0D This simply splits out the code that does an HTTP GET so that it=0D can be used for other API requests.=0D =0D Signed-off-by: Cleber Rosa =0D Reviewed-by: Alex Benn=C3=A9e =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210222193240.921250-2-crosa@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 861d1d509b111f59b294c975eee59f2a23bc783a=0D https://github.com/qemu/qemu/commit/861d1d509b111f59b294c975eee59f2= a23bc783a=0D Author: Cleber Rosa =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M scripts/ci/gitlab-pipeline-status=0D =0D Log Message:=0D -----------=0D scripts/ci/gitlab-pipeline-status: give more information on failures=0D= =0D When an HTTP GET request fails, it's useful to go beyond the "not=0D successful" message, and show the code returned by the server.=0D =0D Signed-off-by: Cleber Rosa =0D Reviewed-by: Alex Benn=C3=A9e =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210222193240.921250-3-crosa@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 6179f32eeb6b13574ef65c85f836c681d213e577=0D https://github.com/qemu/qemu/commit/6179f32eeb6b13574ef65c85f836c68= 1d213e577=0D Author: Cleber Rosa =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M scripts/ci/gitlab-pipeline-status=0D =0D Log Message:=0D -----------=0D scripts/ci/gitlab-pipeline-status: give more info when pipeline not fou= nd=0D =0D This includes both input parameters (project id and commit) in the=0D message so to make it easier to debug returned API calls.=0D =0D Signed-off-by: Cleber Rosa =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210222193240.921250-4-crosa@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 222455ef814935b1ecc6c9a75acbc0e97e31d8a7=0D https://github.com/qemu/qemu/commit/222455ef814935b1ecc6c9a75acbc0e= 97e31d8a7=0D Author: Emanuele Giuseppe Esposito =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M docs/devel/index.rst=0D A docs/devel/qgraph.rst=0D M docs/devel/qtest.rst=0D M tests/qtest/libqos/qgraph.h=0D =0D Log Message:=0D -----------=0D libqos/qgraph: format qgraph comments for sphinx documentation=0D =0D Change documentation style and fix minor typos in tests/qtest/libqos/qgra= ph.h=0D to automatically generate sphinx documentation in docs/devel/qgraph.rst=0D= =0D The mechanism explanation that once was in qgraph.h is now moved to qgrap= h.rst=0D =0D There is no functional change intended.=0D =0D Signed-off-by: Emanuele Giuseppe Esposito =0D Message-Id: <20210308073240.6363-1-eesposit@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: afdbd38223cc1aafdac5cc29074e8bd5508a80df=0D https://github.com/qemu/qemu/commit/afdbd38223cc1aafdac5cc29074e8bd= 5508a80df=0D Author: Emanuele Giuseppe Esposito =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/qgraph.rst=0D =0D Log Message:=0D -----------=0D docs/devel/qgraph: improve qgraph documentation=0D =0D Improve current qgraph documentation with a more concrete example=0D and clearer motivation.=0D =0D This patch depends on the previous serie=0D "libqos/qgraph: format qgraph comments for sphinx documentation"=0D =0D Signed-off-by: Emanuele Giuseppe Esposito =0D Message-Id: <20210301092432.20342-1-eesposit@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 93fca0f2416fb5a26e06c43e3a1adec74ece74da=0D https://github.com/qemu/qemu/commit/93fca0f2416fb5a26e06c43e3a1adec= 74ece74da=0D Author: Cleber Rosa =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M tests/Makefile.include=0D =0D Log Message:=0D -----------=0D Acceptance Tests: restore downloading of VM images=0D =0D The "get-vm-images" target defined in tests/Makefile.include is a=0D prerequisite for "check-acceptance", so that those files get=0D downloaded before the Avocado job even starts.=0D =0D It looks like on c401c058a1c a TARGETS variable was introduced with a=0D different content than it was previously coming from the main=0D Makefile. From that point on, the "get-vm-images" succeed without=0D doing anything because there was no matching architecture to download.=0D= =0D This restores the download of images (that match targets to be built)=0D before the job starts, eliminating downloads and their associated=0D failures during the tests.=0D =0D Signed-off-by: Cleber Rosa =0D Reviewed-by: Wainer dos Santos Moschetta =0D Reviewed-by: Willian Rampazzo =0D Message-Id: <20210225232122.1254879-2-crosa@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 235c15fac50026b32b43431bd37a61a9e03d42da=0D https://github.com/qemu/qemu/commit/235c15fac50026b32b43431bd37a61a= 9e03d42da=0D Author: Cleber Rosa =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M tests/Makefile.include=0D =0D Log Message:=0D -----------=0D Acceptance Tests: restore filtering of tests by target arch=0D =0D Previously, tests were being filtered by the matching target=0D architectures to be built. The benefit, compared to the current=0D situation, is a more concise test job that won't show tests canceled=0D because a matching QEMU binary was not found (those tests won't even=0D be attempted).=0D =0D Signed-off-by: Cleber Rosa =0D Reviewed-by: Wainer dos Santos Moschetta =0D Reviewed-by: Willian Rampazzo =0D Message-Id: <20210225232122.1254879-3-crosa@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 2cc1a90166b5baa7ae9d00baf7099254e1353485=0D https://github.com/qemu/qemu/commit/2cc1a90166b5baa7ae9d00baf709925= 4e1353485=0D Author: Thomas Huth =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D M configure=0D R default-configs/targets/tilegx-linux-user.mak=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M include/elf.h=0D M include/exec/poison.h=0D M linux-user/elfload.c=0D M linux-user/syscall_defs.h=0D R linux-user/tilegx/cpu_loop.c=0D R linux-user/tilegx/signal.c=0D R linux-user/tilegx/sockbits.h=0D R linux-user/tilegx/syscall_nr.h=0D R linux-user/tilegx/target_cpu.h=0D R linux-user/tilegx/target_elf.h=0D R linux-user/tilegx/target_fcntl.h=0D R linux-user/tilegx/target_signal.h=0D R linux-user/tilegx/target_structs.h=0D R linux-user/tilegx/target_syscall.h=0D R linux-user/tilegx/termbits.h=0D M target/meson.build=0D R target/tilegx/cpu-param.h=0D R target/tilegx/cpu.c=0D R target/tilegx/cpu.h=0D R target/tilegx/helper.c=0D R target/tilegx/helper.h=0D R target/tilegx/meson.build=0D R target/tilegx/opcode_tilegx.h=0D R target/tilegx/simd_helper.c=0D R target/tilegx/spr_def_64.h=0D R target/tilegx/translate.c=0D =0D Log Message:=0D -----------=0D Remove deprecated target tilegx=0D =0D TILE-Gx was only implemented in linux-user mode, but support for this CPU= =0D was removed from the upstream Linux kernel in 2018, and it has also been=0D= dropped from glibc, so there is no new Linux development taking place wit= h=0D this architecture. For running the old binaries, users can simply use old= er=0D versions of QEMU.=0D =0D Signed-off-by: Thomas Huth =0D Reviewed-by: Alex Benn=C3=A9e =0D Acked-by: Richard Henderson =0D Acked-by: Laurent Vivier =0D Message-Id: <20210224183952.80463-1-thuth@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 65a9d3807e9a0ffd9f9719416a07be41b6f39e94=0D https://github.com/qemu/qemu/commit/65a9d3807e9a0ffd9f9719416a07be4= 1b6f39e94=0D Author: Warner Losh =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D bsd-user: Add new maintainers=0D =0D The FreeBSD project has a number of enhancements to bsd-user. These chang= es have=0D evolved over the past 10 year, and aren't currently updated to the latest= =0D version of qemu due to fluxuations in staffing causing us to fall behind = in the=0D past. We're working on porting all the changes forward and contributing a= ll the=0D changes back to qemu. Add myself as maintainer and Kyle Evans as a review= er for=0D changes. In addition, add a pointer to our github repo in the interim whi= le this=0D work is ongoing.=0D =0D Signed-off-by: Warner Losh =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210308224023.75187-1-imp@bsdimp.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 821e7ed167f11f482d2d1a8eaf114a667295a581=0D https://github.com/qemu/qemu/commit/821e7ed167f11f482d2d1a8eaf114a6= 67295a581=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.d/edk2.yml=0D M .gitlab-ci.d/opensbi.yml=0D M .gitlab-ci.yml=0D M MAINTAINERS=0D M accel/tcg/cpu-exec.c=0D M blockdev.c=0D M configure=0D R default-configs/targets/tilegx-linux-user.mak=0D M docs/devel/index.rst=0D A docs/devel/qgraph.rst=0D M docs/devel/qtest.rst=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/9pfs/9p.c=0D M hw/arm/armv7m.c=0D M hw/arm/mainstone.c=0D M hw/arm/xlnx-zcu102.c=0D M hw/arm/z2.c=0D M hw/i386/pc.c=0D M hw/misc/ivshmem.c=0D M hw/ppc/ppc440_bamboo.c=0D M hw/ppc/prep.c=0D M hw/ppc/sam460ex.c=0D M hw/ppc/spapr_caps.c=0D M hw/ppc/spapr_pci_vfio.c=0D M hw/ppc/spapr_vio.c=0D M hw/ppc/virtex_ml507.c=0D M hw/riscv/spike.c=0D M hw/rx/rx62n.c=0D M include/elf.h=0D M include/exec/poison.h=0D M linux-user/elfload.c=0D M linux-user/syscall_defs.h=0D R linux-user/tilegx/cpu_loop.c=0D R linux-user/tilegx/signal.c=0D R linux-user/tilegx/sockbits.h=0D R linux-user/tilegx/syscall_nr.h=0D R linux-user/tilegx/target_cpu.h=0D R linux-user/tilegx/target_elf.h=0D R linux-user/tilegx/target_fcntl.h=0D R linux-user/tilegx/target_signal.h=0D R linux-user/tilegx/target_structs.h=0D R linux-user/tilegx/target_syscall.h=0D R linux-user/tilegx/termbits.h=0D M net/net.c=0D M scripts/ci/gitlab-pipeline-status=0D M scripts/mtest2make.py=0D M softmmu/cpu-timers.c=0D M target/meson.build=0D M target/ppc/translate_init.c.inc=0D R target/tilegx/cpu-param.h=0D R target/tilegx/cpu.c=0D R target/tilegx/cpu.h=0D R target/tilegx/helper.c=0D R target/tilegx/helper.h=0D R target/tilegx/meson.build=0D R target/tilegx/opcode_tilegx.h=0D R target/tilegx/simd_helper.c=0D R target/tilegx/spr_def_64.h=0D R target/tilegx/translate.c=0D M tests/Makefile.include=0D M tests/qtest/libqos/qgraph.h=0D M util/main-loop.c=0D M util/qemu-timer.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-20= 21-03-09' into staging=0D =0D * Add some missing gitlab-CI job dependencies=0D * Re-enable "make check SPEED=3Dslow"=0D * Improve the gitlab-pipeline-status script=0D * Clean up inclusing of qtest.h headers=0D * Improve libqos/qgraph documentation=0D * Fix downloading problem in the acceptance tests=0D * Remove deprecated target tilegx=0D * Add new bsd-user maintainers=0D =0D # gpg: Signature made Tue 09 Mar 2021 10:27:29 GMT=0D # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702= DB5=0D # gpg: issuer "thuth@redhat.com"=0D # gpg: Good signature from "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [unknown]=0D= # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 = 2DB5=0D =0D * remotes/thuth-gitlab/tags/pull-request-2021-03-09:=0D bsd-user: Add new maintainers=0D Remove deprecated target tilegx=0D Acceptance Tests: restore filtering of tests by target arch=0D Acceptance Tests: restore downloading of VM images=0D docs/devel/qgraph: improve qgraph documentation=0D libqos/qgraph: format qgraph comments for sphinx documentation=0D scripts/ci/gitlab-pipeline-status: give more info when pipeline not fou= nd=0D scripts/ci/gitlab-pipeline-status: give more information on failures=0D= scripts/ci/gitlab-pipeline-status: split utlity function for HTTP GET=0D= meson: Re-enable the possibility to run "make check SPEED=3Dslow"=0D docker: OpenSBI build job depends on OpenSBI container=0D docker: EDK2 build job depends on EDK2 container=0D docker: Alpine build job depends on Alpine container=0D qtest: delete superfluous inclusions of qtest.h=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/5c6295a45b4f...821e7ed167f1= =0D From MAILER-DAEMON Wed Mar 10 15:11:51 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lK5BO-0007Oj-UH for mharc-qemu-commits@gnu.org; Wed, 10 Mar 2021 15:11:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:58738) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK5BM-0007Jw-HI for qemu-commits@nongnu.org; Wed, 10 Mar 2021 15:11:48 -0500 Received: from out-19.smtp.github.com ([192.30.252.202]:42067) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK5BE-0007Og-Pl for qemu-commits@nongnu.org; Wed, 10 Mar 2021 15:11:47 -0500 Received: from github.com (hubbernetes-node-868477a.va3-iad.github.net [10.48.110.69]) by smtp.github.com (Postfix) with ESMTPA id D57E1E0409 for ; Wed, 10 Mar 2021 12:11:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615407095; bh=Wry9Qhw+Y/xvH30YXRwI7wC4AIUy1lzkfmAmsCiFhec=; h=Date:From:To:Subject:From; b=GJwLWbq252pNa4Z8ImrsqvC2JINbzkvWtHzwUp49TJVS+L/MvtcxM0mELkQ9knR3M ez+AuOGPQLO0Xf464fX8qCtxRnjbkkhsI6y21nN46bSUBFvAUQ5TIuL3uJnk2m90C5 Owo5hI5+kBPK2TkV3TdtEEi02Id44aSLBY1RujAk= Date: Wed, 10 Mar 2021 12:11:35 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.202; envelope-from=noreply@github.com; helo=out-19.smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.243, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] d6eb39: qtest: delete superfluous inclusions of qtest.h X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Mar 2021 20:11:48 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: d6eb39b554afa43392983e472de124ad8e6ee46e=0D https://github.com/qemu/qemu/commit/d6eb39b554afa43392983e472de124a= d8e6ee46e=0D Author: Chen Qun =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M accel/tcg/cpu-exec.c=0D M blockdev.c=0D M hw/9pfs/9p.c=0D M hw/arm/armv7m.c=0D M hw/arm/mainstone.c=0D M hw/arm/xlnx-zcu102.c=0D M hw/arm/z2.c=0D M hw/i386/pc.c=0D M hw/misc/ivshmem.c=0D M hw/ppc/ppc440_bamboo.c=0D M hw/ppc/prep.c=0D M hw/ppc/sam460ex.c=0D M hw/ppc/spapr_caps.c=0D M hw/ppc/spapr_pci_vfio.c=0D M hw/ppc/spapr_vio.c=0D M hw/ppc/virtex_ml507.c=0D M hw/riscv/spike.c=0D M hw/rx/rx62n.c=0D M net/net.c=0D M softmmu/cpu-timers.c=0D M target/ppc/translate_init.c.inc=0D M util/main-loop.c=0D M util/qemu-timer.c=0D =0D Log Message:=0D -----------=0D qtest: delete superfluous inclusions of qtest.h=0D =0D There are 23 files that include the "sysemu/qtest.h",=0D but they do not use any qtest functions.=0D =0D Signed-off-by: Chen Qun =0D Acked-by: Markus Armbruster =0D Message-Id: <20210226081414.205946-1-kuhn.chenqun@huawei.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 9f3a24cf1f9a3a0e94102c69d92c3a8eea7debc4=0D https://github.com/qemu/qemu/commit/9f3a24cf1f9a3a0e94102c69d92c3a8= eea7debc4=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D docker: Alpine build job depends on Alpine container=0D =0D Add missing dependency build-system-alpine -> amd64-alpine-container.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303130646.1494015-2-philmd@redhat.com>=0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 1925468ddbf9931dc5e05278483840f33eabca8b=0D https://github.com/qemu/qemu/commit/1925468ddbf9931dc5e05278483840f= 33eabca8b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.d/edk2.yml=0D =0D Log Message:=0D -----------=0D docker: EDK2 build job depends on EDK2 container=0D =0D Add missing dependency build-edk2 -> docker-edk2.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303130646.1494015-3-philmd@redhat.com>=0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Acked-by: Laszlo Ersek =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 91e9c47e50a8f790a2abc1797c14b0d2e9ea6da3=0D https://github.com/qemu/qemu/commit/91e9c47e50a8f790a2abc1797c14b0d= 2e9ea6da3=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.d/opensbi.yml=0D =0D Log Message:=0D -----------=0D docker: OpenSBI build job depends on OpenSBI container=0D =0D Add missing dependency build-opensbi -> docker-opensbi.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303130646.1494015-4-philmd@redhat.com>=0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: c2f4c1a8bae9c48d6141f8fb4874b584b26153b0=0D https://github.com/qemu/qemu/commit/c2f4c1a8bae9c48d6141f8fb4874b58= 4b26153b0=0D Author: Thomas Huth =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M scripts/mtest2make.py=0D =0D Log Message:=0D -----------=0D meson: Re-enable the possibility to run "make check SPEED=3Dslow"=0D =0D "make check SPEED=3Dslow" got lost in the conversion of the build=0D system to meson - the tests were always running in "quick" mode.=0D Fix it by passing the "-m" parameter to the test harness at the=0D right spot in scripts/mtest2make.py.=0D =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210218172313.2217440-1-thuth@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 2faf56bd9563e86fd9295b8ada9ee5198712cd2f=0D https://github.com/qemu/qemu/commit/2faf56bd9563e86fd9295b8ada9ee51= 98712cd2f=0D Author: Cleber Rosa =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M scripts/ci/gitlab-pipeline-status=0D =0D Log Message:=0D -----------=0D scripts/ci/gitlab-pipeline-status: split utlity function for HTTP GET=0D= =0D This simply splits out the code that does an HTTP GET so that it=0D can be used for other API requests.=0D =0D Signed-off-by: Cleber Rosa =0D Reviewed-by: Alex Benn=C3=A9e =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210222193240.921250-2-crosa@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 861d1d509b111f59b294c975eee59f2a23bc783a=0D https://github.com/qemu/qemu/commit/861d1d509b111f59b294c975eee59f2= a23bc783a=0D Author: Cleber Rosa =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M scripts/ci/gitlab-pipeline-status=0D =0D Log Message:=0D -----------=0D scripts/ci/gitlab-pipeline-status: give more information on failures=0D= =0D When an HTTP GET request fails, it's useful to go beyond the "not=0D successful" message, and show the code returned by the server.=0D =0D Signed-off-by: Cleber Rosa =0D Reviewed-by: Alex Benn=C3=A9e =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210222193240.921250-3-crosa@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 6179f32eeb6b13574ef65c85f836c681d213e577=0D https://github.com/qemu/qemu/commit/6179f32eeb6b13574ef65c85f836c68= 1d213e577=0D Author: Cleber Rosa =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M scripts/ci/gitlab-pipeline-status=0D =0D Log Message:=0D -----------=0D scripts/ci/gitlab-pipeline-status: give more info when pipeline not fou= nd=0D =0D This includes both input parameters (project id and commit) in the=0D message so to make it easier to debug returned API calls.=0D =0D Signed-off-by: Cleber Rosa =0D Reviewed-by: Wainer dos Santos Moschetta =0D Message-Id: <20210222193240.921250-4-crosa@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 222455ef814935b1ecc6c9a75acbc0e97e31d8a7=0D https://github.com/qemu/qemu/commit/222455ef814935b1ecc6c9a75acbc0e= 97e31d8a7=0D Author: Emanuele Giuseppe Esposito =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M docs/devel/index.rst=0D A docs/devel/qgraph.rst=0D M docs/devel/qtest.rst=0D M tests/qtest/libqos/qgraph.h=0D =0D Log Message:=0D -----------=0D libqos/qgraph: format qgraph comments for sphinx documentation=0D =0D Change documentation style and fix minor typos in tests/qtest/libqos/qgra= ph.h=0D to automatically generate sphinx documentation in docs/devel/qgraph.rst=0D= =0D The mechanism explanation that once was in qgraph.h is now moved to qgrap= h.rst=0D =0D There is no functional change intended.=0D =0D Signed-off-by: Emanuele Giuseppe Esposito =0D Message-Id: <20210308073240.6363-1-eesposit@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: afdbd38223cc1aafdac5cc29074e8bd5508a80df=0D https://github.com/qemu/qemu/commit/afdbd38223cc1aafdac5cc29074e8bd= 5508a80df=0D Author: Emanuele Giuseppe Esposito =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/qgraph.rst=0D =0D Log Message:=0D -----------=0D docs/devel/qgraph: improve qgraph documentation=0D =0D Improve current qgraph documentation with a more concrete example=0D and clearer motivation.=0D =0D This patch depends on the previous serie=0D "libqos/qgraph: format qgraph comments for sphinx documentation"=0D =0D Signed-off-by: Emanuele Giuseppe Esposito =0D Message-Id: <20210301092432.20342-1-eesposit@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 93fca0f2416fb5a26e06c43e3a1adec74ece74da=0D https://github.com/qemu/qemu/commit/93fca0f2416fb5a26e06c43e3a1adec= 74ece74da=0D Author: Cleber Rosa =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M tests/Makefile.include=0D =0D Log Message:=0D -----------=0D Acceptance Tests: restore downloading of VM images=0D =0D The "get-vm-images" target defined in tests/Makefile.include is a=0D prerequisite for "check-acceptance", so that those files get=0D downloaded before the Avocado job even starts.=0D =0D It looks like on c401c058a1c a TARGETS variable was introduced with a=0D different content than it was previously coming from the main=0D Makefile. From that point on, the "get-vm-images" succeed without=0D doing anything because there was no matching architecture to download.=0D= =0D This restores the download of images (that match targets to be built)=0D before the job starts, eliminating downloads and their associated=0D failures during the tests.=0D =0D Signed-off-by: Cleber Rosa =0D Reviewed-by: Wainer dos Santos Moschetta =0D Reviewed-by: Willian Rampazzo =0D Message-Id: <20210225232122.1254879-2-crosa@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 235c15fac50026b32b43431bd37a61a9e03d42da=0D https://github.com/qemu/qemu/commit/235c15fac50026b32b43431bd37a61a= 9e03d42da=0D Author: Cleber Rosa =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M tests/Makefile.include=0D =0D Log Message:=0D -----------=0D Acceptance Tests: restore filtering of tests by target arch=0D =0D Previously, tests were being filtered by the matching target=0D architectures to be built. The benefit, compared to the current=0D situation, is a more concise test job that won't show tests canceled=0D because a matching QEMU binary was not found (those tests won't even=0D be attempted).=0D =0D Signed-off-by: Cleber Rosa =0D Reviewed-by: Wainer dos Santos Moschetta =0D Reviewed-by: Willian Rampazzo =0D Message-Id: <20210225232122.1254879-3-crosa@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 2cc1a90166b5baa7ae9d00baf7099254e1353485=0D https://github.com/qemu/qemu/commit/2cc1a90166b5baa7ae9d00baf709925= 4e1353485=0D Author: Thomas Huth =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D M configure=0D R default-configs/targets/tilegx-linux-user.mak=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M include/elf.h=0D M include/exec/poison.h=0D M linux-user/elfload.c=0D M linux-user/syscall_defs.h=0D R linux-user/tilegx/cpu_loop.c=0D R linux-user/tilegx/signal.c=0D R linux-user/tilegx/sockbits.h=0D R linux-user/tilegx/syscall_nr.h=0D R linux-user/tilegx/target_cpu.h=0D R linux-user/tilegx/target_elf.h=0D R linux-user/tilegx/target_fcntl.h=0D R linux-user/tilegx/target_signal.h=0D R linux-user/tilegx/target_structs.h=0D R linux-user/tilegx/target_syscall.h=0D R linux-user/tilegx/termbits.h=0D M target/meson.build=0D R target/tilegx/cpu-param.h=0D R target/tilegx/cpu.c=0D R target/tilegx/cpu.h=0D R target/tilegx/helper.c=0D R target/tilegx/helper.h=0D R target/tilegx/meson.build=0D R target/tilegx/opcode_tilegx.h=0D R target/tilegx/simd_helper.c=0D R target/tilegx/spr_def_64.h=0D R target/tilegx/translate.c=0D =0D Log Message:=0D -----------=0D Remove deprecated target tilegx=0D =0D TILE-Gx was only implemented in linux-user mode, but support for this CPU= =0D was removed from the upstream Linux kernel in 2018, and it has also been=0D= dropped from glibc, so there is no new Linux development taking place wit= h=0D this architecture. For running the old binaries, users can simply use old= er=0D versions of QEMU.=0D =0D Signed-off-by: Thomas Huth =0D Reviewed-by: Alex Benn=C3=A9e =0D Acked-by: Richard Henderson =0D Acked-by: Laurent Vivier =0D Message-Id: <20210224183952.80463-1-thuth@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 65a9d3807e9a0ffd9f9719416a07be41b6f39e94=0D https://github.com/qemu/qemu/commit/65a9d3807e9a0ffd9f9719416a07be4= 1b6f39e94=0D Author: Warner Losh =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D bsd-user: Add new maintainers=0D =0D The FreeBSD project has a number of enhancements to bsd-user. These chang= es have=0D evolved over the past 10 year, and aren't currently updated to the latest= =0D version of qemu due to fluxuations in staffing causing us to fall behind = in the=0D past. We're working on porting all the changes forward and contributing a= ll the=0D changes back to qemu. Add myself as maintainer and Kyle Evans as a review= er for=0D changes. In addition, add a pointer to our github repo in the interim whi= le this=0D work is ongoing.=0D =0D Signed-off-by: Warner Losh =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210308224023.75187-1-imp@bsdimp.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 821e7ed167f11f482d2d1a8eaf114a667295a581=0D https://github.com/qemu/qemu/commit/821e7ed167f11f482d2d1a8eaf114a6= 67295a581=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.d/edk2.yml=0D M .gitlab-ci.d/opensbi.yml=0D M .gitlab-ci.yml=0D M MAINTAINERS=0D M accel/tcg/cpu-exec.c=0D M blockdev.c=0D M configure=0D R default-configs/targets/tilegx-linux-user.mak=0D M docs/devel/index.rst=0D A docs/devel/qgraph.rst=0D M docs/devel/qtest.rst=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/9pfs/9p.c=0D M hw/arm/armv7m.c=0D M hw/arm/mainstone.c=0D M hw/arm/xlnx-zcu102.c=0D M hw/arm/z2.c=0D M hw/i386/pc.c=0D M hw/misc/ivshmem.c=0D M hw/ppc/ppc440_bamboo.c=0D M hw/ppc/prep.c=0D M hw/ppc/sam460ex.c=0D M hw/ppc/spapr_caps.c=0D M hw/ppc/spapr_pci_vfio.c=0D M hw/ppc/spapr_vio.c=0D M hw/ppc/virtex_ml507.c=0D M hw/riscv/spike.c=0D M hw/rx/rx62n.c=0D M include/elf.h=0D M include/exec/poison.h=0D M linux-user/elfload.c=0D M linux-user/syscall_defs.h=0D R linux-user/tilegx/cpu_loop.c=0D R linux-user/tilegx/signal.c=0D R linux-user/tilegx/sockbits.h=0D R linux-user/tilegx/syscall_nr.h=0D R linux-user/tilegx/target_cpu.h=0D R linux-user/tilegx/target_elf.h=0D R linux-user/tilegx/target_fcntl.h=0D R linux-user/tilegx/target_signal.h=0D R linux-user/tilegx/target_structs.h=0D R linux-user/tilegx/target_syscall.h=0D R linux-user/tilegx/termbits.h=0D M net/net.c=0D M scripts/ci/gitlab-pipeline-status=0D M scripts/mtest2make.py=0D M softmmu/cpu-timers.c=0D M target/meson.build=0D M target/ppc/translate_init.c.inc=0D R target/tilegx/cpu-param.h=0D R target/tilegx/cpu.c=0D R target/tilegx/cpu.h=0D R target/tilegx/helper.c=0D R target/tilegx/helper.h=0D R target/tilegx/meson.build=0D R target/tilegx/opcode_tilegx.h=0D R target/tilegx/simd_helper.c=0D R target/tilegx/spr_def_64.h=0D R target/tilegx/translate.c=0D M tests/Makefile.include=0D M tests/qtest/libqos/qgraph.h=0D M util/main-loop.c=0D M util/qemu-timer.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-20= 21-03-09' into staging=0D =0D * Add some missing gitlab-CI job dependencies=0D * Re-enable "make check SPEED=3Dslow"=0D * Improve the gitlab-pipeline-status script=0D * Clean up inclusing of qtest.h headers=0D * Improve libqos/qgraph documentation=0D * Fix downloading problem in the acceptance tests=0D * Remove deprecated target tilegx=0D * Add new bsd-user maintainers=0D =0D # gpg: Signature made Tue 09 Mar 2021 10:27:29 GMT=0D # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702= DB5=0D # gpg: issuer "thuth@redhat.com"=0D # gpg: Good signature from "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [unknown]=0D= # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 = 2DB5=0D =0D * remotes/thuth-gitlab/tags/pull-request-2021-03-09:=0D bsd-user: Add new maintainers=0D Remove deprecated target tilegx=0D Acceptance Tests: restore filtering of tests by target arch=0D Acceptance Tests: restore downloading of VM images=0D docs/devel/qgraph: improve qgraph documentation=0D libqos/qgraph: format qgraph comments for sphinx documentation=0D scripts/ci/gitlab-pipeline-status: give more info when pipeline not fou= nd=0D scripts/ci/gitlab-pipeline-status: give more information on failures=0D= scripts/ci/gitlab-pipeline-status: split utlity function for HTTP GET=0D= meson: Re-enable the possibility to run "make check SPEED=3Dslow"=0D docker: OpenSBI build job depends on OpenSBI container=0D docker: EDK2 build job depends on EDK2 container=0D docker: Alpine build job depends on Alpine container=0D qtest: delete superfluous inclusions of qtest.h=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/5c6295a45b4f...821e7ed167f1= =0D From MAILER-DAEMON Wed Mar 10 15:17:31 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lK5Gn-0002Tb-4a for mharc-qemu-commits@gnu.org; Wed, 10 Mar 2021 15:17:31 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59754) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK5Gl-0002TL-A8 for qemu-commits@nongnu.org; Wed, 10 Mar 2021 15:17:23 -0500 Received: from out-21.smtp.github.com ([192.30.252.204]:42151 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lK5Gg-0001X2-8G for qemu-commits@nongnu.org; Wed, 10 Mar 2021 15:17:23 -0500 Received: from github.com (hubbernetes-node-fa5363c.ac4-iad.github.net [10.52.205.65]) by smtp.github.com (Postfix) with ESMTPA id 5B1BA520590 for ; Wed, 10 Mar 2021 12:17:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615407432; bh=OxT8wewP98hTJXhl+vijTpFofxDzXThNjiIADYRKFKQ=; h=Date:From:To:Subject:From; b=i+ZiEhG0tsHJPgoyy4hyNB2YHK3btAHfcMTJK23wG1lHn8I/mSb+LVU25QeMzollw PAhl7NPmfHLSPkhOpn2PNEdCr3DRckXLobQpctxuEZBeu0sD0Qbxa3bsjGPiVnLs7P hPHBFqZnIKtU2kXUtzTVYydF4+1AoDArRSTbGJJQ= Date: Wed, 10 Mar 2021 12:17:12 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.243, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] eb2e89: hw/block/nvme: introduce nvme-subsys device X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Mar 2021 20:17:23 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: eb2e89747eca57fb0028001b28b3c4e0c1540e3a=0D https://github.com/qemu/qemu/commit/eb2e89747eca57fb0028001b28b3c4e= 0c1540e3a=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/meson.build=0D A hw/block/nvme-subsys.c=0D A hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: introduce nvme-subsys device=0D =0D To support multi-path in QEMU NVMe device model, We need to have NVMe=0D subsystem hierarchy to map controllers and namespaces to a NVMe=0D subsystem.=0D =0D This patch introduced a simple nvme-subsys device model. The subsystem=0D= will be prepared with subsystem NQN with provided in=0D nvme-subsys device:=0D =0D ex) -device nvme-subsys,id=3Dsubsys0: nqn.2019-08.org.qemu:subsys0=0D =0D Signed-off-by: Minwoo Im =0D Tested-by: Klaus Jensen =0D Reviewed-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D [k.jensen: added 'nqn' device parameter per request]=0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 982ed66bb2e89bdb029b186232946fe2e7c217e1=0D https://github.com/qemu/qemu/commit/982ed66bb2e89bdb029b186232946fe= 2e7c217e1=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support to map controller to a subsystem=0D =0D nvme controller(nvme) can be mapped to a NVMe subsystem(nvme-subsys).=0D This patch maps a controller to a subsystem by adding a parameter=0D 'subsys' to the nvme device.=0D =0D To map a controller to a subsystem, we need to put nvme-subsys first and=0D= then maps the subsystem to the controller:=0D =0D -device nvme-subsys,id=3Dsubsys0=0D -device nvme,serial=3Dfoo,id=3Dnvme0,subsys=3Dsubsys0=0D =0D If 'subsys' property is not given to the nvme controller, then subsystem=0D= NQN will be created with serial (e.g., 'foo' in above example),=0D Otherwise, it will be based on subsys id (e.g., 'subsys0' in above=0D example).=0D =0D Signed-off-by: Minwoo Im =0D Tested-by: Klaus Jensen =0D Reviewed-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 66b7e9bed0aee4342aa7cb824b8c46a42cacf7e2=0D https://github.com/qemu/qemu/commit/66b7e9bed0aee4342aa7cb824b8c46a= 42cacf7e2=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add CMIC enum value for Identify Controller=0D =0D Added Controller Multi-path I/O and Namespace Sharing Capabilities=0D (CMIC) field to support multi-controller in the following patches.=0D =0D This field is in Identify Controller data structure in [76].=0D =0D Signed-off-by: Minwoo Im =0D Tested-by: Klaus Jensen =0D Reviewed-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: e36a261d4bf7057a8ffee336422210b58c661a21=0D https://github.com/qemu/qemu/commit/e36a261d4bf7057a8ffee336422210b= 58c661a21=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-subsys.c=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support for multi-controller in subsystem=0D =0D We have nvme-subsys and nvme devices mapped together. To support=0D multi-controller scheme to this setup, controller identifier(id) has to=0D= be managed. Earlier, cntlid(controller id) used to be always 0 because=0D= we didn't have any subsystem scheme that controller id matters.=0D =0D This patch introduced 'cntlid' attribute to the nvme controller=0D instance(NvmeCtrl) and make it allocated by the nvme-subsys device=0D mapped to the controller. If nvme-subsys is not given to the=0D controller, then it will always be 0 as it was.=0D =0D Added 'ctrls' array in the nvme-subsys instance to manage attached=0D controllers to the subsystem with a limit(32). This patch didn't take=0D= list for the controllers to make it seamless with nvme-ns device.=0D =0D Signed-off-by: Minwoo Im =0D Tested-by: Klaus Jensen =0D Reviewed-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: adc36b8d21204c00643016d8766a5214e3d54b5b=0D https://github.com/qemu/qemu/commit/adc36b8d21204c00643016d8766a521= 4e3d54b5b=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add NMIC enum value for Identify Namespace=0D =0D Added Namespace Multi-path I/O and Namespace Sharing Capabilities (NMIC)=0D= field to support shared namespace from controller(s).=0D =0D This field is in Identify Namespace data structure in [30].=0D =0D Signed-off-by: Minwoo Im =0D Tested-by: Klaus Jensen =0D Reviewed-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: e570768566b36f0a0471f65a40b47a6471ef0e24=0D https://github.com/qemu/qemu/commit/e570768566b36f0a0471f65a40b47a6= 471ef0e24=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme-subsys.c=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support for shared namespace in subsystem=0D =0D nvme-ns device is registered to a nvme controller device during the=0D initialization in nvme_register_namespace() in case that 'bus' property=0D= is given which means it's mapped to a single controller.=0D =0D This patch introduced a new property 'subsys' just like the controller=0D= device instance did to map a namespace to a NVMe subsystem.=0D =0D If 'subsys' property is given to the nvme-ns device, it will belong to=0D= the specified subsystem and will be attached to all controllers in that=0D= subsystem by enabling shared namespace capability in NMIC(Namespace=0D Multi-path I/O and Namespace Capabilities) in Identify Namespace.=0D =0D Usage:=0D =0D -device nvme-subsys,id=3Dsubsys0=0D -device nvme,serial=3Dfoo,id=3Dnvme0,subsys=3Dsubsys0=0D -device nvme,serial=3Dbar,id=3Dnvme1,subsys=3Dsubsys0=0D -device nvme,serial=3Dbaz,id=3Dnvme2,subsys=3Dsubsys0=0D -device nvme-ns,id=3Dns1,drive=3D,nsid=3D1,subsys=3Dsubsys0 # Sha= red=0D -device nvme-ns,id=3Dns2,drive=3D,nsid=3D2,bus=3Dnvme2 # Non= -shared=0D =0D In the above example, 'ns1' will be shared to 'nvme0' and 'nvme1' in=0D= the same subsystem. On the other hand, 'ns2' will be attached to the=0D= 'nvme2' only as a private namespace in that subsystem.=0D =0D All the namespace with 'subsys' parameter will attach all controllers in=0D= the subsystem to the namespace by default.=0D =0D Signed-off-by: Minwoo Im =0D Tested-by: Klaus Jensen =0D Reviewed-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: eda688ee2403c1efc48f420590623c885aec3393=0D https://github.com/qemu/qemu/commit/eda688ee2403c1efc48f420590623c8= 85aec3393=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: remove unused parameter in check zone write=0D =0D Remove the unused NvmeCtrl parameter in nvme_check_zone_write.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 975b64665048e8e283a3c9cad9808da0a014e283=0D https://github.com/qemu/qemu/commit/975b64665048e8e283a3c9cad9808da= 0a014e283=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: refactor zone resource management=0D =0D Zone transition handling and resource management is open coded (and=0D semi-duplicated in the case of open, close and finish).=0D =0D In preparation for Simple Copy command support (which also needs to open=0D= zones for writing), consolidate into a set of 'nvme_zrm' functions and=0D= in the process fix a bug with the controller not closing an open zone to=0D= allow another zone to be explicitly opened.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: b0a79429d964ad2d8c1c41fdc18b3ae5def41ff8=0D https://github.com/qemu/qemu/commit/b0a79429d964ad2d8c1c41fdc18b3ae= 5def41ff8=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: pull write pointer advancement to separate function=0D =0D In preparation for Simple Copy, pull write pointer advancement into a=0D separate function that is independent off an NvmeRequest.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 3862efff316c1d02b41d1362f97dfba812050e53=0D https://github.com/qemu/qemu/commit/3862efff316c1d02b41d1362f97dfba= 812050e53=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D nvme: updated shared header for copy command=0D =0D Add new data structures and types for the Simple Copy command.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D Acked-by: Stefan Hajnoczi =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: e4e430b3d6baa1c908ba71ca37aad87edac98804=0D https://github.com/qemu/qemu/commit/e4e430b3d6baa1c908ba71ca37aad87= edac98804=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add simple copy command=0D =0D Add support for TP 4065a ("Simple Copy Command"), v2020.05.04=0D ("Ratified").=0D =0D The implementation uses a bounce buffer to first read in the source=0D logical blocks, then issue a write of that bounce buffer. The default=0D maximum number of source logical blocks is 128, translating to 512 KiB=0D= for 4k logical blocks which aligns with the default value of MDTS.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 92323c8c2566b8ea4cdfe8e72a22d2651b0ee6af=0D https://github.com/qemu/qemu/commit/92323c8c2566b8ea4cdfe8e72a22d26= 51b0ee6af=0D Author: Dmitry Fomichev =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix Close Zone=0D =0D Implicitly and Explicitly Open zones can be closed by Close Zone=0D management function. This got broken by a recent commit ("hw/block/nvme:=0D= refactor zone resource management") and now such commands fail with=0D Invalid Zone State Transition status.=0D =0D Modify nvm_zrm_close() function to make Close Zone work correctly.=0D =0D Signed-off-by: Dmitry Fomichev =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 9ae390046164e8b62fbdc48d2c6de8ee6fbd3cdc=0D https://github.com/qemu/qemu/commit/9ae390046164e8b62fbdc48d2c6de8e= e6fbd3cdc=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add missing mor/mar constraint checks=0D =0D Firstly, if zoned.max_active is non-zero, zoned.max_open must be less=0D than or equal to zoned.max_active.=0D =0D Secondly, if only zones.max_active is set, we have to explicitly set=0D zones.max_open or we end up with an invalid MAR/MOR configuration. This=0D= is an artifact of the parameters not being zeroes-based like in the=0D spec.=0D =0D Cc: Dmitry Fomichev =0D Reported-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Dmitry Fomichev =0D =0D =0D Commit: 2c7e2ad243b92f02555498392fb4ce761db8ceb3=0D https://github.com/qemu/qemu/commit/2c7e2ad243b92f02555498392fb4ce7= 61db8ceb3=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: improve invalid zasl value reporting=0D =0D The Zone Append Size Limit (ZASL) must be at least 4096 bytes, so=0D improve the user experience by adding an early parameter check in=0D nvme_check_constraints.=0D =0D When ZASL is still too small due to the host configuring the device for=0D= an even larger page size, convert the trace point in nvme_start_ctrl to=0D= an NVME_GUEST_ERR such that this is logged by QEMU instead of only=0D traced.=0D =0D Reported-by: Corne =0D Cc: Dmitry Fomichev =0D Reviewed-by: Dmitry Fomichev =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 594a2b742b15a81e3bb41938c25ad6520c38e3cc=0D https://github.com/qemu/qemu/commit/594a2b742b15a81e3bb41938c25ad65= 20c38e3cc=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: use locally assigned QEMU IEEE OUI=0D =0D Commit 6eb7a071292a ("hw/block/nvme: change controller pci id") changed=0D= the controller to use a Red Hat assigned PCI Device and Vendor ID, but=0D= did not change the IEEE OUI away from the Intel IEEE OUI.=0D =0D Fix that and use the locally assigned QEMU IEEE OUI instead if the=0D `use-intel-id` parameter is not explicitly set. Also reverse the Intel=0D= IEEE OUI bytes.=0D =0D Signed-off-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: c94973288cd9cfdb0dc23ae84ba256a7345c372e=0D https://github.com/qemu/qemu/commit/c94973288cd9cfdb0dc23ae84ba256a= 7345c372e=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add broadcast nsid support flush command=0D =0D Add support for using the broadcast nsid to issue a flush on all=0D namespaces through a single command.=0D =0D Signed-off-by: Gollu Appalanaidu =0D Reviewed-by: Klaus Jensen =0D Acked-by: Stefan Hajnoczi =0D Acked-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 5b8bb923ccf749d500593d6f1f0a210062285532=0D https://github.com/qemu/qemu/commit/5b8bb923ccf749d500593d6f1f0a210= 062285532=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: document 'mdts' nvme device parameter=0D =0D Document the 'mdts' nvme device parameter.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: be5a1c27a3a5576323e910549071be635645aef1=0D https://github.com/qemu/qemu/commit/be5a1c27a3a5576323e910549071be6= 35645aef1=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/nvme: deduplicate bad mdts trace event=0D =0D If mdts is exceeded, trace it from a single place.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 578d914b263c1ec71e567b90d744075ea3a8ea74=0D https://github.com/qemu/qemu/commit/578d914b263c1ec71e567b90d744075= ea3a8ea74=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/nvme: align zoned.zasl with mdts=0D =0D ZASL (Zone Append Size Limit) is defined exactly like MDTS (Maximum Data=0D= Transfer Size), that is, it is a value in units of the minimum memory=0D page size (CAP.MPSMIN) and is reported as a power of two.=0D =0D The 'mdts' nvme device parameter is specified as in the spec, but the=0D 'zoned.append_size_limit' parameter is specified in bytes. This is=0D suboptimal for a number of reasons:=0D =0D 1. It is just plain confusing wrt. the definition of mdts.=0D 2. There is a lot of complexity involved in validating the value; it=0D= must be a power of two, it should be larger than 4k, if it is zero=0D= we set it internally to mdts, but still report it as zero.=0D 3. While "hw/block/nvme: improve invalid zasl value reporting"=0D slightly improved the handling of the parameter, the validation is=0D= still wrong; it does not depend on CC.MPS, it depends on=0D CAP.MPSMIN. And we are not even checking that it is actually less=0D= than or equal to MDTS, which is kinda the *one* condition it must=0D= satisfy.=0D =0D Fix this by defining zasl exactly like mdts and checking the one thing=0D= that it must satisfy (that it is less than or equal to mdts). Also,=0D change the default value from 128KiB to 0 (aka, whatever mdts is).=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 8c4d305f31f09064988e7f0a543dc94b7dbff2b2=0D https://github.com/qemu/qemu/commit/8c4d305f31f09064988e7f0a543dc94= b7dbff2b2=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: remove unnecessary endian conversion=0D =0D Remove an unnecessary le_to_cpu conversion in Identify.=0D =0D Signed-off-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D =0D =0D Commit: 49f0eba8b2bdc0c9aeaac620b978da7cb0fa947f=0D https://github.com/qemu/qemu/commit/49f0eba8b2bdc0c9aeaac620b978da7= cb0fa947f=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add identify trace event=0D =0D Add a trace event for the Identify command.=0D =0D Signed-off-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D =0D =0D Commit: f4f872b532a53da7bc734cdb7cb166ec22d617d1=0D https://github.com/qemu/qemu/commit/f4f872b532a53da7bc734cdb7cb166e= c22d617d1=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix potential compilation error=0D =0D assert may be compiled to a noop and we could end up returning an=0D uninitialized status.=0D =0D Fix this by always returning Internal Device Error as a fallback.=0D =0D Note that, as pointed out by Philippe, per commit 262a69f4282 ("osdep.h:=0D= Prohibit disabling assert() in supported builds") this shouldn't be=0D possible. But clean it up so we don't worry about it again.=0D =0D Signed-off-by: Gollu Appalanaidu =0D [k.jensen: split commit]=0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 57331f9355431d86636580edf4847e299c4b3ad7=0D https://github.com/qemu/qemu/commit/57331f9355431d86636580edf4847e2= 99c4b3ad7=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add trace event for zone read check=0D =0D Add a trace event for the offline zone condition when checking zone=0D read.=0D =0D Signed-off-by: Gollu Appalanaidu =0D [k.jensen: split commit]=0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 67ce28a1fdcf73e2c026dbc43bb8fb6dc9a56aed=0D https://github.com/qemu/qemu/commit/67ce28a1fdcf73e2c026dbc43bb8fb6= dc9a56aed=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: report non-mdts command size limit for dsm=0D =0D Dataset Management is not subject to MDTS, but exceeded a certain size=0D= per range causes internal looping. Report this limit (DMRSL) in the NVM=0D= command set specific identify controller data structure.=0D =0D Signed-off-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: ba7b81e769c3d65dc18d1d31b8c9c5b2b0a65cdd=0D https://github.com/qemu/qemu/commit/ba7b81e769c3d65dc18d1d31b8c9c5b= 2b0a65cdd=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: remove redundant len member in compare context=0D =0D The 'len' member of the nvme_compare_ctx struct is redundant since the=0D= same information is available in the 'iov' member.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: d90ba23a846f8c9cd8d238e8391e6be5881cddb4=0D https://github.com/qemu/qemu/commit/d90ba23a846f8c9cd8d238e8391e6be= 5881cddb4=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: remove block accounting for write zeroes=0D =0D A Write Zeroes commands should not be counted in either the 'Data Units=0D= Written' or in 'Host Write Commands' SMART/Health Information Log page.=0D= =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 569dbe19c415865a3b2a1ca806f780d1bd5da2db=0D https://github.com/qemu/qemu/commit/569dbe19c415865a3b2a1ca806f780d= 1bd5da2db=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix strerror printing=0D =0D Fix missing sign inversion.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: f80a1c331ac2fe7428ddd76b1f059642d6a91338=0D https://github.com/qemu/qemu/commit/f80a1c331ac2fe7428ddd76b1f05964= 2d6a91338=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: try to deal with the iov/qsg duality=0D =0D Introduce NvmeSg and try to deal with that pesky qsg/iov duality that=0D haunts all the memory-related functions.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 073d12d99871d0d500f44bd49cb0c45df14cf2c3=0D https://github.com/qemu/qemu/commit/073d12d99871d0d500f44bd49cb0c45= df14cf2c3=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/nvme: remove the req dependency in map functions=0D =0D The PRP and SGL mapping functions does not have any particular need for=0D= the entire NvmeRequest as a parameter. Clean it up.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 81d07f4ff51a2b5249f940975acfb9b0d787d593=0D https://github.com/qemu/qemu/commit/81d07f4ff51a2b5249f940975acfb9b= 0d787d593=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: refactor nvme_dma=0D =0D The nvme_dma function doesn't just do DMA (QEMUSGList-based) memory trans= fers;=0D it also handles QEMUIOVector copies.=0D =0D Introduce the NvmeTxDirection enum and rename to nvme_tx. Remove mapping=0D= of PRPs/SGLs from nvme_tx and instead assert that they have been mapped=0D= previously. This allows more fine-grained use in subsequent patches.=0D =0D Add new (better named) helpers, nvme_{c2h,h2c}, that does both PRP/SGL=0D= mapping and transfer.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 037953b5b299daec4d92253858de32c15dd4e9f4=0D https://github.com/qemu/qemu/commit/037953b5b299daec4d92253858de32c= 15dd4e9f4=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support namespace detach=0D =0D Given that now we have nvme-subsys device supported, we can manage=0D namespace allocated, but not attached: detached. This patch introduced=0D= a parameter for nvme-ns device named 'detached'. This parameter=0D indicates whether the given namespace device is detached from=0D a entire NVMe subsystem('subsys' given case, shared namespace) or a=0D controller('bus' given case, private namespace).=0D =0D - Allocated namespace=0D =0D 1) Shared ns in the subsystem 'subsys0':=0D =0D -device nvme-ns,id=3Dns1,drive=3Dblknvme0,nsid=3D1,subsys=3Dsubsys0,= detached=3Dtrue=0D =0D 2) Private ns for the controller 'nvme0' of the subsystem 'subsys0':=0D= =0D -device nvme-subsys,id=3Dsubsys0=0D -device nvme,serial=3Dfoo,id=3Dnvme0,subsys=3Dsubsys0=0D -device nvme-ns,id=3Dns1,drive=3Dblknvme0,nsid=3D1,bus=3Dnvme0,detac= hed=3Dtrue=0D =0D 3) (Invalid case) Controller 'nvme0' has no subsystem to manage ns:=0D =0D -device nvme,serial=3Dfoo,id=3Dnvme0=0D -device nvme-ns,id=3Dns1,drive=3Dblknvme0,nsid=3D1,bus=3Dnvme0,detac= hed=3Dtrue=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 5215e60600b0bc0a011f4456e0f0a0d9376d9133=0D https://github.com/qemu/qemu/commit/5215e60600b0bc0a011f4456e0f0a0d= 9376d9133=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-subsys.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix namespaces array to 1-based=0D =0D subsys->namespaces array used to be sized to NVME_SUBSYS_MAX_NAMESPACES.=0D= But subsys->namespaces are being accessed with 1-based namespace id=0D which means the very first array entry will always be empty(NULL).=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 92cad003c131c1866580beb4c00e19551652be8d=0D https://github.com/qemu/qemu/commit/92cad003c131c1866580beb4c00e195= 51652be8d=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix allocated namespace list to 256=0D =0D Expand allocated namespace list (subsys->namespaces) to have 256 entries=0D= which is a value lager than at least NVME_MAX_NAMESPACES which is for=0D attached namespace list in a controller.=0D =0D Allocated namespace list should at least larger than attached namespace=0D= list.=0D =0D n->num_namespaces =3D NVME_MAX_NAMESPACES;=0D =0D The above line will set the NN field by id->nn so that the subsystem=0D should also prepare at least this number of namespace list entries.=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 94d8d6d1678156dfc7244beef75c05db52965d60=0D https://github.com/qemu/qemu/commit/94d8d6d1678156dfc7244beef75c05d= b52965d60=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support allocated namespace type=0D =0D >From NVMe spec 1.4b "6.1.5. NSID and Namespace Relationships" defines=0D valid namespace types:=0D =0D - Unallocated: Not exists in the NVMe subsystem=0D - Allocated: Exists in the NVMe subsystem=0D - Inactive: Not attached to the controller=0D - Active: Attached to the controller=0D =0D This patch added support for allocated, but not attached namespace type:=0D= =0D !nvme_ns(n, nsid) && nvme_subsys_ns(n->subsys, nsid)=0D =0D nvme_ns() returns attached namespace instance of the given controller=0D and nvme_subsys_ns() returns allocated namespace instance in the=0D subsystem.=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 1f46660788542ae7f86e18bc4de14bc4b642423d=0D https://github.com/qemu/qemu/commit/1f46660788542ae7f86e18bc4de14bc= 4b642423d=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: refactor nvme_select_ns_iocs=0D =0D This patch has no functional changes. This patch just refactored=0D nvme_select_ns_iocs() to iterate the attached namespaces of the=0D controlller and make it invoke __nvme_select_ns_iocs().=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 645ce1a70cb6bedc85a11edb547db091375dea55=0D https://github.com/qemu/qemu/commit/645ce1a70cb6bedc85a11edb547db09= 1375dea55=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support namespace attachment command=0D =0D This patch supports Namespace Attachment command for the pre-defined=0D nvme-ns device nodes. Of course, attach/detach namespace should only be=0D= supported in case 'subsys' is given. This is because if we detach a=0D namespace from a controller, somebody needs to manage the detached, but=0D= allocated namespace in the NVMe subsystem.=0D =0D As command effect for the namespace attachment command is registered,=0D the host will be notified that namespace inventory is changed so that=0D host will rescan the namespace inventory after this command. For=0D example, kernel driver manages this command effect via passthru IOCTL.=0D= =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D [k.jensen: rebased for dma refactor]=0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: f432fdfa1215bc3a00468b2e711176be279b0fd2=0D https://github.com/qemu/qemu/commit/f432fdfa1215bc3a00468b2e711176b= e279b0fd2=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support changed namespace asynchronous event=0D =0D If namespace inventory is changed due to some reasons (e.g., namespace=0D= attachment/detachment), controller can send out event notifier to the=0D host to manage namespaces.=0D =0D This patch sends out the AEN to the host after either attach or detach=0D= namespaces from controllers. To support clear of the event from the=0D controller, this patch also implemented Get Log Page command for Changed=0D= Namespace List log type. To return namespace id list through the=0D command, when namespace inventory is updated, id is added to the=0D per-controller list (changed_ns_list).=0D =0D To indicate the support of this async event, this patch set=0D OAES(Optional Asynchronous Events Supported) in Identify Controller data=0D= structure.=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 23fb7dfeca17c55e4329ca98459d33fc204c1f59=0D https://github.com/qemu/qemu/commit/23fb7dfeca17c55e4329ca98459d33f= c204c1f59=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support Identify NS Attached Controller List=0D =0D Support Identify command for Namespace attached controller list. This=0D= command handler will traverse the controller instances in the given=0D subsystem to figure out whether the specified nsid is attached to the=0D controllers or not.=0D =0D The 4096bytes Identify data will return with the first entry (16bits)=0D indicating the number of the controller id entries. So, the data can=0D hold up to 2047 entries for the controller ids.=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D [k.jensen: rebased for dma refactor]=0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: d689ecad073e0289afa8ca863e45879d719e5c21=0D https://github.com/qemu/qemu/commit/d689ecad073e0289afa8ca863e45879= d719e5c21=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/block/meson.build=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D A hw/block/nvme-subsys.c=0D A hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request'= into staging=0D =0D hw/block/nvme updates=0D =0D * NVMe subsystem support (`-device nvme-subsys`) (Minwoo Im)=0D * Namespace (De|At)tachment support (Minwoo Im)=0D * Simple Copy command support (Klaus Jensen)=0D * Flush broadcast support (Gollu Appalanaidu)=0D * QEMUIOVector/QEMUSGList duality refactoring (Klaus Jensen)=0D =0D plus various fixes from Minwoo, Gollu, Dmitry and me.=0D =0D v2:=0D - add `nqn` nvme-subsys device parameter instead of using `id`.=0D (Paolo)=0D =0D # gpg: Signature made Tue 09 Mar 2021 11:44:17 GMT=0D # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0= DE9=0D # gpg: Good signature from "Klaus Jensen " [unknown]=0D= # gpg: aka "Klaus Jensen " [unknown= ]=0D # gpg: WARNING: This key is not certified with a trusted signature!=0D # gpg: There is no indication that the signature belongs to the = owner.=0D # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D = A838=0D # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F = 0DE9=0D =0D * remotes/nvme/tags/nvme-next-pull-request: (38 commits)=0D hw/block/nvme: support Identify NS Attached Controller List=0D hw/block/nvme: support changed namespace asynchronous event=0D hw/block/nvme: support namespace attachment command=0D hw/block/nvme: refactor nvme_select_ns_iocs=0D hw/block/nvme: support allocated namespace type=0D hw/block/nvme: fix allocated namespace list to 256=0D hw/block/nvme: fix namespaces array to 1-based=0D hw/block/nvme: support namespace detach=0D hw/block/nvme: refactor nvme_dma=0D hw/block/nvme: remove the req dependency in map functions=0D hw/block/nvme: try to deal with the iov/qsg duality=0D hw/block/nvme: fix strerror printing=0D hw/block/nvme: remove block accounting for write zeroes=0D hw/block/nvme: remove redundant len member in compare context=0D hw/block/nvme: report non-mdts command size limit for dsm=0D hw/block/nvme: add trace event for zone read check=0D hw/block/nvme: fix potential compilation error=0D hw/block/nvme: add identify trace event=0D hw/block/nvme: remove unnecessary endian conversion=0D hw/block/nvme: align zoned.zasl with mdts=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/821e7ed167f1...d689ecad073e= =0D From MAILER-DAEMON Thu Mar 11 04:52:15 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKHzL-00068M-OV for mharc-qemu-commits@gnu.org; Thu, 11 Mar 2021 04:52:15 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:32866) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKHzK-00065s-45 for qemu-commits@nongnu.org; Thu, 11 Mar 2021 04:52:14 -0500 Received: from out-22.smtp.github.com ([192.30.252.205]:49081 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKHzF-0003xY-70 for qemu-commits@nongnu.org; Thu, 11 Mar 2021 04:52:13 -0500 Received: from github.com (hubbernetes-node-2b38bf7.ac4-iad.github.net [10.52.210.51]) by smtp.github.com (Postfix) with ESMTPA id 6FB1E560401 for ; Thu, 11 Mar 2021 01:52:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615456327; bh=ujtbwbtlUXiZImfIcfhuv+96L/MtGqlqCBbxjoieDmw=; h=Date:From:To:Subject:From; b=fatNB4MSDfhsfQHfGCJKGYHRmL11vgE2R+QjvCDPgHqWfuvJt4WeMmxURkoKyC3dD MKbvLz35CeUb6u/C8ebzwAsrQzR/coU1N3rxLls0LD1UaimMeCm++ov5OI+/Ep4OaS uQqh1xhfK6a8r42C6SUnr06U5sR8tEsO9cSWkoO8= Date: Thu, 11 Mar 2021 01:52:07 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.243, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] eb2e89: hw/block/nvme: introduce nvme-subsys device X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Mar 2021 09:52:14 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: eb2e89747eca57fb0028001b28b3c4e0c1540e3a=0D https://github.com/qemu/qemu/commit/eb2e89747eca57fb0028001b28b3c4e= 0c1540e3a=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/meson.build=0D A hw/block/nvme-subsys.c=0D A hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: introduce nvme-subsys device=0D =0D To support multi-path in QEMU NVMe device model, We need to have NVMe=0D subsystem hierarchy to map controllers and namespaces to a NVMe=0D subsystem.=0D =0D This patch introduced a simple nvme-subsys device model. The subsystem=0D= will be prepared with subsystem NQN with provided in=0D nvme-subsys device:=0D =0D ex) -device nvme-subsys,id=3Dsubsys0: nqn.2019-08.org.qemu:subsys0=0D =0D Signed-off-by: Minwoo Im =0D Tested-by: Klaus Jensen =0D Reviewed-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D [k.jensen: added 'nqn' device parameter per request]=0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 982ed66bb2e89bdb029b186232946fe2e7c217e1=0D https://github.com/qemu/qemu/commit/982ed66bb2e89bdb029b186232946fe= 2e7c217e1=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support to map controller to a subsystem=0D =0D nvme controller(nvme) can be mapped to a NVMe subsystem(nvme-subsys).=0D This patch maps a controller to a subsystem by adding a parameter=0D 'subsys' to the nvme device.=0D =0D To map a controller to a subsystem, we need to put nvme-subsys first and=0D= then maps the subsystem to the controller:=0D =0D -device nvme-subsys,id=3Dsubsys0=0D -device nvme,serial=3Dfoo,id=3Dnvme0,subsys=3Dsubsys0=0D =0D If 'subsys' property is not given to the nvme controller, then subsystem=0D= NQN will be created with serial (e.g., 'foo' in above example),=0D Otherwise, it will be based on subsys id (e.g., 'subsys0' in above=0D example).=0D =0D Signed-off-by: Minwoo Im =0D Tested-by: Klaus Jensen =0D Reviewed-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 66b7e9bed0aee4342aa7cb824b8c46a42cacf7e2=0D https://github.com/qemu/qemu/commit/66b7e9bed0aee4342aa7cb824b8c46a= 42cacf7e2=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add CMIC enum value for Identify Controller=0D =0D Added Controller Multi-path I/O and Namespace Sharing Capabilities=0D (CMIC) field to support multi-controller in the following patches.=0D =0D This field is in Identify Controller data structure in [76].=0D =0D Signed-off-by: Minwoo Im =0D Tested-by: Klaus Jensen =0D Reviewed-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: e36a261d4bf7057a8ffee336422210b58c661a21=0D https://github.com/qemu/qemu/commit/e36a261d4bf7057a8ffee336422210b= 58c661a21=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-subsys.c=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support for multi-controller in subsystem=0D =0D We have nvme-subsys and nvme devices mapped together. To support=0D multi-controller scheme to this setup, controller identifier(id) has to=0D= be managed. Earlier, cntlid(controller id) used to be always 0 because=0D= we didn't have any subsystem scheme that controller id matters.=0D =0D This patch introduced 'cntlid' attribute to the nvme controller=0D instance(NvmeCtrl) and make it allocated by the nvme-subsys device=0D mapped to the controller. If nvme-subsys is not given to the=0D controller, then it will always be 0 as it was.=0D =0D Added 'ctrls' array in the nvme-subsys instance to manage attached=0D controllers to the subsystem with a limit(32). This patch didn't take=0D= list for the controllers to make it seamless with nvme-ns device.=0D =0D Signed-off-by: Minwoo Im =0D Tested-by: Klaus Jensen =0D Reviewed-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: adc36b8d21204c00643016d8766a5214e3d54b5b=0D https://github.com/qemu/qemu/commit/adc36b8d21204c00643016d8766a521= 4e3d54b5b=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add NMIC enum value for Identify Namespace=0D =0D Added Namespace Multi-path I/O and Namespace Sharing Capabilities (NMIC)=0D= field to support shared namespace from controller(s).=0D =0D This field is in Identify Namespace data structure in [30].=0D =0D Signed-off-by: Minwoo Im =0D Tested-by: Klaus Jensen =0D Reviewed-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: e570768566b36f0a0471f65a40b47a6471ef0e24=0D https://github.com/qemu/qemu/commit/e570768566b36f0a0471f65a40b47a6= 471ef0e24=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme-subsys.c=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support for shared namespace in subsystem=0D =0D nvme-ns device is registered to a nvme controller device during the=0D initialization in nvme_register_namespace() in case that 'bus' property=0D= is given which means it's mapped to a single controller.=0D =0D This patch introduced a new property 'subsys' just like the controller=0D= device instance did to map a namespace to a NVMe subsystem.=0D =0D If 'subsys' property is given to the nvme-ns device, it will belong to=0D= the specified subsystem and will be attached to all controllers in that=0D= subsystem by enabling shared namespace capability in NMIC(Namespace=0D Multi-path I/O and Namespace Capabilities) in Identify Namespace.=0D =0D Usage:=0D =0D -device nvme-subsys,id=3Dsubsys0=0D -device nvme,serial=3Dfoo,id=3Dnvme0,subsys=3Dsubsys0=0D -device nvme,serial=3Dbar,id=3Dnvme1,subsys=3Dsubsys0=0D -device nvme,serial=3Dbaz,id=3Dnvme2,subsys=3Dsubsys0=0D -device nvme-ns,id=3Dns1,drive=3D,nsid=3D1,subsys=3Dsubsys0 # Sha= red=0D -device nvme-ns,id=3Dns2,drive=3D,nsid=3D2,bus=3Dnvme2 # Non= -shared=0D =0D In the above example, 'ns1' will be shared to 'nvme0' and 'nvme1' in=0D= the same subsystem. On the other hand, 'ns2' will be attached to the=0D= 'nvme2' only as a private namespace in that subsystem.=0D =0D All the namespace with 'subsys' parameter will attach all controllers in=0D= the subsystem to the namespace by default.=0D =0D Signed-off-by: Minwoo Im =0D Tested-by: Klaus Jensen =0D Reviewed-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: eda688ee2403c1efc48f420590623c885aec3393=0D https://github.com/qemu/qemu/commit/eda688ee2403c1efc48f420590623c8= 85aec3393=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: remove unused parameter in check zone write=0D =0D Remove the unused NvmeCtrl parameter in nvme_check_zone_write.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 975b64665048e8e283a3c9cad9808da0a014e283=0D https://github.com/qemu/qemu/commit/975b64665048e8e283a3c9cad9808da= 0a014e283=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: refactor zone resource management=0D =0D Zone transition handling and resource management is open coded (and=0D semi-duplicated in the case of open, close and finish).=0D =0D In preparation for Simple Copy command support (which also needs to open=0D= zones for writing), consolidate into a set of 'nvme_zrm' functions and=0D= in the process fix a bug with the controller not closing an open zone to=0D= allow another zone to be explicitly opened.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: b0a79429d964ad2d8c1c41fdc18b3ae5def41ff8=0D https://github.com/qemu/qemu/commit/b0a79429d964ad2d8c1c41fdc18b3ae= 5def41ff8=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: pull write pointer advancement to separate function=0D =0D In preparation for Simple Copy, pull write pointer advancement into a=0D separate function that is independent off an NvmeRequest.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 3862efff316c1d02b41d1362f97dfba812050e53=0D https://github.com/qemu/qemu/commit/3862efff316c1d02b41d1362f97dfba= 812050e53=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D nvme: updated shared header for copy command=0D =0D Add new data structures and types for the Simple Copy command.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D Acked-by: Stefan Hajnoczi =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: e4e430b3d6baa1c908ba71ca37aad87edac98804=0D https://github.com/qemu/qemu/commit/e4e430b3d6baa1c908ba71ca37aad87= edac98804=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add simple copy command=0D =0D Add support for TP 4065a ("Simple Copy Command"), v2020.05.04=0D ("Ratified").=0D =0D The implementation uses a bounce buffer to first read in the source=0D logical blocks, then issue a write of that bounce buffer. The default=0D maximum number of source logical blocks is 128, translating to 512 KiB=0D= for 4k logical blocks which aligns with the default value of MDTS.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 92323c8c2566b8ea4cdfe8e72a22d2651b0ee6af=0D https://github.com/qemu/qemu/commit/92323c8c2566b8ea4cdfe8e72a22d26= 51b0ee6af=0D Author: Dmitry Fomichev =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix Close Zone=0D =0D Implicitly and Explicitly Open zones can be closed by Close Zone=0D management function. This got broken by a recent commit ("hw/block/nvme:=0D= refactor zone resource management") and now such commands fail with=0D Invalid Zone State Transition status.=0D =0D Modify nvm_zrm_close() function to make Close Zone work correctly.=0D =0D Signed-off-by: Dmitry Fomichev =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 9ae390046164e8b62fbdc48d2c6de8ee6fbd3cdc=0D https://github.com/qemu/qemu/commit/9ae390046164e8b62fbdc48d2c6de8e= e6fbd3cdc=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add missing mor/mar constraint checks=0D =0D Firstly, if zoned.max_active is non-zero, zoned.max_open must be less=0D than or equal to zoned.max_active.=0D =0D Secondly, if only zones.max_active is set, we have to explicitly set=0D zones.max_open or we end up with an invalid MAR/MOR configuration. This=0D= is an artifact of the parameters not being zeroes-based like in the=0D spec.=0D =0D Cc: Dmitry Fomichev =0D Reported-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Dmitry Fomichev =0D =0D =0D Commit: 2c7e2ad243b92f02555498392fb4ce761db8ceb3=0D https://github.com/qemu/qemu/commit/2c7e2ad243b92f02555498392fb4ce7= 61db8ceb3=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: improve invalid zasl value reporting=0D =0D The Zone Append Size Limit (ZASL) must be at least 4096 bytes, so=0D improve the user experience by adding an early parameter check in=0D nvme_check_constraints.=0D =0D When ZASL is still too small due to the host configuring the device for=0D= an even larger page size, convert the trace point in nvme_start_ctrl to=0D= an NVME_GUEST_ERR such that this is logged by QEMU instead of only=0D traced.=0D =0D Reported-by: Corne =0D Cc: Dmitry Fomichev =0D Reviewed-by: Dmitry Fomichev =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 594a2b742b15a81e3bb41938c25ad6520c38e3cc=0D https://github.com/qemu/qemu/commit/594a2b742b15a81e3bb41938c25ad65= 20c38e3cc=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: use locally assigned QEMU IEEE OUI=0D =0D Commit 6eb7a071292a ("hw/block/nvme: change controller pci id") changed=0D= the controller to use a Red Hat assigned PCI Device and Vendor ID, but=0D= did not change the IEEE OUI away from the Intel IEEE OUI.=0D =0D Fix that and use the locally assigned QEMU IEEE OUI instead if the=0D `use-intel-id` parameter is not explicitly set. Also reverse the Intel=0D= IEEE OUI bytes.=0D =0D Signed-off-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: c94973288cd9cfdb0dc23ae84ba256a7345c372e=0D https://github.com/qemu/qemu/commit/c94973288cd9cfdb0dc23ae84ba256a= 7345c372e=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add broadcast nsid support flush command=0D =0D Add support for using the broadcast nsid to issue a flush on all=0D namespaces through a single command.=0D =0D Signed-off-by: Gollu Appalanaidu =0D Reviewed-by: Klaus Jensen =0D Acked-by: Stefan Hajnoczi =0D Acked-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 5b8bb923ccf749d500593d6f1f0a210062285532=0D https://github.com/qemu/qemu/commit/5b8bb923ccf749d500593d6f1f0a210= 062285532=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: document 'mdts' nvme device parameter=0D =0D Document the 'mdts' nvme device parameter.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: be5a1c27a3a5576323e910549071be635645aef1=0D https://github.com/qemu/qemu/commit/be5a1c27a3a5576323e910549071be6= 35645aef1=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/nvme: deduplicate bad mdts trace event=0D =0D If mdts is exceeded, trace it from a single place.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 578d914b263c1ec71e567b90d744075ea3a8ea74=0D https://github.com/qemu/qemu/commit/578d914b263c1ec71e567b90d744075= ea3a8ea74=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/nvme: align zoned.zasl with mdts=0D =0D ZASL (Zone Append Size Limit) is defined exactly like MDTS (Maximum Data=0D= Transfer Size), that is, it is a value in units of the minimum memory=0D page size (CAP.MPSMIN) and is reported as a power of two.=0D =0D The 'mdts' nvme device parameter is specified as in the spec, but the=0D 'zoned.append_size_limit' parameter is specified in bytes. This is=0D suboptimal for a number of reasons:=0D =0D 1. It is just plain confusing wrt. the definition of mdts.=0D 2. There is a lot of complexity involved in validating the value; it=0D= must be a power of two, it should be larger than 4k, if it is zero=0D= we set it internally to mdts, but still report it as zero.=0D 3. While "hw/block/nvme: improve invalid zasl value reporting"=0D slightly improved the handling of the parameter, the validation is=0D= still wrong; it does not depend on CC.MPS, it depends on=0D CAP.MPSMIN. And we are not even checking that it is actually less=0D= than or equal to MDTS, which is kinda the *one* condition it must=0D= satisfy.=0D =0D Fix this by defining zasl exactly like mdts and checking the one thing=0D= that it must satisfy (that it is less than or equal to mdts). Also,=0D change the default value from 128KiB to 0 (aka, whatever mdts is).=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 8c4d305f31f09064988e7f0a543dc94b7dbff2b2=0D https://github.com/qemu/qemu/commit/8c4d305f31f09064988e7f0a543dc94= b7dbff2b2=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: remove unnecessary endian conversion=0D =0D Remove an unnecessary le_to_cpu conversion in Identify.=0D =0D Signed-off-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D =0D =0D Commit: 49f0eba8b2bdc0c9aeaac620b978da7cb0fa947f=0D https://github.com/qemu/qemu/commit/49f0eba8b2bdc0c9aeaac620b978da7= cb0fa947f=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add identify trace event=0D =0D Add a trace event for the Identify command.=0D =0D Signed-off-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D =0D =0D Commit: f4f872b532a53da7bc734cdb7cb166ec22d617d1=0D https://github.com/qemu/qemu/commit/f4f872b532a53da7bc734cdb7cb166e= c22d617d1=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix potential compilation error=0D =0D assert may be compiled to a noop and we could end up returning an=0D uninitialized status.=0D =0D Fix this by always returning Internal Device Error as a fallback.=0D =0D Note that, as pointed out by Philippe, per commit 262a69f4282 ("osdep.h:=0D= Prohibit disabling assert() in supported builds") this shouldn't be=0D possible. But clean it up so we don't worry about it again.=0D =0D Signed-off-by: Gollu Appalanaidu =0D [k.jensen: split commit]=0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 57331f9355431d86636580edf4847e299c4b3ad7=0D https://github.com/qemu/qemu/commit/57331f9355431d86636580edf4847e2= 99c4b3ad7=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add trace event for zone read check=0D =0D Add a trace event for the offline zone condition when checking zone=0D read.=0D =0D Signed-off-by: Gollu Appalanaidu =0D [k.jensen: split commit]=0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 67ce28a1fdcf73e2c026dbc43bb8fb6dc9a56aed=0D https://github.com/qemu/qemu/commit/67ce28a1fdcf73e2c026dbc43bb8fb6= dc9a56aed=0D Author: Gollu Appalanaidu =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: report non-mdts command size limit for dsm=0D =0D Dataset Management is not subject to MDTS, but exceeded a certain size=0D= per range causes internal looping. Report this limit (DMRSL) in the NVM=0D= command set specific identify controller data structure.=0D =0D Signed-off-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: ba7b81e769c3d65dc18d1d31b8c9c5b2b0a65cdd=0D https://github.com/qemu/qemu/commit/ba7b81e769c3d65dc18d1d31b8c9c5b= 2b0a65cdd=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: remove redundant len member in compare context=0D =0D The 'len' member of the nvme_compare_ctx struct is redundant since the=0D= same information is available in the 'iov' member.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: d90ba23a846f8c9cd8d238e8391e6be5881cddb4=0D https://github.com/qemu/qemu/commit/d90ba23a846f8c9cd8d238e8391e6be= 5881cddb4=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: remove block accounting for write zeroes=0D =0D A Write Zeroes commands should not be counted in either the 'Data Units=0D= Written' or in 'Host Write Commands' SMART/Health Information Log page.=0D= =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 569dbe19c415865a3b2a1ca806f780d1bd5da2db=0D https://github.com/qemu/qemu/commit/569dbe19c415865a3b2a1ca806f780d= 1bd5da2db=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix strerror printing=0D =0D Fix missing sign inversion.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: f80a1c331ac2fe7428ddd76b1f059642d6a91338=0D https://github.com/qemu/qemu/commit/f80a1c331ac2fe7428ddd76b1f05964= 2d6a91338=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: try to deal with the iov/qsg duality=0D =0D Introduce NvmeSg and try to deal with that pesky qsg/iov duality that=0D haunts all the memory-related functions.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 073d12d99871d0d500f44bd49cb0c45df14cf2c3=0D https://github.com/qemu/qemu/commit/073d12d99871d0d500f44bd49cb0c45= df14cf2c3=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/nvme: remove the req dependency in map functions=0D =0D The PRP and SGL mapping functions does not have any particular need for=0D= the entire NvmeRequest as a parameter. Clean it up.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 81d07f4ff51a2b5249f940975acfb9b0d787d593=0D https://github.com/qemu/qemu/commit/81d07f4ff51a2b5249f940975acfb9b= 0d787d593=0D Author: Klaus Jensen =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: refactor nvme_dma=0D =0D The nvme_dma function doesn't just do DMA (QEMUSGList-based) memory trans= fers;=0D it also handles QEMUIOVector copies.=0D =0D Introduce the NvmeTxDirection enum and rename to nvme_tx. Remove mapping=0D= of PRPs/SGLs from nvme_tx and instead assert that they have been mapped=0D= previously. This allows more fine-grained use in subsequent patches.=0D =0D Add new (better named) helpers, nvme_{c2h,h2c}, that does both PRP/SGL=0D= mapping and transfer.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 037953b5b299daec4d92253858de32c15dd4e9f4=0D https://github.com/qemu/qemu/commit/037953b5b299daec4d92253858de32c= 15dd4e9f4=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support namespace detach=0D =0D Given that now we have nvme-subsys device supported, we can manage=0D namespace allocated, but not attached: detached. This patch introduced=0D= a parameter for nvme-ns device named 'detached'. This parameter=0D indicates whether the given namespace device is detached from=0D a entire NVMe subsystem('subsys' given case, shared namespace) or a=0D controller('bus' given case, private namespace).=0D =0D - Allocated namespace=0D =0D 1) Shared ns in the subsystem 'subsys0':=0D =0D -device nvme-ns,id=3Dns1,drive=3Dblknvme0,nsid=3D1,subsys=3Dsubsys0,= detached=3Dtrue=0D =0D 2) Private ns for the controller 'nvme0' of the subsystem 'subsys0':=0D= =0D -device nvme-subsys,id=3Dsubsys0=0D -device nvme,serial=3Dfoo,id=3Dnvme0,subsys=3Dsubsys0=0D -device nvme-ns,id=3Dns1,drive=3Dblknvme0,nsid=3D1,bus=3Dnvme0,detac= hed=3Dtrue=0D =0D 3) (Invalid case) Controller 'nvme0' has no subsystem to manage ns:=0D =0D -device nvme,serial=3Dfoo,id=3Dnvme0=0D -device nvme-ns,id=3Dns1,drive=3Dblknvme0,nsid=3D1,bus=3Dnvme0,detac= hed=3Dtrue=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 5215e60600b0bc0a011f4456e0f0a0d9376d9133=0D https://github.com/qemu/qemu/commit/5215e60600b0bc0a011f4456e0f0a0d= 9376d9133=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-subsys.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix namespaces array to 1-based=0D =0D subsys->namespaces array used to be sized to NVME_SUBSYS_MAX_NAMESPACES.=0D= But subsys->namespaces are being accessed with 1-based namespace id=0D which means the very first array entry will always be empty(NULL).=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 92cad003c131c1866580beb4c00e19551652be8d=0D https://github.com/qemu/qemu/commit/92cad003c131c1866580beb4c00e195= 51652be8d=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix allocated namespace list to 256=0D =0D Expand allocated namespace list (subsys->namespaces) to have 256 entries=0D= which is a value lager than at least NVME_MAX_NAMESPACES which is for=0D attached namespace list in a controller.=0D =0D Allocated namespace list should at least larger than attached namespace=0D= list.=0D =0D n->num_namespaces =3D NVME_MAX_NAMESPACES;=0D =0D The above line will set the NN field by id->nn so that the subsystem=0D should also prepare at least this number of namespace list entries.=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 94d8d6d1678156dfc7244beef75c05db52965d60=0D https://github.com/qemu/qemu/commit/94d8d6d1678156dfc7244beef75c05d= b52965d60=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support allocated namespace type=0D =0D >From NVMe spec 1.4b "6.1.5. NSID and Namespace Relationships" defines=0D valid namespace types:=0D =0D - Unallocated: Not exists in the NVMe subsystem=0D - Allocated: Exists in the NVMe subsystem=0D - Inactive: Not attached to the controller=0D - Active: Attached to the controller=0D =0D This patch added support for allocated, but not attached namespace type:=0D= =0D !nvme_ns(n, nsid) && nvme_subsys_ns(n->subsys, nsid)=0D =0D nvme_ns() returns attached namespace instance of the given controller=0D and nvme_subsys_ns() returns allocated namespace instance in the=0D subsystem.=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 1f46660788542ae7f86e18bc4de14bc4b642423d=0D https://github.com/qemu/qemu/commit/1f46660788542ae7f86e18bc4de14bc= 4b642423d=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: refactor nvme_select_ns_iocs=0D =0D This patch has no functional changes. This patch just refactored=0D nvme_select_ns_iocs() to iterate the attached namespaces of the=0D controlller and make it invoke __nvme_select_ns_iocs().=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 645ce1a70cb6bedc85a11edb547db091375dea55=0D https://github.com/qemu/qemu/commit/645ce1a70cb6bedc85a11edb547db09= 1375dea55=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support namespace attachment command=0D =0D This patch supports Namespace Attachment command for the pre-defined=0D nvme-ns device nodes. Of course, attach/detach namespace should only be=0D= supported in case 'subsys' is given. This is because if we detach a=0D namespace from a controller, somebody needs to manage the detached, but=0D= allocated namespace in the NVMe subsystem.=0D =0D As command effect for the namespace attachment command is registered,=0D the host will be notified that namespace inventory is changed so that=0D host will rescan the namespace inventory after this command. For=0D example, kernel driver manages this command effect via passthru IOCTL.=0D= =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D [k.jensen: rebased for dma refactor]=0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: f432fdfa1215bc3a00468b2e711176be279b0fd2=0D https://github.com/qemu/qemu/commit/f432fdfa1215bc3a00468b2e711176b= e279b0fd2=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support changed namespace asynchronous event=0D =0D If namespace inventory is changed due to some reasons (e.g., namespace=0D= attachment/detachment), controller can send out event notifier to the=0D host to manage namespaces.=0D =0D This patch sends out the AEN to the host after either attach or detach=0D= namespaces from controllers. To support clear of the event from the=0D controller, this patch also implemented Get Log Page command for Changed=0D= Namespace List log type. To return namespace id list through the=0D command, when namespace inventory is updated, id is added to the=0D per-controller list (changed_ns_list).=0D =0D To indicate the support of this async event, this patch set=0D OAES(Optional Asynchronous Events Supported) in Identify Controller data=0D= structure.=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 23fb7dfeca17c55e4329ca98459d33fc204c1f59=0D https://github.com/qemu/qemu/commit/23fb7dfeca17c55e4329ca98459d33f= c204c1f59=0D Author: Minwoo Im =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support Identify NS Attached Controller List=0D =0D Support Identify command for Namespace attached controller list. This=0D= command handler will traverse the controller instances in the given=0D subsystem to figure out whether the specified nsid is attached to the=0D controllers or not.=0D =0D The 4096bytes Identify data will return with the first entry (16bits)=0D indicating the number of the controller id entries. So, the data can=0D hold up to 2047 entries for the controller ids.=0D =0D Signed-off-by: Minwoo Im =0D Reviewed-by: Keith Busch =0D Reviewed-by: Klaus Jensen =0D Tested-by: Klaus Jensen =0D [k.jensen: rebased for dma refactor]=0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: d689ecad073e0289afa8ca863e45879d719e5c21=0D https://github.com/qemu/qemu/commit/d689ecad073e0289afa8ca863e45879= d719e5c21=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/block/meson.build=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D A hw/block/nvme-subsys.c=0D A hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request'= into staging=0D =0D hw/block/nvme updates=0D =0D * NVMe subsystem support (`-device nvme-subsys`) (Minwoo Im)=0D * Namespace (De|At)tachment support (Minwoo Im)=0D * Simple Copy command support (Klaus Jensen)=0D * Flush broadcast support (Gollu Appalanaidu)=0D * QEMUIOVector/QEMUSGList duality refactoring (Klaus Jensen)=0D =0D plus various fixes from Minwoo, Gollu, Dmitry and me.=0D =0D v2:=0D - add `nqn` nvme-subsys device parameter instead of using `id`.=0D (Paolo)=0D =0D # gpg: Signature made Tue 09 Mar 2021 11:44:17 GMT=0D # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0= DE9=0D # gpg: Good signature from "Klaus Jensen " [unknown]=0D= # gpg: aka "Klaus Jensen " [unknown= ]=0D # gpg: WARNING: This key is not certified with a trusted signature!=0D # gpg: There is no indication that the signature belongs to the = owner.=0D # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D = A838=0D # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F = 0DE9=0D =0D * remotes/nvme/tags/nvme-next-pull-request: (38 commits)=0D hw/block/nvme: support Identify NS Attached Controller List=0D hw/block/nvme: support changed namespace asynchronous event=0D hw/block/nvme: support namespace attachment command=0D hw/block/nvme: refactor nvme_select_ns_iocs=0D hw/block/nvme: support allocated namespace type=0D hw/block/nvme: fix allocated namespace list to 256=0D hw/block/nvme: fix namespaces array to 1-based=0D hw/block/nvme: support namespace detach=0D hw/block/nvme: refactor nvme_dma=0D hw/block/nvme: remove the req dependency in map functions=0D hw/block/nvme: try to deal with the iov/qsg duality=0D hw/block/nvme: fix strerror printing=0D hw/block/nvme: remove block accounting for write zeroes=0D hw/block/nvme: remove redundant len member in compare context=0D hw/block/nvme: report non-mdts command size limit for dsm=0D hw/block/nvme: add trace event for zone read check=0D hw/block/nvme: fix potential compilation error=0D hw/block/nvme: add identify trace event=0D hw/block/nvme: remove unnecessary endian conversion=0D hw/block/nvme: align zoned.zasl with mdts=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/821e7ed167f1...d689ecad073e= =0D From MAILER-DAEMON Thu Mar 11 06:19:07 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKJLP-0007fU-Fb for mharc-qemu-commits@gnu.org; Thu, 11 Mar 2021 06:19:07 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:59968) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKJLO-0007dv-UB for qemu-commits@nongnu.org; Thu, 11 Mar 2021 06:19:06 -0500 Received: from out-18.smtp.github.com ([192.30.252.201]:46631 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKJLM-0000ob-73 for qemu-commits@nongnu.org; Thu, 11 Mar 2021 06:19:06 -0500 Received: from github.com (hubbernetes-node-4f81586.va3-iad.github.net [10.48.103.33]) by smtp.github.com (Postfix) with ESMTPA id 8BDD7340258 for ; Thu, 11 Mar 2021 03:19:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615461543; bh=d5b5huo9kkT4rxOHgzaTtjFwYVKnWYt/bx2i+yvNaTw=; h=Date:From:To:Subject:From; b=XZmt+gZirgwLej0HKXbbxzzG6LCj8ncusSIEoStwjovJyabpFao1rf2nl9JLZSAn6 97Kley4ctTlKo+Ibi85bwTNxZjGjaPAIfnpniRF4ApqruauxK9ThtNojRpclPr+pd+ FwZxwxKoKJKxE//SRIPZ7kFuFKiiMDg12YUhlFq8= Date: Thu, 11 Mar 2021 03:19:03 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.243, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] a4ea92: arm/ast2600: Fix SMP booting with -kernel X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Mar 2021 11:19:07 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: a4ea92013d265f636d71b58408b67dbecd679d1d=0D https://github.com/qemu/qemu/commit/a4ea92013d265f636d71b58408b67db= ecd679d1d=0D Author: Joel Stanley =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/aspeed_ast2600.c=0D =0D Log Message:=0D -----------=0D arm/ast2600: Fix SMP booting with -kernel=0D =0D The ast2600 machines do not have PSCI firmware, so this property should=0D= have never been set. Removing this node fixes SMP booting Linux kernels=0D= that have PSCI enabled, as Linux fails to find PSCI in the device tree=0D= and falls back to the soc-specific method for enabling secondary CPUs.=0D= =0D The comment is out of date as Qemu has supported -kernel booting since=0D= 9bb6d14081ce ("aspeed: Add boot stub for smp booting"), in v5.1.=0D =0D Fixes: f25c0ae1079d ("aspeed/soc: Add AST2600 support")=0D Signed-off-by: Joel Stanley =0D Reviewed-by: C=C3=A9dric Le Goater =0D Tested-by: C=C3=A9dric Le Goater =0D Message-Id: <20210303010505.635621-1-joel@jms.id.au>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: d029c7293140610f96b0786b88e6f9cdf1106adc=0D https://github.com/qemu/qemu/commit/d029c7293140610f96b0786b88e6f9c= df1106adc=0D Author: C=C3=A9dric Le Goater =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/aspeed.rst=0D =0D Log Message:=0D -----------=0D hw/arm/aspeed: Fix location of firmware images in documentation=0D =0D Firmware images can be found on the OpenBMC jenkins site and on the=0D OpenBMC GitHub release page.=0D =0D Signed-off-by: C=C3=A9dric Le Goater =0D Reviewed-by: Joel Stanley =0D Message-Id: <20210303072743.1551329-1-clg@kaod.org>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: 957ad79f7316816433f772b1a9ebdfe0a3818cb2=0D https://github.com/qemu/qemu/commit/957ad79f7316816433f772b1a9ebdfe= 0a3818cb2=0D Author: Andrew Jeffery =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/aspeed_ast2600.c=0D =0D Log Message:=0D -----------=0D hw/arm: ast2600: Force a multiple of 32 of IRQs for the GIC=0D =0D This appears to be a requirement of the GIC model. The AST2600 allocates=0D= 197 GIC IRQs, which we will adjust shortly.=0D =0D Signed-off-by: Andrew Jeffery =0D Reviewed-by: C=C3=A9dric Le Goater =0D Message-Id: <20210302014317.915120-2-andrew@aj.id.au>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: b151de69f6478a05b27f4be2eb4a906f7b5b8cfa=0D https://github.com/qemu/qemu/commit/b151de69f6478a05b27f4be2eb4a906= f7b5b8cfa=0D Author: Andrew Jeffery =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/aspeed_ast2600.c=0D =0D Log Message:=0D -----------=0D hw/arm: ast2600: Set AST2600_MAX_IRQ to value from datasheet=0D =0D The datasheet says we have 197 IRQs allocated, and we need more than 128=0D= to describe IRQs from LPC devices. Raise the value now to allow=0D modelling of the LPC devices.=0D =0D Signed-off-by: Andrew Jeffery =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: C=C3=A9dric Le Goater =0D Message-Id: <20210302014317.915120-3-andrew@aj.id.au>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: 6820588efa4fbab9ab6f0457f2c83c3bc7498ae3=0D https://github.com/qemu/qemu/commit/6820588efa4fbab9ab6f0457f2c83c3= bc7498ae3=0D Author: Andrew Jeffery =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/aspeed_ast2600.c=0D =0D Log Message:=0D -----------=0D hw/arm: ast2600: Correct the iBT interrupt ID=0D =0D The AST2600 allocates distinct GIC IRQs for the LPC subdevices such as=0D= the iBT device. Previously on the AST2400 and AST2500 the LPC subdevices=0D= shared a single LPC IRQ.=0D =0D Signed-off-by: Andrew Jeffery =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: C=C3=A9dric Le Goater =0D Message-Id: <20210302014317.915120-4-andrew@aj.id.au>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: 2ecf17264debe1bc3399fe587690c78d03e8401b=0D https://github.com/qemu/qemu/commit/2ecf17264debe1bc3399fe587690c78= d03e8401b=0D Author: C=C3=A9dric Le Goater =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/aspeed.rst=0D M hw/arm/aspeed_ast2600.c=0D M hw/arm/aspeed_soc.c=0D A hw/misc/aspeed_lpc.c=0D M hw/misc/meson.build=0D M include/hw/arm/aspeed_soc.h=0D A include/hw/misc/aspeed_lpc.h=0D =0D Log Message:=0D -----------=0D hw/misc: Add a basic Aspeed LPC controller model=0D =0D This is a very minimal framework to access registers which are used to=0D= configure the AHB memory mapping of the flash chips on the LPC HC=0D Firmware address space.=0D =0D Signed-off-by: C=C3=A9dric Le Goater =0D Signed-off-by: Andrew Jeffery =0D Message-Id: <20210302014317.915120-5-andrew@aj.id.au>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: c59f781e3bcca4a80aef5d229488fd45dbfdbd9a=0D https://github.com/qemu/qemu/commit/c59f781e3bcca4a80aef5d229488fd4= 5dbfdbd9a=0D Author: Andrew Jeffery =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/aspeed_ast2600.c=0D M hw/arm/aspeed_soc.c=0D M hw/misc/aspeed_lpc.c=0D M include/hw/arm/aspeed_soc.h=0D M include/hw/misc/aspeed_lpc.h=0D =0D Log Message:=0D -----------=0D hw/misc: Model KCS devices in the Aspeed LPC controller=0D =0D Keyboard-Controller-Style devices for IPMI purposes are exposed via LPC=0D= IO cycles from the BMC to the host.=0D =0D Expose support on the BMC side by implementing the usual MMIO=0D behaviours, and expose the ability to inspect the KCS registers in=0D "host" style by accessing QOM properties associated with each register.=0D= =0D The model caters to the IRQ style of both the AST2600 and the earlier=0D SoCs (AST2400 and AST2500). The AST2600 allocates an IRQ for each LPC=0D sub-device, while there is a single IRQ shared across all subdevices on=0D= the AST2400 and AST2500.=0D =0D Signed-off-by: Andrew Jeffery =0D Reviewed-by: C=C3=A9dric Le Goater =0D Message-Id: <20210302014317.915120-6-andrew@aj.id.au>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: 363fc963054d8e82cfd55fa9b9aa130692a8dbd7=0D https://github.com/qemu/qemu/commit/363fc963054d8e82cfd55fa9b9aa130= 692a8dbd7=0D Author: Peter Maydell =0D Date: 2021-03-11 (Thu, 11 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/aspeed.rst=0D M hw/arm/aspeed_ast2600.c=0D M hw/arm/aspeed_soc.c=0D A hw/misc/aspeed_lpc.c=0D M hw/misc/meson.build=0D M include/hw/arm/aspeed_soc.h=0D A include/hw/misc/aspeed_lpc.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-2021030= 9' into staging=0D =0D Aspeed patches :=0D =0D * New model for the Aspeed LPC controller=0D * Misc cleanups=0D =0D # gpg: Signature made Tue 09 Mar 2021 11:54:25 GMT=0D # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBE= CA1=0D # gpg: Good signature from "C=C3=A9dric Le Goater " [undefi= ned]=0D # gpg: WARNING: This key is not certified with a trusted signature!=0D # gpg: There is no indication that the signature belongs to the = owner.=0D # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB = ECA1=0D =0D * remotes/legoater/tags/pull-aspeed-20210309:=0D hw/misc: Model KCS devices in the Aspeed LPC controller=0D hw/misc: Add a basic Aspeed LPC controller model=0D hw/arm: ast2600: Correct the iBT interrupt ID=0D hw/arm: ast2600: Set AST2600_MAX_IRQ to value from datasheet=0D hw/arm: ast2600: Force a multiple of 32 of IRQs for the GIC=0D hw/arm/aspeed: Fix location of firmware images in documentation=0D arm/ast2600: Fix SMP booting with -kernel=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/d689ecad073e...363fc963054d= =0D From MAILER-DAEMON Thu Mar 11 08:57:03 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKLoE-0003cG-8a for mharc-qemu-commits@gnu.org; Thu, 11 Mar 2021 08:57:02 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:49108) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKLoB-0003aG-Ey for qemu-commits@nongnu.org; Thu, 11 Mar 2021 08:56:59 -0500 Received: from out-17.smtp.github.com ([192.30.252.200]:59279 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKLo7-0003lz-Oc for qemu-commits@nongnu.org; Thu, 11 Mar 2021 08:56:58 -0500 Received: from github.com (hubbernetes-node-0ac3a5d.va3-iad.github.net [10.48.17.12]) by smtp.github.com (Postfix) with ESMTPA id 0DFE75C000A for ; Thu, 11 Mar 2021 05:56:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615471015; bh=Jhyl6xSNuXYz8BA2pIlAbd+FfjiuN/XllP4mLAV3UgY=; h=Date:From:To:Subject:From; b=zt/+FwBDzSy/Y17aqMDUUTdzaLRLrvqkpvcwZBdpzMNE6skQdkvm24+7iQ5hqihmZ S4OXhLVpZNfsk+8DbfOnoPnaDYb5y3eS7uFimXcETfvjSELvXxlGvhecNGWkelzvqG Q5NnGJdV1gnELygXK4EQyDG64uZhllTPIKzUWAPI= Date: Thu, 11 Mar 2021 05:56:55 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] a4ea92: arm/ast2600: Fix SMP booting with -kernel X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Mar 2021 13:57:00 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: a4ea92013d265f636d71b58408b67dbecd679d1d=0D https://github.com/qemu/qemu/commit/a4ea92013d265f636d71b58408b67db= ecd679d1d=0D Author: Joel Stanley =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/aspeed_ast2600.c=0D =0D Log Message:=0D -----------=0D arm/ast2600: Fix SMP booting with -kernel=0D =0D The ast2600 machines do not have PSCI firmware, so this property should=0D= have never been set. Removing this node fixes SMP booting Linux kernels=0D= that have PSCI enabled, as Linux fails to find PSCI in the device tree=0D= and falls back to the soc-specific method for enabling secondary CPUs.=0D= =0D The comment is out of date as Qemu has supported -kernel booting since=0D= 9bb6d14081ce ("aspeed: Add boot stub for smp booting"), in v5.1.=0D =0D Fixes: f25c0ae1079d ("aspeed/soc: Add AST2600 support")=0D Signed-off-by: Joel Stanley =0D Reviewed-by: C=C3=A9dric Le Goater =0D Tested-by: C=C3=A9dric Le Goater =0D Message-Id: <20210303010505.635621-1-joel@jms.id.au>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: d029c7293140610f96b0786b88e6f9cdf1106adc=0D https://github.com/qemu/qemu/commit/d029c7293140610f96b0786b88e6f9c= df1106adc=0D Author: C=C3=A9dric Le Goater =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/aspeed.rst=0D =0D Log Message:=0D -----------=0D hw/arm/aspeed: Fix location of firmware images in documentation=0D =0D Firmware images can be found on the OpenBMC jenkins site and on the=0D OpenBMC GitHub release page.=0D =0D Signed-off-by: C=C3=A9dric Le Goater =0D Reviewed-by: Joel Stanley =0D Message-Id: <20210303072743.1551329-1-clg@kaod.org>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: 957ad79f7316816433f772b1a9ebdfe0a3818cb2=0D https://github.com/qemu/qemu/commit/957ad79f7316816433f772b1a9ebdfe= 0a3818cb2=0D Author: Andrew Jeffery =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/aspeed_ast2600.c=0D =0D Log Message:=0D -----------=0D hw/arm: ast2600: Force a multiple of 32 of IRQs for the GIC=0D =0D This appears to be a requirement of the GIC model. The AST2600 allocates=0D= 197 GIC IRQs, which we will adjust shortly.=0D =0D Signed-off-by: Andrew Jeffery =0D Reviewed-by: C=C3=A9dric Le Goater =0D Message-Id: <20210302014317.915120-2-andrew@aj.id.au>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: b151de69f6478a05b27f4be2eb4a906f7b5b8cfa=0D https://github.com/qemu/qemu/commit/b151de69f6478a05b27f4be2eb4a906= f7b5b8cfa=0D Author: Andrew Jeffery =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/aspeed_ast2600.c=0D =0D Log Message:=0D -----------=0D hw/arm: ast2600: Set AST2600_MAX_IRQ to value from datasheet=0D =0D The datasheet says we have 197 IRQs allocated, and we need more than 128=0D= to describe IRQs from LPC devices. Raise the value now to allow=0D modelling of the LPC devices.=0D =0D Signed-off-by: Andrew Jeffery =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: C=C3=A9dric Le Goater =0D Message-Id: <20210302014317.915120-3-andrew@aj.id.au>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: 6820588efa4fbab9ab6f0457f2c83c3bc7498ae3=0D https://github.com/qemu/qemu/commit/6820588efa4fbab9ab6f0457f2c83c3= bc7498ae3=0D Author: Andrew Jeffery =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/aspeed_ast2600.c=0D =0D Log Message:=0D -----------=0D hw/arm: ast2600: Correct the iBT interrupt ID=0D =0D The AST2600 allocates distinct GIC IRQs for the LPC subdevices such as=0D= the iBT device. Previously on the AST2400 and AST2500 the LPC subdevices=0D= shared a single LPC IRQ.=0D =0D Signed-off-by: Andrew Jeffery =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: C=C3=A9dric Le Goater =0D Message-Id: <20210302014317.915120-4-andrew@aj.id.au>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: 2ecf17264debe1bc3399fe587690c78d03e8401b=0D https://github.com/qemu/qemu/commit/2ecf17264debe1bc3399fe587690c78= d03e8401b=0D Author: C=C3=A9dric Le Goater =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/aspeed.rst=0D M hw/arm/aspeed_ast2600.c=0D M hw/arm/aspeed_soc.c=0D A hw/misc/aspeed_lpc.c=0D M hw/misc/meson.build=0D M include/hw/arm/aspeed_soc.h=0D A include/hw/misc/aspeed_lpc.h=0D =0D Log Message:=0D -----------=0D hw/misc: Add a basic Aspeed LPC controller model=0D =0D This is a very minimal framework to access registers which are used to=0D= configure the AHB memory mapping of the flash chips on the LPC HC=0D Firmware address space.=0D =0D Signed-off-by: C=C3=A9dric Le Goater =0D Signed-off-by: Andrew Jeffery =0D Message-Id: <20210302014317.915120-5-andrew@aj.id.au>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: c59f781e3bcca4a80aef5d229488fd45dbfdbd9a=0D https://github.com/qemu/qemu/commit/c59f781e3bcca4a80aef5d229488fd4= 5dbfdbd9a=0D Author: Andrew Jeffery =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/aspeed_ast2600.c=0D M hw/arm/aspeed_soc.c=0D M hw/misc/aspeed_lpc.c=0D M include/hw/arm/aspeed_soc.h=0D M include/hw/misc/aspeed_lpc.h=0D =0D Log Message:=0D -----------=0D hw/misc: Model KCS devices in the Aspeed LPC controller=0D =0D Keyboard-Controller-Style devices for IPMI purposes are exposed via LPC=0D= IO cycles from the BMC to the host.=0D =0D Expose support on the BMC side by implementing the usual MMIO=0D behaviours, and expose the ability to inspect the KCS registers in=0D "host" style by accessing QOM properties associated with each register.=0D= =0D The model caters to the IRQ style of both the AST2600 and the earlier=0D SoCs (AST2400 and AST2500). The AST2600 allocates an IRQ for each LPC=0D sub-device, while there is a single IRQ shared across all subdevices on=0D= the AST2400 and AST2500.=0D =0D Signed-off-by: Andrew Jeffery =0D Reviewed-by: C=C3=A9dric Le Goater =0D Message-Id: <20210302014317.915120-6-andrew@aj.id.au>=0D Signed-off-by: C=C3=A9dric Le Goater =0D =0D =0D Commit: 363fc963054d8e82cfd55fa9b9aa130692a8dbd7=0D https://github.com/qemu/qemu/commit/363fc963054d8e82cfd55fa9b9aa130= 692a8dbd7=0D Author: Peter Maydell =0D Date: 2021-03-11 (Thu, 11 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/aspeed.rst=0D M hw/arm/aspeed_ast2600.c=0D M hw/arm/aspeed_soc.c=0D A hw/misc/aspeed_lpc.c=0D M hw/misc/meson.build=0D M include/hw/arm/aspeed_soc.h=0D A include/hw/misc/aspeed_lpc.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-2021030= 9' into staging=0D =0D Aspeed patches :=0D =0D * New model for the Aspeed LPC controller=0D * Misc cleanups=0D =0D # gpg: Signature made Tue 09 Mar 2021 11:54:25 GMT=0D # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBE= CA1=0D # gpg: Good signature from "C=C3=A9dric Le Goater " [undefi= ned]=0D # gpg: WARNING: This key is not certified with a trusted signature!=0D # gpg: There is no indication that the signature belongs to the = owner.=0D # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB = ECA1=0D =0D * remotes/legoater/tags/pull-aspeed-20210309:=0D hw/misc: Model KCS devices in the Aspeed LPC controller=0D hw/misc: Add a basic Aspeed LPC controller model=0D hw/arm: ast2600: Correct the iBT interrupt ID=0D hw/arm: ast2600: Set AST2600_MAX_IRQ to value from datasheet=0D hw/arm: ast2600: Force a multiple of 32 of IRQs for the GIC=0D hw/arm/aspeed: Fix location of firmware images in documentation=0D arm/ast2600: Fix SMP booting with -kernel=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/d689ecad073e...363fc963054d= =0D From MAILER-DAEMON Thu Mar 11 09:02:56 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKLtw-0001VO-B6 for mharc-qemu-commits@gnu.org; Thu, 11 Mar 2021 09:02:56 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:51020) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKLtu-0001RO-L7 for qemu-commits@nongnu.org; Thu, 11 Mar 2021 09:02:54 -0500 Received: from out-26.smtp.github.com ([192.30.252.209]:56875 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKLtq-0007CT-Dq for qemu-commits@nongnu.org; Thu, 11 Mar 2021 09:02:54 -0500 Received: from github.com (hubbernetes-node-423d571.ash1-iad.github.net [10.56.112.67]) by smtp.github.com (Postfix) with ESMTPA id 8DD105E0D0B for ; Thu, 11 Mar 2021 06:02:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615471369; bh=Ejmd2iikw73129owgwxpJeTxy4n39w5rYlEmy1XWuJo=; h=Date:From:To:Subject:From; b=xc7Qgs00lzfDhmz4XNKnCbA6Vd0pEBPK5cURi6b/b4/WpgUCW/9vFmONRzlo9+MED sqoael6CuaBuQCXH5k2n1ceGpT7zh4M134p7XuA0/bEDghI9RczjLvtMrCaad20aVw fHR1KwghLewO9AFDk0W2+WU343uiAfRqqlnxbbcE= Date: Thu, 11 Mar 2021 06:02:49 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 3d9330: MAINTAINERS: add Vladimir as co-maintainer of NBD X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Mar 2021 14:02:55 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 3d9330ece5c5cb7b5e8fec1bef4da8fe78134fc2=0D https://github.com/qemu/qemu/commit/3d9330ece5c5cb7b5e8fec1bef4da8f= e78134fc2=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: add Vladimir as co-maintainer of NBD=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210304103503.21008-1-vsementsov@virtuozzo.com>=0D Reviewed-by: Eric Blake =0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 0da9856851dcca09222a1467e16ddd05dc66e460=0D https://github.com/qemu/qemu/commit/0da9856851dcca09222a1467e16ddd0= 5dc66e460=0D Author: Nir Soffer =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M nbd/server.c=0D M tests/qemu-iotests/241.out=0D =0D Log Message:=0D -----------=0D nbd: server: Report holes for raw images=0D =0D When querying image extents for raw image, qemu-nbd reports holes as=0D zero:=0D =0D $ qemu-nbd -t -r -f raw empty-6g.raw=0D =0D $ qemu-img map --output json nbd://localhost=0D [{ "start": 0, "length": 6442450944, "depth": 0, "zero": true, "data": tr= ue, "offset": 0}]=0D =0D $ qemu-img map --output json empty-6g.raw=0D [{ "start": 0, "length": 6442450944, "depth": 0, "zero": true, "data": fa= lse, "offset": 0}]=0D =0D Turns out that qemu-img map reports a hole based on BDRV_BLOCK_DATA, but=0D= nbd server reports a hole based on BDRV_BLOCK_ALLOCATED.=0D =0D The NBD protocol says:=0D =0D NBD_STATE_HOLE (bit 0): if set, the block represents a hole (and=0D future writes to that area may cause fragmentation or encounter an=0D= NBD_ENOSPC error); if clear, the block is allocated or the server=0D could not otherwise determine its status.=0D =0D qemu-img manual says:=0D =0D whether the sectors contain actual data or not (boolean field data;=0D= if false, the sectors are either unallocated or stored as=0D optimized all-zero clusters);=0D =0D To me, data=3Dfalse looks compatible with NBD_STATE_HOLE. From user point= =0D of view, getting same results from qemu-nbd and qemu-img is more=0D important than being more correct about allocation status.=0D =0D Changing nbd server to report holes using BDRV_BLOCK_DATA makes qemu-nbd=0D= results compatible with qemu-img map:=0D =0D $ qemu-img map --output json nbd://localhost=0D [{ "start": 0, "length": 6442450944, "depth": 0, "zero": true, "data": fa= lse, "offset": 0}]=0D =0D Signed-off-by: Nir Soffer =0D Message-Id: <20210219160752.1826830-1-nsoffer@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: Vladimir Sementsov-Ogievskiy =0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 1657ba44b449471c665bc5d358ca33af411710f3=0D https://github.com/qemu/qemu/commit/1657ba44b449471c665bc5d358ca33a= f411710f3=0D Author: Eric Blake =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/test-cutils.c=0D =0D Log Message:=0D -----------=0D utils: Enhance testsuite for do_strtosz()=0D =0D Enhance our testsuite coverage of do_strtosz() to cover some things we=0D= know that existing users want to continue working (hex bytes), as well=0D= as some things that accidentally work but shouldn't (hex fractions) or=0D= accidentally fail but that users want to work (64-bit precision on=0D byte values). This includes fixing a typo in the comment regarding=0D our parsing near 2^64.=0D =0D Signed-off-by: Eric Blake =0D Message-Id: <20210211204438.1184395-2-eblake@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: cf923b783efd565787e9ab006fb5608bb2a7297b=0D https://github.com/qemu/qemu/commit/cf923b783efd565787e9ab006fb5608= bb2a7297b=0D Author: Eric Blake =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/049.out=0D M tests/qemu-iotests/178.out.qcow2=0D M tests/qemu-iotests/178.out.raw=0D M tests/test-cutils.c=0D M tests/test-keyval.c=0D M tests/test-qemu-opts.c=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D utils: Improve qemu_strtosz() to have 64 bits of precision=0D =0D We have multiple clients of qemu_strtosz (qemu-io, the opts visitor,=0D the keyval visitor), and it gets annoying that edge-case testing is=0D impacted by implicit rounding to 53 bits of precision due to parsing=0D with strtod(). As an example posted by Rich Jones:=0D $ nbdkit memory $(( 2**63 - 2**30 )) --run \=0D 'build/qemu-io -f raw "$uri" -c "w -P 3 $(( 2**63 - 2**30 - 512 )) 512= " '=0D write failed: Input/output error=0D =0D because 9223372035781033472 got rounded to 0x7fffffffc0000000 which is=0D= out of bounds.=0D =0D It is also worth noting that our existing parser, by virtue of using=0D strtod(), accepts decimal AND hex numbers, even though test-cutils=0D previously lacked any coverage of the latter until the previous patch.=0D= We do have existing clients that expect a hex parse to work (for=0D example, iotest 33 using qemu-io -c "write -P 0xa 0x200 0x400"), but=0D strtod() parses "08" as 8 rather than as an invalid octal number, so=0D we know there are no clients that depend on octal. Our use of=0D strtod() also means that "0x1.8k" would actually parse as 1536 (the=0D fraction is 8/16), rather than 1843 (if the fraction were 8/10); but=0D as this was not covered in the testsuite, I have no qualms forbidding=0D hex fractions as invalid, so this patch declares that the use of=0D fractions is only supported with decimal input, and enhances the=0D testsuite to document that.=0D =0D Our previous use of strtod() meant that -1 parsed as a negative; now=0D that we parse with strtoull(), negative values can wrap around modulo=0D 2^64, so we have to explicitly check whether the user passed in a '-';=0D= and make it consistent to also reject '-0'. This has the minor effect=0D= of treating negative values as EINVAL (with no change to endptr)=0D rather than ERANGE (with endptr advanced to what was parsed), visible=0D in the updated iotest output.=0D =0D We also had no testsuite coverage of "1.1e0k", which happened to parse=0D= under strtod() but is unlikely to occur in practice; as long as we are=0D= making things more robust, it is easy enough to reject the use of=0D exponents in a strtod parse.=0D =0D The fix is done by breaking the parse into an integer prefix (no loss=0D in precision), rejecting negative values (since we can no longer rely=0D on strtod() to do that), determining if a decimal or hexadecimal parse=0D= was intended (with the new restriction that a fractional hex parse is=0D not allowed), and where appropriate, using a floating point fractional=0D= parse (where we also scan to reject use of exponents in the fraction).=0D= The bulk of the patch is then updates to the testsuite to match our=0D new precision, as well as adding new cases we reject (whether they=0D were rejected or inadvertently accepted before).=0D =0D Signed-off-by: Eric Blake =0D Message-Id: <20210211204438.1184395-3-eblake@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: f174cd3350c5e97db000e7383be974c66046b8f5=0D https://github.com/qemu/qemu/commit/f174cd3350c5e97db000e7383be974c= 66046b8f5=0D Author: Eric Blake =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D utils: Deprecate hex-with-suffix sizes=0D =0D Supporting '0x20M' looks odd, particularly since we have a 'B' suffix=0D that is ambiguous for bytes, as well as a less-frequently-used 'E'=0D suffix for extremely large exibytes. In practice, people using hex=0D inputs are specifying values in bytes (and would have written=0D 0x2000000, or possibly relied on default_suffix in the case of=0D qemu_strtosz_MiB), and the use of scaling suffixes makes the most=0D sense for inputs in decimal (where the user would write 32M). But=0D rather than outright dropping support for hex-with-suffix, let's=0D follow our deprecation policy. Sadly, since qemu_strtosz() does not=0D have an Err** parameter, and plumbing that in would be a much larger=0D task, we instead go with just directly emitting the deprecation=0D warning to stderr.=0D =0D Signed-off-by: Eric Blake =0D Message-Id: <20210211204438.1184395-4-eblake@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: bc520249595845d387aa5b5e4eeeade673931a98=0D https://github.com/qemu/qemu/commit/bc520249595845d387aa5b5e4eeeade= 673931a98=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/blkdebug.c=0D M block/blklogwrites.c=0D M block/blkreplay.c=0D M block/blkverify.c=0D M block/qcow2.c=0D M block/quorum.c=0D =0D Log Message:=0D -----------=0D block: check return value of bdrv_open_child and drop error propagation= =0D =0D This patch is generated by cocci script:=0D =0D @@=0D symbol bdrv_open_child, errp, local_err;=0D expression file;=0D @@=0D =0D file =3D bdrv_open_child(...,=0D - &local_err=0D + errp=0D );=0D - if (local_err)=0D + if (!file)=0D {=0D ...=0D - error_propagate(errp, local_err);=0D ...=0D }=0D =0D with command=0D =0D spatch --sp-file x.cocci --macro-file scripts/cocci-macro-file.h \=0D --in-place --no-show-diff --max-width 80 --use-gitgrep block=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-4-vsementsov@virtuozzo.com>=0D [eblake: fix qcow2_do_open() to use ERRP_GUARD, necessary as the only=0D caller to pass allow_none=3Dtrue]=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 5a11a1ca0d0ed5be52070f1da8de89ef85941183=0D https://github.com/qemu/qemu/commit/5a11a1ca0d0ed5be52070f1da8de89e= f85941183=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M blockdev.c=0D =0D Log Message:=0D -----------=0D blockdev: fix drive_backup_prepare() missed error=0D =0D We leak local_err and don't report failure to the caller. It's=0D definitely wrong, let's fix.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-5-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: dc9c10a1f42235a7f8411feca28984c4e7da3177=0D https://github.com/qemu/qemu/commit/dc9c10a1f42235a7f8411feca28984c= 4e7da3177=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block.c=0D =0D Log Message:=0D -----------=0D block: drop extra error propagation for bdrv_set_backing_hd=0D =0D bdrv_set_backing_hd now returns status, let's use it.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-6-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: eb5becc18fff6ba43922a169a64029e7e26ef86a=0D https://github.com/qemu/qemu/commit/eb5becc18fff6ba43922a169a64029e= 7e26ef86a=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/mirror.c=0D =0D Log Message:=0D -----------=0D block/mirror: drop extra error propagation in commit_active_start()=0D =0D Let's check return value of mirror_start_job to check for failure=0D instead of local_err.=0D =0D Rename ret to job, as ret is usually integer variable.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-7-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 775d0c050866c3571b8599291b3ff65fdbd63ed8=0D https://github.com/qemu/qemu/commit/775d0c050866c3571b8599291b3ff65= fdbd63ed8=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M blockjob.c=0D M include/block/blockjob.h=0D =0D Log Message:=0D -----------=0D blockjob: return status from block_job_set_speed()=0D =0D Better to return status together with setting errp. It allows to avoid=0D= error propagation in the caller.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-8-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 83bad8cbf5c1276499cee13710db56c0101faa69=0D https://github.com/qemu/qemu/commit/83bad8cbf5c1276499cee13710db56c= 0101faa69=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qcow2-bitmap.c=0D M block/qcow2.c=0D M block/qcow2.h=0D =0D Log Message:=0D -----------=0D block/qcow2: qcow2_get_specific_info(): drop error propagation=0D =0D Don't use error propagation in qcow2_get_specific_info(). For this=0D refactor qcow2_get_bitmap_info_list, its current interface is rather=0D weird.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210202124956.63146-9-vsementsov@virtuozzo.com>=0D Reviewed-by: Alberto Garcia =0D [eblake: separate local 'tail' variable from 'info_list' parameter]=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 0c1e9d2a9a3b6dd5ce74092019882fbce691d081=0D https://github.com/qemu/qemu/commit/0c1e9d2a9a3b6dd5ce74092019882fb= ce691d081=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qcow2-bitmap.c=0D M block/qcow2.c=0D M block/qcow2.h=0D =0D Log Message:=0D -----------=0D block/qcow2-bitmap: improve qcow2_load_dirty_bitmaps() interface=0D =0D It's recommended for bool functions with errp to return true on success=0D= and false on failure. Non-standard interfaces don't help to understand=0D= the code. The change is also needed to reduce error propagation.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Alberto Garcia =0D Reviewed-by: Greg Kurz =0D Message-Id: <20210202124956.63146-10-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 526e31de993431569ad3b8bdf461ef26d03c404d=0D https://github.com/qemu/qemu/commit/526e31de993431569ad3b8bdf461ef2= 6d03c404d=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qcow2-bitmap.c=0D M block/qcow2.h=0D =0D Log Message:=0D -----------=0D block/qcow2-bitmap: return status from qcow2_store_persistent_dirty_bit= maps=0D =0D It's better to return status together with setting errp. It makes=0D possible to avoid error propagation.=0D =0D While being here, put ERRP_GUARD() to fix error_prepend(errp, ...)=0D usage inside qcow2_store_persistent_dirty_bitmaps() (see the comment=0D above ERRP_GUARD() definition in include/qapi/error.h)=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-11-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 772c4cad13b97b8e8ef8592228707f7a5557f939=0D https://github.com/qemu/qemu/commit/772c4cad13b97b8e8ef8592228707f7= a5557f939=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qcow2.c=0D =0D Log Message:=0D -----------=0D block/qcow2: read_cache_sizes: return status value=0D =0D It's better to return status together with setting errp. It allows to=0D reduce error propagation.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-12-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: e6247c9c9f9e4d01b00036f017da53d130981727=0D https://github.com/qemu/qemu/commit/e6247c9c9f9e4d01b00036f017da53d= 130981727=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qcow2.c=0D =0D Log Message:=0D -----------=0D block/qcow2: simplify qcow2_co_invalidate_cache()=0D =0D qcow2_do_open correctly sets errp on each failure path. So, we can=0D simplify code in qcow2_co_invalidate_cache() and drop explicit error=0D propagation.=0D =0D Add ERRP_GUARD() as mandated by the documentation in=0D include/qapi/error.h so that error_prepend() is actually called even if=0D= errp is &error_fatal.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Alberto Garcia =0D Reviewed-by: Greg Kurz =0D Message-Id: <20210202124956.63146-13-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 15ce94a68ca6730466c565c3d29971aab3087bf1=0D https://github.com/qemu/qemu/commit/15ce94a68ca6730466c565c3d29971a= ab3087bf1=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qed.c=0D =0D Log Message:=0D -----------=0D block/qed: bdrv_qed_do_open: deal with errp=0D =0D Always set errp on failure. The generic bdrv_open_driver supports=0D driver functions which can return a negative value but forget to set=0D errp. That's a strange thing. Let's improve bdrv_qed_do_open to not=0D behave this way. This allows the simplification of code in=0D bdrv_qed_co_invalidate_cache().=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Alberto Garcia =0D Reviewed-by: Greg Kurz =0D Message-Id: <20210202124956.63146-14-vsementsov@virtuozzo.com>=0D [eblake: commit message grammar tweak]=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 1184b411016bce7590723170aa6b5984518707ec=0D https://github.com/qemu/qemu/commit/1184b411016bce7590723170aa6b598= 4518707ec=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qcow2.c=0D =0D Log Message:=0D -----------=0D block/qcow2: refactor qcow2_update_options_prepare error paths=0D =0D Keep setting ret close to setting errp and don't merge different error=0D= paths into one. This way it's more obvious that we don't return=0D error without setting errp.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-15-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 9abda42bf2f5aa6ef403d3140fd3d7d88e8064e9=0D https://github.com/qemu/qemu/commit/9abda42bf2f5aa6ef403d3140fd3d7d= 88e8064e9=0D Author: Peter Maydell =0D Date: 2021-03-11 (Thu, 11 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M block.c=0D M block/blkdebug.c=0D M block/blklogwrites.c=0D M block/blkreplay.c=0D M block/blkverify.c=0D M block/mirror.c=0D M block/qcow2-bitmap.c=0D M block/qcow2.c=0D M block/qcow2.h=0D M block/qed.c=0D M block/quorum.c=0D M blockdev.c=0D M blockjob.c=0D M docs/system/deprecated.rst=0D M include/block/blockjob.h=0D M nbd/server.c=0D M tests/qemu-iotests/049.out=0D M tests/qemu-iotests/178.out.qcow2=0D M tests/qemu-iotests/178.out.raw=0D M tests/qemu-iotests/241.out=0D M tests/test-cutils.c=0D M tests/test-keyval.c=0D M tests/test-qemu-opts.c=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2021-03-09' i= nto staging=0D =0D nbd patches for 2021-03-09=0D =0D - Add Vladimir as NBD co-maintainer=0D - Fix reporting of holes in NBD_CMD_BLOCK_STATUS=0D - Improve command-line parsing accuracy of large numbers (anything going=0D= through qemu_strtosz), including the deprecation of hex+suffix=0D - Improve some error reporting in the block layer=0D =0D # gpg: Signature made Tue 09 Mar 2021 15:38:10 GMT=0D # gpg: using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A25274= 36A=0D # gpg: Good signature from "Eric Blake " [full]=0D # gpg: aka "Eric Blake (Free Software Programmer) " [full]=0D # gpg: aka "[jpeg image of size 6874]" [full]=0D # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 = 436A=0D =0D * remotes/ericb/tags/pull-nbd-2021-03-09:=0D block/qcow2: refactor qcow2_update_options_prepare error paths=0D block/qed: bdrv_qed_do_open: deal with errp=0D block/qcow2: simplify qcow2_co_invalidate_cache()=0D block/qcow2: read_cache_sizes: return status value=0D block/qcow2-bitmap: return status from qcow2_store_persistent_dirty_bit= maps=0D block/qcow2-bitmap: improve qcow2_load_dirty_bitmaps() interface=0D block/qcow2: qcow2_get_specific_info(): drop error propagation=0D blockjob: return status from block_job_set_speed()=0D block/mirror: drop extra error propagation in commit_active_start()=0D block: drop extra error propagation for bdrv_set_backing_hd=0D blockdev: fix drive_backup_prepare() missed error=0D block: check return value of bdrv_open_child and drop error propagation= =0D utils: Deprecate hex-with-suffix sizes=0D utils: Improve qemu_strtosz() to have 64 bits of precision=0D utils: Enhance testsuite for do_strtosz()=0D nbd: server: Report holes for raw images=0D MAINTAINERS: add Vladimir as co-maintainer of NBD=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/363fc963054d...9abda42bf2f5= =0D From MAILER-DAEMON Thu Mar 11 11:20:59 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKO3X-0000IT-Dw for mharc-qemu-commits@gnu.org; Thu, 11 Mar 2021 11:20:59 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:42908) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKO3U-0000GC-Ka for qemu-commits@nongnu.org; Thu, 11 Mar 2021 11:20:56 -0500 Received: from out-27.smtp.github.com ([192.30.252.210]:37341) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKO3P-0003qc-Rn for qemu-commits@nongnu.org; Thu, 11 Mar 2021 11:20:55 -0500 Received: from github.com (hubbernetes-node-5aa3245.ash1-iad.github.net [10.56.121.66]) by smtp.github.com (Postfix) with ESMTPA id 3067990009E for ; Thu, 11 Mar 2021 08:20:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615479651; bh=BrwP4L7ITuR5mcsYrhytX934qXJMr2p9lgJztd71Tcc=; h=Date:From:To:Subject:From; b=ckA9120D9413MTpmoIHVI7WM3QN1VqdIPiStqHZgRQPFGS692TLtss3PuBcwdRkWY qBb+sIJE8NL/sBDoQxj5zPS02f4G26nOqSGp1/MYf4cdrH9AXlZ1meglddofZBJjCm TR5iYqtPpD0FxbBJUdRCXivBMNSYGhOQHMiv1Na4= Date: Thu, 11 Mar 2021 08:20:51 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.210; envelope-from=noreply@github.com; helo=out-27.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 3d9330: MAINTAINERS: add Vladimir as co-maintainer of NBD X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Mar 2021 16:20:57 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 3d9330ece5c5cb7b5e8fec1bef4da8fe78134fc2=0D https://github.com/qemu/qemu/commit/3d9330ece5c5cb7b5e8fec1bef4da8f= e78134fc2=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: add Vladimir as co-maintainer of NBD=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210304103503.21008-1-vsementsov@virtuozzo.com>=0D Reviewed-by: Eric Blake =0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 0da9856851dcca09222a1467e16ddd05dc66e460=0D https://github.com/qemu/qemu/commit/0da9856851dcca09222a1467e16ddd0= 5dc66e460=0D Author: Nir Soffer =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M nbd/server.c=0D M tests/qemu-iotests/241.out=0D =0D Log Message:=0D -----------=0D nbd: server: Report holes for raw images=0D =0D When querying image extents for raw image, qemu-nbd reports holes as=0D zero:=0D =0D $ qemu-nbd -t -r -f raw empty-6g.raw=0D =0D $ qemu-img map --output json nbd://localhost=0D [{ "start": 0, "length": 6442450944, "depth": 0, "zero": true, "data": tr= ue, "offset": 0}]=0D =0D $ qemu-img map --output json empty-6g.raw=0D [{ "start": 0, "length": 6442450944, "depth": 0, "zero": true, "data": fa= lse, "offset": 0}]=0D =0D Turns out that qemu-img map reports a hole based on BDRV_BLOCK_DATA, but=0D= nbd server reports a hole based on BDRV_BLOCK_ALLOCATED.=0D =0D The NBD protocol says:=0D =0D NBD_STATE_HOLE (bit 0): if set, the block represents a hole (and=0D future writes to that area may cause fragmentation or encounter an=0D= NBD_ENOSPC error); if clear, the block is allocated or the server=0D could not otherwise determine its status.=0D =0D qemu-img manual says:=0D =0D whether the sectors contain actual data or not (boolean field data;=0D= if false, the sectors are either unallocated or stored as=0D optimized all-zero clusters);=0D =0D To me, data=3Dfalse looks compatible with NBD_STATE_HOLE. From user point= =0D of view, getting same results from qemu-nbd and qemu-img is more=0D important than being more correct about allocation status.=0D =0D Changing nbd server to report holes using BDRV_BLOCK_DATA makes qemu-nbd=0D= results compatible with qemu-img map:=0D =0D $ qemu-img map --output json nbd://localhost=0D [{ "start": 0, "length": 6442450944, "depth": 0, "zero": true, "data": fa= lse, "offset": 0}]=0D =0D Signed-off-by: Nir Soffer =0D Message-Id: <20210219160752.1826830-1-nsoffer@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: Vladimir Sementsov-Ogievskiy =0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 1657ba44b449471c665bc5d358ca33af411710f3=0D https://github.com/qemu/qemu/commit/1657ba44b449471c665bc5d358ca33a= f411710f3=0D Author: Eric Blake =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/test-cutils.c=0D =0D Log Message:=0D -----------=0D utils: Enhance testsuite for do_strtosz()=0D =0D Enhance our testsuite coverage of do_strtosz() to cover some things we=0D= know that existing users want to continue working (hex bytes), as well=0D= as some things that accidentally work but shouldn't (hex fractions) or=0D= accidentally fail but that users want to work (64-bit precision on=0D byte values). This includes fixing a typo in the comment regarding=0D our parsing near 2^64.=0D =0D Signed-off-by: Eric Blake =0D Message-Id: <20210211204438.1184395-2-eblake@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: cf923b783efd565787e9ab006fb5608bb2a7297b=0D https://github.com/qemu/qemu/commit/cf923b783efd565787e9ab006fb5608= bb2a7297b=0D Author: Eric Blake =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/049.out=0D M tests/qemu-iotests/178.out.qcow2=0D M tests/qemu-iotests/178.out.raw=0D M tests/test-cutils.c=0D M tests/test-keyval.c=0D M tests/test-qemu-opts.c=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D utils: Improve qemu_strtosz() to have 64 bits of precision=0D =0D We have multiple clients of qemu_strtosz (qemu-io, the opts visitor,=0D the keyval visitor), and it gets annoying that edge-case testing is=0D impacted by implicit rounding to 53 bits of precision due to parsing=0D with strtod(). As an example posted by Rich Jones:=0D $ nbdkit memory $(( 2**63 - 2**30 )) --run \=0D 'build/qemu-io -f raw "$uri" -c "w -P 3 $(( 2**63 - 2**30 - 512 )) 512= " '=0D write failed: Input/output error=0D =0D because 9223372035781033472 got rounded to 0x7fffffffc0000000 which is=0D= out of bounds.=0D =0D It is also worth noting that our existing parser, by virtue of using=0D strtod(), accepts decimal AND hex numbers, even though test-cutils=0D previously lacked any coverage of the latter until the previous patch.=0D= We do have existing clients that expect a hex parse to work (for=0D example, iotest 33 using qemu-io -c "write -P 0xa 0x200 0x400"), but=0D strtod() parses "08" as 8 rather than as an invalid octal number, so=0D we know there are no clients that depend on octal. Our use of=0D strtod() also means that "0x1.8k" would actually parse as 1536 (the=0D fraction is 8/16), rather than 1843 (if the fraction were 8/10); but=0D as this was not covered in the testsuite, I have no qualms forbidding=0D hex fractions as invalid, so this patch declares that the use of=0D fractions is only supported with decimal input, and enhances the=0D testsuite to document that.=0D =0D Our previous use of strtod() meant that -1 parsed as a negative; now=0D that we parse with strtoull(), negative values can wrap around modulo=0D 2^64, so we have to explicitly check whether the user passed in a '-';=0D= and make it consistent to also reject '-0'. This has the minor effect=0D= of treating negative values as EINVAL (with no change to endptr)=0D rather than ERANGE (with endptr advanced to what was parsed), visible=0D in the updated iotest output.=0D =0D We also had no testsuite coverage of "1.1e0k", which happened to parse=0D= under strtod() but is unlikely to occur in practice; as long as we are=0D= making things more robust, it is easy enough to reject the use of=0D exponents in a strtod parse.=0D =0D The fix is done by breaking the parse into an integer prefix (no loss=0D in precision), rejecting negative values (since we can no longer rely=0D on strtod() to do that), determining if a decimal or hexadecimal parse=0D= was intended (with the new restriction that a fractional hex parse is=0D not allowed), and where appropriate, using a floating point fractional=0D= parse (where we also scan to reject use of exponents in the fraction).=0D= The bulk of the patch is then updates to the testsuite to match our=0D new precision, as well as adding new cases we reject (whether they=0D were rejected or inadvertently accepted before).=0D =0D Signed-off-by: Eric Blake =0D Message-Id: <20210211204438.1184395-3-eblake@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: f174cd3350c5e97db000e7383be974c66046b8f5=0D https://github.com/qemu/qemu/commit/f174cd3350c5e97db000e7383be974c= 66046b8f5=0D Author: Eric Blake =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D utils: Deprecate hex-with-suffix sizes=0D =0D Supporting '0x20M' looks odd, particularly since we have a 'B' suffix=0D that is ambiguous for bytes, as well as a less-frequently-used 'E'=0D suffix for extremely large exibytes. In practice, people using hex=0D inputs are specifying values in bytes (and would have written=0D 0x2000000, or possibly relied on default_suffix in the case of=0D qemu_strtosz_MiB), and the use of scaling suffixes makes the most=0D sense for inputs in decimal (where the user would write 32M). But=0D rather than outright dropping support for hex-with-suffix, let's=0D follow our deprecation policy. Sadly, since qemu_strtosz() does not=0D have an Err** parameter, and plumbing that in would be a much larger=0D task, we instead go with just directly emitting the deprecation=0D warning to stderr.=0D =0D Signed-off-by: Eric Blake =0D Message-Id: <20210211204438.1184395-4-eblake@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: bc520249595845d387aa5b5e4eeeade673931a98=0D https://github.com/qemu/qemu/commit/bc520249595845d387aa5b5e4eeeade= 673931a98=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/blkdebug.c=0D M block/blklogwrites.c=0D M block/blkreplay.c=0D M block/blkverify.c=0D M block/qcow2.c=0D M block/quorum.c=0D =0D Log Message:=0D -----------=0D block: check return value of bdrv_open_child and drop error propagation= =0D =0D This patch is generated by cocci script:=0D =0D @@=0D symbol bdrv_open_child, errp, local_err;=0D expression file;=0D @@=0D =0D file =3D bdrv_open_child(...,=0D - &local_err=0D + errp=0D );=0D - if (local_err)=0D + if (!file)=0D {=0D ...=0D - error_propagate(errp, local_err);=0D ...=0D }=0D =0D with command=0D =0D spatch --sp-file x.cocci --macro-file scripts/cocci-macro-file.h \=0D --in-place --no-show-diff --max-width 80 --use-gitgrep block=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-4-vsementsov@virtuozzo.com>=0D [eblake: fix qcow2_do_open() to use ERRP_GUARD, necessary as the only=0D caller to pass allow_none=3Dtrue]=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 5a11a1ca0d0ed5be52070f1da8de89ef85941183=0D https://github.com/qemu/qemu/commit/5a11a1ca0d0ed5be52070f1da8de89e= f85941183=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M blockdev.c=0D =0D Log Message:=0D -----------=0D blockdev: fix drive_backup_prepare() missed error=0D =0D We leak local_err and don't report failure to the caller. It's=0D definitely wrong, let's fix.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-5-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: dc9c10a1f42235a7f8411feca28984c4e7da3177=0D https://github.com/qemu/qemu/commit/dc9c10a1f42235a7f8411feca28984c= 4e7da3177=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block.c=0D =0D Log Message:=0D -----------=0D block: drop extra error propagation for bdrv_set_backing_hd=0D =0D bdrv_set_backing_hd now returns status, let's use it.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-6-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: eb5becc18fff6ba43922a169a64029e7e26ef86a=0D https://github.com/qemu/qemu/commit/eb5becc18fff6ba43922a169a64029e= 7e26ef86a=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/mirror.c=0D =0D Log Message:=0D -----------=0D block/mirror: drop extra error propagation in commit_active_start()=0D =0D Let's check return value of mirror_start_job to check for failure=0D instead of local_err.=0D =0D Rename ret to job, as ret is usually integer variable.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-7-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 775d0c050866c3571b8599291b3ff65fdbd63ed8=0D https://github.com/qemu/qemu/commit/775d0c050866c3571b8599291b3ff65= fdbd63ed8=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M blockjob.c=0D M include/block/blockjob.h=0D =0D Log Message:=0D -----------=0D blockjob: return status from block_job_set_speed()=0D =0D Better to return status together with setting errp. It allows to avoid=0D= error propagation in the caller.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-8-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 83bad8cbf5c1276499cee13710db56c0101faa69=0D https://github.com/qemu/qemu/commit/83bad8cbf5c1276499cee13710db56c= 0101faa69=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qcow2-bitmap.c=0D M block/qcow2.c=0D M block/qcow2.h=0D =0D Log Message:=0D -----------=0D block/qcow2: qcow2_get_specific_info(): drop error propagation=0D =0D Don't use error propagation in qcow2_get_specific_info(). For this=0D refactor qcow2_get_bitmap_info_list, its current interface is rather=0D weird.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Message-Id: <20210202124956.63146-9-vsementsov@virtuozzo.com>=0D Reviewed-by: Alberto Garcia =0D [eblake: separate local 'tail' variable from 'info_list' parameter]=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 0c1e9d2a9a3b6dd5ce74092019882fbce691d081=0D https://github.com/qemu/qemu/commit/0c1e9d2a9a3b6dd5ce74092019882fb= ce691d081=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qcow2-bitmap.c=0D M block/qcow2.c=0D M block/qcow2.h=0D =0D Log Message:=0D -----------=0D block/qcow2-bitmap: improve qcow2_load_dirty_bitmaps() interface=0D =0D It's recommended for bool functions with errp to return true on success=0D= and false on failure. Non-standard interfaces don't help to understand=0D= the code. The change is also needed to reduce error propagation.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Alberto Garcia =0D Reviewed-by: Greg Kurz =0D Message-Id: <20210202124956.63146-10-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 526e31de993431569ad3b8bdf461ef26d03c404d=0D https://github.com/qemu/qemu/commit/526e31de993431569ad3b8bdf461ef2= 6d03c404d=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qcow2-bitmap.c=0D M block/qcow2.h=0D =0D Log Message:=0D -----------=0D block/qcow2-bitmap: return status from qcow2_store_persistent_dirty_bit= maps=0D =0D It's better to return status together with setting errp. It makes=0D possible to avoid error propagation.=0D =0D While being here, put ERRP_GUARD() to fix error_prepend(errp, ...)=0D usage inside qcow2_store_persistent_dirty_bitmaps() (see the comment=0D above ERRP_GUARD() definition in include/qapi/error.h)=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-11-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 772c4cad13b97b8e8ef8592228707f7a5557f939=0D https://github.com/qemu/qemu/commit/772c4cad13b97b8e8ef8592228707f7= a5557f939=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qcow2.c=0D =0D Log Message:=0D -----------=0D block/qcow2: read_cache_sizes: return status value=0D =0D It's better to return status together with setting errp. It allows to=0D reduce error propagation.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Greg Kurz =0D Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-12-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: e6247c9c9f9e4d01b00036f017da53d130981727=0D https://github.com/qemu/qemu/commit/e6247c9c9f9e4d01b00036f017da53d= 130981727=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qcow2.c=0D =0D Log Message:=0D -----------=0D block/qcow2: simplify qcow2_co_invalidate_cache()=0D =0D qcow2_do_open correctly sets errp on each failure path. So, we can=0D simplify code in qcow2_co_invalidate_cache() and drop explicit error=0D propagation.=0D =0D Add ERRP_GUARD() as mandated by the documentation in=0D include/qapi/error.h so that error_prepend() is actually called even if=0D= errp is &error_fatal.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Alberto Garcia =0D Reviewed-by: Greg Kurz =0D Message-Id: <20210202124956.63146-13-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 15ce94a68ca6730466c565c3d29971aab3087bf1=0D https://github.com/qemu/qemu/commit/15ce94a68ca6730466c565c3d29971a= ab3087bf1=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qed.c=0D =0D Log Message:=0D -----------=0D block/qed: bdrv_qed_do_open: deal with errp=0D =0D Always set errp on failure. The generic bdrv_open_driver supports=0D driver functions which can return a negative value but forget to set=0D errp. That's a strange thing. Let's improve bdrv_qed_do_open to not=0D behave this way. This allows the simplification of code in=0D bdrv_qed_co_invalidate_cache().=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Alberto Garcia =0D Reviewed-by: Greg Kurz =0D Message-Id: <20210202124956.63146-14-vsementsov@virtuozzo.com>=0D [eblake: commit message grammar tweak]=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 1184b411016bce7590723170aa6b5984518707ec=0D https://github.com/qemu/qemu/commit/1184b411016bce7590723170aa6b598= 4518707ec=0D Author: Vladimir Sementsov-Ogievskiy =0D Date: 2021-03-08 (Mon, 08 Mar 2021)=0D =0D Changed paths:=0D M block/qcow2.c=0D =0D Log Message:=0D -----------=0D block/qcow2: refactor qcow2_update_options_prepare error paths=0D =0D Keep setting ret close to setting errp and don't merge different error=0D= paths into one. This way it's more obvious that we don't return=0D error without setting errp.=0D =0D Signed-off-by: Vladimir Sementsov-Ogievskiy =0D= Reviewed-by: Alberto Garcia =0D Message-Id: <20210202124956.63146-15-vsementsov@virtuozzo.com>=0D Signed-off-by: Eric Blake =0D =0D =0D Commit: 9abda42bf2f5aa6ef403d3140fd3d7d88e8064e9=0D https://github.com/qemu/qemu/commit/9abda42bf2f5aa6ef403d3140fd3d7d= 88e8064e9=0D Author: Peter Maydell =0D Date: 2021-03-11 (Thu, 11 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M block.c=0D M block/blkdebug.c=0D M block/blklogwrites.c=0D M block/blkreplay.c=0D M block/blkverify.c=0D M block/mirror.c=0D M block/qcow2-bitmap.c=0D M block/qcow2.c=0D M block/qcow2.h=0D M block/qed.c=0D M block/quorum.c=0D M blockdev.c=0D M blockjob.c=0D M docs/system/deprecated.rst=0D M include/block/blockjob.h=0D M nbd/server.c=0D M tests/qemu-iotests/049.out=0D M tests/qemu-iotests/178.out.qcow2=0D M tests/qemu-iotests/178.out.raw=0D M tests/qemu-iotests/241.out=0D M tests/test-cutils.c=0D M tests/test-keyval.c=0D M tests/test-qemu-opts.c=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2021-03-09' i= nto staging=0D =0D nbd patches for 2021-03-09=0D =0D - Add Vladimir as NBD co-maintainer=0D - Fix reporting of holes in NBD_CMD_BLOCK_STATUS=0D - Improve command-line parsing accuracy of large numbers (anything going=0D= through qemu_strtosz), including the deprecation of hex+suffix=0D - Improve some error reporting in the block layer=0D =0D # gpg: Signature made Tue 09 Mar 2021 15:38:10 GMT=0D # gpg: using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A25274= 36A=0D # gpg: Good signature from "Eric Blake " [full]=0D # gpg: aka "Eric Blake (Free Software Programmer) " [full]=0D # gpg: aka "[jpeg image of size 6874]" [full]=0D # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 = 436A=0D =0D * remotes/ericb/tags/pull-nbd-2021-03-09:=0D block/qcow2: refactor qcow2_update_options_prepare error paths=0D block/qed: bdrv_qed_do_open: deal with errp=0D block/qcow2: simplify qcow2_co_invalidate_cache()=0D block/qcow2: read_cache_sizes: return status value=0D block/qcow2-bitmap: return status from qcow2_store_persistent_dirty_bit= maps=0D block/qcow2-bitmap: improve qcow2_load_dirty_bitmaps() interface=0D block/qcow2: qcow2_get_specific_info(): drop error propagation=0D blockjob: return status from block_job_set_speed()=0D block/mirror: drop extra error propagation in commit_active_start()=0D block: drop extra error propagation for bdrv_set_backing_hd=0D blockdev: fix drive_backup_prepare() missed error=0D block: check return value of bdrv_open_child and drop error propagation= =0D utils: Deprecate hex-with-suffix sizes=0D utils: Improve qemu_strtosz() to have 64 bits of precision=0D utils: Enhance testsuite for do_strtosz()=0D nbd: server: Report holes for raw images=0D MAINTAINERS: add Vladimir as co-maintainer of NBD=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/363fc963054d...9abda42bf2f5= =0D From MAILER-DAEMON Thu Mar 11 11:26:50 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKO9C-00066E-9Y for mharc-qemu-commits@gnu.org; Thu, 11 Mar 2021 11:26:50 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:44818) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKO98-000623-E3 for qemu-commits@nongnu.org; Thu, 11 Mar 2021 11:26:48 -0500 Received: from out-21.smtp.github.com ([192.30.252.204]:47653 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKO93-0005tq-RH for qemu-commits@nongnu.org; Thu, 11 Mar 2021 11:26:46 -0500 Received: from github.com (hubbernetes-node-555fb1e.ac4-iad.github.net [10.52.201.33]) by smtp.github.com (Postfix) with ESMTPA id 7687E520567 for ; Thu, 11 Mar 2021 08:26:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615480000; bh=qrzFxDlJBfZrSxTai2as11plO+b8OdiY9+cWS2kVzgI=; h=Date:From:To:Subject:From; b=zHZH0PxI4WyiWIo475WUnC5uDY4w55d9EJHNlqFAQXx6weCZpk/vpRMFdZCrjvWS9 FC7R509LC1DOu4U156wxZK6WruXMWH2xgcK8sS8dyPMXTTCS7kqzGDYSxoSEngS5F0 MwwxVDh+eJd6IgBSiRsp1hfWYeJvYq+WhTZ1XW3o= Date: Thu, 11 Mar 2021 08:26:40 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 085d9a: docs/system: add a gentle prompt for the complexit... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Mar 2021 16:26:48 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 085d9afc68e30b97b1d4118849a3f3c8c77ff43a=0D https://github.com/qemu/qemu/commit/085d9afc68e30b97b1d4118849a3f3c= 8c77ff43a=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M docs/system/quickstart.rst=0D M docs/system/targets.rst=0D =0D Log Message:=0D -----------=0D docs/system: add a gentle prompt for the complexity to come=0D =0D We all know the QEMU command line can become a fiendishly complex=0D beast. Lets gently prepare our user for the horrors to come by=0D referencing where other example command lines can be found in the=0D manual.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Stefan Hajnoczi =0D Reviewed-by: John Snow =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210305092328.31792-3-alex.bennee@linaro.org>=0D =0D =0D Commit: dd5af6ece9b101d29895851a7441d848b7ccdbff=0D https://github.com/qemu/qemu/commit/dd5af6ece9b101d29895851a7441d84= 8b7ccdbff=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D A tests/docker/test-tcg=0D =0D Log Message:=0D -----------=0D tests/docker: add a test-tcg for building then running check-tcg=0D =0D This is mostly useful for verifying containers will work on the CI=0D setup.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210305092328.31792-4-alex.bennee@linaro.org>=0D =0D =0D Commit: e6d27a9c0db828c1fa2854eddefaab757b1e8447=0D https://github.com/qemu/qemu/commit/e6d27a9c0db828c1fa2854eddefaab7= 57b1e8447=0D Author: Daniele Buono =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Allow custom # of parallel linkers=0D =0D Define a new variable LD_JOBS, that can be used to select=0D the maximum number of linking jobs to be executed in parallel.=0D If the variable is not defined, maintain the default given by=0D make -j=0D =0D Currently, make parallelism at build time is based on the number=0D of cpus available.=0D =0D This doesn't work well with LTO at linking, because with LTO the=0D linker has to load in memory all the intermediate object files=0D for optimization.=0D The end result is that, if the gitlab runner happens to run two=0D linking processes at the same time, the job will fail with an=0D out-of-memory error,=0D =0D This patch leverages the ability to maintain high parallelism at=0D compile time, but limit the number of linkers executed in parallel.=0D =0D Signed-off-by: Daniele Buono =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210304030948.9367-2-dbuono@linux.vnet.ibm.com>=0D Message-Id: <20210305092328.31792-8-alex.bennee@linaro.org>=0D =0D =0D Commit: 1bb12e172af1f9e308b8858230651326e3bf4587=0D https://github.com/qemu/qemu/commit/1bb12e172af1f9e308b885823065132= 6e3bf4587=0D Author: Daniele Buono =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Add jobs to test CFI flags=0D =0D QEMU has had options to enable control-flow integrity features=0D for a few months now. Add two sets of build/check/acceptance=0D jobs to ensure the binary produced is working fine.=0D =0D The three sets allow testing of x86_64 binaries for x86_64, s390x,=0D ppc64 and aarch64 targets=0D =0D [AJB: tweak job names to avoid brands]=0D =0D Signed-off-by: Daniele Buono =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210304030948.9367-3-dbuono@linux.vnet.ibm.com>=0D Message-Id: <20210305092328.31792-9-alex.bennee@linaro.org>=0D =0D =0D Commit: 327910dea16d2b7c45104f17ad3a7a45a71d335a=0D https://github.com/qemu/qemu/commit/327910dea16d2b7c45104f17ad3a7a4= 5a71d335a=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M tests/docker/dockerfiles/debian10.docker=0D =0D Log Message:=0D -----------=0D tests/docker: Use --arch-only when building Debian cross image=0D =0D When building a Docker image based on debian10.docker on=0D a non-x86 host, we get:=0D =0D [2/4] RUN apt update && DEBIAN_FRONTEND=3Dnoninteractive eatmydata = apt build-dep -yy qemu=0D Reading package lists... Done=0D Building dependency tree=0D Reading state information... Done=0D Some packages could not be installed. This may mean that you have=0D requested an impossible situation or if you are using the unstable=0D distribution that some required packages have not yet been created=0D or been moved out of Incoming.=0D The following information may help to resolve the situation:=0D =0D The following packages have unmet dependencies:=0D builddeps:qemu : Depends: gcc-s390x-linux-gnu but it is not installable= =0D Depends: gcc-alpha-linux-gnu but it is not installable= =0D E: Unable to correct problems, you have held broken packages.=0D =0D Fix by using the --arch-only option suggested here:=0D https://bugs.launchpad.net/ubuntu/+source/qemu/+bug/1866032/comments/1=0D= =0D Suggested-by: Christian Ehrhardt =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alex Benn=C3=A9e =0D Message-Id: <20210223211115.2971565-1-f4bug@amsat.org>=0D Message-Id: <20210305092328.31792-10-alex.bennee@linaro.org>=0D =0D =0D Commit: 2c9192c17778f0b59df6d8d3292b177436338ed0=0D https://github.com/qemu/qemu/commit/2c9192c17778f0b59df6d8d3292b177= 436338ed0=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M .editorconfig=0D =0D Log Message:=0D -----------=0D .editorconfig: update the automatic mode setting for Emacs=0D =0D It seems the editor specific keywords have been deprecated in the main=0D= editorconfig plugin:=0D =0D https://github.com/editorconfig/editorconfig-emacs#file-type-file_type_= ext-file_type_emacs=0D =0D Update the keywords to the suggested one and point users at the=0D extension.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210305144839.6558-1-alex.bennee@linaro.org>=0D =0D =0D Commit: a6487d37c2adff7572f9d3be8635c1fa96231b67=0D https://github.com/qemu/qemu/commit/a6487d37c2adff7572f9d3be8635c1f= a96231b67=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/virt.c=0D M include/hw/arm/virt.h=0D M include/hw/boards.h=0D =0D Log Message:=0D -----------=0D hw/board: promote fdt from ARM VirtMachineState to MachineState=0D =0D The use of FDT's is quite common across our various platforms. To=0D allow the guest loader to tweak it we need to make it available in=0D the generic state. This creates the field and migrates the initial=0D user to use the generic field. Other boards will be updated in later=0D patches.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303173642.3805-2-alex.bennee@linaro.org>=0D =0D =0D Commit: c65d7080d82e932baae97b0ed4cb39ff22635be2=0D https://github.com/qemu/qemu/commit/c65d7080d82e932baae97b0ed4cb39f= f22635be2=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/virt.c=0D M include/hw/riscv/virt.h=0D =0D Log Message:=0D -----------=0D hw/riscv: migrate fdt field to generic MachineState=0D =0D This is a mechanical change to make the fdt available through=0D MachineState.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303173642.3805-3-alex.bennee@linaro.org>=0D =0D =0D Commit: 78da6a1bca224a8c1c4b1bdf2ca8ec19c74c6fc1=0D https://github.com/qemu/qemu/commit/78da6a1bca224a8c1c4b1bdf2ca8ec1= 9c74c6fc1=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M include/sysemu/device_tree.h=0D M softmmu/device_tree.c=0D =0D Log Message:=0D -----------=0D device_tree: add qemu_fdt_setprop_string_array helper=0D =0D A string array in device tree is simply a series of \0 terminated=0D strings next to each other. As libfdt doesn't support that directly=0D we need to build it ourselves.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Message-Id: <20210303173642.3805-4-alex.bennee@linaro.org>=0D =0D =0D Commit: a33ff6d2c6bd480fbab3bc9f748655a9269881eb=0D https://github.com/qemu/qemu/commit/a33ff6d2c6bd480fbab3bc9f748655a= 9269881eb=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A hw/core/guest-loader.c=0D A hw/core/guest-loader.h=0D M hw/core/meson.build=0D =0D Log Message:=0D -----------=0D hw/core: implement a guest-loader to support static hypervisor guests=0D= =0D Hypervisors, especially type-1 ones, need the firmware/bootcode to put=0D= their initial guest somewhere in memory and pass the information to it=0D= via platform data. The guest-loader is modelled after the generic=0D loader for exactly this sort of purpose:=0D =0D $QEMU $ARGS -kernel ~/xen.git/xen/xen \=0D -append "dom0_mem=3D1G,max:1G loglvl=3Dall guest_loglvl=3Dall" \=0D -device guest-loader,addr=3D0x42000000,kernel=3DImage,bootargs=3D"roo= t=3D/dev/sda2 ro console=3Dhvc0 earlyprintk=3Dxen" \=0D -device guest-loader,addr=3D0x47000000,initrd=3Drootfs.cpio=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303173642.3805-5-alex.bennee@linaro.org>=0D =0D =0D Commit: 70f20110150ec60d112bbbc9a6f8b100cd203701=0D https://github.com/qemu/qemu/commit/70f20110150ec60d112bbbc9a6f8b10= 0cd203701=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D R docs/generic-loader.txt=0D A docs/system/generic-loader.rst=0D M docs/system/index.rst=0D =0D Log Message:=0D -----------=0D docs: move generic-loader documentation into the main manual=0D =0D We might as well surface this useful information in the manual so=0D users can find it easily. It is a fairly simple conversion to rst with=0D= the only textual fixes being QemuOps to QemuOpts.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Message-Id: <20210303173642.3805-6-alex.bennee@linaro.org>=0D =0D =0D Commit: 0146037807831ff6424e5b8be66532ce39f0eb13=0D https://github.com/qemu/qemu/commit/0146037807831ff6424e5b8be66532c= e39f0eb13=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A docs/system/guest-loader.rst=0D M docs/system/index.rst=0D =0D Log Message:=0D -----------=0D docs: add some documentation for the guest-loader=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Message-Id: <20210303173642.3805-7-alex.bennee@linaro.org>=0D =0D =0D Commit: 2ceb7c03a2cd89dfb04e2e6707b6e7bd61142653=0D https://github.com/qemu/qemu/commit/2ceb7c03a2cd89dfb04e2e6707b6e7b= d61142653=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A tests/acceptance/boot_xen.py=0D =0D Log Message:=0D -----------=0D tests/avocado: add boot_xen tests=0D =0D These tests make sure we can boot the Xen hypervisor with a Dom0=0D kernel using the guest-loader. We currently have to use a kernel I=0D built myself because there are issues using the Debian kernel images.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Tested-by: Cleber Rosa =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Cleber Rosa =0D Message-Id: <20210303173642.3805-8-alex.bennee@linaro.org>=0D =0D =0D Commit: 6b5fe13786f2e06fce4ceb5f871dd239917105c6=0D https://github.com/qemu/qemu/commit/6b5fe13786f2e06fce4ceb5f871dd23= 9917105c6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M gdbstub.c=0D M hw/mips/malta.c=0D M hw/semihosting/arm-compat-semi.c=0D M hw/semihosting/config.c=0D M hw/semihosting/console.c=0D R include/hw/semihosting/console.h=0D R include/hw/semihosting/semihost.h=0D A include/semihosting/console.h=0D A include/semihosting/semihost.h=0D M linux-user/aarch64/cpu_loop.c=0D M linux-user/arm/cpu_loop.c=0D M linux-user/riscv/cpu_loop.c=0D M linux-user/semihost.c=0D M softmmu/vl.c=0D M stubs/semihost.c=0D M target/arm/helper.c=0D M target/arm/m_helper.c=0D M target/arm/translate-a64.c=0D M target/arm/translate.c=0D M target/lm32/helper.c=0D M target/m68k/op_helper.c=0D M target/mips/cpu.c=0D M target/mips/mips-semi.c=0D M target/mips/translate.c=0D M target/nios2/helper.c=0D M target/riscv/cpu_helper.c=0D M target/unicore32/helper.c=0D M target/xtensa/translate.c=0D M target/xtensa/xtensa-semi.c=0D =0D Log Message:=0D -----------=0D semihosting: Move include/hw/semihosting/ -> include/semihosting/=0D =0D We want to move the semihosting code out of hw/ in the next patch.=0D =0D This patch contains the mechanical steps, created using:=0D =0D $ git mv include/hw/semihosting/ include/=0D $ sed -i s,hw/semihosting,semihosting, $(git grep -l hw/semihosting)=0D= =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210226131356.3964782-2-f4bug@amsat.org>=0D Message-Id: <20210305135451.15427-2-alex.bennee@linaro.org>=0D =0D =0D Commit: 8df9f0c3d7f53c5a123ebb873d1c22daec003c22=0D https://github.com/qemu/qemu/commit/8df9f0c3d7f53c5a123ebb873d1c22d= aec003c22=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M Kconfig=0D M MAINTAINERS=0D M hw/Kconfig=0D M hw/meson.build=0D R hw/semihosting/Kconfig=0D R hw/semihosting/arm-compat-semi.c=0D R hw/semihosting/common-semi.h=0D R hw/semihosting/config.c=0D R hw/semihosting/console.c=0D R hw/semihosting/meson.build=0D M meson.build=0D A semihosting/Kconfig=0D A semihosting/arm-compat-semi.c=0D A semihosting/common-semi.h=0D A semihosting/config.c=0D A semihosting/console.c=0D A semihosting/meson.build=0D =0D Log Message:=0D -----------=0D semihosting: Move hw/semihosting/ -> semihosting/=0D =0D With the exception of hw/core/, the hw/ directory only contains=0D device models used in system emulation. Semihosting is also used=0D by user emulation. As a generic feature, move it out of hw/ directory.=0D= =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210226131356.3964782-3-f4bug@amsat.org>=0D Message-Id: <20210305135451.15427-3-alex.bennee@linaro.org>=0D =0D =0D Commit: f4abdf32714d1845b7c01ec136dd2b04c2f7db47=0D https://github.com/qemu/qemu/commit/f4abdf32714d1845b7c01ec136dd2b0= 4c2f7db47=0D Author: Peter Maydell =0D Date: 2021-03-11 (Thu, 11 Mar 2021)=0D =0D Changed paths:=0D M .editorconfig=0D M .gitlab-ci.yml=0D M Kconfig=0D M MAINTAINERS=0D R docs/generic-loader.txt=0D A docs/system/generic-loader.rst=0D A docs/system/guest-loader.rst=0D M docs/system/index.rst=0D M docs/system/quickstart.rst=0D M docs/system/targets.rst=0D M gdbstub.c=0D M hw/Kconfig=0D M hw/arm/virt.c=0D A hw/core/guest-loader.c=0D A hw/core/guest-loader.h=0D M hw/core/meson.build=0D M hw/meson.build=0D M hw/mips/malta.c=0D M hw/riscv/virt.c=0D R hw/semihosting/Kconfig=0D R hw/semihosting/arm-compat-semi.c=0D R hw/semihosting/common-semi.h=0D R hw/semihosting/config.c=0D R hw/semihosting/console.c=0D R hw/semihosting/meson.build=0D M include/hw/arm/virt.h=0D M include/hw/boards.h=0D M include/hw/riscv/virt.h=0D R include/hw/semihosting/console.h=0D R include/hw/semihosting/semihost.h=0D A include/semihosting/console.h=0D A include/semihosting/semihost.h=0D M include/sysemu/device_tree.h=0D M linux-user/aarch64/cpu_loop.c=0D M linux-user/arm/cpu_loop.c=0D M linux-user/riscv/cpu_loop.c=0D M linux-user/semihost.c=0D M meson.build=0D A semihosting/Kconfig=0D A semihosting/arm-compat-semi.c=0D A semihosting/common-semi.h=0D A semihosting/config.c=0D A semihosting/console.c=0D A semihosting/meson.build=0D M softmmu/device_tree.c=0D M softmmu/vl.c=0D M stubs/semihost.c=0D M target/arm/helper.c=0D M target/arm/m_helper.c=0D M target/arm/translate-a64.c=0D M target/arm/translate.c=0D M target/lm32/helper.c=0D M target/m68k/op_helper.c=0D M target/mips/cpu.c=0D M target/mips/mips-semi.c=0D M target/mips/translate.c=0D M target/nios2/helper.c=0D M target/riscv/cpu_helper.c=0D M target/unicore32/helper.c=0D M target/xtensa/translate.c=0D M target/xtensa/xtensa-semi.c=0D A tests/acceptance/boot_xen.py=0D M tests/docker/dockerfiles/debian10.docker=0D A tests/docker/test-tcg=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-docs-xe= n-updates-100321-2' into staging=0D =0D Testing, guest-loader and other misc tweaks=0D =0D - add warning text to quickstart example=0D - add CFI tests to CI=0D - use --arch-only for docker pre-requisites=0D - fix .editorconfig for emacs=0D - add guest-loader for Xen-like hypervisor testing=0D - move generic-loader docs into manual proper=0D - move semihosting out of hw/=0D =0D # gpg: Signature made Wed 10 Mar 2021 15:35:31 GMT=0D # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2= A44=0D # gpg: Good signature from "Alex Benn=C3=A9e (Master Work Key) " [full]=0D # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E = 2A44=0D =0D * remotes/stsquad/tags/pull-testing-docs-xen-updates-100321-2:=0D semihosting: Move hw/semihosting/ -> semihosting/=0D semihosting: Move include/hw/semihosting/ -> include/semihosting/=0D tests/avocado: add boot_xen tests=0D docs: add some documentation for the guest-loader=0D docs: move generic-loader documentation into the main manual=0D hw/core: implement a guest-loader to support static hypervisor guests=0D= device_tree: add qemu_fdt_setprop_string_array helper=0D hw/riscv: migrate fdt field to generic MachineState=0D hw/board: promote fdt from ARM VirtMachineState to MachineState=0D .editorconfig: update the automatic mode setting for Emacs=0D tests/docker: Use --arch-only when building Debian cross image=0D gitlab-ci.yml: Add jobs to test CFI flags=0D gitlab-ci.yml: Allow custom # of parallel linkers=0D tests/docker: add a test-tcg for building then running check-tcg=0D docs/system: add a gentle prompt for the complexity to come=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/9abda42bf2f5...f4abdf32714d= =0D From MAILER-DAEMON Thu Mar 11 13:55:38 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKQTC-0000ZD-3E for mharc-qemu-commits@gnu.org; Thu, 11 Mar 2021 13:55:38 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:34484) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKQT9-0000TG-UC for qemu-commits@nongnu.org; Thu, 11 Mar 2021 13:55:35 -0500 Received: from out-21.smtp.github.com ([192.30.252.204]:54095 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKQT2-0001qW-MH for qemu-commits@nongnu.org; Thu, 11 Mar 2021 13:55:35 -0500 Received: from github.com (hubbernetes-node-cb8f174.ac4-iad.github.net [10.52.211.85]) by smtp.github.com (Postfix) with ESMTPA id EC9335205FE for ; Thu, 11 Mar 2021 10:55:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615488928; bh=VlEOsbKUmgMLCPjevZkKvWk/DevsChkK9N9j0Y3r2/c=; h=Date:From:To:Subject:From; b=cMqMQKl8weTYY2/9GxrV++yVsBLcGMffCXR6j1JkkJr8KN11pPyJASb99+QAF8wCY 43DXPquhA79Qw8oJe9cFPct4lkRD4wT01cSkXzGhf40tYVTzvrEJzuxihY5a4M+HlJ HGHkI9J60rFvA6vQfUy6oBxjePS0HdeL+uIR7rms= Date: Thu, 11 Mar 2021 10:55:27 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 085d9a: docs/system: add a gentle prompt for the complexit... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Mar 2021 18:55:36 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 085d9afc68e30b97b1d4118849a3f3c8c77ff43a=0D https://github.com/qemu/qemu/commit/085d9afc68e30b97b1d4118849a3f3c= 8c77ff43a=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M docs/system/quickstart.rst=0D M docs/system/targets.rst=0D =0D Log Message:=0D -----------=0D docs/system: add a gentle prompt for the complexity to come=0D =0D We all know the QEMU command line can become a fiendishly complex=0D beast. Lets gently prepare our user for the horrors to come by=0D referencing where other example command lines can be found in the=0D manual.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Stefan Hajnoczi =0D Reviewed-by: John Snow =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210305092328.31792-3-alex.bennee@linaro.org>=0D =0D =0D Commit: dd5af6ece9b101d29895851a7441d848b7ccdbff=0D https://github.com/qemu/qemu/commit/dd5af6ece9b101d29895851a7441d84= 8b7ccdbff=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D A tests/docker/test-tcg=0D =0D Log Message:=0D -----------=0D tests/docker: add a test-tcg for building then running check-tcg=0D =0D This is mostly useful for verifying containers will work on the CI=0D setup.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210305092328.31792-4-alex.bennee@linaro.org>=0D =0D =0D Commit: e6d27a9c0db828c1fa2854eddefaab757b1e8447=0D https://github.com/qemu/qemu/commit/e6d27a9c0db828c1fa2854eddefaab7= 57b1e8447=0D Author: Daniele Buono =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Allow custom # of parallel linkers=0D =0D Define a new variable LD_JOBS, that can be used to select=0D the maximum number of linking jobs to be executed in parallel.=0D If the variable is not defined, maintain the default given by=0D make -j=0D =0D Currently, make parallelism at build time is based on the number=0D of cpus available.=0D =0D This doesn't work well with LTO at linking, because with LTO the=0D linker has to load in memory all the intermediate object files=0D for optimization.=0D The end result is that, if the gitlab runner happens to run two=0D linking processes at the same time, the job will fail with an=0D out-of-memory error,=0D =0D This patch leverages the ability to maintain high parallelism at=0D compile time, but limit the number of linkers executed in parallel.=0D =0D Signed-off-by: Daniele Buono =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210304030948.9367-2-dbuono@linux.vnet.ibm.com>=0D Message-Id: <20210305092328.31792-8-alex.bennee@linaro.org>=0D =0D =0D Commit: 1bb12e172af1f9e308b8858230651326e3bf4587=0D https://github.com/qemu/qemu/commit/1bb12e172af1f9e308b885823065132= 6e3bf4587=0D Author: Daniele Buono =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Add jobs to test CFI flags=0D =0D QEMU has had options to enable control-flow integrity features=0D for a few months now. Add two sets of build/check/acceptance=0D jobs to ensure the binary produced is working fine.=0D =0D The three sets allow testing of x86_64 binaries for x86_64, s390x,=0D ppc64 and aarch64 targets=0D =0D [AJB: tweak job names to avoid brands]=0D =0D Signed-off-by: Daniele Buono =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210304030948.9367-3-dbuono@linux.vnet.ibm.com>=0D Message-Id: <20210305092328.31792-9-alex.bennee@linaro.org>=0D =0D =0D Commit: 327910dea16d2b7c45104f17ad3a7a45a71d335a=0D https://github.com/qemu/qemu/commit/327910dea16d2b7c45104f17ad3a7a4= 5a71d335a=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M tests/docker/dockerfiles/debian10.docker=0D =0D Log Message:=0D -----------=0D tests/docker: Use --arch-only when building Debian cross image=0D =0D When building a Docker image based on debian10.docker on=0D a non-x86 host, we get:=0D =0D [2/4] RUN apt update && DEBIAN_FRONTEND=3Dnoninteractive eatmydata = apt build-dep -yy qemu=0D Reading package lists... Done=0D Building dependency tree=0D Reading state information... Done=0D Some packages could not be installed. This may mean that you have=0D requested an impossible situation or if you are using the unstable=0D distribution that some required packages have not yet been created=0D or been moved out of Incoming.=0D The following information may help to resolve the situation:=0D =0D The following packages have unmet dependencies:=0D builddeps:qemu : Depends: gcc-s390x-linux-gnu but it is not installable= =0D Depends: gcc-alpha-linux-gnu but it is not installable= =0D E: Unable to correct problems, you have held broken packages.=0D =0D Fix by using the --arch-only option suggested here:=0D https://bugs.launchpad.net/ubuntu/+source/qemu/+bug/1866032/comments/1=0D= =0D Suggested-by: Christian Ehrhardt =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alex Benn=C3=A9e =0D Message-Id: <20210223211115.2971565-1-f4bug@amsat.org>=0D Message-Id: <20210305092328.31792-10-alex.bennee@linaro.org>=0D =0D =0D Commit: 2c9192c17778f0b59df6d8d3292b177436338ed0=0D https://github.com/qemu/qemu/commit/2c9192c17778f0b59df6d8d3292b177= 436338ed0=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M .editorconfig=0D =0D Log Message:=0D -----------=0D .editorconfig: update the automatic mode setting for Emacs=0D =0D It seems the editor specific keywords have been deprecated in the main=0D= editorconfig plugin:=0D =0D https://github.com/editorconfig/editorconfig-emacs#file-type-file_type_= ext-file_type_emacs=0D =0D Update the keywords to the suggested one and point users at the=0D extension.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210305144839.6558-1-alex.bennee@linaro.org>=0D =0D =0D Commit: a6487d37c2adff7572f9d3be8635c1fa96231b67=0D https://github.com/qemu/qemu/commit/a6487d37c2adff7572f9d3be8635c1f= a96231b67=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/virt.c=0D M include/hw/arm/virt.h=0D M include/hw/boards.h=0D =0D Log Message:=0D -----------=0D hw/board: promote fdt from ARM VirtMachineState to MachineState=0D =0D The use of FDT's is quite common across our various platforms. To=0D allow the guest loader to tweak it we need to make it available in=0D the generic state. This creates the field and migrates the initial=0D user to use the generic field. Other boards will be updated in later=0D patches.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303173642.3805-2-alex.bennee@linaro.org>=0D =0D =0D Commit: c65d7080d82e932baae97b0ed4cb39ff22635be2=0D https://github.com/qemu/qemu/commit/c65d7080d82e932baae97b0ed4cb39f= f22635be2=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/riscv/virt.c=0D M include/hw/riscv/virt.h=0D =0D Log Message:=0D -----------=0D hw/riscv: migrate fdt field to generic MachineState=0D =0D This is a mechanical change to make the fdt available through=0D MachineState.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303173642.3805-3-alex.bennee@linaro.org>=0D =0D =0D Commit: 78da6a1bca224a8c1c4b1bdf2ca8ec19c74c6fc1=0D https://github.com/qemu/qemu/commit/78da6a1bca224a8c1c4b1bdf2ca8ec1= 9c74c6fc1=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M include/sysemu/device_tree.h=0D M softmmu/device_tree.c=0D =0D Log Message:=0D -----------=0D device_tree: add qemu_fdt_setprop_string_array helper=0D =0D A string array in device tree is simply a series of \0 terminated=0D strings next to each other. As libfdt doesn't support that directly=0D we need to build it ourselves.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Message-Id: <20210303173642.3805-4-alex.bennee@linaro.org>=0D =0D =0D Commit: a33ff6d2c6bd480fbab3bc9f748655a9269881eb=0D https://github.com/qemu/qemu/commit/a33ff6d2c6bd480fbab3bc9f748655a= 9269881eb=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A hw/core/guest-loader.c=0D A hw/core/guest-loader.h=0D M hw/core/meson.build=0D =0D Log Message:=0D -----------=0D hw/core: implement a guest-loader to support static hypervisor guests=0D= =0D Hypervisors, especially type-1 ones, need the firmware/bootcode to put=0D= their initial guest somewhere in memory and pass the information to it=0D= via platform data. The guest-loader is modelled after the generic=0D loader for exactly this sort of purpose:=0D =0D $QEMU $ARGS -kernel ~/xen.git/xen/xen \=0D -append "dom0_mem=3D1G,max:1G loglvl=3Dall guest_loglvl=3Dall" \=0D -device guest-loader,addr=3D0x42000000,kernel=3DImage,bootargs=3D"roo= t=3D/dev/sda2 ro console=3Dhvc0 earlyprintk=3Dxen" \=0D -device guest-loader,addr=3D0x47000000,initrd=3Drootfs.cpio=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303173642.3805-5-alex.bennee@linaro.org>=0D =0D =0D Commit: 70f20110150ec60d112bbbc9a6f8b100cd203701=0D https://github.com/qemu/qemu/commit/70f20110150ec60d112bbbc9a6f8b10= 0cd203701=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D R docs/generic-loader.txt=0D A docs/system/generic-loader.rst=0D M docs/system/index.rst=0D =0D Log Message:=0D -----------=0D docs: move generic-loader documentation into the main manual=0D =0D We might as well surface this useful information in the manual so=0D users can find it easily. It is a fairly simple conversion to rst with=0D= the only textual fixes being QemuOps to QemuOpts.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Message-Id: <20210303173642.3805-6-alex.bennee@linaro.org>=0D =0D =0D Commit: 0146037807831ff6424e5b8be66532ce39f0eb13=0D https://github.com/qemu/qemu/commit/0146037807831ff6424e5b8be66532c= e39f0eb13=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A docs/system/guest-loader.rst=0D M docs/system/index.rst=0D =0D Log Message:=0D -----------=0D docs: add some documentation for the guest-loader=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alistair Francis =0D Message-Id: <20210303173642.3805-7-alex.bennee@linaro.org>=0D =0D =0D Commit: 2ceb7c03a2cd89dfb04e2e6707b6e7bd61142653=0D https://github.com/qemu/qemu/commit/2ceb7c03a2cd89dfb04e2e6707b6e7b= d61142653=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A tests/acceptance/boot_xen.py=0D =0D Log Message:=0D -----------=0D tests/avocado: add boot_xen tests=0D =0D These tests make sure we can boot the Xen hypervisor with a Dom0=0D kernel using the guest-loader. We currently have to use a kernel I=0D built myself because there are issues using the Debian kernel images.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Tested-by: Cleber Rosa =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Cleber Rosa =0D Message-Id: <20210303173642.3805-8-alex.bennee@linaro.org>=0D =0D =0D Commit: 6b5fe13786f2e06fce4ceb5f871dd239917105c6=0D https://github.com/qemu/qemu/commit/6b5fe13786f2e06fce4ceb5f871dd23= 9917105c6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M gdbstub.c=0D M hw/mips/malta.c=0D M hw/semihosting/arm-compat-semi.c=0D M hw/semihosting/config.c=0D M hw/semihosting/console.c=0D R include/hw/semihosting/console.h=0D R include/hw/semihosting/semihost.h=0D A include/semihosting/console.h=0D A include/semihosting/semihost.h=0D M linux-user/aarch64/cpu_loop.c=0D M linux-user/arm/cpu_loop.c=0D M linux-user/riscv/cpu_loop.c=0D M linux-user/semihost.c=0D M softmmu/vl.c=0D M stubs/semihost.c=0D M target/arm/helper.c=0D M target/arm/m_helper.c=0D M target/arm/translate-a64.c=0D M target/arm/translate.c=0D M target/lm32/helper.c=0D M target/m68k/op_helper.c=0D M target/mips/cpu.c=0D M target/mips/mips-semi.c=0D M target/mips/translate.c=0D M target/nios2/helper.c=0D M target/riscv/cpu_helper.c=0D M target/unicore32/helper.c=0D M target/xtensa/translate.c=0D M target/xtensa/xtensa-semi.c=0D =0D Log Message:=0D -----------=0D semihosting: Move include/hw/semihosting/ -> include/semihosting/=0D =0D We want to move the semihosting code out of hw/ in the next patch.=0D =0D This patch contains the mechanical steps, created using:=0D =0D $ git mv include/hw/semihosting/ include/=0D $ sed -i s,hw/semihosting,semihosting, $(git grep -l hw/semihosting)=0D= =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210226131356.3964782-2-f4bug@amsat.org>=0D Message-Id: <20210305135451.15427-2-alex.bennee@linaro.org>=0D =0D =0D Commit: 8df9f0c3d7f53c5a123ebb873d1c22daec003c22=0D https://github.com/qemu/qemu/commit/8df9f0c3d7f53c5a123ebb873d1c22d= aec003c22=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M Kconfig=0D M MAINTAINERS=0D M hw/Kconfig=0D M hw/meson.build=0D R hw/semihosting/Kconfig=0D R hw/semihosting/arm-compat-semi.c=0D R hw/semihosting/common-semi.h=0D R hw/semihosting/config.c=0D R hw/semihosting/console.c=0D R hw/semihosting/meson.build=0D M meson.build=0D A semihosting/Kconfig=0D A semihosting/arm-compat-semi.c=0D A semihosting/common-semi.h=0D A semihosting/config.c=0D A semihosting/console.c=0D A semihosting/meson.build=0D =0D Log Message:=0D -----------=0D semihosting: Move hw/semihosting/ -> semihosting/=0D =0D With the exception of hw/core/, the hw/ directory only contains=0D device models used in system emulation. Semihosting is also used=0D by user emulation. As a generic feature, move it out of hw/ directory.=0D= =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210226131356.3964782-3-f4bug@amsat.org>=0D Message-Id: <20210305135451.15427-3-alex.bennee@linaro.org>=0D =0D =0D Commit: f4abdf32714d1845b7c01ec136dd2b04c2f7db47=0D https://github.com/qemu/qemu/commit/f4abdf32714d1845b7c01ec136dd2b0= 4c2f7db47=0D Author: Peter Maydell =0D Date: 2021-03-11 (Thu, 11 Mar 2021)=0D =0D Changed paths:=0D M .editorconfig=0D M .gitlab-ci.yml=0D M Kconfig=0D M MAINTAINERS=0D R docs/generic-loader.txt=0D A docs/system/generic-loader.rst=0D A docs/system/guest-loader.rst=0D M docs/system/index.rst=0D M docs/system/quickstart.rst=0D M docs/system/targets.rst=0D M gdbstub.c=0D M hw/Kconfig=0D M hw/arm/virt.c=0D A hw/core/guest-loader.c=0D A hw/core/guest-loader.h=0D M hw/core/meson.build=0D M hw/meson.build=0D M hw/mips/malta.c=0D M hw/riscv/virt.c=0D R hw/semihosting/Kconfig=0D R hw/semihosting/arm-compat-semi.c=0D R hw/semihosting/common-semi.h=0D R hw/semihosting/config.c=0D R hw/semihosting/console.c=0D R hw/semihosting/meson.build=0D M include/hw/arm/virt.h=0D M include/hw/boards.h=0D M include/hw/riscv/virt.h=0D R include/hw/semihosting/console.h=0D R include/hw/semihosting/semihost.h=0D A include/semihosting/console.h=0D A include/semihosting/semihost.h=0D M include/sysemu/device_tree.h=0D M linux-user/aarch64/cpu_loop.c=0D M linux-user/arm/cpu_loop.c=0D M linux-user/riscv/cpu_loop.c=0D M linux-user/semihost.c=0D M meson.build=0D A semihosting/Kconfig=0D A semihosting/arm-compat-semi.c=0D A semihosting/common-semi.h=0D A semihosting/config.c=0D A semihosting/console.c=0D A semihosting/meson.build=0D M softmmu/device_tree.c=0D M softmmu/vl.c=0D M stubs/semihost.c=0D M target/arm/helper.c=0D M target/arm/m_helper.c=0D M target/arm/translate-a64.c=0D M target/arm/translate.c=0D M target/lm32/helper.c=0D M target/m68k/op_helper.c=0D M target/mips/cpu.c=0D M target/mips/mips-semi.c=0D M target/mips/translate.c=0D M target/nios2/helper.c=0D M target/riscv/cpu_helper.c=0D M target/unicore32/helper.c=0D M target/xtensa/translate.c=0D M target/xtensa/xtensa-semi.c=0D A tests/acceptance/boot_xen.py=0D M tests/docker/dockerfiles/debian10.docker=0D A tests/docker/test-tcg=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-docs-xe= n-updates-100321-2' into staging=0D =0D Testing, guest-loader and other misc tweaks=0D =0D - add warning text to quickstart example=0D - add CFI tests to CI=0D - use --arch-only for docker pre-requisites=0D - fix .editorconfig for emacs=0D - add guest-loader for Xen-like hypervisor testing=0D - move generic-loader docs into manual proper=0D - move semihosting out of hw/=0D =0D # gpg: Signature made Wed 10 Mar 2021 15:35:31 GMT=0D # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2= A44=0D # gpg: Good signature from "Alex Benn=C3=A9e (Master Work Key) " [full]=0D # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E = 2A44=0D =0D * remotes/stsquad/tags/pull-testing-docs-xen-updates-100321-2:=0D semihosting: Move hw/semihosting/ -> semihosting/=0D semihosting: Move include/hw/semihosting/ -> include/semihosting/=0D tests/avocado: add boot_xen tests=0D docs: add some documentation for the guest-loader=0D docs: move generic-loader documentation into the main manual=0D hw/core: implement a guest-loader to support static hypervisor guests=0D= device_tree: add qemu_fdt_setprop_string_array helper=0D hw/riscv: migrate fdt field to generic MachineState=0D hw/board: promote fdt from ARM VirtMachineState to MachineState=0D .editorconfig: update the automatic mode setting for Emacs=0D tests/docker: Use --arch-only when building Debian cross image=0D gitlab-ci.yml: Add jobs to test CFI flags=0D gitlab-ci.yml: Allow custom # of parallel linkers=0D tests/docker: add a test-tcg for building then running check-tcg=0D docs/system: add a gentle prompt for the complexity to come=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/9abda42bf2f5...f4abdf32714d= =0D From MAILER-DAEMON Thu Mar 11 14:01:24 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKQYg-0006Vy-SP for mharc-qemu-commits@gnu.org; Thu, 11 Mar 2021 14:01:22 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:36524) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKQYd-0006Ud-LA for qemu-commits@nongnu.org; Thu, 11 Mar 2021 14:01:15 -0500 Received: from out-18.smtp.github.com ([192.30.252.201]:57731 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKQYW-00056a-SA for qemu-commits@nongnu.org; Thu, 11 Mar 2021 14:01:14 -0500 Received: from github.com (hubbernetes-node-0a01d71.va3-iad.github.net [10.48.109.65]) by smtp.github.com (Postfix) with ESMTPA id 8FE4E340E1B for ; Thu, 11 Mar 2021 11:01:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615489267; bh=CDB0b3B9J5BJP2opGikwvkxw623jxHNiNVpE+o7rg8I=; h=Date:From:To:Subject:From; b=Mp8TNx/1OfiGaoPXYOQUimtGDmH7r6caxWTKwDvA4yMhTouBKUEHiVyDl8yvSg1G2 Lhl7+HBm+y7Q6704WX/niOw/HwiJouxcx/Igeu0SSVER8aX69H+CA5TfBZzngkmJZP IuNHOVVQ0JPo3vTIweH/qvdsaRg6IAb9ZinPSPYo= Date: Thu, 11 Mar 2021 11:01:07 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] cba42d: Various spelling fixes X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Mar 2021 19:01:16 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: cba42d61a379bc1c983ddb39d479de3581d2d578=0D https://github.com/qemu/qemu/commit/cba42d61a379bc1c983ddb39d479de3= 581d2d578=0D Author: Michael Tokarev =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M disas/nanomips.cpp=0D M hw/misc/trace-events=0D M hw/net/allwinner-sun8i-emac.c=0D M hw/ppc/pnv_bmc.c=0D M hw/usb/ccid-card-emulated.c=0D M hw/usb/hcd-ohci.c=0D M hw/virtio/vhost.c=0D M include/hw/s390x/css.h=0D M qemu-options.hx=0D M target/i386/cpu.c=0D M target/i386/machine.c=0D M target/m68k/op_helper.c=0D M target/riscv/cpu.c=0D =0D Log Message:=0D -----------=0D Various spelling fixes=0D =0D An assorted set of spelling fixes in various places.=0D =0D Signed-off-by: Michael Tokarev =0D Reviewed-by: Stefan Weil =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Peter Maydell =0D Message-Id: <20210309111510.79495-1-mjt@msgid.tls.msk.ru>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: e91bae8e98a6438156752dfbe9c0e2494d4b80f6=0D https://github.com/qemu/qemu/commit/e91bae8e98a6438156752dfbe9c0e24= 94d4b80f6=0D Author: Eric Blake =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D =0D Log Message:=0D -----------=0D scsi: Silence gcc warning=0D =0D On Fedora 33, gcc 10.2.1 notes that scsi_cdb_length(buf) can set=0D len=3D=3D-1, which in turn overflows g_malloc():=0D =0D [5/5] Linking target qemu-system-x86_64=0D In function =E2=80=98scsi_disk_new_request_dump=E2=80=99,=0D inlined from =E2=80=98scsi_new_request=E2=80=99 at ../hw/scsi/scsi-di= sk.c:2608:9:=0D ../hw/scsi/scsi-disk.c:2582:19: warning: argument 1 value =E2=80=98184467= 44073709551612=E2=80=99 exceeds maximum object size 9223372036854775807 [= -Walloc-size-larger-than=3D]=0D 2582 | line_buffer =3D g_malloc(len * 5 + 1);=0D | ^=0D =0D Silence it with a decent assertion, since we only convert a buffer to=0D bytes when we have a valid cdb length.=0D =0D Signed-off-by: Eric Blake =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210209152350.207958-1-eblake@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: f413e514a9133c1e63dae8f1f3a9ca0286c7a513=0D https://github.com/qemu/qemu/commit/f413e514a9133c1e63dae8f1f3a9ca0= 286c7a513=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/hw/elf_ops.h=0D =0D Log Message:=0D -----------=0D hw/elf_ops: Fix a typo=0D =0D g_mapped_file_new_from_fd()'s parameter is named 'writable'.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Stefano Garzarella =0D Reviewed-by: David Edmondson =0D Message-Id: <20210225181344.3623720-1-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: fc253f4a4b59e19c25df21232651d9c92220011f=0D https://github.com/qemu/qemu/commit/fc253f4a4b59e19c25df21232651d9c= 92220011f=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M target/hexagon/gen_tcg_funcs.py=0D =0D Log Message:=0D -----------=0D target/hexagon/gen_tcg_funcs: Fix a typo=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Taylor Simpson =0D Message-Id: <20210225181507.3624509-1-f4bug@amsat.org>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 166a1cf404cdea4c5839e3bd3028a6d28cb25b43=0D https://github.com/qemu/qemu/commit/166a1cf404cdea4c5839e3bd3028a6d= 28cb25b43=0D Author: Markus Armbruster =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M backends/dbus-vmstate.c=0D =0D Log Message:=0D -----------=0D backends/dbus-vmstate: Fix short read error handling=0D =0D When dbus_vmstate_post_load() fails, it complains to stderr. Except=0D on short read, where it checks with g_return_val_if_fail(). This=0D fails silently if G_DISABLE_CHECKS is undefined (it should be), or=0D else pads the short read with uninitialized bytes.=0D =0D Replace g_return_val_if_fail() by a proper error check.=0D =0D Fixes: 5010cec2bc87dafab39b3913c8ca91f88df9c540=0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210126124240.2081959-2-armbru@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: f2a6fe7b3af726c31360678cf4f55829dae32505=0D https://github.com/qemu/qemu/commit/f2a6fe7b3af726c31360678cf4f5582= 9dae32505=0D Author: Markus Armbruster =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/display/vhost-user-gpu.c=0D =0D Log Message:=0D -----------=0D vhost_user_gpu: Drop dead check for g_malloc() failure=0D =0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Reviewed-by: Michael S. Tsirkin =0D Message-Id: <20210126124240.2081959-3-armbru@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 33b2b388a54e69ba307356eb8cfdd9894112ae3f=0D https://github.com/qemu/qemu/commit/33b2b388a54e69ba307356eb8cfdd98= 94112ae3f=0D Author: Wainer dos Santos Moschetta =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: Fix the location of tools manuals=0D =0D The qemu-img.rst, qemu-nbd.rst, virtfs-proxy-helper.rst, qemu-trace-stap.= rst,=0D and virtiofsd.rst manuals were moved to docs/tools, so this update MAINTA= INERS=0D accordingly.=0D =0D Fixes: a08b4a9fe6c ("docs: Move tools documentation to tools manual")=0D Signed-off-by: Wainer dos Santos Moschetta =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210204135425.1380280-1-wainersm@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 27eb3722e439ccf7ef37ec39592acc9ebc5c687f=0D https://github.com/qemu/qemu/commit/27eb3722e439ccf7ef37ec39592acc9= ebc5c687f=0D Author: Thomas Huth =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/id.h=0D M net/net.c=0D M util/id.c=0D =0D Log Message:=0D -----------=0D net: Use id_generate() in the network subsystem, too=0D =0D We already got a global function called id_generate() to create unique=0D= IDs within QEMU. Let's use it in the network subsytem, too, instead of=0D= inventing our own ID scheme here.=0D =0D Signed-off-by: Thomas Huth =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210215090225.1046239-1-thuth@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: c8ffacbf7ccf56757157a9551f5d536938b6507f=0D https://github.com/qemu/qemu/commit/c8ffacbf7ccf56757157a9551f5d536= 938b6507f=0D Author: Alexander Bulekov =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/fuzz-test.c=0D =0D Log Message:=0D -----------=0D fuzz-test: remove unneccessary debugging flags=0D =0D These flags cause the output to look strange for 'make check', and=0D they aren't needed to reproduce bugs, if they reappear.=0D =0D Suggested-by: Peter Maydell =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210216181316.794276-1-alxndr@bu.edu>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: d32335e8ed89851b0359cacc04890d0f8b7683bd=0D https://github.com/qemu/qemu/commit/d32335e8ed89851b0359cacc04890d0= f8b7683bd=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/pnv_xscom.c=0D M include/exec/memory.h=0D M include/hw/ppc/pnv_xscom.h=0D M softmmu/memory.c=0D =0D Log Message:=0D -----------=0D exec/memory: Use struct Object typedef=0D =0D We forward-declare Object typedef in "qemu/typedefs.h" since commit=0D ca27b5eb7cd ("qom/object: Move Object typedef to 'qemu/typedefs.h'").=0D Use it everywhere to make the code simpler.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Acked-by: David Gibson =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210225182003.3629342-1-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: c64b1d40d6f266dab1362c6eccfda7f3c164d680=0D https://github.com/qemu/qemu/commit/c64b1d40d6f266dab1362c6eccfda7f= 3c164d680=0D Author: lijiejun =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/display/virtio-gpu-3d.c=0D =0D Log Message:=0D -----------=0D virtio-gpu: Adjust code space style=0D =0D Fix code style. Operator needs align with eight spaces, and delete line s= pace.=0D =0D Signed-off-by: lijiejun =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <1615292050-108748-1-git-send-email-a_lijiejun@163.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 75ae7c465dfa51ca603584717b144f6fe68cd112=0D https://github.com/qemu/qemu/commit/75ae7c465dfa51ca603584717b144f6= fe68cd112=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M ui/console.c=0D M ui/vnc-auth-sasl.c=0D =0D Log Message:=0D -----------=0D ui: Replace the word 'whitelist'=0D =0D Follow the inclusive terminology from the "Conscious Language in your=0D Open Source Projects" guidelines [*] and replace the words "whitelist"=0D= appropriately.=0D =0D [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.m= d=0D =0D Reviewed-by: Gerd Hoffmann =0D Reviewed-by: Alex Benn=C3=A9e =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303184644.1639691-2-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 54fa79b793fcf00625be235588703fb3adbcd104=0D https://github.com/qemu/qemu/commit/54fa79b793fcf00625be235588703fb= 3adbcd104=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M scripts/tracetool/__init__.py=0D =0D Log Message:=0D -----------=0D scripts/tracetool: Replace the word 'whitelist'=0D =0D Follow the inclusive terminology from the "Conscious Language in your=0D Open Source Projects" guidelines [*] and replace the words "whitelist"=0D= appropriately.=0D =0D [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.m= d=0D =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Stefan Hajnoczi =0D Reviewed-by: Alex Benn=C3=A9e =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Stefan Hajnoczi =0D Message-Id: <20210303184644.1639691-3-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: a202d75a99706faba2eaf69dff65b183a3eae4b1=0D https://github.com/qemu/qemu/commit/a202d75a99706faba2eaf69dff65b18= 3a3eae4b1=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M softmmu/qemu-seccomp.c=0D =0D Log Message:=0D -----------=0D seccomp: Replace the word 'blacklist'=0D =0D Follow the inclusive terminology from the "Conscious Language in your=0D Open Source Projects" guidelines [*] and replace the word "blacklist"=0D appropriately.=0D =0D [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.m= d=0D =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Acked-by: Eduardo Otubo =0D Reviewed-by: Alex Benn=C3=A9e =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210303184644.1639691-4-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: d42304b1ed9f9c4121cd1d49d92d84480f1fef44=0D https://github.com/qemu/qemu/commit/d42304b1ed9f9c4121cd1d49d92d844= 80f1fef44=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D qemu-options: Replace the word 'blacklist'=0D =0D Follow the inclusive terminology from the "Conscious Language in your=0D Open Source Projects" guidelines [*] and replace the word "blacklist"=0D appropriately.=0D =0D [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.m= d=0D =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210303184644.1639691-5-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: d5f846813c45515a846e9791ded839690642e90a=0D https://github.com/qemu/qemu/commit/d5f846813c45515a846e9791ded8396= 90642e90a=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M tests/fp/fp-test.c=0D =0D Log Message:=0D -----------=0D tests/fp/fp-test: Replace the word 'blacklist'=0D =0D Follow the inclusive terminology from the "Conscious Language in your=0D Open Source Projects" guidelines [*] and replace the word "blacklist"=0D appropriately.=0D =0D [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.m= d=0D =0D Acked-by: Alex Benn=C3=A9e =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210303184644.1639691-6-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 6d8980a38fa7a7ebcdf20120a67feb7b35488a53=0D https://github.com/qemu/qemu/commit/6d8980a38fa7a7ebcdf20120a67feb7= b35488a53=0D Author: Peter Maydell =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/qemu-common.h=0D =0D Log Message:=0D -----------=0D qemu-common.h: Update copyright string to 2021=0D =0D Update the common copyright string that we use in=0D -version reports, About dialogs, etc, to 2021.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210309162258.28633-1-peter.maydell@linaro.org>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: c39dd149601d0401496f3264bda9c91d274cd4a0=0D https://github.com/qemu/qemu/commit/c39dd149601d0401496f3264bda9c91= d274cd4a0=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M default-configs/devices/lm32-softmmu.mak=0D M hw/lm32/Kconfig=0D M hw/lm32/meson.build=0D =0D Log Message:=0D -----------=0D hw/lm32/Kconfig: Introduce CONFIG_LM32_EVR for lm32-evr/uclinux boards=0D= =0D We want to be able to use the 'LM32' config for architecture=0D specific features. Introduce CONFIG_LM32_EVR to select the=0D lm32-evr / lm32-uclinux boards.=0D =0D Reviewed-by: Alex Benn=C3=A9e =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210221225626.2589247-2-f4bug@amsat.org>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 8ee08a6a282f4bbdd79744cad79aa87121db2e03=0D https://github.com/qemu/qemu/commit/8ee08a6a282f4bbdd79744cad79aa87= 121db2e03=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/char/meson.build=0D M hw/intc/meson.build=0D M hw/lm32/Kconfig=0D M hw/timer/meson.build=0D =0D Log Message:=0D -----------=0D hw/lm32/Kconfig: Rename CONFIG_LM32 -> CONFIG_LM32_DEVICES=0D =0D We want to be able to use the 'LM32' config for architecture=0D specific features. As CONFIG_LM32 is only used to select=0D peripherals, rename it CONFIG_LM32_DEVICES.=0D =0D Reviewed-by: Alex Benn=C3=A9e =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210221225626.2589247-3-f4bug@amsat.org>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 32d1fd8d39475bc9ed7d3b5f1a666cce7f1d5fc2=0D https://github.com/qemu/qemu/commit/32d1fd8d39475bc9ed7d3b5f1a666cc= e7f1d5fc2=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/lm32/Kconfig=0D =0D Log Message:=0D -----------=0D hw/lm32/Kconfig: Have MILKYMIST select LM32_DEVICES=0D =0D The Milkymist board requires more than the PTIMER. Directly=0D select the LM32_DEVICES. This fixes:=0D =0D /usr/bin/ld:=0D libqemu-lm32-softmmu.fa.p/target_lm32_gdbstub.c.o: in function `lm32_cp= u_gdb_read_register':=0D target/lm32/gdbstub.c:46: undefined reference to `lm32_pic_get_im'=0D target/lm32/gdbstub.c:48: undefined reference to `lm32_pic_get_ip'=0D libqemu-lm32-softmmu.fa.p/target_lm32_op_helper.c.o: in function `helpe= r_wcsr_im':=0D target/lm32/op_helper.c:107: undefined reference to `lm32_pic_set_im'=0D= libqemu-lm32-softmmu.fa.p/target_lm32_op_helper.c.o: in function `helpe= r_wcsr_ip':=0D target/lm32/op_helper.c:114: undefined reference to `lm32_pic_set_ip'=0D= libqemu-lm32-softmmu.fa.p/target_lm32_op_helper.c.o: in function `helpe= r_wcsr_jtx':=0D target/lm32/op_helper.c:120: undefined reference to `lm32_juart_set_jtx= '=0D libqemu-lm32-softmmu.fa.p/target_lm32_op_helper.c.o: in function `helpe= r_wcsr_jrx':=0D target/lm32/op_helper.c:125: undefined reference to `lm32_juart_set_jrx= '=0D libqemu-lm32-softmmu.fa.p/target_lm32_translate.c.o: in function `lm32_= cpu_dump_state':=0D target/lm32/translate.c:1161: undefined reference to `lm32_pic_get_ip'=0D= target/lm32/translate.c:1161: undefined reference to `lm32_pic_get_im'=0D= =0D Reviewed-by: Alex Benn=C3=A9e =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210221225626.2589247-4-f4bug@amsat.org>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 0a38950931af0088449a6f224809acd0214d9d27=0D https://github.com/qemu/qemu/commit/0a38950931af0088449a6f224809acd= 0214d9d27=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/sysemu/runstate.h=0D M softmmu/runstate.c=0D =0D Log Message:=0D -----------=0D sysemu/runstate: Let runstate_is_running() return bool=0D =0D runstate_check() returns a boolean. runstate_is_running()=0D returns what runstate_check() returns, also a boolean.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: David Hildenbrand =0D Reviewed-by: Alex Benn=C3=A9e =0D Message-Id: <20210111152020.1422021-2-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 538f049704e9b7a07eeaf326af772fdd30d89576=0D https://github.com/qemu/qemu/commit/538f049704e9b7a07eeaf326af772fd= d30d89576=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M accel/xen/xen-all.c=0D M audio/audio.c=0D M block/block-backend.c=0D M gdbstub.c=0D M hw/block/pflash_cfi01.c=0D M hw/block/virtio-blk.c=0D M hw/display/qxl.c=0D M hw/i386/kvm/clock.c=0D M hw/i386/kvm/i8254.c=0D M hw/i386/kvmvapic.c=0D M hw/i386/xen/xen-hvm.c=0D M hw/ide/core.c=0D M hw/intc/arm_gicv3_its_kvm.c=0D M hw/intc/arm_gicv3_kvm.c=0D M hw/intc/spapr_xive_kvm.c=0D M hw/misc/mac_via.c=0D M hw/net/e1000e_core.c=0D M hw/nvram/spapr_nvram.c=0D M hw/ppc/ppc.c=0D M hw/ppc/ppc_booke.c=0D M hw/s390x/tod-kvm.c=0D M hw/scsi/scsi-bus.c=0D M hw/usb/hcd-ehci.c=0D M hw/usb/host-libusb.c=0D M hw/usb/redirect.c=0D M hw/vfio/migration.c=0D M hw/virtio/virtio-rng.c=0D M hw/virtio/virtio.c=0D M include/sysemu/runstate.h=0D M net/net.c=0D M softmmu/memory.c=0D M softmmu/runstate.c=0D M target/arm/kvm.c=0D M target/arm/kvm_arm.h=0D M target/i386/kvm/kvm.c=0D M target/i386/sev.c=0D M target/i386/whpx/whpx-all.c=0D M target/mips/kvm.c=0D M target/ppc/cpu-qom.h=0D M ui/gtk.c=0D M ui/spice-core.c=0D =0D Log Message:=0D -----------=0D sysemu: Let VMChangeStateHandler take boolean 'running' argument=0D =0D The 'running' argument from VMChangeStateHandler does not require=0D other value than 0 / 1. Make it a plain boolean.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Alex Benn=C3=A9e =0D Acked-by: David Gibson =0D Message-Id: <20210111152020.1422021-3-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 6f34661b6c97a37a5efc27d31c037ddeda4547e2=0D https://github.com/qemu/qemu/commit/6f34661b6c97a37a5efc27d31c037dd= eda4547e2=0D Author: Peter Maydell =0D Date: 2021-03-11 (Thu, 11 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M accel/xen/xen-all.c=0D M audio/audio.c=0D M backends/dbus-vmstate.c=0D M block/block-backend.c=0D M default-configs/devices/lm32-softmmu.mak=0D M disas/nanomips.cpp=0D M gdbstub.c=0D M hw/block/pflash_cfi01.c=0D M hw/block/virtio-blk.c=0D M hw/char/meson.build=0D M hw/display/qxl.c=0D M hw/display/vhost-user-gpu.c=0D M hw/display/virtio-gpu-3d.c=0D M hw/i386/kvm/clock.c=0D M hw/i386/kvm/i8254.c=0D M hw/i386/kvmvapic.c=0D M hw/i386/xen/xen-hvm.c=0D M hw/ide/core.c=0D M hw/intc/arm_gicv3_its_kvm.c=0D M hw/intc/arm_gicv3_kvm.c=0D M hw/intc/meson.build=0D M hw/intc/spapr_xive_kvm.c=0D M hw/lm32/Kconfig=0D M hw/lm32/meson.build=0D M hw/misc/mac_via.c=0D M hw/misc/trace-events=0D M hw/net/allwinner-sun8i-emac.c=0D M hw/net/e1000e_core.c=0D M hw/nvram/spapr_nvram.c=0D M hw/ppc/pnv_bmc.c=0D M hw/ppc/pnv_xscom.c=0D M hw/ppc/ppc.c=0D M hw/ppc/ppc_booke.c=0D M hw/s390x/tod-kvm.c=0D M hw/scsi/scsi-bus.c=0D M hw/scsi/scsi-disk.c=0D M hw/timer/meson.build=0D M hw/usb/ccid-card-emulated.c=0D M hw/usb/hcd-ehci.c=0D M hw/usb/hcd-ohci.c=0D M hw/usb/host-libusb.c=0D M hw/usb/redirect.c=0D M hw/vfio/migration.c=0D M hw/virtio/vhost.c=0D M hw/virtio/virtio-rng.c=0D M hw/virtio/virtio.c=0D M include/exec/memory.h=0D M include/hw/elf_ops.h=0D M include/hw/ppc/pnv_xscom.h=0D M include/hw/s390x/css.h=0D M include/qemu-common.h=0D M include/qemu/id.h=0D M include/sysemu/runstate.h=0D M net/net.c=0D M qemu-options.hx=0D M scripts/tracetool/__init__.py=0D M softmmu/memory.c=0D M softmmu/qemu-seccomp.c=0D M softmmu/runstate.c=0D M target/arm/kvm.c=0D M target/arm/kvm_arm.h=0D M target/hexagon/gen_tcg_funcs.py=0D M target/i386/cpu.c=0D M target/i386/kvm/kvm.c=0D M target/i386/machine.c=0D M target/i386/sev.c=0D M target/i386/whpx/whpx-all.c=0D M target/m68k/op_helper.c=0D M target/mips/kvm.c=0D M target/ppc/cpu-qom.h=0D M target/riscv/cpu.c=0D M tests/fp/fp-test.c=0D M tests/qtest/fuzz-test.c=0D M ui/console.c=0D M ui/gtk.c=0D M ui/spice-core.c=0D M ui/vnc-auth-sasl.c=0D M util/id.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6= .0-pull-request' into staging=0D =0D Pull request=0D =0D # gpg: Signature made Wed 10 Mar 2021 21:56:09 GMT=0D # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FB= E3C=0D # gpg: issuer "laurent@vivier.eu"=0D # gpg: Good signature from "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier (Red Hat) = " [full]=0D # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F = BE3C=0D =0D * remotes/vivier2/tags/trivial-branch-for-6.0-pull-request: (22 commits)=0D= sysemu: Let VMChangeStateHandler take boolean 'running' argument=0D sysemu/runstate: Let runstate_is_running() return bool=0D hw/lm32/Kconfig: Have MILKYMIST select LM32_DEVICES=0D hw/lm32/Kconfig: Rename CONFIG_LM32 -> CONFIG_LM32_DEVICES=0D hw/lm32/Kconfig: Introduce CONFIG_LM32_EVR for lm32-evr/uclinux boards=0D= qemu-common.h: Update copyright string to 2021=0D tests/fp/fp-test: Replace the word 'blacklist'=0D qemu-options: Replace the word 'blacklist'=0D seccomp: Replace the word 'blacklist'=0D scripts/tracetool: Replace the word 'whitelist'=0D ui: Replace the word 'whitelist'=0D virtio-gpu: Adjust code space style=0D exec/memory: Use struct Object typedef=0D fuzz-test: remove unneccessary debugging flags=0D net: Use id_generate() in the network subsystem, too=0D MAINTAINERS: Fix the location of tools manuals=0D vhost_user_gpu: Drop dead check for g_malloc() failure=0D backends/dbus-vmstate: Fix short read error handling=0D target/hexagon/gen_tcg_funcs: Fix a typo=0D hw/elf_ops: Fix a typo=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/f4abdf32714d...6f34661b6c97= =0D From MAILER-DAEMON Fri Mar 12 05:00:12 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKeaU-0005dI-NB for mharc-qemu-commits@gnu.org; Fri, 12 Mar 2021 05:00:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33666) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKeaI-0005Zj-LT for qemu-commits@nongnu.org; Fri, 12 Mar 2021 05:00:00 -0500 Received: from out-17.smtp.github.com ([192.30.252.200]:53599 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKeaC-0001LI-Cg for qemu-commits@nongnu.org; Fri, 12 Mar 2021 04:59:54 -0500 Received: from github.com (hubbernetes-node-d11d461.va3-iad.github.net [10.48.101.22]) by smtp.github.com (Postfix) with ESMTPA id B71745C0010 for ; Fri, 12 Mar 2021 01:59:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615543183; bh=oLL2SPpb3N0HF86gHX8zEt+lvTd00wGY/Bfl/hgw2HY=; h=Date:From:To:Subject:From; b=MfsVav6J4NDAU4bpk7Bc8wOpPTgiqGEeATCB4b2Sgndt31DwiIp8EwryDdYVSO/44 TM+SwarLGQPXY4dgjPV3/K6lFaG84GAnzTlGSwJoesrxlgx9tne4/iA6oe4tS9m20S 0KbXwei02VgGeSkK+i3vwK46WktmI/UR3i/q9cBs= Date: Fri, 12 Mar 2021 01:59:43 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] cba42d: Various spelling fixes X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Mar 2021 10:00:02 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: cba42d61a379bc1c983ddb39d479de3581d2d578=0D https://github.com/qemu/qemu/commit/cba42d61a379bc1c983ddb39d479de3= 581d2d578=0D Author: Michael Tokarev =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M disas/nanomips.cpp=0D M hw/misc/trace-events=0D M hw/net/allwinner-sun8i-emac.c=0D M hw/ppc/pnv_bmc.c=0D M hw/usb/ccid-card-emulated.c=0D M hw/usb/hcd-ohci.c=0D M hw/virtio/vhost.c=0D M include/hw/s390x/css.h=0D M qemu-options.hx=0D M target/i386/cpu.c=0D M target/i386/machine.c=0D M target/m68k/op_helper.c=0D M target/riscv/cpu.c=0D =0D Log Message:=0D -----------=0D Various spelling fixes=0D =0D An assorted set of spelling fixes in various places.=0D =0D Signed-off-by: Michael Tokarev =0D Reviewed-by: Stefan Weil =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Peter Maydell =0D Message-Id: <20210309111510.79495-1-mjt@msgid.tls.msk.ru>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: e91bae8e98a6438156752dfbe9c0e2494d4b80f6=0D https://github.com/qemu/qemu/commit/e91bae8e98a6438156752dfbe9c0e24= 94d4b80f6=0D Author: Eric Blake =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/scsi/scsi-disk.c=0D =0D Log Message:=0D -----------=0D scsi: Silence gcc warning=0D =0D On Fedora 33, gcc 10.2.1 notes that scsi_cdb_length(buf) can set=0D len=3D=3D-1, which in turn overflows g_malloc():=0D =0D [5/5] Linking target qemu-system-x86_64=0D In function =E2=80=98scsi_disk_new_request_dump=E2=80=99,=0D inlined from =E2=80=98scsi_new_request=E2=80=99 at ../hw/scsi/scsi-di= sk.c:2608:9:=0D ../hw/scsi/scsi-disk.c:2582:19: warning: argument 1 value =E2=80=98184467= 44073709551612=E2=80=99 exceeds maximum object size 9223372036854775807 [= -Walloc-size-larger-than=3D]=0D 2582 | line_buffer =3D g_malloc(len * 5 + 1);=0D | ^=0D =0D Silence it with a decent assertion, since we only convert a buffer to=0D bytes when we have a valid cdb length.=0D =0D Signed-off-by: Eric Blake =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210209152350.207958-1-eblake@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: f413e514a9133c1e63dae8f1f3a9ca0286c7a513=0D https://github.com/qemu/qemu/commit/f413e514a9133c1e63dae8f1f3a9ca0= 286c7a513=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/hw/elf_ops.h=0D =0D Log Message:=0D -----------=0D hw/elf_ops: Fix a typo=0D =0D g_mapped_file_new_from_fd()'s parameter is named 'writable'.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Stefano Garzarella =0D Reviewed-by: David Edmondson =0D Message-Id: <20210225181344.3623720-1-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: fc253f4a4b59e19c25df21232651d9c92220011f=0D https://github.com/qemu/qemu/commit/fc253f4a4b59e19c25df21232651d9c= 92220011f=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M target/hexagon/gen_tcg_funcs.py=0D =0D Log Message:=0D -----------=0D target/hexagon/gen_tcg_funcs: Fix a typo=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Taylor Simpson =0D Message-Id: <20210225181507.3624509-1-f4bug@amsat.org>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 166a1cf404cdea4c5839e3bd3028a6d28cb25b43=0D https://github.com/qemu/qemu/commit/166a1cf404cdea4c5839e3bd3028a6d= 28cb25b43=0D Author: Markus Armbruster =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M backends/dbus-vmstate.c=0D =0D Log Message:=0D -----------=0D backends/dbus-vmstate: Fix short read error handling=0D =0D When dbus_vmstate_post_load() fails, it complains to stderr. Except=0D on short read, where it checks with g_return_val_if_fail(). This=0D fails silently if G_DISABLE_CHECKS is undefined (it should be), or=0D else pads the short read with uninitialized bytes.=0D =0D Replace g_return_val_if_fail() by a proper error check.=0D =0D Fixes: 5010cec2bc87dafab39b3913c8ca91f88df9c540=0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210126124240.2081959-2-armbru@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: f2a6fe7b3af726c31360678cf4f55829dae32505=0D https://github.com/qemu/qemu/commit/f2a6fe7b3af726c31360678cf4f5582= 9dae32505=0D Author: Markus Armbruster =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/display/vhost-user-gpu.c=0D =0D Log Message:=0D -----------=0D vhost_user_gpu: Drop dead check for g_malloc() failure=0D =0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Reviewed-by: Michael S. Tsirkin =0D Message-Id: <20210126124240.2081959-3-armbru@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 33b2b388a54e69ba307356eb8cfdd9894112ae3f=0D https://github.com/qemu/qemu/commit/33b2b388a54e69ba307356eb8cfdd98= 94112ae3f=0D Author: Wainer dos Santos Moschetta =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: Fix the location of tools manuals=0D =0D The qemu-img.rst, qemu-nbd.rst, virtfs-proxy-helper.rst, qemu-trace-stap.= rst,=0D and virtiofsd.rst manuals were moved to docs/tools, so this update MAINTA= INERS=0D accordingly.=0D =0D Fixes: a08b4a9fe6c ("docs: Move tools documentation to tools manual")=0D Signed-off-by: Wainer dos Santos Moschetta =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210204135425.1380280-1-wainersm@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 27eb3722e439ccf7ef37ec39592acc9ebc5c687f=0D https://github.com/qemu/qemu/commit/27eb3722e439ccf7ef37ec39592acc9= ebc5c687f=0D Author: Thomas Huth =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/id.h=0D M net/net.c=0D M util/id.c=0D =0D Log Message:=0D -----------=0D net: Use id_generate() in the network subsystem, too=0D =0D We already got a global function called id_generate() to create unique=0D= IDs within QEMU. Let's use it in the network subsytem, too, instead of=0D= inventing our own ID scheme here.=0D =0D Signed-off-by: Thomas Huth =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210215090225.1046239-1-thuth@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: c8ffacbf7ccf56757157a9551f5d536938b6507f=0D https://github.com/qemu/qemu/commit/c8ffacbf7ccf56757157a9551f5d536= 938b6507f=0D Author: Alexander Bulekov =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/fuzz-test.c=0D =0D Log Message:=0D -----------=0D fuzz-test: remove unneccessary debugging flags=0D =0D These flags cause the output to look strange for 'make check', and=0D they aren't needed to reproduce bugs, if they reappear.=0D =0D Suggested-by: Peter Maydell =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210216181316.794276-1-alxndr@bu.edu>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: d32335e8ed89851b0359cacc04890d0f8b7683bd=0D https://github.com/qemu/qemu/commit/d32335e8ed89851b0359cacc04890d0= f8b7683bd=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/pnv_xscom.c=0D M include/exec/memory.h=0D M include/hw/ppc/pnv_xscom.h=0D M softmmu/memory.c=0D =0D Log Message:=0D -----------=0D exec/memory: Use struct Object typedef=0D =0D We forward-declare Object typedef in "qemu/typedefs.h" since commit=0D ca27b5eb7cd ("qom/object: Move Object typedef to 'qemu/typedefs.h'").=0D Use it everywhere to make the code simpler.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Acked-by: David Gibson =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210225182003.3629342-1-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: c64b1d40d6f266dab1362c6eccfda7f3c164d680=0D https://github.com/qemu/qemu/commit/c64b1d40d6f266dab1362c6eccfda7f= 3c164d680=0D Author: lijiejun =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/display/virtio-gpu-3d.c=0D =0D Log Message:=0D -----------=0D virtio-gpu: Adjust code space style=0D =0D Fix code style. Operator needs align with eight spaces, and delete line s= pace.=0D =0D Signed-off-by: lijiejun =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <1615292050-108748-1-git-send-email-a_lijiejun@163.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 75ae7c465dfa51ca603584717b144f6fe68cd112=0D https://github.com/qemu/qemu/commit/75ae7c465dfa51ca603584717b144f6= fe68cd112=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M ui/console.c=0D M ui/vnc-auth-sasl.c=0D =0D Log Message:=0D -----------=0D ui: Replace the word 'whitelist'=0D =0D Follow the inclusive terminology from the "Conscious Language in your=0D Open Source Projects" guidelines [*] and replace the words "whitelist"=0D= appropriately.=0D =0D [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.m= d=0D =0D Reviewed-by: Gerd Hoffmann =0D Reviewed-by: Alex Benn=C3=A9e =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210303184644.1639691-2-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 54fa79b793fcf00625be235588703fb3adbcd104=0D https://github.com/qemu/qemu/commit/54fa79b793fcf00625be235588703fb= 3adbcd104=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M scripts/tracetool/__init__.py=0D =0D Log Message:=0D -----------=0D scripts/tracetool: Replace the word 'whitelist'=0D =0D Follow the inclusive terminology from the "Conscious Language in your=0D Open Source Projects" guidelines [*] and replace the words "whitelist"=0D= appropriately.=0D =0D [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.m= d=0D =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Stefan Hajnoczi =0D Reviewed-by: Alex Benn=C3=A9e =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Stefan Hajnoczi =0D Message-Id: <20210303184644.1639691-3-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: a202d75a99706faba2eaf69dff65b183a3eae4b1=0D https://github.com/qemu/qemu/commit/a202d75a99706faba2eaf69dff65b18= 3a3eae4b1=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M softmmu/qemu-seccomp.c=0D =0D Log Message:=0D -----------=0D seccomp: Replace the word 'blacklist'=0D =0D Follow the inclusive terminology from the "Conscious Language in your=0D Open Source Projects" guidelines [*] and replace the word "blacklist"=0D appropriately.=0D =0D [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.m= d=0D =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Acked-by: Eduardo Otubo =0D Reviewed-by: Alex Benn=C3=A9e =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210303184644.1639691-4-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: d42304b1ed9f9c4121cd1d49d92d84480f1fef44=0D https://github.com/qemu/qemu/commit/d42304b1ed9f9c4121cd1d49d92d844= 80f1fef44=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D qemu-options: Replace the word 'blacklist'=0D =0D Follow the inclusive terminology from the "Conscious Language in your=0D Open Source Projects" guidelines [*] and replace the word "blacklist"=0D appropriately.=0D =0D [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.m= d=0D =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210303184644.1639691-5-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: d5f846813c45515a846e9791ded839690642e90a=0D https://github.com/qemu/qemu/commit/d5f846813c45515a846e9791ded8396= 90642e90a=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M tests/fp/fp-test.c=0D =0D Log Message:=0D -----------=0D tests/fp/fp-test: Replace the word 'blacklist'=0D =0D Follow the inclusive terminology from the "Conscious Language in your=0D Open Source Projects" guidelines [*] and replace the word "blacklist"=0D appropriately.=0D =0D [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.m= d=0D =0D Acked-by: Alex Benn=C3=A9e =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210303184644.1639691-6-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 6d8980a38fa7a7ebcdf20120a67feb7b35488a53=0D https://github.com/qemu/qemu/commit/6d8980a38fa7a7ebcdf20120a67feb7= b35488a53=0D Author: Peter Maydell =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/qemu-common.h=0D =0D Log Message:=0D -----------=0D qemu-common.h: Update copyright string to 2021=0D =0D Update the common copyright string that we use in=0D -version reports, About dialogs, etc, to 2021.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210309162258.28633-1-peter.maydell@linaro.org>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: c39dd149601d0401496f3264bda9c91d274cd4a0=0D https://github.com/qemu/qemu/commit/c39dd149601d0401496f3264bda9c91= d274cd4a0=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M default-configs/devices/lm32-softmmu.mak=0D M hw/lm32/Kconfig=0D M hw/lm32/meson.build=0D =0D Log Message:=0D -----------=0D hw/lm32/Kconfig: Introduce CONFIG_LM32_EVR for lm32-evr/uclinux boards=0D= =0D We want to be able to use the 'LM32' config for architecture=0D specific features. Introduce CONFIG_LM32_EVR to select the=0D lm32-evr / lm32-uclinux boards.=0D =0D Reviewed-by: Alex Benn=C3=A9e =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210221225626.2589247-2-f4bug@amsat.org>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 8ee08a6a282f4bbdd79744cad79aa87121db2e03=0D https://github.com/qemu/qemu/commit/8ee08a6a282f4bbdd79744cad79aa87= 121db2e03=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/char/meson.build=0D M hw/intc/meson.build=0D M hw/lm32/Kconfig=0D M hw/timer/meson.build=0D =0D Log Message:=0D -----------=0D hw/lm32/Kconfig: Rename CONFIG_LM32 -> CONFIG_LM32_DEVICES=0D =0D We want to be able to use the 'LM32' config for architecture=0D specific features. As CONFIG_LM32 is only used to select=0D peripherals, rename it CONFIG_LM32_DEVICES.=0D =0D Reviewed-by: Alex Benn=C3=A9e =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210221225626.2589247-3-f4bug@amsat.org>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 32d1fd8d39475bc9ed7d3b5f1a666cce7f1d5fc2=0D https://github.com/qemu/qemu/commit/32d1fd8d39475bc9ed7d3b5f1a666cc= e7f1d5fc2=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M hw/lm32/Kconfig=0D =0D Log Message:=0D -----------=0D hw/lm32/Kconfig: Have MILKYMIST select LM32_DEVICES=0D =0D The Milkymist board requires more than the PTIMER. Directly=0D select the LM32_DEVICES. This fixes:=0D =0D /usr/bin/ld:=0D libqemu-lm32-softmmu.fa.p/target_lm32_gdbstub.c.o: in function `lm32_cp= u_gdb_read_register':=0D target/lm32/gdbstub.c:46: undefined reference to `lm32_pic_get_im'=0D target/lm32/gdbstub.c:48: undefined reference to `lm32_pic_get_ip'=0D libqemu-lm32-softmmu.fa.p/target_lm32_op_helper.c.o: in function `helpe= r_wcsr_im':=0D target/lm32/op_helper.c:107: undefined reference to `lm32_pic_set_im'=0D= libqemu-lm32-softmmu.fa.p/target_lm32_op_helper.c.o: in function `helpe= r_wcsr_ip':=0D target/lm32/op_helper.c:114: undefined reference to `lm32_pic_set_ip'=0D= libqemu-lm32-softmmu.fa.p/target_lm32_op_helper.c.o: in function `helpe= r_wcsr_jtx':=0D target/lm32/op_helper.c:120: undefined reference to `lm32_juart_set_jtx= '=0D libqemu-lm32-softmmu.fa.p/target_lm32_op_helper.c.o: in function `helpe= r_wcsr_jrx':=0D target/lm32/op_helper.c:125: undefined reference to `lm32_juart_set_jrx= '=0D libqemu-lm32-softmmu.fa.p/target_lm32_translate.c.o: in function `lm32_= cpu_dump_state':=0D target/lm32/translate.c:1161: undefined reference to `lm32_pic_get_ip'=0D= target/lm32/translate.c:1161: undefined reference to `lm32_pic_get_im'=0D= =0D Reviewed-by: Alex Benn=C3=A9e =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210221225626.2589247-4-f4bug@amsat.org>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 0a38950931af0088449a6f224809acd0214d9d27=0D https://github.com/qemu/qemu/commit/0a38950931af0088449a6f224809acd= 0214d9d27=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M include/sysemu/runstate.h=0D M softmmu/runstate.c=0D =0D Log Message:=0D -----------=0D sysemu/runstate: Let runstate_is_running() return bool=0D =0D runstate_check() returns a boolean. runstate_is_running()=0D returns what runstate_check() returns, also a boolean.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: David Hildenbrand =0D Reviewed-by: Alex Benn=C3=A9e =0D Message-Id: <20210111152020.1422021-2-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 538f049704e9b7a07eeaf326af772fdd30d89576=0D https://github.com/qemu/qemu/commit/538f049704e9b7a07eeaf326af772fd= d30d89576=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-09 (Tue, 09 Mar 2021)=0D =0D Changed paths:=0D M accel/xen/xen-all.c=0D M audio/audio.c=0D M block/block-backend.c=0D M gdbstub.c=0D M hw/block/pflash_cfi01.c=0D M hw/block/virtio-blk.c=0D M hw/display/qxl.c=0D M hw/i386/kvm/clock.c=0D M hw/i386/kvm/i8254.c=0D M hw/i386/kvmvapic.c=0D M hw/i386/xen/xen-hvm.c=0D M hw/ide/core.c=0D M hw/intc/arm_gicv3_its_kvm.c=0D M hw/intc/arm_gicv3_kvm.c=0D M hw/intc/spapr_xive_kvm.c=0D M hw/misc/mac_via.c=0D M hw/net/e1000e_core.c=0D M hw/nvram/spapr_nvram.c=0D M hw/ppc/ppc.c=0D M hw/ppc/ppc_booke.c=0D M hw/s390x/tod-kvm.c=0D M hw/scsi/scsi-bus.c=0D M hw/usb/hcd-ehci.c=0D M hw/usb/host-libusb.c=0D M hw/usb/redirect.c=0D M hw/vfio/migration.c=0D M hw/virtio/virtio-rng.c=0D M hw/virtio/virtio.c=0D M include/sysemu/runstate.h=0D M net/net.c=0D M softmmu/memory.c=0D M softmmu/runstate.c=0D M target/arm/kvm.c=0D M target/arm/kvm_arm.h=0D M target/i386/kvm/kvm.c=0D M target/i386/sev.c=0D M target/i386/whpx/whpx-all.c=0D M target/mips/kvm.c=0D M target/ppc/cpu-qom.h=0D M ui/gtk.c=0D M ui/spice-core.c=0D =0D Log Message:=0D -----------=0D sysemu: Let VMChangeStateHandler take boolean 'running' argument=0D =0D The 'running' argument from VMChangeStateHandler does not require=0D other value than 0 / 1. Make it a plain boolean.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Alex Benn=C3=A9e =0D Acked-by: David Gibson =0D Message-Id: <20210111152020.1422021-3-philmd@redhat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 6f34661b6c97a37a5efc27d31c037ddeda4547e2=0D https://github.com/qemu/qemu/commit/6f34661b6c97a37a5efc27d31c037dd= eda4547e2=0D Author: Peter Maydell =0D Date: 2021-03-11 (Thu, 11 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M accel/xen/xen-all.c=0D M audio/audio.c=0D M backends/dbus-vmstate.c=0D M block/block-backend.c=0D M default-configs/devices/lm32-softmmu.mak=0D M disas/nanomips.cpp=0D M gdbstub.c=0D M hw/block/pflash_cfi01.c=0D M hw/block/virtio-blk.c=0D M hw/char/meson.build=0D M hw/display/qxl.c=0D M hw/display/vhost-user-gpu.c=0D M hw/display/virtio-gpu-3d.c=0D M hw/i386/kvm/clock.c=0D M hw/i386/kvm/i8254.c=0D M hw/i386/kvmvapic.c=0D M hw/i386/xen/xen-hvm.c=0D M hw/ide/core.c=0D M hw/intc/arm_gicv3_its_kvm.c=0D M hw/intc/arm_gicv3_kvm.c=0D M hw/intc/meson.build=0D M hw/intc/spapr_xive_kvm.c=0D M hw/lm32/Kconfig=0D M hw/lm32/meson.build=0D M hw/misc/mac_via.c=0D M hw/misc/trace-events=0D M hw/net/allwinner-sun8i-emac.c=0D M hw/net/e1000e_core.c=0D M hw/nvram/spapr_nvram.c=0D M hw/ppc/pnv_bmc.c=0D M hw/ppc/pnv_xscom.c=0D M hw/ppc/ppc.c=0D M hw/ppc/ppc_booke.c=0D M hw/s390x/tod-kvm.c=0D M hw/scsi/scsi-bus.c=0D M hw/scsi/scsi-disk.c=0D M hw/timer/meson.build=0D M hw/usb/ccid-card-emulated.c=0D M hw/usb/hcd-ehci.c=0D M hw/usb/hcd-ohci.c=0D M hw/usb/host-libusb.c=0D M hw/usb/redirect.c=0D M hw/vfio/migration.c=0D M hw/virtio/vhost.c=0D M hw/virtio/virtio-rng.c=0D M hw/virtio/virtio.c=0D M include/exec/memory.h=0D M include/hw/elf_ops.h=0D M include/hw/ppc/pnv_xscom.h=0D M include/hw/s390x/css.h=0D M include/qemu-common.h=0D M include/qemu/id.h=0D M include/sysemu/runstate.h=0D M net/net.c=0D M qemu-options.hx=0D M scripts/tracetool/__init__.py=0D M softmmu/memory.c=0D M softmmu/qemu-seccomp.c=0D M softmmu/runstate.c=0D M target/arm/kvm.c=0D M target/arm/kvm_arm.h=0D M target/hexagon/gen_tcg_funcs.py=0D M target/i386/cpu.c=0D M target/i386/kvm/kvm.c=0D M target/i386/machine.c=0D M target/i386/sev.c=0D M target/i386/whpx/whpx-all.c=0D M target/m68k/op_helper.c=0D M target/mips/kvm.c=0D M target/ppc/cpu-qom.h=0D M target/riscv/cpu.c=0D M tests/fp/fp-test.c=0D M tests/qtest/fuzz-test.c=0D M ui/console.c=0D M ui/gtk.c=0D M ui/spice-core.c=0D M ui/vnc-auth-sasl.c=0D M util/id.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6= .0-pull-request' into staging=0D =0D Pull request=0D =0D # gpg: Signature made Wed 10 Mar 2021 21:56:09 GMT=0D # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FB= E3C=0D # gpg: issuer "laurent@vivier.eu"=0D # gpg: Good signature from "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier (Red Hat) = " [full]=0D # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F = BE3C=0D =0D * remotes/vivier2/tags/trivial-branch-for-6.0-pull-request: (22 commits)=0D= sysemu: Let VMChangeStateHandler take boolean 'running' argument=0D sysemu/runstate: Let runstate_is_running() return bool=0D hw/lm32/Kconfig: Have MILKYMIST select LM32_DEVICES=0D hw/lm32/Kconfig: Rename CONFIG_LM32 -> CONFIG_LM32_DEVICES=0D hw/lm32/Kconfig: Introduce CONFIG_LM32_EVR for lm32-evr/uclinux boards=0D= qemu-common.h: Update copyright string to 2021=0D tests/fp/fp-test: Replace the word 'blacklist'=0D qemu-options: Replace the word 'blacklist'=0D seccomp: Replace the word 'blacklist'=0D scripts/tracetool: Replace the word 'whitelist'=0D ui: Replace the word 'whitelist'=0D virtio-gpu: Adjust code space style=0D exec/memory: Use struct Object typedef=0D fuzz-test: remove unneccessary debugging flags=0D net: Use id_generate() in the network subsystem, too=0D MAINTAINERS: Fix the location of tools manuals=0D vhost_user_gpu: Drop dead check for g_malloc() failure=0D backends/dbus-vmstate: Fix short read error handling=0D target/hexagon/gen_tcg_funcs: Fix a typo=0D hw/elf_ops: Fix a typo=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/f4abdf32714d...6f34661b6c97= =0D From MAILER-DAEMON Fri Mar 12 05:23:41 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKexI-0004VS-Vf for mharc-qemu-commits@gnu.org; Fri, 12 Mar 2021 05:23:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39986) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKexH-0004R1-OZ for qemu-commits@nongnu.org; Fri, 12 Mar 2021 05:23:40 -0500 Received: from out-25.smtp.github.com ([192.30.252.208]:59835 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKexC-00071x-TH for qemu-commits@nongnu.org; Fri, 12 Mar 2021 05:23:38 -0500 Received: from github.com (hubbernetes-node-bf20eaa.ash1-iad.github.net [10.56.116.20]) by smtp.github.com (Postfix) with ESMTPA id B35598404FD for ; Fri, 12 Mar 2021 02:23:28 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615544608; bh=v/1HX8YN+8fwE6Rl3xm5J31jWLt8M6YcvRhONOI7Y2k=; h=Date:From:To:Subject:From; b=Ac0c6z4b68kImJGD4UqpULWZBGfPWN2abrwds0RoeUhFBqLvWGCdsygc0VETcApOD OlBG2WJIeer65WEAohGY2yiL9sRkJHEyxO6dCGlIVGvmlAK9J9ooldnQSsmpPyZzKZ pZUDdz+SprAYLTbtyC8tyOr/XwF6wu+xZJtXQFJw= Date: Fri, 12 Mar 2021 02:23:28 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] ec79c5: hw/display/sm501: Remove dead code for non-32-bit ... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Mar 2021 10:23:40 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: ec79c56300c15fb32ad22596eacbdea0d218d9f5=0D https://github.com/qemu/qemu/commit/ec79c56300c15fb32ad22596eacbdea= 0d218d9f5=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/display/sm501.c=0D =0D Log Message:=0D -----------=0D hw/display/sm501: Remove dead code for non-32-bit RGB surfaces=0D =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel RGB. Remove the legacy dead=0D code from the sm501 display device which was handling the=0D possibility that the console surface was some other format.=0D =0D Signed-off-by: Peter Maydell =0D Message-Id: <20210212180653.27588-2-peter.maydell@linaro.org>=0D Acked-by: BALATON Zoltan =0D Signed-off-by: David Gibson =0D =0D =0D Commit: 36144df315ca614a40a45daded8bc5c691fcc3e7=0D https://github.com/qemu/qemu/commit/36144df315ca614a40a45daded8bc5c= 691fcc3e7=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/display/sm501_template.h=0D =0D Log Message:=0D -----------=0D hw/display/sm501: Expand out macros in template header=0D =0D Now that we only include sm501_template.h for the DEPTH=3D=3D32 case, we=0D= can expand out the uses of the BPP, PIXEL_TYPE and PIXEL_NAME macros=0D in that header.=0D =0D Signed-off-by: Peter Maydell =0D Message-Id: <20210212180653.27588-3-peter.maydell@linaro.org>=0D Acked-by: BALATON Zoltan =0D Signed-off-by: David Gibson =0D =0D =0D Commit: f7b5c16182fcb90bd312c81d0a5f63926c1dc367=0D https://github.com/qemu/qemu/commit/f7b5c16182fcb90bd312c81d0a5f639= 26c1dc367=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/display/sm501.c=0D R hw/display/sm501_template.h=0D =0D Log Message:=0D -----------=0D hw/display/sm501: Inline template header into C file=0D =0D We no longer need to include sm501_template.h multiple times, so=0D we can simply inline its contents into sm501.c.=0D =0D Signed-off-by: Peter Maydell =0D Message-Id: <20210212180653.27588-4-peter.maydell@linaro.org>=0D Acked-by: BALATON Zoltan =0D Signed-off-by: David Gibson =0D =0D =0D Commit: 382907b10077ed4cff48d9afe219a023887c0522=0D https://github.com/qemu/qemu/commit/382907b10077ed4cff48d9afe219a02= 3887c0522=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr_drc.c=0D =0D Log Message:=0D -----------=0D spapr_drc.c: do not call spapr_drc_detach() in drc_isolate_logical()=0D= =0D drc_isolate_logical() is used to move the DRC from the "Configured" to=0D= the "Available" state, erroring out if the DRC is in the unexpected=0D "Unisolate" state and doing nothing (with RTAS_OUT_SUCCESS) if the DRC=0D= is already in "Available" or in "Unusable" state.=0D =0D When moving from "Configured" to "Available", the DRC is moved to the=0D LOGICAL_AVAILABLE state, a drc->unplug_requested check is done and, if=0D= true, spapr_drc_detach() is called.=0D =0D What spapr_drc_detach() does then is:=0D =0D - set drc->unplug_requested to true. In fact, this is the only place=0D where unplug_request is set to true;=0D - does nothing else if drc->state !=3D drck->empty_state. If the DRC=0D state is equal to drck->empty_state, spapr_drc_release() is=0D called. For logical DRCs, drck->empty_state =3D LOGICAL_UNUSABLE.=0D =0D In short, calling spapr_drc_detach() in drc_isolate_logical() does=0D nothing. It'll set unplug_request to true again ('again' since it was=0D already true - otherwise the function wouldn't be called), and will=0D return without calling spapr_drc_release() because the DRC is not in=0D LOGICAL_UNUSABLE, since drc_isolate_logical() just moved it to=0D LOGICAL_AVAILABLE. The only place where the logical DRC is released is=0D= when called from drc_set_unusable(), when it is moved to the=0D "Unusable" state. As it should, according to PAPR.=0D =0D Even though calling spapr_drc_detach() in drc_isolate_logical() is=0D benign, removing it will avoid further thought about the matter. So=0D let's go ahead and do that.=0D =0D As a note, this logic was introduced in commit bbf5c878ab76. Since=0D then, the DRC handling code was refactored and enhanced, and PAPR=0D itself went through some changes in the DRC area as well. It is=0D expected that some assumptions we had back then are now deprecated.=0D =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210211225246.17315-2-danielhb413@gmail.com>=0D Reviewed-by: Greg Kurz =0D Signed-off-by: David Gibson =0D =0D =0D Commit: b88e0a57e6577f22620873d2363671b53faf77a5=0D https://github.com/qemu/qemu/commit/b88e0a57e6577f22620873d2363671b= 53faf77a5=0D Author: Alexey Kardashevskiy =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M pc-bios/README=0D M pc-bios/slof.bin=0D M roms/SLOF=0D =0D Log Message:=0D -----------=0D pseries: Update SLOF firmware image=0D =0D This is mostly compiler warnings fixed but while doing this,=0D a bug in MIN() in tcgbios was found.=0D =0D Alexey Kardashevskiy (14):=0D helpers: Define MIN()=0D libc: Compile with -Wextra=0D elf: Compile with -Wextra=0D usb: Compile with -Wextra=0D veth: Compile with -Wextra=0D virtio: Compile with -Wextra=0D e1000: Compile with -Wextra=0D libnet: Compile with -Wextra=0D libhv: Compile with -Wextra=0D libnvram: Compile with -Wextra=0D libtpm: Compile with -Wextra=0D slof/prim: Compile with -Wextra=0D Makefile: Actually compile with -Wextra=0D version: update to 20210217=0D =0D Thomas Huth (1):=0D virtio-serial: Remove superfluous serial-* words=0D =0D Signed-off-by: Alexey Kardashevskiy =0D Signed-off-by: David Gibson =0D =0D =0D Commit: 66d10d32ace18da3eacf2d8ee72c6076e87f9e72=0D https://github.com/qemu/qemu/commit/66d10d32ace18da3eacf2d8ee72c607= 6e87f9e72=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr_drc.c=0D =0D Log Message:=0D -----------=0D spapr_drc.c: use spapr_drc_release() in isolate_physical/set_unusable=0D= =0D When moving a physical DRC to "Available", drc_isolate_physical() will=0D= move the DRC state to STATE_PHYSICAL_POWERON and, if the DRC is marked=0D= for unplug, call spapr_drc_detach(). For physical DRCs,=0D drck->empty_state is STATE_PHYSICAL_POWERON, meaning that we're sure=0D that spapr_drc_detach() will end up calling spapr_drc_release() in the=0D= end.=0D =0D Likewise, for logical DRCs, drc_set_unusable will move the DRC to=0D "Unusable" state, setting drc->state to STATE_LOGICAL_UNUSABLE, which is=0D= the drck->empty_state for logical DRCs. spapr_drc_detach() will call=0D spapr_drc_release() in this case as well.=0D =0D In both scenarios, spapr_drc_detach() is being used as a=0D spapr_drc_release(), wrapper, where we also set unplug_requested (which=0D= is already true, otherwise spapr_drc_detach() wouldn't be called in the=0D= first place) and check if drc->state =3D=3D drck->empty_state, which we a= lso=0D know it's guaranteed to be true because we just set it.=0D =0D Just use spapr_drc_release() in these functions to be clear of our=0D intentions in both these functions.=0D =0D Reviewed-by: Greg Kurz =0D Reviewed-by: David Gibson =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210222194531.62717-2-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: a03509cd2baf48b1e947d9eb203ccb95bd99e5fb=0D https://github.com/qemu/qemu/commit/a03509cd2baf48b1e947d9eb203ccb9= 5bd99e5fb=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr.c=0D M hw/ppc/spapr_drc.c=0D M hw/ppc/spapr_pci.c=0D M hw/ppc/trace-events=0D M include/hw/ppc/spapr_drc.h=0D =0D Log Message:=0D -----------=0D spapr: rename spapr_drc_detach() to spapr_drc_unplug_request()=0D =0D spapr_drc_detach() is not the best name for what the function does. The=0D= function does not detach the DRC, it makes an uncommited attempt to do=0D= it. It'll mark the DRC as pending unplug, via the 'unplug_request'=0D flag, and only if the DRC state is drck->empty_state it will detach the=0D= DRC, via spapr_drc_release().=0D =0D This is a contrast with its pair spapr_drc_attach(), where the function=0D= is indeed creating the DRC QOM object. If you know what=0D spapr_drc_attach() does, you can be misled into thinking that=0D spapr_drc_detach() is removing the DRC from QEMU internal state, which=0D= isn't true.=0D =0D The current role of this function is better described as a request for=0D= detach, since there's no guarantee that we're going to detach the DRC in=0D= the end. Rename the function to spapr_drc_unplug_request to reflect=0D what is is doing.=0D =0D The initial idea was to change the name to spapr_drc_detach_request(),=0D= and later on change the unplug_request flag to detach_request. However,=0D= unplug_request is a migratable boolean for a long time now and renaming=0D= it is not worth the trouble. spapr_drc_unplug_request() setting=0D drc->unplug_request is more natural than spapr_drc_detach_request=0D setting drc->unplug_request.=0D =0D Reviewed-by: Greg Kurz =0D Reviewed-by: David Gibson =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210222194531.62717-3-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: a4ee352fe025bd1308eb77b11b3b60542af8a370=0D https://github.com/qemu/qemu/commit/a4ee352fe025bd1308eb77b11b3b605= 42af8a370=0D Author: C=C3=A9dric Le Goater =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D A docs/system/ppc/embedded.rst=0D A docs/system/ppc/powermac.rst=0D A docs/system/ppc/powernv.rst=0D A docs/system/ppc/prep.rst=0D A docs/system/ppc/pseries.rst=0D M docs/system/target-ppc.rst=0D =0D Log Message:=0D -----------=0D docs/system: Extend PPC section=0D =0D This moves the current documentation in files specific to each=0D platform family. PowerNV machine is updated, the other machines need=0D to be done.=0D =0D Signed-off-by: C=C3=A9dric Le Goater =0D Message-Id: <20210222133956.156001-1-clg@kaod.org>=0D Reviewed-by: Greg Kurz =0D [dwg: Trivial capitalization fix]=0D Signed-off-by: David Gibson =0D =0D =0D Commit: 936fda4d771fdc51d3640bdb0cc8ceec14165730=0D https://github.com/qemu/qemu/commit/936fda4d771fdc51d3640bdb0cc8cee= c14165730=0D Author: Fabiano Rosas =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M target/ppc/int_helper.c=0D M tests/tcg/configure.sh=0D A tests/tcg/ppc64/Makefile.target=0D A tests/tcg/ppc64le/Makefile.target=0D A tests/tcg/ppc64le/bcdsub.c=0D =0D Log Message:=0D -----------=0D target/ppc: Fix bcdsub. emulation when result overflows=0D =0D The commit d03b174a83 (target/ppc: simplify bcdadd/sub functions)=0D meant to simplify some of the code but it inadvertently altered the=0D way the CR6 field is set after the operation has overflowed.=0D =0D The CR6 bits are set based on the *unbounded* result of the operation,=0D= so we need to look at the result before returning from bcd_add_mag,=0D otherwise we will look at 0 when it overflows.=0D =0D Consider the following subtraction:=0D =0D v0 =3D 0x9999999999999999999999999999999c (maximum positive BCD value)=0D= v1 =3D 0x0000000000000000000000000000001d (negative one BCD value)=0D bcdsub. v0,v0,v1,0=0D =0D The Power ISA 2.07B says:=0D If the unbounded result is greater than zero, do the following.=0D If PS=3D0, the sign code of the result is set to 0b1100.=0D If PS=3D1, the sign code of the result is set to 0b1111.=0D If the operation overflows, CR field 6 is set to 0b0101. Otherwise,=0D CR field 6 is set to 0b0100.=0D =0D POWER9 hardware:=0D vr0 =3D 0x0000000000000000000000000000000c (positive zero BCD value)=0D cr6 =3D 0b0101 (0x5) (positive, overflow)=0D =0D QEMU:=0D vr0 =3D 0x0000000000000000000000000000000c (positive zero BCD value)=0D cr6 =3D 0b0011 (0x3) (zero, overflow) <--- wrong=0D =0D This patch reverts the part of d03b174a83 that introduced the=0D problem and adds a test-case to avoid further regressions:=0D =0D before:=0D $ make run-tcg-tests-ppc64le-linux-user=0D (...)=0D TEST bcdsub on ppc64le=0D bcdsub: qemu/tests/tcg/ppc64le/bcdsub.c:58: test_bcdsub_gt:=0D Assertion `(cr >> 4) =3D=3D ((1 << 2) | (1 << 0))' failed.=0D =0D Fixes: d03b174a83 (target/ppc: simplify bcdadd/sub functions)=0D Reported-by: Paul Clarke =0D Signed-off-by: Fabiano Rosas =0D Message-Id: <20210222194035.2723056-1-farosas@linux.ibm.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: 51254ffb320183a4636635840c23ee0e3a1efffa=0D https://github.com/qemu/qemu/commit/51254ffb320183a4636635840c23ee0= e3a1efffa=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr_drc.c=0D M include/hw/ppc/spapr_drc.h=0D =0D Log Message:=0D -----------=0D spapr_drc.c: introduce unplug_timeout_timer=0D =0D The LoPAR spec provides no way for the guest kernel to report failure of=0D= hotplug/hotunplug events. This wouldn't be bad if those operations were=0D= granted to always succeed, but that's far for the reality.=0D =0D What ends up happening is that, in the case of a failed hotunplug,=0D regardless of whether it was a QEMU error or a guest misbehavior, the=0D pSeries machine is retaining the unplug state of the device in the=0D running guest. This state is cleanup in machine reset, where it is=0D assumed that this state represents a device that is pending unplug, and=0D= the device is hotunpluged from the board. Until the reset occurs, any=0D hotunplug operation of the same device is forbid because there is a=0D pending unplug state.=0D =0D This behavior has at least one undesirable side effect. A long standing=0D= pending unplug state is, more often than not, the result of a hotunplug=0D= error. The user had to dealt with it, since retrying to unplug the=0D device is noy allowed, and then in the machine reset we're removing the=0D= device from the guest. This means that we're failing the user twice -=0D failed to hotunplug when asked, then hotunplugged without notice.=0D =0D Solutions to this problem range between trying to predict when the=0D hotunplug will fail and forbid the operation from the QEMU layer, from=0D= opening up the IRQ queue to allow for multiple hotunplug attempts, from=0D= telling the users to 'reboot the machine if something goes wrong'. The=0D= first solution is flawed because we can't fully predict guest behavior=0D= from QEMU, the second solution is a trial and error remediation that=0D counts on a hope that the unplug will eventually succeed, and the third=0D= is ... well.=0D =0D This patch introduces a crude, but effective solution to hotunplug=0D errors in the pSeries machine. For each unplug done, we'll timeout after=0D= some time. If a certain amount of time passes, we'll cleanup the=0D hotunplug state from the machine. During the timeout period, any unplug=0D= operations in the same device will still be blocked. After that, we'll=0D= assume that the guest failed the operation, and allow the user to try=0D again. If the timeout is too short we'll prevent legitimate hotunplug=0D situations to occur, so we'll need to overestimate the regular time an=0D= unplug operation takes to succeed to account that.=0D =0D The true solution for the hotunplug errors in the pSeries machines is a=0D= PAPR change to allow for the guest to warn the platform about it. For=0D now, the work done in this timeout design can be used for the new PAPR=0D= 'abort hcall' in the future, given that for both cases we'll need code=0D= to cleanup the existing unplug states of the DRCs.=0D =0D At this moment we're adding the basic wiring of the timer into the DRC.=0D= Next patch will use the timer to timeout failed CPU hotunplugs.=0D =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210222194531.62717-4-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: d1c2e3ce3d5a5424651967bce1cf1f4caa0c6d91=0D https://github.com/qemu/qemu/commit/d1c2e3ce3d5a5424651967bce1cf1f4= caa0c6d91=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr.c=0D M hw/ppc/spapr_drc.c=0D M include/hw/ppc/spapr_drc.h=0D =0D Log Message:=0D -----------=0D spapr_drc.c: add hotunplug timeout for CPUs=0D =0D There is a reliable way to make a CPU hotunplug fail in the pseries=0D machine. Hotplug a CPU A, then offline all other CPUs inside the guest=0D= but A. When trying to hotunplug A the guest kernel will refuse to do it,=0D= because A is now the last online CPU of the guest. PAPR has no 'error=0D callback' in this situation to report back to the platform, so the guest=0D= kernel will deny the unplug in silent and QEMU will never know what=0D happened. The unplug pending state of A will remain until the guest is=0D= shutdown or rebooted.=0D =0D Previous attempts of fixing it (see [1] and [2]) were aimed at trying to=0D= mitigate the effects of the problem. In [1] we were trying to guess=0D which guest CPUs were online to forbid hotunplug of the last online CPU=0D= in the QEMU layer, avoiding the scenario described above because QEMU is=0D= now failing in behalf of the guest. This is not robust because the last=0D= online CPU of the guest can change while we're in the middle of the=0D unplug process, and our initial assumptions are now invalid. In [2] we=0D= were accepting that our unplug process is uncertain and the user should=0D= be allowed to spam the IRQ hotunplug queue of the guest in case the CPU=0D= hotunplug fails.=0D =0D This patch presents another alternative, using the timeout=0D infrastructure introduced in the previous patch. CPU hotunplugs in the=0D= pSeries machine will now timeout after 15 seconds. This is a long time=0D= for a single CPU unplug to occur, regardless of guest load - although=0D the user is *strongly* encouraged to *not* hotunplug devices from a=0D guest under high load - and we can be sure that something went wrong if=0D= it takes longer than that for the guest to release the CPU (the same=0D can't be said about memory hotunplug - more on that in the next patch).=0D= =0D Timing out the unplug operation will reset the unplug state of the CPU=0D= and allow the user to try it again, regardless of the error situation=0D that prevented the hotunplug to occur. Of all the not so pretty=0D fixes/mitigations for CPU hotunplug errors in pSeries, timing out the=0D operation is an admission that we have no control in the process, and=0D must assume the worst case if the operation doesn't succeed in a=0D sensible time frame.=0D =0D [1] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg03353.html=0D= [2] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg04400.html=0D= =0D Reported-by: Xujun Ma =0D Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=3D1911414=0D Reviewed-by: David Gibson =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210222194531.62717-5-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: fe1831eff8a41e96044fe98a6b0e232daa22ef83=0D https://github.com/qemu/qemu/commit/fe1831eff8a41e96044fe98a6b0e232= daa22ef83=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr.c=0D M hw/ppc/spapr_drc.c=0D M include/hw/ppc/spapr.h=0D =0D Log Message:=0D -----------=0D spapr_drc.c: use DRC reconfiguration to cleanup DIMM unplug state=0D =0D Handling errors in memory hotunplug in the pSeries machine is more=0D complex than any other device type, because there are all the=0D complications that other devices has, and more.=0D =0D For instance, determining a timeout for a DIMM hotunplug must consider=0D= if it's a Hash-MMU or a Radix-MMU guest, because Hash guests takes=0D longer to hotunplug DIMMs. The size of the DIMM is also a factor, given=0D= that longer DIMMs naturally takes longer to be hotunplugged from the=0D kernel. And there's also the guest memory usage to be considered: if=0D there's a process that is consuming memory that would be lost by the=0D DIMM unplug, the kernel will postpone the unplug process until the=0D process finishes, and then initiate the regular hotunplug process. The=0D= first two considerations are manageable, but the last one is a deal=0D breaker.=0D =0D There is no sane way for the pSeries machine to determine the memory=0D load in the guest when attempting a DIMM hotunplug - and even if there=0D= was a way, the guest can start using all the RAM in the middle of the=0D unplug process and invalidate our previous assumptions - and in result=0D= we can't even begin to calculate a timeout for the operation. This means=0D= that we can't implement a viable timeout mechanism for memory unplug in=0D= pSeries.=0D =0D Going back to why we would consider an unplug timeout, the reason is=0D that we can't know if the kernel is giving up the unplug. Turns out=0D that, sometimes, we can. Consider a failed memory hotunplug attempt=0D where the kernel will error out with the following message:=0D =0D 'pseries-hotplug-mem: Memory indexed-count-remove failed, adding any=0D removed LMBs'=0D =0D This happens when there is a LMB that the kernel gave up in removing,=0D and the LMBs previously marked for removal are now being added back.=0D This happens in the pseries kernel in [1], dlpar_memory_remove_by_ic()=0D= into dlpar_add_lmb(), and after that update_lmb_associativity_index().=0D= In this function, the kernel is configuring the LMB DRC connector again.=0D= Note that this is a valid usage in LOPAR, as stated in section=0D "ibm,configure-connector RTAS Call":=0D =0D 'A subsequent sequence of calls to ibm,configure-connector with the same=0D= entry from the =E2=80=9Cibm,drc-indexes=E2=80=9D or =E2=80=9Cibm,drc-info= =E2=80=9D property will restart=0D the configuration of devices which were not completely configured.'=0D =0D We can use this kernel behavior in our favor. If a DRC connector=0D reconfiguration for a LMB that we marked as unplug pending happens, this=0D= indicates that the kernel changed its mind about the unplug and is=0D reasserting that it will keep using all the LMBs of the DIMM. In this=0D case, it's safe to assume that the whole DIMM device unplug was=0D cancelled.=0D =0D This patch hops into rtas_ibm_configure_connector() and, in the scenario=0D= described above, clear the unplug state for the DIMM device. This will=0D= not solve all the problems we still have with memory unplug, but it will=0D= cover this case where the kernel reconfigures LMBs after a failed=0D unplug. We are a bit more resilient, without using an unreliable=0D timeout, and we didn't make the remaining error cases any worse.=0D =0D [1] arch/powerpc/platforms/pseries/hotplug-memory.c=0D =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210222194531.62717-6-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: f149c9b7f942c56f30e66be034f669b95255474e=0D https://github.com/qemu/qemu/commit/f149c9b7f942c56f30e66be034f669b= 95255474e=0D Author: Bin Meng =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/net/fsl_etsec/etsec.c=0D M hw/net/fsl_etsec/rings.c=0D =0D Log Message:=0D -----------=0D hw/net: fsl_etsec: Fix build error when HEX_DUMP is on=0D =0D "qemu-common.h" should be included to provide the forward declaration=0D of qemu_hexdump() when HEX_DUMP is on.=0D =0D Signed-off-by: Bin Meng =0D Message-Id: <20210228050431.24647-1-bmeng.cn@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: e5943b00d35efc68ca72ed304cfca98a9f3a647c=0D https://github.com/qemu/qemu/commit/e5943b00d35efc68ca72ed304cfca98= a9f3a647c=0D Author: Bin Meng =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/e500.c=0D =0D Log Message:=0D -----------=0D hw/ppc: e500: Add missing in the eTSEC node=0D =0D The eTSEC node should provide an empty property in the=0D eTSEC node, otherwise of_translate_address() in the Linux kernel=0D fails to get the eTSEC register base, reporting:=0D =0D OF: ** translation for device /platform@f00000000/ethernet@0/queue-grou= p **=0D OF: bus is default (na=3D1, ns=3D1) on /platform@f00000000/ethernet@0=0D= OF: translating address: 00000000=0D OF: parent bus is default (na=3D1, ns=3D1) on /platform@f00000000=0D OF: no ranges; cannot translate=0D =0D Per devicetree spec v0.3 [1] chapter 2.3.8:=0D =0D If the property is not present in a bus node, it is assumed that=0D no mapping exists between children of the node and the parent=0D address space.=0D =0D This is why of_translate_address() aborts the address translation.=0D Apparently U-Boot devicetree parser seems to be tolerant with=0D missing as this was not noticed when testing with U-Boot.=0D The empty property is present in all kernel shipped dtsi=0D files for eTSEC, Let's add it to conform with the spec.=0D =0D [1] https://github.com/devicetree-org/devicetree-specification/releases/d= ownload/v0.3/devicetree-specification-v0.3.pdf=0D =0D Fixes: fdfb7f2cdb2d ("e500: Add support for eTSEC in device tree")=0D Signed-off-by: Bin Meng =0D Message-Id: <1614158919-9473-1-git-send-email-bmeng.cn@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: 7420033ec460e7b9906bf05fbe1a0d3830536657=0D https://github.com/qemu/qemu/commit/7420033ec460e7b9906bf05fbe1a0d3= 830536657=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr.c=0D =0D Log Message:=0D -----------=0D spapr.c: add 'unplug already in progress' message for PHB unplug=0D =0D Both CPU hotunplug and PC_DIMM unplug reports an user warning,=0D mentioning that the hotunplug is in progress, if consecutive=0D 'device_del' are issued in quick succession.=0D =0D Do the same for PHBs in spapr_phb_unplug_request().=0D =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210226163301.419727-4-danielhb413@gmail.com>=0D Reviewed-by: Greg Kurz =0D Signed-off-by: David Gibson =0D =0D =0D Commit: e35dfbd22780aafbcd4b6da5130a00fc085fd5de=0D https://github.com/qemu/qemu/commit/e35dfbd22780aafbcd4b6da5130a00f= c085fd5de=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr_pci.c=0D =0D Log Message:=0D -----------=0D spapr_pci.c: add 'unplug already in progress' message for PCI unplug=0D= =0D Hotunplug for all other devices are warning the user when the hotunplug=0D= is already in progress. Do the same for PCI devices in=0D spapr_pci_unplug_request().=0D =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210226163301.419727-5-danielhb413@gmail.com>=0D Reviewed-by: Greg Kurz =0D Signed-off-by: David Gibson =0D =0D =0D Commit: 4515a5f786024fabf0bef4cf3d28adf5647e6e82=0D https://github.com/qemu/qemu/commit/4515a5f786024fabf0bef4cf3d28adf= 5647e6e82=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr_drc.c=0D M include/qemu/timer.h=0D M util/qemu-timer.c=0D =0D Log Message:=0D -----------=0D qemu_timer.c: add timer_deadline_ms() helper=0D =0D The pSeries machine is using QEMUTimer internals to return the timeout=0D= in seconds for a timer object, in hw/ppc/spapr.c, function=0D spapr_drc_unplug_timeout_remaining_sec().=0D =0D Create a helper in qemu-timer.c to retrieve the deadline for a QEMUTimer=0D= object, in ms, to avoid exposing timer internals to the PPC code.=0D =0D CC: Paolo Bonzini =0D Acked-by: Paolo Bonzini =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210301124133.23800-2-danielhb413@gmail.com>=0D Reviewed-by: Greg Kurz =0D Signed-off-by: David Gibson =0D =0D =0D Commit: 09db2216aa06be8bacd0101723d9c257f75c803f=0D https://github.com/qemu/qemu/commit/09db2216aa06be8bacd0101723d9c25= 7f75c803f=0D Author: Vitaly Cheptsov =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M target/ppc/translate_init.c.inc=0D =0D Log Message:=0D -----------=0D target/ppc: fix icount support on Book-e vms accessing SPRs=0D =0D Failing to guard SPR access with gen_io_start/gen_stop_exception=0D causes "Bad icount read" exceptions when running VMs with=0D e500mc and e500v2 CPUs with an icount parameter.=0D =0D Cc: David Gibson =0D Cc: Greg Kurz =0D Cc: Paolo Bonzini =0D Signed-off-by: Vitaly Cheptsov =0D Message-Id: <20210303140851.78383-1-cheptsov@ispras.ru>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: 41c8ad3d920d6f1741b34bfdfaa72b43b45209b5=0D https://github.com/qemu/qemu/commit/41c8ad3d920d6f1741b34bfdfaa72b4= 3b45209b5=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr.c=0D =0D Log Message:=0D -----------=0D spapr.c: remove duplicated assert in spapr_memory_unplug_request()=0D =0D We are asserting the existence of the first DRC LMB after sending unplug=0D= requests to all LMBs of the DIMM, where every DRC is being asserted=0D inside the loop. This means that the first DRC is being asserted twice.=0D= =0D Remove the duplicated assert.=0D =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210302141019.153729-2-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: eb7f80fd26d73e7e1af105431da58971b1dba517=0D https://github.com/qemu/qemu/commit/eb7f80fd26d73e7e1af105431da5897= 1b1dba517=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr.c=0D M hw/ppc/spapr_drc.c=0D M include/hw/ppc/spapr.h=0D =0D Log Message:=0D -----------=0D spapr.c: send QAPI event when memory hotunplug fails=0D =0D Recent changes allowed the pSeries machine to rollback the hotunplug=0D process for the DIMM when the guest kernel signals, via a=0D reconfiguration of the DR connector, that it's not going to release the=0D= LMBs.=0D =0D Let's also warn QAPI listerners about it. One place to do it would be=0D right after the unplug state is cleaned up,=0D spapr_clear_pending_dimm_unplug_state(). This would mean that the=0D function is now doing more than cleaning up the pending dimm state=0D though.=0D =0D This patch does the following changes in spapr.c:=0D =0D - send a QAPI event to inform that we experienced a failure in the=0D hotunplug of the DIMM;=0D =0D - rename spapr_clear_pending_dimm_unplug_state() to=0D spapr_memory_unplug_rollback(). This is a better fit for what the=0D function is now doing, and it makes callers care more about what the=0D= function goal is and less about spapr.c internals such as clearing=0D the pending dimm unplug state.=0D =0D Reviewed-by: Greg Kurz =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210302141019.153729-3-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: f200aea641d03399a795435942b415061386d660=0D https://github.com/qemu/qemu/commit/f200aea641d03399a795435942b4150= 61386d660=0D Author: Peter Maydell =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D A docs/system/ppc/embedded.rst=0D A docs/system/ppc/powermac.rst=0D A docs/system/ppc/powernv.rst=0D A docs/system/ppc/prep.rst=0D A docs/system/ppc/pseries.rst=0D M docs/system/target-ppc.rst=0D M hw/display/sm501.c=0D R hw/display/sm501_template.h=0D M hw/net/fsl_etsec/etsec.c=0D M hw/net/fsl_etsec/rings.c=0D M hw/ppc/e500.c=0D M hw/ppc/spapr.c=0D M hw/ppc/spapr_drc.c=0D M hw/ppc/spapr_pci.c=0D M hw/ppc/trace-events=0D M include/hw/ppc/spapr.h=0D M include/hw/ppc/spapr_drc.h=0D M include/qemu/timer.h=0D M pc-bios/README=0D M pc-bios/slof.bin=0D M roms/SLOF=0D M target/ppc/int_helper.c=0D M target/ppc/translate_init.c.inc=0D M tests/tcg/configure.sh=0D A tests/tcg/ppc64/Makefile.target=0D A tests/tcg/ppc64le/Makefile.target=0D A tests/tcg/ppc64le/bcdsub.c=0D M util/qemu-timer.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-202103= 10' into staging=0D =0D ppc patch queue for 2021-03-10=0D =0D Next batch of patches for the ppc target and machine types. Includes:=0D= * Several cleanups for sm501 from Peter Maydell=0D * An update to the SLOF guest firmware=0D * Improved handling of hotplug failures in spapr, associated cleanups=0D= to the hotplug handling code=0D * Several etsec fixes and cleanups from Bin Meng=0D * Assorted other fixes and cleanups=0D =0D # gpg: Signature made Wed 10 Mar 2021 04:08:53 GMT=0D # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B= 392=0D # gpg: Good signature from "David Gibson " [= full]=0D # gpg: aka "David Gibson (Red Hat) " = [full]=0D # gpg: aka "David Gibson (ozlabs.org) " [full]=0D # gpg: aka "David Gibson (kernel.org) " [= unknown]=0D # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 = B392=0D =0D * remotes/dg-gitlab/tags/ppc-for-6.0-20210310:=0D spapr.c: send QAPI event when memory hotunplug fails=0D spapr.c: remove duplicated assert in spapr_memory_unplug_request()=0D target/ppc: fix icount support on Book-e vms accessing SPRs=0D qemu_timer.c: add timer_deadline_ms() helper=0D spapr_pci.c: add 'unplug already in progress' message for PCI unplug=0D= spapr.c: add 'unplug already in progress' message for PHB unplug=0D hw/ppc: e500: Add missing in the eTSEC node=0D hw/net: fsl_etsec: Fix build error when HEX_DUMP is on=0D spapr_drc.c: use DRC reconfiguration to cleanup DIMM unplug state=0D spapr_drc.c: add hotunplug timeout for CPUs=0D spapr_drc.c: introduce unplug_timeout_timer=0D target/ppc: Fix bcdsub. emulation when result overflows=0D docs/system: Extend PPC section=0D spapr: rename spapr_drc_detach() to spapr_drc_unplug_request()=0D spapr_drc.c: use spapr_drc_release() in isolate_physical/set_unusable=0D= pseries: Update SLOF firmware image=0D spapr_drc.c: do not call spapr_drc_detach() in drc_isolate_logical()=0D= hw/display/sm501: Inline template header into C file=0D hw/display/sm501: Expand out macros in template header=0D hw/display/sm501: Remove dead code for non-32-bit RGB surfaces=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/6f34661b6c97...f200aea641d0= =0D From MAILER-DAEMON Fri Mar 12 06:31:41 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKg17-0001DH-F0 for mharc-qemu-commits@gnu.org; Fri, 12 Mar 2021 06:31:41 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:32918) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKg16-00016s-1r for qemu-commits@nongnu.org; Fri, 12 Mar 2021 06:31:40 -0500 Received: from out-23.smtp.github.com ([192.30.252.206]:39583) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKg13-0000T1-ET for qemu-commits@nongnu.org; Fri, 12 Mar 2021 06:31:39 -0500 Received: from github.com (hubbernetes-node-01abb34.ac4-iad.github.net [10.52.207.58]) by smtp.github.com (Postfix) with ESMTPA id BE6C76008E8 for ; Fri, 12 Mar 2021 03:31:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615548696; bh=LKaPchNveHkv/3Le48/ZpnOCuHgN95WnGh7IrbGsaew=; h=Date:From:To:Subject:From; b=kiiwxJekMiqhXfQQL0OoMGxZHW52TyPVaR+fNeh8WyT5oGmvaYDG8l7rq5ODlINtn r0x1RV0PjycJs7tmUUqU05jdJJK0gHxu+5ARKbyd1bFI/+WNTRcb/7bX6qfcpqMDAY 2Rz1tNUySLAsa+gUDUxVqkaVMaIsZphlxc1wwm2I= Date: Fri, 12 Mar 2021 03:31:36 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.206; envelope-from=noreply@github.com; helo=out-23.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 194185: Merge remote-tracking branch 'remotes/dg-gitlab/ta... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Mar 2021 11:31:40 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 1941858448e76f83eb00614c4f34ac29e9a8e792 https://github.com/qemu/qemu/commit/1941858448e76f83eb00614c4f34ac29e9a8e792 Author: Peter Maydell Date: 2021-03-12 (Fri, 12 Mar 2021) Changed paths: A docs/system/ppc/embedded.rst A docs/system/ppc/powermac.rst A docs/system/ppc/powernv.rst A docs/system/ppc/prep.rst A docs/system/ppc/pseries.rst M docs/system/target-ppc.rst M hw/display/sm501.c R hw/display/sm501_template.h M hw/net/fsl_etsec/etsec.c M hw/net/fsl_etsec/rings.c M hw/ppc/e500.c M hw/ppc/spapr.c M hw/ppc/spapr_drc.c M hw/ppc/spapr_pci.c M hw/ppc/trace-events M include/hw/ppc/spapr.h M include/hw/ppc/spapr_drc.h M include/qemu/timer.h M pc-bios/README M pc-bios/slof.bin M roms/SLOF M target/ppc/int_helper.c M target/ppc/translate_init.c.inc M tests/tcg/configure.sh A tests/tcg/ppc64/Makefile.target A tests/tcg/ppc64le/Makefile.target A tests/tcg/ppc64le/bcdsub.c M util/qemu-timer.c Log Message: ----------- Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20210310' into staging ppc patch queue for 2021-03-10 Next batch of patches for the ppc target and machine types. Includes: * Several cleanups for sm501 from Peter Maydell * An update to the SLOF guest firmware * Improved handling of hotplug failures in spapr, associated cleanups to the hotplug handling code * Several etsec fixes and cleanups from Bin Meng * Assorted other fixes and cleanups # gpg: Signature made Wed 10 Mar 2021 04:08:53 GMT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson " [full] # gpg: aka "David Gibson (Red Hat) " [full] # gpg: aka "David Gibson (ozlabs.org) " [full] # gpg: aka "David Gibson (kernel.org) " [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.0-20210310: spapr.c: send QAPI event when memory hotunplug fails spapr.c: remove duplicated assert in spapr_memory_unplug_request() target/ppc: fix icount support on Book-e vms accessing SPRs qemu_timer.c: add timer_deadline_ms() helper spapr_pci.c: add 'unplug already in progress' message for PCI unplug spapr.c: add 'unplug already in progress' message for PHB unplug hw/ppc: e500: Add missing in the eTSEC node hw/net: fsl_etsec: Fix build error when HEX_DUMP is on spapr_drc.c: use DRC reconfiguration to cleanup DIMM unplug state spapr_drc.c: add hotunplug timeout for CPUs spapr_drc.c: introduce unplug_timeout_timer target/ppc: Fix bcdsub. emulation when result overflows docs/system: Extend PPC section spapr: rename spapr_drc_detach() to spapr_drc_unplug_request() spapr_drc.c: use spapr_drc_release() in isolate_physical/set_unusable pseries: Update SLOF firmware image spapr_drc.c: do not call spapr_drc_detach() in drc_isolate_logical() hw/display/sm501: Inline template header into C file hw/display/sm501: Expand out macros in template header hw/display/sm501: Remove dead code for non-32-bit RGB surfaces Signed-off-by: Peter Maydell From MAILER-DAEMON Fri Mar 12 08:53:41 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKiEW-0004tD-SO for mharc-qemu-commits@gnu.org; Fri, 12 Mar 2021 08:53:40 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:44258) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKiEU-0004o0-RB for qemu-commits@nongnu.org; Fri, 12 Mar 2021 08:53:38 -0500 Received: from out-28.smtp.github.com ([192.30.252.211]:45659) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKiEQ-0002ox-ME for qemu-commits@nongnu.org; Fri, 12 Mar 2021 08:53:38 -0500 Received: from github.com (hubbernetes-node-27f0884.ash1-iad.github.net [10.56.22.73]) by smtp.github.com (Postfix) with ESMTPA id CE2D1900086 for ; Fri, 12 Mar 2021 05:53:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615557213; bh=RyAY9gert2Q5HIylk1AAbdAo6ZRrxZ5XoJy4RqJSS9M=; h=Date:From:To:Subject:From; b=lU3y+cTmNSfE2OoO3ccOba/dvbK38YpGyxbrBreXEqZf6IQYy6vTgseSyVmL/m+eW ziPnlAh0CBf/TGX9Z0oAT6yyNav6Q7OEhXAvsN/jAldHQ7g+FHVfv+MxiXVQR+NAgx HP2Hya+j/KTbUJb6MJJcQ7wG3p0iy4SUsYVwC/00= Date: Fri, 12 Mar 2021 05:53:33 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -46 X-Spam_score: -4.7 X-Spam_bar: ---- X-Spam_report: (-4.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] ec79c5: hw/display/sm501: Remove dead code for non-32-bit ... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Mar 2021 13:53:39 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: ec79c56300c15fb32ad22596eacbdea0d218d9f5=0D https://github.com/qemu/qemu/commit/ec79c56300c15fb32ad22596eacbdea= 0d218d9f5=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/display/sm501.c=0D =0D Log Message:=0D -----------=0D hw/display/sm501: Remove dead code for non-32-bit RGB surfaces=0D =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel RGB. Remove the legacy dead=0D code from the sm501 display device which was handling the=0D possibility that the console surface was some other format.=0D =0D Signed-off-by: Peter Maydell =0D Message-Id: <20210212180653.27588-2-peter.maydell@linaro.org>=0D Acked-by: BALATON Zoltan =0D Signed-off-by: David Gibson =0D =0D =0D Commit: 36144df315ca614a40a45daded8bc5c691fcc3e7=0D https://github.com/qemu/qemu/commit/36144df315ca614a40a45daded8bc5c= 691fcc3e7=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/display/sm501_template.h=0D =0D Log Message:=0D -----------=0D hw/display/sm501: Expand out macros in template header=0D =0D Now that we only include sm501_template.h for the DEPTH=3D=3D32 case, we=0D= can expand out the uses of the BPP, PIXEL_TYPE and PIXEL_NAME macros=0D in that header.=0D =0D Signed-off-by: Peter Maydell =0D Message-Id: <20210212180653.27588-3-peter.maydell@linaro.org>=0D Acked-by: BALATON Zoltan =0D Signed-off-by: David Gibson =0D =0D =0D Commit: f7b5c16182fcb90bd312c81d0a5f63926c1dc367=0D https://github.com/qemu/qemu/commit/f7b5c16182fcb90bd312c81d0a5f639= 26c1dc367=0D Author: Peter Maydell =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/display/sm501.c=0D R hw/display/sm501_template.h=0D =0D Log Message:=0D -----------=0D hw/display/sm501: Inline template header into C file=0D =0D We no longer need to include sm501_template.h multiple times, so=0D we can simply inline its contents into sm501.c.=0D =0D Signed-off-by: Peter Maydell =0D Message-Id: <20210212180653.27588-4-peter.maydell@linaro.org>=0D Acked-by: BALATON Zoltan =0D Signed-off-by: David Gibson =0D =0D =0D Commit: 382907b10077ed4cff48d9afe219a023887c0522=0D https://github.com/qemu/qemu/commit/382907b10077ed4cff48d9afe219a02= 3887c0522=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr_drc.c=0D =0D Log Message:=0D -----------=0D spapr_drc.c: do not call spapr_drc_detach() in drc_isolate_logical()=0D= =0D drc_isolate_logical() is used to move the DRC from the "Configured" to=0D= the "Available" state, erroring out if the DRC is in the unexpected=0D "Unisolate" state and doing nothing (with RTAS_OUT_SUCCESS) if the DRC=0D= is already in "Available" or in "Unusable" state.=0D =0D When moving from "Configured" to "Available", the DRC is moved to the=0D LOGICAL_AVAILABLE state, a drc->unplug_requested check is done and, if=0D= true, spapr_drc_detach() is called.=0D =0D What spapr_drc_detach() does then is:=0D =0D - set drc->unplug_requested to true. In fact, this is the only place=0D where unplug_request is set to true;=0D - does nothing else if drc->state !=3D drck->empty_state. If the DRC=0D state is equal to drck->empty_state, spapr_drc_release() is=0D called. For logical DRCs, drck->empty_state =3D LOGICAL_UNUSABLE.=0D =0D In short, calling spapr_drc_detach() in drc_isolate_logical() does=0D nothing. It'll set unplug_request to true again ('again' since it was=0D already true - otherwise the function wouldn't be called), and will=0D return without calling spapr_drc_release() because the DRC is not in=0D LOGICAL_UNUSABLE, since drc_isolate_logical() just moved it to=0D LOGICAL_AVAILABLE. The only place where the logical DRC is released is=0D= when called from drc_set_unusable(), when it is moved to the=0D "Unusable" state. As it should, according to PAPR.=0D =0D Even though calling spapr_drc_detach() in drc_isolate_logical() is=0D benign, removing it will avoid further thought about the matter. So=0D let's go ahead and do that.=0D =0D As a note, this logic was introduced in commit bbf5c878ab76. Since=0D then, the DRC handling code was refactored and enhanced, and PAPR=0D itself went through some changes in the DRC area as well. It is=0D expected that some assumptions we had back then are now deprecated.=0D =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210211225246.17315-2-danielhb413@gmail.com>=0D Reviewed-by: Greg Kurz =0D Signed-off-by: David Gibson =0D =0D =0D Commit: b88e0a57e6577f22620873d2363671b53faf77a5=0D https://github.com/qemu/qemu/commit/b88e0a57e6577f22620873d2363671b= 53faf77a5=0D Author: Alexey Kardashevskiy =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M pc-bios/README=0D M pc-bios/slof.bin=0D M roms/SLOF=0D =0D Log Message:=0D -----------=0D pseries: Update SLOF firmware image=0D =0D This is mostly compiler warnings fixed but while doing this,=0D a bug in MIN() in tcgbios was found.=0D =0D Alexey Kardashevskiy (14):=0D helpers: Define MIN()=0D libc: Compile with -Wextra=0D elf: Compile with -Wextra=0D usb: Compile with -Wextra=0D veth: Compile with -Wextra=0D virtio: Compile with -Wextra=0D e1000: Compile with -Wextra=0D libnet: Compile with -Wextra=0D libhv: Compile with -Wextra=0D libnvram: Compile with -Wextra=0D libtpm: Compile with -Wextra=0D slof/prim: Compile with -Wextra=0D Makefile: Actually compile with -Wextra=0D version: update to 20210217=0D =0D Thomas Huth (1):=0D virtio-serial: Remove superfluous serial-* words=0D =0D Signed-off-by: Alexey Kardashevskiy =0D Signed-off-by: David Gibson =0D =0D =0D Commit: 66d10d32ace18da3eacf2d8ee72c6076e87f9e72=0D https://github.com/qemu/qemu/commit/66d10d32ace18da3eacf2d8ee72c607= 6e87f9e72=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr_drc.c=0D =0D Log Message:=0D -----------=0D spapr_drc.c: use spapr_drc_release() in isolate_physical/set_unusable=0D= =0D When moving a physical DRC to "Available", drc_isolate_physical() will=0D= move the DRC state to STATE_PHYSICAL_POWERON and, if the DRC is marked=0D= for unplug, call spapr_drc_detach(). For physical DRCs,=0D drck->empty_state is STATE_PHYSICAL_POWERON, meaning that we're sure=0D that spapr_drc_detach() will end up calling spapr_drc_release() in the=0D= end.=0D =0D Likewise, for logical DRCs, drc_set_unusable will move the DRC to=0D "Unusable" state, setting drc->state to STATE_LOGICAL_UNUSABLE, which is=0D= the drck->empty_state for logical DRCs. spapr_drc_detach() will call=0D spapr_drc_release() in this case as well.=0D =0D In both scenarios, spapr_drc_detach() is being used as a=0D spapr_drc_release(), wrapper, where we also set unplug_requested (which=0D= is already true, otherwise spapr_drc_detach() wouldn't be called in the=0D= first place) and check if drc->state =3D=3D drck->empty_state, which we a= lso=0D know it's guaranteed to be true because we just set it.=0D =0D Just use spapr_drc_release() in these functions to be clear of our=0D intentions in both these functions.=0D =0D Reviewed-by: Greg Kurz =0D Reviewed-by: David Gibson =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210222194531.62717-2-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: a03509cd2baf48b1e947d9eb203ccb95bd99e5fb=0D https://github.com/qemu/qemu/commit/a03509cd2baf48b1e947d9eb203ccb9= 5bd99e5fb=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr.c=0D M hw/ppc/spapr_drc.c=0D M hw/ppc/spapr_pci.c=0D M hw/ppc/trace-events=0D M include/hw/ppc/spapr_drc.h=0D =0D Log Message:=0D -----------=0D spapr: rename spapr_drc_detach() to spapr_drc_unplug_request()=0D =0D spapr_drc_detach() is not the best name for what the function does. The=0D= function does not detach the DRC, it makes an uncommited attempt to do=0D= it. It'll mark the DRC as pending unplug, via the 'unplug_request'=0D flag, and only if the DRC state is drck->empty_state it will detach the=0D= DRC, via spapr_drc_release().=0D =0D This is a contrast with its pair spapr_drc_attach(), where the function=0D= is indeed creating the DRC QOM object. If you know what=0D spapr_drc_attach() does, you can be misled into thinking that=0D spapr_drc_detach() is removing the DRC from QEMU internal state, which=0D= isn't true.=0D =0D The current role of this function is better described as a request for=0D= detach, since there's no guarantee that we're going to detach the DRC in=0D= the end. Rename the function to spapr_drc_unplug_request to reflect=0D what is is doing.=0D =0D The initial idea was to change the name to spapr_drc_detach_request(),=0D= and later on change the unplug_request flag to detach_request. However,=0D= unplug_request is a migratable boolean for a long time now and renaming=0D= it is not worth the trouble. spapr_drc_unplug_request() setting=0D drc->unplug_request is more natural than spapr_drc_detach_request=0D setting drc->unplug_request.=0D =0D Reviewed-by: Greg Kurz =0D Reviewed-by: David Gibson =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210222194531.62717-3-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: a4ee352fe025bd1308eb77b11b3b60542af8a370=0D https://github.com/qemu/qemu/commit/a4ee352fe025bd1308eb77b11b3b605= 42af8a370=0D Author: C=C3=A9dric Le Goater =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D A docs/system/ppc/embedded.rst=0D A docs/system/ppc/powermac.rst=0D A docs/system/ppc/powernv.rst=0D A docs/system/ppc/prep.rst=0D A docs/system/ppc/pseries.rst=0D M docs/system/target-ppc.rst=0D =0D Log Message:=0D -----------=0D docs/system: Extend PPC section=0D =0D This moves the current documentation in files specific to each=0D platform family. PowerNV machine is updated, the other machines need=0D to be done.=0D =0D Signed-off-by: C=C3=A9dric Le Goater =0D Message-Id: <20210222133956.156001-1-clg@kaod.org>=0D Reviewed-by: Greg Kurz =0D [dwg: Trivial capitalization fix]=0D Signed-off-by: David Gibson =0D =0D =0D Commit: 936fda4d771fdc51d3640bdb0cc8ceec14165730=0D https://github.com/qemu/qemu/commit/936fda4d771fdc51d3640bdb0cc8cee= c14165730=0D Author: Fabiano Rosas =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M target/ppc/int_helper.c=0D M tests/tcg/configure.sh=0D A tests/tcg/ppc64/Makefile.target=0D A tests/tcg/ppc64le/Makefile.target=0D A tests/tcg/ppc64le/bcdsub.c=0D =0D Log Message:=0D -----------=0D target/ppc: Fix bcdsub. emulation when result overflows=0D =0D The commit d03b174a83 (target/ppc: simplify bcdadd/sub functions)=0D meant to simplify some of the code but it inadvertently altered the=0D way the CR6 field is set after the operation has overflowed.=0D =0D The CR6 bits are set based on the *unbounded* result of the operation,=0D= so we need to look at the result before returning from bcd_add_mag,=0D otherwise we will look at 0 when it overflows.=0D =0D Consider the following subtraction:=0D =0D v0 =3D 0x9999999999999999999999999999999c (maximum positive BCD value)=0D= v1 =3D 0x0000000000000000000000000000001d (negative one BCD value)=0D bcdsub. v0,v0,v1,0=0D =0D The Power ISA 2.07B says:=0D If the unbounded result is greater than zero, do the following.=0D If PS=3D0, the sign code of the result is set to 0b1100.=0D If PS=3D1, the sign code of the result is set to 0b1111.=0D If the operation overflows, CR field 6 is set to 0b0101. Otherwise,=0D CR field 6 is set to 0b0100.=0D =0D POWER9 hardware:=0D vr0 =3D 0x0000000000000000000000000000000c (positive zero BCD value)=0D cr6 =3D 0b0101 (0x5) (positive, overflow)=0D =0D QEMU:=0D vr0 =3D 0x0000000000000000000000000000000c (positive zero BCD value)=0D cr6 =3D 0b0011 (0x3) (zero, overflow) <--- wrong=0D =0D This patch reverts the part of d03b174a83 that introduced the=0D problem and adds a test-case to avoid further regressions:=0D =0D before:=0D $ make run-tcg-tests-ppc64le-linux-user=0D (...)=0D TEST bcdsub on ppc64le=0D bcdsub: qemu/tests/tcg/ppc64le/bcdsub.c:58: test_bcdsub_gt:=0D Assertion `(cr >> 4) =3D=3D ((1 << 2) | (1 << 0))' failed.=0D =0D Fixes: d03b174a83 (target/ppc: simplify bcdadd/sub functions)=0D Reported-by: Paul Clarke =0D Signed-off-by: Fabiano Rosas =0D Message-Id: <20210222194035.2723056-1-farosas@linux.ibm.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: 51254ffb320183a4636635840c23ee0e3a1efffa=0D https://github.com/qemu/qemu/commit/51254ffb320183a4636635840c23ee0= e3a1efffa=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr_drc.c=0D M include/hw/ppc/spapr_drc.h=0D =0D Log Message:=0D -----------=0D spapr_drc.c: introduce unplug_timeout_timer=0D =0D The LoPAR spec provides no way for the guest kernel to report failure of=0D= hotplug/hotunplug events. This wouldn't be bad if those operations were=0D= granted to always succeed, but that's far for the reality.=0D =0D What ends up happening is that, in the case of a failed hotunplug,=0D regardless of whether it was a QEMU error or a guest misbehavior, the=0D pSeries machine is retaining the unplug state of the device in the=0D running guest. This state is cleanup in machine reset, where it is=0D assumed that this state represents a device that is pending unplug, and=0D= the device is hotunpluged from the board. Until the reset occurs, any=0D hotunplug operation of the same device is forbid because there is a=0D pending unplug state.=0D =0D This behavior has at least one undesirable side effect. A long standing=0D= pending unplug state is, more often than not, the result of a hotunplug=0D= error. The user had to dealt with it, since retrying to unplug the=0D device is noy allowed, and then in the machine reset we're removing the=0D= device from the guest. This means that we're failing the user twice -=0D failed to hotunplug when asked, then hotunplugged without notice.=0D =0D Solutions to this problem range between trying to predict when the=0D hotunplug will fail and forbid the operation from the QEMU layer, from=0D= opening up the IRQ queue to allow for multiple hotunplug attempts, from=0D= telling the users to 'reboot the machine if something goes wrong'. The=0D= first solution is flawed because we can't fully predict guest behavior=0D= from QEMU, the second solution is a trial and error remediation that=0D counts on a hope that the unplug will eventually succeed, and the third=0D= is ... well.=0D =0D This patch introduces a crude, but effective solution to hotunplug=0D errors in the pSeries machine. For each unplug done, we'll timeout after=0D= some time. If a certain amount of time passes, we'll cleanup the=0D hotunplug state from the machine. During the timeout period, any unplug=0D= operations in the same device will still be blocked. After that, we'll=0D= assume that the guest failed the operation, and allow the user to try=0D again. If the timeout is too short we'll prevent legitimate hotunplug=0D situations to occur, so we'll need to overestimate the regular time an=0D= unplug operation takes to succeed to account that.=0D =0D The true solution for the hotunplug errors in the pSeries machines is a=0D= PAPR change to allow for the guest to warn the platform about it. For=0D now, the work done in this timeout design can be used for the new PAPR=0D= 'abort hcall' in the future, given that for both cases we'll need code=0D= to cleanup the existing unplug states of the DRCs.=0D =0D At this moment we're adding the basic wiring of the timer into the DRC.=0D= Next patch will use the timer to timeout failed CPU hotunplugs.=0D =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210222194531.62717-4-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: d1c2e3ce3d5a5424651967bce1cf1f4caa0c6d91=0D https://github.com/qemu/qemu/commit/d1c2e3ce3d5a5424651967bce1cf1f4= caa0c6d91=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr.c=0D M hw/ppc/spapr_drc.c=0D M include/hw/ppc/spapr_drc.h=0D =0D Log Message:=0D -----------=0D spapr_drc.c: add hotunplug timeout for CPUs=0D =0D There is a reliable way to make a CPU hotunplug fail in the pseries=0D machine. Hotplug a CPU A, then offline all other CPUs inside the guest=0D= but A. When trying to hotunplug A the guest kernel will refuse to do it,=0D= because A is now the last online CPU of the guest. PAPR has no 'error=0D callback' in this situation to report back to the platform, so the guest=0D= kernel will deny the unplug in silent and QEMU will never know what=0D happened. The unplug pending state of A will remain until the guest is=0D= shutdown or rebooted.=0D =0D Previous attempts of fixing it (see [1] and [2]) were aimed at trying to=0D= mitigate the effects of the problem. In [1] we were trying to guess=0D which guest CPUs were online to forbid hotunplug of the last online CPU=0D= in the QEMU layer, avoiding the scenario described above because QEMU is=0D= now failing in behalf of the guest. This is not robust because the last=0D= online CPU of the guest can change while we're in the middle of the=0D unplug process, and our initial assumptions are now invalid. In [2] we=0D= were accepting that our unplug process is uncertain and the user should=0D= be allowed to spam the IRQ hotunplug queue of the guest in case the CPU=0D= hotunplug fails.=0D =0D This patch presents another alternative, using the timeout=0D infrastructure introduced in the previous patch. CPU hotunplugs in the=0D= pSeries machine will now timeout after 15 seconds. This is a long time=0D= for a single CPU unplug to occur, regardless of guest load - although=0D the user is *strongly* encouraged to *not* hotunplug devices from a=0D guest under high load - and we can be sure that something went wrong if=0D= it takes longer than that for the guest to release the CPU (the same=0D can't be said about memory hotunplug - more on that in the next patch).=0D= =0D Timing out the unplug operation will reset the unplug state of the CPU=0D= and allow the user to try it again, regardless of the error situation=0D that prevented the hotunplug to occur. Of all the not so pretty=0D fixes/mitigations for CPU hotunplug errors in pSeries, timing out the=0D operation is an admission that we have no control in the process, and=0D must assume the worst case if the operation doesn't succeed in a=0D sensible time frame.=0D =0D [1] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg03353.html=0D= [2] https://lists.gnu.org/archive/html/qemu-devel/2021-01/msg04400.html=0D= =0D Reported-by: Xujun Ma =0D Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=3D1911414=0D Reviewed-by: David Gibson =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210222194531.62717-5-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: fe1831eff8a41e96044fe98a6b0e232daa22ef83=0D https://github.com/qemu/qemu/commit/fe1831eff8a41e96044fe98a6b0e232= daa22ef83=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr.c=0D M hw/ppc/spapr_drc.c=0D M include/hw/ppc/spapr.h=0D =0D Log Message:=0D -----------=0D spapr_drc.c: use DRC reconfiguration to cleanup DIMM unplug state=0D =0D Handling errors in memory hotunplug in the pSeries machine is more=0D complex than any other device type, because there are all the=0D complications that other devices has, and more.=0D =0D For instance, determining a timeout for a DIMM hotunplug must consider=0D= if it's a Hash-MMU or a Radix-MMU guest, because Hash guests takes=0D longer to hotunplug DIMMs. The size of the DIMM is also a factor, given=0D= that longer DIMMs naturally takes longer to be hotunplugged from the=0D kernel. And there's also the guest memory usage to be considered: if=0D there's a process that is consuming memory that would be lost by the=0D DIMM unplug, the kernel will postpone the unplug process until the=0D process finishes, and then initiate the regular hotunplug process. The=0D= first two considerations are manageable, but the last one is a deal=0D breaker.=0D =0D There is no sane way for the pSeries machine to determine the memory=0D load in the guest when attempting a DIMM hotunplug - and even if there=0D= was a way, the guest can start using all the RAM in the middle of the=0D unplug process and invalidate our previous assumptions - and in result=0D= we can't even begin to calculate a timeout for the operation. This means=0D= that we can't implement a viable timeout mechanism for memory unplug in=0D= pSeries.=0D =0D Going back to why we would consider an unplug timeout, the reason is=0D that we can't know if the kernel is giving up the unplug. Turns out=0D that, sometimes, we can. Consider a failed memory hotunplug attempt=0D where the kernel will error out with the following message:=0D =0D 'pseries-hotplug-mem: Memory indexed-count-remove failed, adding any=0D removed LMBs'=0D =0D This happens when there is a LMB that the kernel gave up in removing,=0D and the LMBs previously marked for removal are now being added back.=0D This happens in the pseries kernel in [1], dlpar_memory_remove_by_ic()=0D= into dlpar_add_lmb(), and after that update_lmb_associativity_index().=0D= In this function, the kernel is configuring the LMB DRC connector again.=0D= Note that this is a valid usage in LOPAR, as stated in section=0D "ibm,configure-connector RTAS Call":=0D =0D 'A subsequent sequence of calls to ibm,configure-connector with the same=0D= entry from the =E2=80=9Cibm,drc-indexes=E2=80=9D or =E2=80=9Cibm,drc-info= =E2=80=9D property will restart=0D the configuration of devices which were not completely configured.'=0D =0D We can use this kernel behavior in our favor. If a DRC connector=0D reconfiguration for a LMB that we marked as unplug pending happens, this=0D= indicates that the kernel changed its mind about the unplug and is=0D reasserting that it will keep using all the LMBs of the DIMM. In this=0D case, it's safe to assume that the whole DIMM device unplug was=0D cancelled.=0D =0D This patch hops into rtas_ibm_configure_connector() and, in the scenario=0D= described above, clear the unplug state for the DIMM device. This will=0D= not solve all the problems we still have with memory unplug, but it will=0D= cover this case where the kernel reconfigures LMBs after a failed=0D unplug. We are a bit more resilient, without using an unreliable=0D timeout, and we didn't make the remaining error cases any worse.=0D =0D [1] arch/powerpc/platforms/pseries/hotplug-memory.c=0D =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210222194531.62717-6-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: f149c9b7f942c56f30e66be034f669b95255474e=0D https://github.com/qemu/qemu/commit/f149c9b7f942c56f30e66be034f669b= 95255474e=0D Author: Bin Meng =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/net/fsl_etsec/etsec.c=0D M hw/net/fsl_etsec/rings.c=0D =0D Log Message:=0D -----------=0D hw/net: fsl_etsec: Fix build error when HEX_DUMP is on=0D =0D "qemu-common.h" should be included to provide the forward declaration=0D of qemu_hexdump() when HEX_DUMP is on.=0D =0D Signed-off-by: Bin Meng =0D Message-Id: <20210228050431.24647-1-bmeng.cn@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: e5943b00d35efc68ca72ed304cfca98a9f3a647c=0D https://github.com/qemu/qemu/commit/e5943b00d35efc68ca72ed304cfca98= a9f3a647c=0D Author: Bin Meng =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/e500.c=0D =0D Log Message:=0D -----------=0D hw/ppc: e500: Add missing in the eTSEC node=0D =0D The eTSEC node should provide an empty property in the=0D eTSEC node, otherwise of_translate_address() in the Linux kernel=0D fails to get the eTSEC register base, reporting:=0D =0D OF: ** translation for device /platform@f00000000/ethernet@0/queue-grou= p **=0D OF: bus is default (na=3D1, ns=3D1) on /platform@f00000000/ethernet@0=0D= OF: translating address: 00000000=0D OF: parent bus is default (na=3D1, ns=3D1) on /platform@f00000000=0D OF: no ranges; cannot translate=0D =0D Per devicetree spec v0.3 [1] chapter 2.3.8:=0D =0D If the property is not present in a bus node, it is assumed that=0D no mapping exists between children of the node and the parent=0D address space.=0D =0D This is why of_translate_address() aborts the address translation.=0D Apparently U-Boot devicetree parser seems to be tolerant with=0D missing as this was not noticed when testing with U-Boot.=0D The empty property is present in all kernel shipped dtsi=0D files for eTSEC, Let's add it to conform with the spec.=0D =0D [1] https://github.com/devicetree-org/devicetree-specification/releases/d= ownload/v0.3/devicetree-specification-v0.3.pdf=0D =0D Fixes: fdfb7f2cdb2d ("e500: Add support for eTSEC in device tree")=0D Signed-off-by: Bin Meng =0D Message-Id: <1614158919-9473-1-git-send-email-bmeng.cn@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: 7420033ec460e7b9906bf05fbe1a0d3830536657=0D https://github.com/qemu/qemu/commit/7420033ec460e7b9906bf05fbe1a0d3= 830536657=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr.c=0D =0D Log Message:=0D -----------=0D spapr.c: add 'unplug already in progress' message for PHB unplug=0D =0D Both CPU hotunplug and PC_DIMM unplug reports an user warning,=0D mentioning that the hotunplug is in progress, if consecutive=0D 'device_del' are issued in quick succession.=0D =0D Do the same for PHBs in spapr_phb_unplug_request().=0D =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210226163301.419727-4-danielhb413@gmail.com>=0D Reviewed-by: Greg Kurz =0D Signed-off-by: David Gibson =0D =0D =0D Commit: e35dfbd22780aafbcd4b6da5130a00fc085fd5de=0D https://github.com/qemu/qemu/commit/e35dfbd22780aafbcd4b6da5130a00f= c085fd5de=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr_pci.c=0D =0D Log Message:=0D -----------=0D spapr_pci.c: add 'unplug already in progress' message for PCI unplug=0D= =0D Hotunplug for all other devices are warning the user when the hotunplug=0D= is already in progress. Do the same for PCI devices in=0D spapr_pci_unplug_request().=0D =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210226163301.419727-5-danielhb413@gmail.com>=0D Reviewed-by: Greg Kurz =0D Signed-off-by: David Gibson =0D =0D =0D Commit: 4515a5f786024fabf0bef4cf3d28adf5647e6e82=0D https://github.com/qemu/qemu/commit/4515a5f786024fabf0bef4cf3d28adf= 5647e6e82=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr_drc.c=0D M include/qemu/timer.h=0D M util/qemu-timer.c=0D =0D Log Message:=0D -----------=0D qemu_timer.c: add timer_deadline_ms() helper=0D =0D The pSeries machine is using QEMUTimer internals to return the timeout=0D= in seconds for a timer object, in hw/ppc/spapr.c, function=0D spapr_drc_unplug_timeout_remaining_sec().=0D =0D Create a helper in qemu-timer.c to retrieve the deadline for a QEMUTimer=0D= object, in ms, to avoid exposing timer internals to the PPC code.=0D =0D CC: Paolo Bonzini =0D Acked-by: Paolo Bonzini =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210301124133.23800-2-danielhb413@gmail.com>=0D Reviewed-by: Greg Kurz =0D Signed-off-by: David Gibson =0D =0D =0D Commit: 09db2216aa06be8bacd0101723d9c257f75c803f=0D https://github.com/qemu/qemu/commit/09db2216aa06be8bacd0101723d9c25= 7f75c803f=0D Author: Vitaly Cheptsov =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M target/ppc/translate_init.c.inc=0D =0D Log Message:=0D -----------=0D target/ppc: fix icount support on Book-e vms accessing SPRs=0D =0D Failing to guard SPR access with gen_io_start/gen_stop_exception=0D causes "Bad icount read" exceptions when running VMs with=0D e500mc and e500v2 CPUs with an icount parameter.=0D =0D Cc: David Gibson =0D Cc: Greg Kurz =0D Cc: Paolo Bonzini =0D Signed-off-by: Vitaly Cheptsov =0D Message-Id: <20210303140851.78383-1-cheptsov@ispras.ru>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: 41c8ad3d920d6f1741b34bfdfaa72b43b45209b5=0D https://github.com/qemu/qemu/commit/41c8ad3d920d6f1741b34bfdfaa72b4= 3b45209b5=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr.c=0D =0D Log Message:=0D -----------=0D spapr.c: remove duplicated assert in spapr_memory_unplug_request()=0D =0D We are asserting the existence of the first DRC LMB after sending unplug=0D= requests to all LMBs of the DIMM, where every DRC is being asserted=0D inside the loop. This means that the first DRC is being asserted twice.=0D= =0D Remove the duplicated assert.=0D =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210302141019.153729-2-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: eb7f80fd26d73e7e1af105431da58971b1dba517=0D https://github.com/qemu/qemu/commit/eb7f80fd26d73e7e1af105431da5897= 1b1dba517=0D Author: Daniel Henrique Barboza =0D Date: 2021-03-10 (Wed, 10 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr.c=0D M hw/ppc/spapr_drc.c=0D M include/hw/ppc/spapr.h=0D =0D Log Message:=0D -----------=0D spapr.c: send QAPI event when memory hotunplug fails=0D =0D Recent changes allowed the pSeries machine to rollback the hotunplug=0D process for the DIMM when the guest kernel signals, via a=0D reconfiguration of the DR connector, that it's not going to release the=0D= LMBs.=0D =0D Let's also warn QAPI listerners about it. One place to do it would be=0D right after the unplug state is cleaned up,=0D spapr_clear_pending_dimm_unplug_state(). This would mean that the=0D function is now doing more than cleaning up the pending dimm state=0D though.=0D =0D This patch does the following changes in spapr.c:=0D =0D - send a QAPI event to inform that we experienced a failure in the=0D hotunplug of the DIMM;=0D =0D - rename spapr_clear_pending_dimm_unplug_state() to=0D spapr_memory_unplug_rollback(). This is a better fit for what the=0D function is now doing, and it makes callers care more about what the=0D= function goal is and less about spapr.c internals such as clearing=0D the pending dimm unplug state.=0D =0D Reviewed-by: Greg Kurz =0D Signed-off-by: Daniel Henrique Barboza =0D Message-Id: <20210302141019.153729-3-danielhb413@gmail.com>=0D Signed-off-by: David Gibson =0D =0D =0D Commit: 1941858448e76f83eb00614c4f34ac29e9a8e792=0D https://github.com/qemu/qemu/commit/1941858448e76f83eb00614c4f34ac2= 9e9a8e792=0D Author: Peter Maydell =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D A docs/system/ppc/embedded.rst=0D A docs/system/ppc/powermac.rst=0D A docs/system/ppc/powernv.rst=0D A docs/system/ppc/prep.rst=0D A docs/system/ppc/pseries.rst=0D M docs/system/target-ppc.rst=0D M hw/display/sm501.c=0D R hw/display/sm501_template.h=0D M hw/net/fsl_etsec/etsec.c=0D M hw/net/fsl_etsec/rings.c=0D M hw/ppc/e500.c=0D M hw/ppc/spapr.c=0D M hw/ppc/spapr_drc.c=0D M hw/ppc/spapr_pci.c=0D M hw/ppc/trace-events=0D M include/hw/ppc/spapr.h=0D M include/hw/ppc/spapr_drc.h=0D M include/qemu/timer.h=0D M pc-bios/README=0D M pc-bios/slof.bin=0D M roms/SLOF=0D M target/ppc/int_helper.c=0D M target/ppc/translate_init.c.inc=0D M tests/tcg/configure.sh=0D A tests/tcg/ppc64/Makefile.target=0D A tests/tcg/ppc64le/Makefile.target=0D A tests/tcg/ppc64le/bcdsub.c=0D M util/qemu-timer.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-202103= 10' into staging=0D =0D ppc patch queue for 2021-03-10=0D =0D Next batch of patches for the ppc target and machine types. Includes:=0D= * Several cleanups for sm501 from Peter Maydell=0D * An update to the SLOF guest firmware=0D * Improved handling of hotplug failures in spapr, associated cleanups=0D= to the hotplug handling code=0D * Several etsec fixes and cleanups from Bin Meng=0D * Assorted other fixes and cleanups=0D =0D # gpg: Signature made Wed 10 Mar 2021 04:08:53 GMT=0D # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B= 392=0D # gpg: Good signature from "David Gibson " [= full]=0D # gpg: aka "David Gibson (Red Hat) " = [full]=0D # gpg: aka "David Gibson (ozlabs.org) " [full]=0D # gpg: aka "David Gibson (kernel.org) " [= unknown]=0D # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 = B392=0D =0D * remotes/dg-gitlab/tags/ppc-for-6.0-20210310:=0D spapr.c: send QAPI event when memory hotunplug fails=0D spapr.c: remove duplicated assert in spapr_memory_unplug_request()=0D target/ppc: fix icount support on Book-e vms accessing SPRs=0D qemu_timer.c: add timer_deadline_ms() helper=0D spapr_pci.c: add 'unplug already in progress' message for PCI unplug=0D= spapr.c: add 'unplug already in progress' message for PHB unplug=0D hw/ppc: e500: Add missing in the eTSEC node=0D hw/net: fsl_etsec: Fix build error when HEX_DUMP is on=0D spapr_drc.c: use DRC reconfiguration to cleanup DIMM unplug state=0D spapr_drc.c: add hotunplug timeout for CPUs=0D spapr_drc.c: introduce unplug_timeout_timer=0D target/ppc: Fix bcdsub. emulation when result overflows=0D docs/system: Extend PPC section=0D spapr: rename spapr_drc_detach() to spapr_drc_unplug_request()=0D spapr_drc.c: use spapr_drc_release() in isolate_physical/set_unusable=0D= pseries: Update SLOF firmware image=0D spapr_drc.c: do not call spapr_drc_detach() in drc_isolate_logical()=0D= hw/display/sm501: Inline template header into C file=0D hw/display/sm501: Expand out macros in template header=0D hw/display/sm501: Remove dead code for non-32-bit RGB surfaces=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/6f34661b6c97...1941858448e7= =0D From MAILER-DAEMON Fri Mar 12 09:00:18 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKiKw-0006nI-08 for mharc-qemu-commits@gnu.org; Fri, 12 Mar 2021 09:00:18 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:45832) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKiKp-0006gb-1W for qemu-commits@nongnu.org; Fri, 12 Mar 2021 09:00:14 -0500 Received: from out-22.smtp.github.com ([192.30.252.205]:51395 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKiKd-0006Tp-5R for qemu-commits@nongnu.org; Fri, 12 Mar 2021 09:00:08 -0500 Received: from github.com (hubbernetes-node-12bad67.ac4-iad.github.net [10.52.200.86]) by smtp.github.com (Postfix) with ESMTPA id 4D83E5604F1 for ; Fri, 12 Mar 2021 05:59:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615557597; bh=e7yJ0GA1WiMXrsjt1h7XSc7KRMpnhpAmfiPylyC/QuA=; h=Date:From:To:Subject:From; b=K1/gsWG21P/D/zo92HJrMriZL7uVq3nHsUjlxfKE+6G0W2IBaz/guUsKjnqp3Vh7c VFachhtmneZwhn4fXjArLSwIQ04F0BnL7qxqDYGJ72ZFDkzY/1ydbMrd2hUbNhI8BK NATknZbypUszZwd8aI2j+4wKCsENTP5nSTRqe5Vg= Date: Fri, 12 Mar 2021 05:59:57 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] e251b5: ui/gtk: Remove NULL checks in gd_switch X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Mar 2021 14:00:15 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: e251b5876383cac918b2cd03be034a5d24310b87 https://github.com/qemu/qemu/commit/e251b5876383cac918b2cd03be034a5d24310b87 Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/gtk.c Log Message: ----------- ui/gtk: Remove NULL checks in gd_switch c821a58ee7 ("ui/console: Pass placeholder surface to display") eliminated the possibility that NULL is passed as surface to dpy_gfx_switch and removed some NULL checks from gd_switch, but the removal was not thoroughly. Remaining NULL checks were confusing for Coverity and probably also for humans. This change removes those NULL checks. Reported-by: Coverity (CID 1448421) Signed-off-by: Akihiko Odaki Reviewed-by: Peter Maydell Message-Id: <20210308140713.17901-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: ae57d35cf0edc8f789d1d402f7494fbd7f3c07c5 https://github.com/qemu/qemu/commit/ae57d35cf0edc8f789d1d402f7494fbd7f3c07c5 Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/cocoa.m Log Message: ----------- ui/cocoa: Use kCGColorSpaceSRGB kCGColorSpaceGenericRGB | Apple Developer Documentation https://developer.apple.com/documentation/coregraphics/kcgcolorspacegenericrgb > Deprecated > Use kCGColorSpaceSRGB instead. This change also removes the legacy color space specification for PowerPC. Signed-off-by: Akihiko Odaki Message-Id: <20210305121304.65096-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: e26804031d772670a8901c24599cda323719e6f9 https://github.com/qemu/qemu/commit/e26804031d772670a8901c24599cda323719e6f9 Author: Thomas Huth Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M docs/system/removed-features.rst Log Message: ----------- docs: Fix removal text of -show-cursor We should say now when it was removed, not when it was deprecated. Signed-off-by: Thomas Huth Reviewed-by: Markus Armbruster Message-Id: <20210310045821.1004396-1-thuth@redhat.com> Signed-off-by: Gerd Hoffmann Commit: e31746ecf8dd2f25f687c94ac14016a3ba5debfc https://github.com/qemu/qemu/commit/e31746ecf8dd2f25f687c94ac14016a3ba5debfc Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/cocoa.m Log Message: ----------- ui/cocoa: Show QEMU icon in the about window Signed-off-by: Akihiko Odaki Message-Id: <20210309122226.23117-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: a0f973f931680ae8bd847054aca7f658abb9c18f https://github.com/qemu/qemu/commit/a0f973f931680ae8bd847054aca7f658abb9c18f Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/cocoa.m Log Message: ----------- ui/cocoa: Do not rely on the first argument The first argument of the executable was used to get its path, but it is not reliable because the executer can specify any arbitrary string. Use the interfaces provided by QEMU and the platform to get those paths. Signed-off-by: Akihiko Odaki Message-Id: <20210309122226.23117-2-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: 6d73bb643aa725348aabe6a885ac5fb0b7f70252 https://github.com/qemu/qemu/commit/6d73bb643aa725348aabe6a885ac5fb0b7f70252 Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/cocoa.m Log Message: ----------- ui/cocoa: Clear modifiers whenever possible ui/cocoa does not receive NSEventTypeFlagsChanged when it is not active, and the modifier state can be desynchronized in such a situation. [NSEvent -modifierFlags] tells whether a modifier is *not* pressed, so check it whenever receiving an event and clear the modifier if it is not pressed. Note that [NSEvent -modifierFlags] does not tell if a certain modifier *is* pressed because the documented mask for [NSEvent -modifierFlags] generalizes left shift and right shift, for example. CapsLock is the only exception. The pressed state is synchronized only with NSEventTypeFlagsChanged. This change also removes modifier keys from keycode map. If they are input with NSEventTypeKeyDown or NSEventTypeKeyUp, it leads to desynchronization. Although such a situation is not observed, they are removed just in case. Moreover, QKbdState is introduced for automatic key state tracking. Thanks to Konstantin Nazarov for testing and finding a bug in this change: https://gist.github.com/akihikodaki/87df4149e7ca87f18dc56807ec5a1bc5#gistcomment-3659419 Signed-off-by: Akihiko Odaki Message-Id: <20210310144602.58528-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: cb82340825eed168f732511926477f5f124010be https://github.com/qemu/qemu/commit/cb82340825eed168f732511926477f5f124010be Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/cocoa.m Log Message: ----------- ui/cocoa: Mark variables static Signed-off-by: Akihiko Odaki Message-Id: <20210225084202.39601-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: d1929069e355afb809a50a7f6b6affdea399cc8c https://github.com/qemu/qemu/commit/d1929069e355afb809a50a7f6b6affdea399cc8c Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/cocoa.m Log Message: ----------- ui/cocoa: Fix mouse association state ui/cocoa deassociates the mouse input and the mouse cursor position only when relative movement inputs are expected. Such inputs may let the mouse cursor leave the view and cause undesired side effects if they are associated. On the other hand, the problem does not occur when inputting absolute points, and the association allows seamless cursor movement across views. However, the synchronization of the association and the expected input type was only done when grabbing the mouse. In reality, the state whether the emulated input device expects absolute pointing inputs or relative movement inputs can vary dynamically due to USB device hot-plugging, for example. This change adds association state updates according to input type expectation changes. It also removes an internal flag representing the association state because the state can now be determined with the current input type expectation and it only adds the complexity of the state tracking. Signed-off-by: Akihiko Odaki Message-Id: <20210222150714.21766-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: 3f8d1885e48e4d72eab0688f604de62e0aea7a38 https://github.com/qemu/qemu/commit/3f8d1885e48e4d72eab0688f604de62e0aea7a38 Author: Peter Maydell Date: 2021-03-12 (Fri, 12 Mar 2021) Changed paths: M docs/system/removed-features.rst M ui/cocoa.m M ui/gtk.c Log Message: ----------- Merge remote-tracking branch 'remotes/kraxel/tags/ui-20210311-pull-request' into staging ui: mostly cocoa fixes # gpg: Signature made Thu 11 Mar 2021 12:33:51 GMT # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) " [full] # gpg: aka "Gerd Hoffmann " [full] # gpg: aka "Gerd Hoffmann (private) " [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/ui-20210311-pull-request: ui/cocoa: Fix mouse association state ui/cocoa: Mark variables static ui/cocoa: Clear modifiers whenever possible ui/cocoa: Do not rely on the first argument ui/cocoa: Show QEMU icon in the about window docs: Fix removal text of -show-cursor ui/cocoa: Use kCGColorSpaceSRGB ui/gtk: Remove NULL checks in gd_switch Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/1941858448e7...3f8d1885e48e From MAILER-DAEMON Fri Mar 12 12:47:43 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKlt1-00045n-PJ for mharc-qemu-commits@gnu.org; Fri, 12 Mar 2021 12:47:43 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:36638) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKlsw-00040f-Pz for qemu-commits@nongnu.org; Fri, 12 Mar 2021 12:47:40 -0500 Received: from out-20.smtp.github.com ([192.30.252.203]:59775) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKlss-00024U-74 for qemu-commits@nongnu.org; Fri, 12 Mar 2021 12:47:38 -0500 Received: from github.com (hubbernetes-node-c191835.va3-iad.github.net [10.48.103.46]) by smtp.github.com (Postfix) with ESMTPA id 5F898E08DA for ; Fri, 12 Mar 2021 09:47:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615571252; bh=reye3bLkln2thQLod64TxcahryM/6XsqMD0bQeVegEA=; h=Date:From:To:Subject:From; b=KNsZDymoU1M72FpjmMrWW/wqHqzlpmigyy4AeyWLpBbpSaDemWIvfIQ1lCKiCJzF9 UtyeXD/WsnhLj3NC1V64XVbw4b18mLFJd/fnLp2dpBa3mzEH4KjDB20Vktg/d8Xxx0 pB/JdYXum/YrUY0QpQzO6u4TAF+GUFt4aenfhpT8= Date: Fri, 12 Mar 2021 09:47:32 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.203; envelope-from=noreply@github.com; helo=out-20.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] e251b5: ui/gtk: Remove NULL checks in gd_switch X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Mar 2021 17:47:40 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: e251b5876383cac918b2cd03be034a5d24310b87 https://github.com/qemu/qemu/commit/e251b5876383cac918b2cd03be034a5d24310b87 Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/gtk.c Log Message: ----------- ui/gtk: Remove NULL checks in gd_switch c821a58ee7 ("ui/console: Pass placeholder surface to display") eliminated the possibility that NULL is passed as surface to dpy_gfx_switch and removed some NULL checks from gd_switch, but the removal was not thoroughly. Remaining NULL checks were confusing for Coverity and probably also for humans. This change removes those NULL checks. Reported-by: Coverity (CID 1448421) Signed-off-by: Akihiko Odaki Reviewed-by: Peter Maydell Message-Id: <20210308140713.17901-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: ae57d35cf0edc8f789d1d402f7494fbd7f3c07c5 https://github.com/qemu/qemu/commit/ae57d35cf0edc8f789d1d402f7494fbd7f3c07c5 Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/cocoa.m Log Message: ----------- ui/cocoa: Use kCGColorSpaceSRGB kCGColorSpaceGenericRGB | Apple Developer Documentation https://developer.apple.com/documentation/coregraphics/kcgcolorspacegenericrgb > Deprecated > Use kCGColorSpaceSRGB instead. This change also removes the legacy color space specification for PowerPC. Signed-off-by: Akihiko Odaki Message-Id: <20210305121304.65096-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: e26804031d772670a8901c24599cda323719e6f9 https://github.com/qemu/qemu/commit/e26804031d772670a8901c24599cda323719e6f9 Author: Thomas Huth Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M docs/system/removed-features.rst Log Message: ----------- docs: Fix removal text of -show-cursor We should say now when it was removed, not when it was deprecated. Signed-off-by: Thomas Huth Reviewed-by: Markus Armbruster Message-Id: <20210310045821.1004396-1-thuth@redhat.com> Signed-off-by: Gerd Hoffmann Commit: e31746ecf8dd2f25f687c94ac14016a3ba5debfc https://github.com/qemu/qemu/commit/e31746ecf8dd2f25f687c94ac14016a3ba5debfc Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/cocoa.m Log Message: ----------- ui/cocoa: Show QEMU icon in the about window Signed-off-by: Akihiko Odaki Message-Id: <20210309122226.23117-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: a0f973f931680ae8bd847054aca7f658abb9c18f https://github.com/qemu/qemu/commit/a0f973f931680ae8bd847054aca7f658abb9c18f Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/cocoa.m Log Message: ----------- ui/cocoa: Do not rely on the first argument The first argument of the executable was used to get its path, but it is not reliable because the executer can specify any arbitrary string. Use the interfaces provided by QEMU and the platform to get those paths. Signed-off-by: Akihiko Odaki Message-Id: <20210309122226.23117-2-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: 6d73bb643aa725348aabe6a885ac5fb0b7f70252 https://github.com/qemu/qemu/commit/6d73bb643aa725348aabe6a885ac5fb0b7f70252 Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/cocoa.m Log Message: ----------- ui/cocoa: Clear modifiers whenever possible ui/cocoa does not receive NSEventTypeFlagsChanged when it is not active, and the modifier state can be desynchronized in such a situation. [NSEvent -modifierFlags] tells whether a modifier is *not* pressed, so check it whenever receiving an event and clear the modifier if it is not pressed. Note that [NSEvent -modifierFlags] does not tell if a certain modifier *is* pressed because the documented mask for [NSEvent -modifierFlags] generalizes left shift and right shift, for example. CapsLock is the only exception. The pressed state is synchronized only with NSEventTypeFlagsChanged. This change also removes modifier keys from keycode map. If they are input with NSEventTypeKeyDown or NSEventTypeKeyUp, it leads to desynchronization. Although such a situation is not observed, they are removed just in case. Moreover, QKbdState is introduced for automatic key state tracking. Thanks to Konstantin Nazarov for testing and finding a bug in this change: https://gist.github.com/akihikodaki/87df4149e7ca87f18dc56807ec5a1bc5#gistcomment-3659419 Signed-off-by: Akihiko Odaki Message-Id: <20210310144602.58528-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: cb82340825eed168f732511926477f5f124010be https://github.com/qemu/qemu/commit/cb82340825eed168f732511926477f5f124010be Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/cocoa.m Log Message: ----------- ui/cocoa: Mark variables static Signed-off-by: Akihiko Odaki Message-Id: <20210225084202.39601-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: d1929069e355afb809a50a7f6b6affdea399cc8c https://github.com/qemu/qemu/commit/d1929069e355afb809a50a7f6b6affdea399cc8c Author: Akihiko Odaki Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M ui/cocoa.m Log Message: ----------- ui/cocoa: Fix mouse association state ui/cocoa deassociates the mouse input and the mouse cursor position only when relative movement inputs are expected. Such inputs may let the mouse cursor leave the view and cause undesired side effects if they are associated. On the other hand, the problem does not occur when inputting absolute points, and the association allows seamless cursor movement across views. However, the synchronization of the association and the expected input type was only done when grabbing the mouse. In reality, the state whether the emulated input device expects absolute pointing inputs or relative movement inputs can vary dynamically due to USB device hot-plugging, for example. This change adds association state updates according to input type expectation changes. It also removes an internal flag representing the association state because the state can now be determined with the current input type expectation and it only adds the complexity of the state tracking. Signed-off-by: Akihiko Odaki Message-Id: <20210222150714.21766-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: 3f8d1885e48e4d72eab0688f604de62e0aea7a38 https://github.com/qemu/qemu/commit/3f8d1885e48e4d72eab0688f604de62e0aea7a38 Author: Peter Maydell Date: 2021-03-12 (Fri, 12 Mar 2021) Changed paths: M docs/system/removed-features.rst M ui/cocoa.m M ui/gtk.c Log Message: ----------- Merge remote-tracking branch 'remotes/kraxel/tags/ui-20210311-pull-request' into staging ui: mostly cocoa fixes # gpg: Signature made Thu 11 Mar 2021 12:33:51 GMT # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) " [full] # gpg: aka "Gerd Hoffmann " [full] # gpg: aka "Gerd Hoffmann (private) " [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/ui-20210311-pull-request: ui/cocoa: Fix mouse association state ui/cocoa: Mark variables static ui/cocoa: Clear modifiers whenever possible ui/cocoa: Do not rely on the first argument ui/cocoa: Show QEMU icon in the about window docs: Fix removal text of -show-cursor ui/cocoa: Use kCGColorSpaceSRGB ui/gtk: Remove NULL checks in gd_switch Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/1941858448e7...3f8d1885e48e From MAILER-DAEMON Fri Mar 12 12:53:12 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKlyK-000268-1I for mharc-qemu-commits@gnu.org; Fri, 12 Mar 2021 12:53:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:38648) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKlyI-000207-MK for qemu-commits@nongnu.org; Fri, 12 Mar 2021 12:53:10 -0500 Received: from out-25.smtp.github.com ([192.30.252.208]:48459 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKlyD-0004r3-RJ for qemu-commits@nongnu.org; Fri, 12 Mar 2021 12:53:09 -0500 Received: from github.com (hubbernetes-node-6eae930.ash1-iad.github.net [10.56.24.21]) by smtp.github.com (Postfix) with ESMTPA id 254388408CE for ; Fri, 12 Mar 2021 09:53:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615571585; bh=dGh0VTb8vKaY66lNx2xkOsUlpGR+X36R7EwoMgFW1CM=; h=Date:From:To:Subject:From; b=UdsdNg+vL0l10H2JcZDYMDyhtynLqhRSIM/LLOSeL0EskPZQU62kv32LOQ8G3xFlP ocv7IMw2p7mPXryoxX37YoFHeZVTvsq6IYZT24b8ThfRonrU2vdDpHWxgpur0jIPxK gUlMSo8761fxRco4D4O9CmB8qQ2/XnqZW6KUc1BI= Date: Fri, 12 Mar 2021 09:53:05 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] d20577: block: remove format defaults from QemuOpts in bdr... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Mar 2021 17:53:11 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: d205774578a60d1976baae6c36c0c382be367427=0D https://github.com/qemu/qemu/commit/d205774578a60d1976baae6c36c0c38= 2be367427=0D Author: Stefano Garzarella =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M block.c=0D =0D Log Message:=0D -----------=0D block: remove format defaults from QemuOpts in bdrv_create_file()=0D =0D QemuOpts is usually created merging the QemuOptsList of format=0D and protocol. So, when the format calls bdr_create_file(), the 'opts'=0D parameter contains a QemuOptsList with a combination of format and=0D protocol default values.=0D =0D The format properly removes its options before calling=0D bdr_create_file(), but the default values remain in 'opts->list'.=0D So if the protocol has options with the same name (e.g. rbd has=0D 'cluster_size' as qcow2), it will see the default values of the format,=0D= since for overlapping options, the format wins.=0D =0D To avoid this issue, lets convert QemuOpts to QDict, in this way we take=0D= only the set options, and then convert it back to QemuOpts, using the=0D 'create_opts' of the protocol. So the new QemuOpts, will contain only the= =0D protocol defaults.=0D =0D Suggested-by: Kevin Wolf =0D Signed-off-by: Stefano Garzarella =0D Message-Id: <20210308161232.248833-1-sgarzare@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: f2826956a054c319bb05c2423cfc98ee7aeeb2ea=0D https://github.com/qemu/qemu/commit/f2826956a054c319bb05c2423cfc98e= e7aeeb2ea=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D A tests/qemu-iotests/tests/qsd-jobs=0D A tests/qemu-iotests/tests/qsd-jobs.out=0D =0D Log Message:=0D -----------=0D storage-daemon: Call job_cancel_sync_all() on shutdown=0D =0D bdrv_close_all() asserts that no jobs are running any more, so we need=0D= to cancel all jobs first to avoid failing the assertion.=0D =0D Fixes: b55a3c8860b763b62b2cc2f4a6f55379977bbde5=0D Reported-by: Nini Gu =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210309121814.31078-1-kwolf@redhat.com>=0D Reviewed-by: Eric Blake =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: a59f8bd8050a3d7b4e892850c2712f3786c3bc1a=0D https://github.com/qemu/qemu/commit/a59f8bd8050a3d7b4e892850c2712f3= 786c3bc1a=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M block/stream.c=0D M tests/qemu-iotests/tests/qsd-jobs=0D M tests/qemu-iotests/tests/qsd-jobs.out=0D =0D Log Message:=0D -----------=0D stream: Don't crash when node permission is denied=0D =0D The image streaming block job restricts shared permissions of the nodes=0D= it accesses. This can obviously fail when other users already got these=0D= permissions. &error_abort is therefore wrong and can crash. Handle these=0D= errors gracefully and just fail starting the block job.=0D =0D Reported-by: Nini Gu =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210309173451.45152-1-kwolf@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: Alberto Garcia =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 0d1834df042bcbe535ede4c31c630439e2d31eda=0D https://github.com/qemu/qemu/commit/0d1834df042bcbe535ede4c31c63043= 9e2d31eda=0D Author: Max Reitz =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M block/curl.c=0D =0D Log Message:=0D -----------=0D curl: Store BDRVCURLState pointer in CURLSocket=0D =0D A socket does not really belong to any specific state. We do not need=0D= to store a pointer to "its" state in it, a pointer to the common=0D BDRVCURLState is sufficient.=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210309130541.37540-2-mreitz@redhat.com>=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 69f24658c2f900ea5e002a1057ff3ffbf35d4bc3=0D https://github.com/qemu/qemu/commit/69f24658c2f900ea5e002a1057ff3ff= bf35d4bc3=0D Author: Max Reitz =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M block/curl.c=0D =0D Log Message:=0D -----------=0D curl: Disconnect sockets from CURLState=0D =0D When a curl transfer is finished, that does not mean that CURL lets go=0D= of all the sockets it used for it. We therefore must not free a=0D CURLSocket object before CURL has invoked curl_sock_cb() to tell us to=0D= remove it. Otherwise, we may get a use-after-free, as described in this=0D= bug report: https://bugs.launchpad.net/qemu/+bug/1916501=0D =0D (Reproducer from that report:=0D $ qemu-img convert -f qcow2 -O raw \=0D https://download.cirros-cloud.net/0.4.0/cirros-0.4.0-x86_64-disk.img \=0D= out.img=0D )=0D =0D (Alternatively, it might seem logical to force-drop all sockets that=0D have been used for a state when the respective transfer is done, kind of=0D= like it is done now, but including unsetting the AIO handlers.=0D Unfortunately, doing so makes the driver just hang instead of crashing,=0D= which seems to evidence that CURL still uses those sockets.)=0D =0D Make the CURLSocket object independent of "its" CURLState by putting all=0D= sockets into a hash table belonging to the BDRVCURLState instead of a=0D list that belongs to a CURLState. Do not touch any sockets in=0D curl_clean_state().=0D =0D Testing, it seems like all sockets are indeed gone by the time the curl=0D= BDS is closed, so it seems like there really was no point in freeing any=0D= socket just because a transfer is done. libcurl does invoke=0D curl_sock_cb() with CURL_POLL_REMOVE for every socket it has.=0D =0D Buglink: https://bugs.launchpad.net/qemu/+bug/1916501=0D Signed-off-by: Max Reitz =0D Message-Id: <20210309130541.37540-3-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 41b8409da54b4f747c7db663046aa0233fad1fd1=0D https://github.com/qemu/qemu/commit/41b8409da54b4f747c7db663046aa02= 33fad1fd1=0D Author: Stefan Hajnoczi =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: disable VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD for now=0D =0D The vhost-user in-flight shmfd feature has not been tested with=0D qemu-storage-daemon's vhost-user-blk server. Disable this optional=0D feature for now because it requires MFD_ALLOW_SEALING, which is not=0D available in some CI environments.=0D =0D If we need this feature in the future it can be re-enabled after=0D testing.=0D =0D Reported-by: Peter Maydell =0D Cc: Kevin Wolf =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210309094106.196911-2-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: ca7d7c7da07f7c7926654509f464a4bb42e336ce=0D https://github.com/qemu/qemu/commit/ca7d7c7da07f7c7926654509f464a4b= b42e336ce=0D Author: Coiby Xu =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M tests/qtest/libqos/meson.build=0D A tests/qtest/libqos/vhost-user-blk.c=0D A tests/qtest/libqos/vhost-user-blk.h=0D M tests/qtest/meson.build=0D A tests/qtest/vhost-user-blk-test.c=0D =0D Log Message:=0D -----------=0D test: new qTest case to test the vhost-user-blk-server=0D =0D This test case has the same tests as tests/virtio-blk-test.c except for=0D= tests have block_resize. Since the vhost-user-blk export only serves one=0D= client one time, two exports are started by qemu-storage-daemon for the=0D= hotplug test.=0D =0D Suggested-by: Thomas Huth =0D Signed-off-by: Coiby Xu =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210309094106.196911-3-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 00be6e990c1c3aa10e5816e4a69deedcdfde48f3=0D https://github.com/qemu/qemu/commit/00be6e990c1c3aa10e5816e4a69deed= cdfde48f3=0D Author: Stefan Hajnoczi =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/vhost-user-blk-test.c=0D =0D Log Message:=0D -----------=0D tests/qtest: add multi-queue test case to vhost-user-blk-test=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210309094106.196911-4-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: f74dbc292963d47b055d9352d55f86f74b90ed94=0D https://github.com/qemu/qemu/commit/f74dbc292963d47b055d9352d55f86f= 74b90ed94=0D Author: Stefan Hajnoczi =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/vhost-user-blk-test.c=0D =0D Log Message:=0D -----------=0D vhost-user-blk-test: test discard/write zeroes invalid inputs=0D =0D Exercise input validation code paths in=0D block/export/vhost-user-blk-server.c.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210309094106.196911-5-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 3bb9d26e7b63cd8b2a9ba01c38591bf553df0cad=0D https://github.com/qemu/qemu/commit/3bb9d26e7b63cd8b2a9ba01c38591bf= 553df0cad=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/qmp-cmd-test.c=0D M tests/qtest/test-netfilter.c=0D =0D Log Message:=0D -----------=0D tests: Drop 'props' from object-add calls=0D =0D The 'props' option has been deprecated in 5.0 in favour of a flattened=0D= object-add command. Time to change our test cases to drop the deprecated=0D= option.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 0883333c2f06d592be3be9726a87975b516dce32=0D https://github.com/qemu/qemu/commit/0883333c2f06d592be3be9726a87975= b516dce32=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M qapi/qom.json=0D M qom/qom-qmp-cmds.c=0D =0D Log Message:=0D -----------=0D qapi/qom: Drop deprecated 'props' from object-add=0D =0D The option has been deprecated in QEMU 5.0, remove it.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 6150fe932f9282c38af08b42795ead66c2f95a91=0D https://github.com/qemu/qemu/commit/6150fe932f9282c38af08b42795ead6= 6c2f95a91=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for iothread=0D =0D Add an ObjectOptions union that will eventually describe the options of=0D= all user creatable object types. As unions can't exist without any=0D branches, also add the first object type.=0D =0D This adds a QAPI schema for the properties of the iothread object.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 90f2aacec651345f2a831d5b326fa48ede2a8d33=0D https://github.com/qemu/qemu/commit/90f2aacec651345f2a831d5b326fa48= ede2a8d33=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/authz.json=0D M qapi/qom.json=0D M storage-daemon/qapi/qapi-schema.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for authz-*=0D =0D This adds a QAPI schema for the properties of the authz-* objects.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: d77345907dff46ed924b1e102f9f63cb8551547f=0D https://github.com/qemu/qemu/commit/d77345907dff46ed924b1e102f9f63c= b8551547f=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for cryptodev-*=0D =0D This adds a QAPI schema for the properties of the cryptodev-* objects.=0D= =0D These interfaces have some questionable aspects (cryptodev-backend is=0D really an abstract base class without function, and the queues option=0D only makes sense for cryptodev-vhost-user), but as the goal is to=0D represent the existing interface in QAPI, leave these things in place.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 971c9eb5e2c5b0a22d495a88f7e7bd9308f6404a=0D https://github.com/qemu/qemu/commit/971c9eb5e2c5b0a22d495a88f7e7bd9= 308f6404a=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for dbus-vmstate=0D =0D This adds a QAPI schema for the properties of the dbus-vmstate object.=0D= =0D A list represented as a comma separated string is clearly not very=0D QAPI-like, but for now just describe the existing interface.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 5a61b89e26fb141b61011fd42fd5dd5a51475310=0D https://github.com/qemu/qemu/commit/5a61b89e26fb141b61011fd42fd5dd5= a51475310=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/common.json=0D M qapi/machine.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for memory-backend-*=0D =0D This adds a QAPI schema for the properties of the memory-backend-*=0D objects.=0D =0D HostMemPolicy has to be moved to an include file that can be used by the=0D= storage daemon, too, because ObjectOptions must be the same in all=0D binaries if we don't want to compile the whole code multiple times.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: febb7f5603ce9af1bdff69acc9e85bcb1e8c6ee6=0D https://github.com/qemu/qemu/commit/febb7f5603ce9af1bdff69acc9e85bc= b1e8c6ee6=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for rng-*, deprecate 'opened'=0D =0D This adds a QAPI schema for the properties of the rng-* objects.=0D =0D The 'opened' property doesn't seem to make sense as an external=0D interface: It is automatically set to true in ucc->complete, and=0D explicitly setting it to true earlier just means that trying to set=0D additional options will result in an error. After the property has once=0D= been set to true (i.e. when the object construction has completed), it=0D= can never be reset to false. In other words, the 'opened' property is=0D useless. Mark it as deprecated in the schema from the start.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 808e8567c2b4415d14688fdfe4c3d0eacd4e842f=0D https://github.com/qemu/qemu/commit/808e8567c2b4415d14688fdfe4c3d0e= acd4e842f=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/block-core.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for throttle-group=0D =0D This adds a QAPI schema for the properties of the throttle-group object.=0D= =0D The only purpose of the x-* properties is to make the nested options in=0D= 'limits' available for a command line parser that doesn't support=0D structs. Any parser that will use the QAPI schema will supports structs,=0D= though, so they will not be needed in the schema in the future.=0D =0D To keep the conversion straightforward, add them to the schema anyway.=0D= We can then remove the options and adjust documentation, test cases etc.=0D= in a separate patch.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 87ff4986cba2e37cccfadee43693e56ea4aaf8b4=0D https://github.com/qemu/qemu/commit/87ff4986cba2e37cccfadee43693e56= ea4aaf8b4=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qapi/crypto.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for secret*, deprecate 'loaded'=0D =0D This adds a QAPI schema for the properties of the secret* objects.=0D =0D The 'loaded' property doesn't seem to make sense as an external=0D interface: It is automatically set to true in ucc->complete, and=0D explicitly setting it to true earlier just means that additional options=0D= will be silently ignored.=0D =0D In other words, the 'loaded' property is useless. Mark it as deprecated=0D= in the schema from the start.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 2e231e24679d33524386a17cf56010ee0582ab97=0D https://github.com/qemu/qemu/commit/2e231e24679d33524386a17cf56010e= e0582ab97=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/crypto.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for tls-*, deprecate 'loaded'=0D =0D This adds a QAPI schema for the properties of the tls-* objects.=0D =0D The 'loaded' property doesn't seem to make sense as an external=0D interface: It is automatically set to true in ucc->complete, and=0D explicitly setting it to true earlier just means that additional options=0D= will be silently ignored.=0D =0D In other words, the 'loaded' property is useless. Mark it as deprecated=0D= in the schema from the start.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 90ad62c3039a9c8ac8f2edfa5e56df6b71d27480=0D https://github.com/qemu/qemu/commit/90ad62c3039a9c8ac8f2edfa5e56df6= b71d27480=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for can-*=0D =0D This adds a QAPI schema for the properties of the can-* objects.=0D =0D can-bus doesn't have any properties, so it only needs to be added to the=0D= ObjectType enum without adding a new branch to ObjectOptions.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 042063095cf15ad3d93cc957c03e210fce9f080b=0D https://github.com/qemu/qemu/commit/042063095cf15ad3d93cc957c03e210= fce9f080b=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for colo-compare=0D =0D This adds a QAPI schema for the properties of the colo-compare object.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 501ccd06286fd86811e764017911729116edd34d=0D https://github.com/qemu/qemu/commit/501ccd06286fd86811e764017911729= 116edd34d=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/common.json=0D M qapi/net.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for filter-*=0D =0D This adds a QAPI schema for the properties of the filter-* objects.=0D =0D Some parts of the interface (in particular NetfilterProperties.position)=0D= are very unusual for QAPI, but for now just describe the existing=0D interface.=0D =0D net.json can't be included in qom.json because the storage daemon=0D doesn't have it. NetFilterDirection is still required in the new object=0D= property definitions in qom.json, so move this enum to common.json.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 144aefe691815bdd875a57683dd7007b1fa64a1b=0D https://github.com/qemu/qemu/commit/144aefe691815bdd875a57683dd7007= b1fa64a1b=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for pr-manager-helper=0D =0D This adds a QAPI schema for the properties of the pr-manager-helper=0D object.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: ebce1b8a4c6ef2d8b6c36a402dbe2112b5878cf5=0D https://github.com/qemu/qemu/commit/ebce1b8a4c6ef2d8b6c36a402dbe211= 2b5878cf5=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for confidential-guest-support=0D =0D This adds a QAPI schema for the properties of the objects implementing=0D= the confidential-guest-support interface.=0D =0D pef-guest and s390x-pv-guest don't have any properties, so they only=0D need to be added to the ObjectType enum without adding a new branch to=0D= ObjectOptions.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 2372daa37e619693afc61755f5e4ac95fc11c259=0D https://github.com/qemu/qemu/commit/2372daa37e619693afc61755f5e4ac9= 5fc11c259=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/common.json=0D M qapi/qom.json=0D M qapi/ui.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for input-*=0D =0D This adds a QAPI schema for the properties of the input-* objects.=0D =0D ui.json cannot be included in qom.json because the storage daemon can't=0D= use it, so move GrabToggleKeys to common.json.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 94a48b0ca93ce12787400367494a44ee92c5e26a=0D https://github.com/qemu/qemu/commit/94a48b0ca93ce12787400367494a44e= e92c5e26a=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for x-remote-object=0D =0D This adds a QAPI schema for the properties of the x-remote-object=0D object.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: c7c57bb9089f3a64626d639f1398de2bdbcfa7fc=0D https://github.com/qemu/qemu/commit/c7c57bb9089f3a64626d639f1398de2= bdbcfa7fc=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/block/xen-block.c=0D M include/qom/object_interfaces.h=0D M monitor/misc.c=0D M qapi/qom.json=0D M qom/qom-qmp-cmds.c=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qapi/qom: QAPIfy object-add=0D =0D This converts object-add from 'gen': false to the ObjectOptions QAPI=0D type. As an immediate benefit, clients can now use QAPI schema=0D introspection for user creatable QOM objects.=0D =0D It is also the first step towards making the QAPI schema the only=0D external interface for the creation of user creatable objects. Once all=0D= other places (HMP and command lines of the system emulator and all=0D tools) go through QAPI, too, some object implementations can be=0D simplified because some checks (e.g. that mandatory options are set) are=0D= already performed by QAPI, and in another step, QOM boilerplate code=0D could be generated from the schema.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 0b2cd5d3d93042e988f8da66f27842e71795bd03=0D https://github.com/qemu/qemu/commit/0b2cd5d3d93042e988f8da66f27842e= 71795bd03=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Make "object" QemuOptsList optional=0D =0D This code is going away anyway, but for a few more commits, we'll be in=0D= a state where some binaries still use QemuOpts and others don't. If the=0D= "object" QemuOptsList doesn't even exist, we don't have to remove (or=0D fail to remove, and therefore abort) a user creatable object from it.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 8a4d699864d52ad40e01e8711ebf7b4f0a2b8c12=0D https://github.com/qemu/qemu/commit/8a4d699864d52ad40e01e8711ebf7b4= f0a2b8c12=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qemu-storage-daemon: Implement --object with qmp_object_add()=0D =0D This QAPIfies --object and ensures that QMP and the command line option=0D= behave the same.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 10dbce4ac0c345d0a19fee9fa121ed8717ad9820=0D https://github.com/qemu/qemu/commit/10dbce4ac0c345d0a19fee9fa121ed8= 717ad9820=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Remove user_creatable_add_dict()=0D =0D This function is now unused and can be removed.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: bd6e5711b5ce4ac00f82c51e4deee32d02cdd354=0D https://github.com/qemu/qemu/commit/bd6e5711b5ce4ac00f82c51e4deee32= d02cdd354=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D M qom/qom-qmp-cmds.c=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qom: Factor out user_creatable_process_cmdline()=0D =0D The implementation for --object can be shared between=0D qemu-storage-daemon and other binaries, so move it into a function in=0D qom/object_interfaces.c that is accessible from everywhere.=0D =0D This also requires moving the implementation of qmp_object_add() into a=0D= new user_creatable_add_qapi(), because qom/qom-qmp-cmds.c is not linked=0D= for tools.=0D =0D user_creatable_print_help_from_qdict() can become static now.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: fcdb542980c6974a9237619faad8c2e740406df5=0D https://github.com/qemu/qemu/commit/fcdb542980c6974a9237619faad8c2e= 740406df5=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qemu-io.c=0D =0D Log Message:=0D -----------=0D qemu-io: Use user_creatable_process_cmdline() for --object=0D =0D This switches qemu-io from a QemuOpts-based parser for --object to=0D user_creatable_process_cmdline() which uses a keyval parser and enforces=0D= the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties accessible.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 7417ffe0cb2268ef27f8a3f2b8b0b0f1c47873a3=0D https://github.com/qemu/qemu/commit/7417ffe0cb2268ef27f8a3f2b8b0b0f= 1c47873a3=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M qemu-nbd.c=0D =0D Log Message:=0D -----------=0D qemu-nbd: Use user_creatable_process_cmdline() for --object=0D =0D This switches qemu-nbd from a QemuOpts-based parser for --object to=0D user_creatable_process_cmdline() which uses a keyval parser and enforces=0D= the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties accessible.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: ff2e53a85ca00d6ab8b746a2e88bbbd42b3aa947=0D https://github.com/qemu/qemu/commit/ff2e53a85ca00d6ab8b746a2e88bbbd= 42b3aa947=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Add user_creatable_add_from_str()=0D =0D This is a version of user_creatable_process_cmdline() with an Error=0D parameter that never calls exit() and is therefore usable in HMP.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 37c35c1ae546a1a6d820f0fb568db15d3210c6cb=0D https://github.com/qemu/qemu/commit/37c35c1ae546a1a6d820f0fb568db15= d3210c6cb=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-img.rst=0D M qemu-img.c=0D =0D Log Message:=0D -----------=0D qemu-img: Use user_creatable_process_cmdline() for --object=0D =0D This switches qemu-img from a QemuOpts-based parser for --object to=0D user_creatable_process_cmdline() which uses a keyval parser and enforces=0D= the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties accessible.=0D= =0D As a side effect, fix wrong exit codes in the object parsing error path=0D= of 'qemu-img compare'. This was broken in commit 334c43e2c3 because=0D &error_fatal exits with an exit code of 1, while it should have been 2.=0D= =0D Document that exit code 0 is also returned when just requested help was=0D= printed instead of comparing images. This is preexisting behaviour that=0D= isn't changed by this patch, though another instance of it is added with=0D= '--object help'.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 27d90650879d6f49608d4b7508f74f617ce0c339=0D https://github.com/qemu/qemu/commit/27d90650879d6f49608d4b7508f74f6= 17ce0c339=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hmp-commands.hx=0D M monitor/hmp-cmds.c=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D hmp: QAPIfy object_add=0D =0D This switches the HMP command object_add from a QemuOpts-based parser to=0D= user_creatable_add_from_str() which uses a keyval parser and enforces=0D the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties and help=0D accessible. In order for help to be printed to the monitor instead of=0D stdout, the printf() calls in the help functions are changed to=0D qemu_printf().=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D Reviewed-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 9d954d429ac113f99feedc7abea285b744a86154=0D https://github.com/qemu/qemu/commit/9d954d429ac113f99feedc7abea285b= 744a86154=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Add user_creatable_parse_str()=0D =0D The system emulator has a more complicated way of handling command line=0D= options in that it reorders options before it processes them. This means=0D= that parsing object options and creating the object happen at two=0D different points. Split the parsing part into a separate function that=0D= can be reused by the system emulator command line.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: a7231fd8a6833574d6bc906fb7448dbd902cccff=0D https://github.com/qemu/qemu/commit/a7231fd8a6833574d6bc906fb7448db= d902cccff=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D =0D Log Message:=0D -----------=0D char: Skip CLI aliases in query-chardev-backends=0D =0D The aliases "tty" and "parport" are only valid on the command line, QMP=0D= commands like chardev-add don't know them. query-chardev-backends should=0D= describe QMP and therefore not include them in the list of available=0D backends.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210311164253.338723-2-kwolf@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 3bca40f2115d0eed118d9a8a163eb664bc7e6f31=0D https://github.com/qemu/qemu/commit/3bca40f2115d0eed118d9a8a163eb66= 4bc7e6f31=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D M docs/system/deprecated.rst=0D =0D Log Message:=0D -----------=0D char: Deprecate backend aliases 'tty' and 'parport'=0D =0D QAPI doesn't know the aliases 'tty' and 'parport' and there is no=0D reason to prefer them to the real names of the backends 'serial' and=0D 'parallel'.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210311164253.338723-3-kwolf@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 03aed242d8c0e19bd7500709d9ccf59010c7e5a8=0D https://github.com/qemu/qemu/commit/03aed242d8c0e19bd7500709d9ccf59= 010c7e5a8=0D Author: Kevin Wolf =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D =0D Log Message:=0D -----------=0D char: Simplify chardev_name_foreach()=0D =0D Both callers use callbacks that don't do anything when they are called=0D= for CLI aliases. Instead of passing the cli_alias parameter, just don't=0D= call the callbacks for aliases in the first place.=0D =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210311164253.338723-4-kwolf@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 09b5d1ceadef41b69b41d2887f0b7780d01991db=0D https://github.com/qemu/qemu/commit/09b5d1ceadef41b69b41d2887f0b778= 0d01991db=0D Author: Peter Maydell =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M block.c=0D M block/curl.c=0D M block/export/vhost-user-blk-server.c=0D M block/stream.c=0D M chardev/char.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M docs/tools/qemu-img.rst=0D M hmp-commands.hx=0D M hw/block/xen-block.c=0D M include/qom/object_interfaces.h=0D M monitor/hmp-cmds.c=0D M monitor/misc.c=0D M qapi/authz.json=0D M qapi/block-core.json=0D M qapi/common.json=0D M qapi/crypto.json=0D M qapi/machine.json=0D M qapi/net.json=0D M qapi/qom.json=0D M qapi/ui.json=0D M qemu-img.c=0D M qemu-io.c=0D M qemu-nbd.c=0D M qom/object_interfaces.c=0D M qom/qom-qmp-cmds.c=0D M storage-daemon/qapi/qapi-schema.json=0D M storage-daemon/qemu-storage-daemon.c=0D A tests/qemu-iotests/tests/qsd-jobs=0D A tests/qemu-iotests/tests/qsd-jobs.out=0D M tests/qtest/libqos/meson.build=0D A tests/qtest/libqos/vhost-user-blk.c=0D A tests/qtest/libqos/vhost-user-blk.h=0D M tests/qtest/meson.build=0D M tests/qtest/qmp-cmd-test.c=0D M tests/qtest/test-netfilter.c=0D A tests/qtest/vhost-user-blk-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into sta= ging=0D =0D Block layer patches and object-add QAPIfication=0D =0D - QAPIfy object-add and --object for tools=0D - Add vhost-user-blk-test=0D - stream: Fail gracefully if permission is denied=0D - storage-daemon: Fix crash on quit when job is still running=0D - curl: Fix use after free=0D - Fix image creation option defaults that exist in both the format and=0D= the protocol layer (e.g. 'cluster_size' in qcow2 and rbd; the qcow2=0D default was incorrectly applied to the rbd layer)=0D =0D # gpg: Signature made Fri 12 Mar 2021 11:27:59 GMT=0D # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2= FD6=0D # gpg: issuer "kwolf@redhat.com"=0D # gpg: Good signature from "Kevin Wolf " [full]=0D # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F = 2FD6=0D =0D * remotes/kevin/tags/for-upstream: (41 commits)=0D char: Simplify chardev_name_foreach()=0D char: Deprecate backend aliases 'tty' and 'parport'=0D char: Skip CLI aliases in query-chardev-backends=0D qom: Add user_creatable_parse_str()=0D hmp: QAPIfy object_add=0D qemu-img: Use user_creatable_process_cmdline() for --object=0D qom: Add user_creatable_add_from_str()=0D qemu-nbd: Use user_creatable_process_cmdline() for --object=0D qemu-io: Use user_creatable_process_cmdline() for --object=0D qom: Factor out user_creatable_process_cmdline()=0D qom: Remove user_creatable_add_dict()=0D qemu-storage-daemon: Implement --object with qmp_object_add()=0D qom: Make "object" QemuOptsList optional=0D qapi/qom: QAPIfy object-add=0D qapi/qom: Add ObjectOptions for x-remote-object=0D qapi/qom: Add ObjectOptions for input-*=0D qapi/qom: Add ObjectOptions for confidential-guest-support=0D qapi/qom: Add ObjectOptions for pr-manager-helper=0D qapi/qom: Add ObjectOptions for filter-*=0D qapi/qom: Add ObjectOptions for colo-compare=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/3f8d1885e48e...09b5d1ceadef= =0D From MAILER-DAEMON Fri Mar 12 13:57:37 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lKmyf-0008BV-26 for mharc-qemu-commits@gnu.org; Fri, 12 Mar 2021 13:57:37 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:54196) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKmyd-00087I-3g for qemu-commits@nongnu.org; Fri, 12 Mar 2021 13:57:35 -0500 Received: from out-25.smtp.github.com ([192.30.252.208]:36695 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKmya-00052t-4N for qemu-commits@nongnu.org; Fri, 12 Mar 2021 13:57:34 -0500 Received: from github.com (hubbernetes-node-91e08cf.ash1-iad.github.net [10.56.102.67]) by smtp.github.com (Postfix) with ESMTPA id 4F2E38404F9 for ; Fri, 12 Mar 2021 10:57:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615575451; bh=NMV1mhSuhgmCfH7I3Nlh/nKzCohw0cGwjc4dLOemiww=; h=Date:From:To:Subject:From; b=wmHicitpNpeAxSEZo2BZ79TINyMqghZiami3pVJ5QOjlxAAUjocPMjpb0ZJN8Z3/G gQFmLNSegoxreNOyJV6XGdkiqdHvLQMdjS8XG0VWhW5Lnx6a+4/mNdYXtTrUJNfZtu EtApLRG5XWAOLEjArAKnGxHKaCyYrCvN3mMfpCbs= Date: Fri, 12 Mar 2021 10:57:31 -0800 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 6abcec: target/m68k: implement rtr instruction X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Mar 2021 18:57:35 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 6abcec36741e589c855084e59195fc3454bf4be6 https://github.com/qemu/qemu/commit/6abcec36741e589c855084e59195fc3454bf4be6 Author: Laurent Vivier Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M target/m68k/translate.c Log Message: ----------- target/m68k: implement rtr instruction This is needed to boot MacOS ROM. Pull the condition code and the program counter from the stack. Operation: (SP) -> CCR SP + 2 -> SP (SP) -> PC SP + 4 -> SP This operation is not privileged. Reported-by: Mark Cave-Ayland Tested-by: Mark Cave-Ayland Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Message-Id: <20210307212552.523552-1-laurent@vivier.eu> Commit: d6cbd8f7a19e6f0fd22a598aad992c4913f481f2 https://github.com/qemu/qemu/commit/d6cbd8f7a19e6f0fd22a598aad992c4913f481f2 Author: Mark Cave-Ayland Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M target/m68k/op_helper.c Log Message: ----------- target/m68k: don't set SSW ATC bit for physical bus errors If a NuBus slot doesn't contain a card, the Quadra hardware generates a physical bus error if the CPU attempts to access the slot address space. Both Linux and MacOS use a separate bus error handler during NuBus accesses in order to detect and recover when addressing empty slots. According to the MC68040 users manual the ATC bit of the SSW is used to distinguish between ATC faults and physical bus errors. MacOS specifically checks the stack frame generated by a NuBus error and panics if the SSW ATC bit is set. Update m68k_cpu_transaction_failed() so that the SSW ATC bit is not set if the memory API returns MEMTX_DECODE_ERROR which will be used to indicate that an access to an empty NuBus slot occurred. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20210308121155.2476-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: 469949c90252d80693aa70652d8251d1d602557e https://github.com/qemu/qemu/commit/469949c90252d80693aa70652d8251d1d602557e Author: Mark Cave-Ayland Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M target/m68k/cpu.h Log Message: ----------- target/m68k: reformat m68k_features enum Move the feature comment from after the feature name to the preceding line to allow for longer feature names and descriptions without hitting the 80 character line limit. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: Richard Henderson Message-Id: <20210308121155.2476-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: a9431a03f70c8c711a870d4c1a0439bdbb4703cf https://github.com/qemu/qemu/commit/a9431a03f70c8c711a870d4c1a0439bdbb4703cf Author: Mark Cave-Ayland Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M target/m68k/cpu.c M target/m68k/cpu.h M target/m68k/op_helper.c Log Message: ----------- target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature According to the M68040UM Appendix D the requirement for data accesses to be word aligned is only for the 68000, 68008 and 68010 CPUs. Later CPUs from the 68020 onwards will allow unaligned data accesses but at the cost of being less efficient. Add a new M68K_FEATURE_UNALIGNED_DATA feature to specify that data accesses are not required to be word aligned, and don't perform the alignment on the stack pointer when taking an exception if this feature is not selected. This is required because the MacOS DAFB driver attempts to call an A-trap with a byte-aligned stack pointer during initialisation and without this the stack pointer is off by one when the A-trap returns. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: Richard Henderson Message-Id: <20210308121155.2476-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: 8e6bc6cdc82d45f203bc9fc4342c0452214c74fe https://github.com/qemu/qemu/commit/8e6bc6cdc82d45f203bc9fc4342c0452214c74fe Author: Peter Maydell Date: 2021-03-12 (Fri, 12 Mar 2021) Changed paths: M target/m68k/cpu.c M target/m68k/cpu.h M target/m68k/op_helper.c M target/m68k/translate.c Log Message: ----------- Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.0-pull-request' into staging Prepare MacOS ROM support: - add RTR instruction - fix unaligned access requirement - fix ATC bit (68040 MMU) # gpg: Signature made Thu 11 Mar 2021 22:18:11 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier " [full] # gpg: aka "Laurent Vivier " [full] # gpg: aka "Laurent Vivier (Red Hat) " [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-for-6.0-pull-request: target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature target/m68k: reformat m68k_features enum target/m68k: don't set SSW ATC bit for physical bus errors target/m68k: implement rtr instruction Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/09b5d1ceadef...8e6bc6cdc82d From MAILER-DAEMON Sun Mar 14 07:32:31 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLOz1-0003SH-4t for mharc-qemu-commits@gnu.org; Sun, 14 Mar 2021 07:32:31 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49650) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLOyy-0003Qj-En for qemu-commits@nongnu.org; Sun, 14 Mar 2021 07:32:28 -0400 Received: from out-21.smtp.github.com ([192.30.252.204]:36687 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLOyv-0001oa-Hc for qemu-commits@nongnu.org; Sun, 14 Mar 2021 07:32:27 -0400 Received: from github.com (hubbernetes-node-0281f2c.ac4-iad.github.net [10.52.206.37]) by smtp.github.com (Postfix) with ESMTPA id 3F43C520326 for ; Sun, 14 Mar 2021 04:32:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615721544; bh=VaXYpMISKVj2UgRK+MEmln8P/kkP2MggvQiN/Ir/g5U=; h=Date:From:To:Subject:From; b=NijPV26mWpHD40zORWW+/UBmQC76KuilwogJWFvBtOebFXtymykCBgi/Tl9SiINu6 XFECw+/G9FFl4eb71BXByFNcIvHnsqHVafmhra1LVE4T9V1zWE3sDwXjW8txAC/yNj JA2p2W/ZI8jyjA6LAECZH1jeX5lY/qThphfAnYA0= Date: Sun, 14 Mar 2021 04:32:24 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 6abcec: target/m68k: implement rtr instruction X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Mar 2021 11:32:28 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 6abcec36741e589c855084e59195fc3454bf4be6 https://github.com/qemu/qemu/commit/6abcec36741e589c855084e59195fc3454bf4be6 Author: Laurent Vivier Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M target/m68k/translate.c Log Message: ----------- target/m68k: implement rtr instruction This is needed to boot MacOS ROM. Pull the condition code and the program counter from the stack. Operation: (SP) -> CCR SP + 2 -> SP (SP) -> PC SP + 4 -> SP This operation is not privileged. Reported-by: Mark Cave-Ayland Tested-by: Mark Cave-Ayland Signed-off-by: Laurent Vivier Reviewed-by: Richard Henderson Message-Id: <20210307212552.523552-1-laurent@vivier.eu> Commit: d6cbd8f7a19e6f0fd22a598aad992c4913f481f2 https://github.com/qemu/qemu/commit/d6cbd8f7a19e6f0fd22a598aad992c4913f481f2 Author: Mark Cave-Ayland Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M target/m68k/op_helper.c Log Message: ----------- target/m68k: don't set SSW ATC bit for physical bus errors If a NuBus slot doesn't contain a card, the Quadra hardware generates a physical bus error if the CPU attempts to access the slot address space. Both Linux and MacOS use a separate bus error handler during NuBus accesses in order to detect and recover when addressing empty slots. According to the MC68040 users manual the ATC bit of the SSW is used to distinguish between ATC faults and physical bus errors. MacOS specifically checks the stack frame generated by a NuBus error and panics if the SSW ATC bit is set. Update m68k_cpu_transaction_failed() so that the SSW ATC bit is not set if the memory API returns MEMTX_DECODE_ERROR which will be used to indicate that an access to an empty NuBus slot occurred. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20210308121155.2476-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: 469949c90252d80693aa70652d8251d1d602557e https://github.com/qemu/qemu/commit/469949c90252d80693aa70652d8251d1d602557e Author: Mark Cave-Ayland Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M target/m68k/cpu.h Log Message: ----------- target/m68k: reformat m68k_features enum Move the feature comment from after the feature name to the preceding line to allow for longer feature names and descriptions without hitting the 80 character line limit. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: Richard Henderson Message-Id: <20210308121155.2476-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: a9431a03f70c8c711a870d4c1a0439bdbb4703cf https://github.com/qemu/qemu/commit/a9431a03f70c8c711a870d4c1a0439bdbb4703cf Author: Mark Cave-Ayland Date: 2021-03-11 (Thu, 11 Mar 2021) Changed paths: M target/m68k/cpu.c M target/m68k/cpu.h M target/m68k/op_helper.c Log Message: ----------- target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature According to the M68040UM Appendix D the requirement for data accesses to be word aligned is only for the 68000, 68008 and 68010 CPUs. Later CPUs from the 68020 onwards will allow unaligned data accesses but at the cost of being less efficient. Add a new M68K_FEATURE_UNALIGNED_DATA feature to specify that data accesses are not required to be word aligned, and don't perform the alignment on the stack pointer when taking an exception if this feature is not selected. This is required because the MacOS DAFB driver attempts to call an A-trap with a byte-aligned stack pointer during initialisation and without this the stack pointer is off by one when the A-trap returns. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: Richard Henderson Message-Id: <20210308121155.2476-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: 8e6bc6cdc82d45f203bc9fc4342c0452214c74fe https://github.com/qemu/qemu/commit/8e6bc6cdc82d45f203bc9fc4342c0452214c74fe Author: Peter Maydell Date: 2021-03-12 (Fri, 12 Mar 2021) Changed paths: M target/m68k/cpu.c M target/m68k/cpu.h M target/m68k/op_helper.c M target/m68k/translate.c Log Message: ----------- Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.0-pull-request' into staging Prepare MacOS ROM support: - add RTR instruction - fix unaligned access requirement - fix ATC bit (68040 MMU) # gpg: Signature made Thu 11 Mar 2021 22:18:11 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier " [full] # gpg: aka "Laurent Vivier " [full] # gpg: aka "Laurent Vivier (Red Hat) " [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-for-6.0-pull-request: target/m68k: add M68K_FEATURE_UNALIGNED_DATA feature target/m68k: reformat m68k_features enum target/m68k: don't set SSW ATC bit for physical bus errors target/m68k: implement rtr instruction Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/3f8d1885e48e...8e6bc6cdc82d From MAILER-DAEMON Sun Mar 14 07:39:08 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLP5Q-0004vP-2C for mharc-qemu-commits@gnu.org; Sun, 14 Mar 2021 07:39:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50266) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLP5D-0004tp-7B for qemu-commits@nongnu.org; Sun, 14 Mar 2021 07:38:57 -0400 Received: from out-26.smtp.github.com ([192.30.252.209]:34489 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLP55-0005ZS-Pw for qemu-commits@nongnu.org; Sun, 14 Mar 2021 07:38:54 -0400 Received: from github.com (hubbernetes-node-cc314b0.ash1-iad.github.net [10.56.25.68]) by smtp.github.com (Postfix) with ESMTPA id 170D05E002A for ; Sun, 14 Mar 2021 04:38:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615721925; bh=vt0NY23ZLmCiaWzomn7q8NvSGQIkr6yQG4JHwtOdNjw=; h=Date:From:To:Subject:From; b=GiFhALDVQfOCH2CMK0FxaKmrFqnV7VMIqDjF/Zbv/a+vzdULT4S0LSeW1P8uR3+YJ V+c51znJvnJbdB6nqCfTk1gk9XENaVRo28x2aUfuA6Zzy6IzLFtYnCetZdSRpdncYS bmRLVF/Yj83FTw2W+mYT8F04ohHF/QUFqTtdBfYM= Date: Sun, 14 Mar 2021 04:38:45 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -63 X-Spam_score: -6.4 X-Spam_bar: ------ X-Spam_report: (-6.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HEXHASH_WORD=1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 9f6176: hw/misc: versal: Add a model of the XRAM controller X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Mar 2021 11:39:00 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 9f61763574fb19525a68c46f3b8f763e5936a6fe=0D https://github.com/qemu/qemu/commit/9f61763574fb19525a68c46f3b8f763= e5936a6fe=0D Author: Edgar E. Iglesias =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/meson.build=0D A hw/misc/xlnx-versal-xramc.c=0D A include/hw/misc/xlnx-versal-xramc.h=0D =0D Log Message:=0D -----------=0D hw/misc: versal: Add a model of the XRAM controller=0D =0D Add a model of the Xilinx Versal Accelerator RAM (XRAM).=0D This is mainly a stub to make firmware happy. The size of=0D the RAMs can be probed. The interrupt mask logic is=0D modelled but none of the interrups will ever be raised=0D unless injected.=0D =0D Signed-off-by: Edgar E. Iglesias =0D Message-id: 20210308224637.2949533-2-edgar.iglesias@gmail.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: a55b441b2ca578417ab3a7a62129cd801e22abf4=0D https://github.com/qemu/qemu/commit/a55b441b2ca578417ab3a7a62129cd8= 01e22abf4=0D Author: Edgar E. Iglesias =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/xlnx-versal-virt.rst=0D M hw/arm/xlnx-versal.c=0D M include/hw/arm/xlnx-versal.h=0D =0D Log Message:=0D -----------=0D hw/arm: versal: Add support for the XRAMs=0D =0D Connect the support for the Versal Accelerator RAMs (XRAMs).=0D =0D Reviewed-by: Luc Michel =0D Acked-by: Alistair Francis =0D Signed-off-by: Edgar E. Iglesias =0D Message-id: 20210308224637.2949533-3-edgar.iglesias@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 41ce9a912641cd7f820bcfccea15e30efc32104e=0D https://github.com/qemu/qemu/commit/41ce9a912641cd7f820bcfccea15e30= efc32104e=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/i386/intel_iommu.c=0D =0D Log Message:=0D -----------=0D intel_iommu: Fix mask may be uninitialized in vtd_context_device_invali= date=0D =0D With -Werror=3Dmaybe-uninitialized configuration we get=0D ../hw/i386/intel_iommu.c: In function =E2=80=98vtd_context_device_invalid= ate=E2=80=99:=0D ../hw/i386/intel_iommu.c:1888:10: error: =E2=80=98mask=E2=80=99 may be us= ed=0D uninitialized in this function [-Werror=3Dmaybe-uninitialized]=0D 1888 | mask =3D ~mask;=0D | ~~~~~^~~~~~~=0D =0D Add a g_assert_not_reached() to avoid the error.=0D =0D Signed-off-by: Eric Auger =0D Reviewed-by: Peter Xu =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210309102742.30442-2-eric.auger@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: f14fb6c2db961c3665a61b342ab329b7bd20d1e7=0D https://github.com/qemu/qemu/commit/f14fb6c2db961c3665a61b342ab329b= 7bd20d1e7=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/i386/intel_iommu.c=0D M include/sysemu/dma.h=0D M softmmu/dma-helpers.c=0D =0D Log Message:=0D -----------=0D dma: Introduce dma_aligned_pow2_mask()=0D =0D Currently get_naturally_aligned_size() is used by the intel iommu=0D to compute the maximum invalidation range based on @size which is=0D a power of 2 while being aligned with the @start address and less=0D than the maximum range defined by @gaw.=0D =0D This helper is also useful for other iommu devices (virtio-iommu,=0D SMMUv3) to make sure IOMMU UNMAP notifiers only are called with=0D power of 2 range sizes.=0D =0D Let's move this latter into dma-helpers.c and rename it into=0D dma_aligned_pow2_mask(). Also rewrite the helper so that it=0D accomodates UINT64_MAX values for the size mask and max mask.=0D It now returns a mask instead of a size. Change the caller.=0D =0D Signed-off-by: Eric Auger =0D Reviewed-by: Peter Xu =0D Message-id: 20210309102742.30442-3-eric.auger@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: dde3f08b5cab24e570fc0ccbbbab86b6b50aad23=0D https://github.com/qemu/qemu/commit/dde3f08b5cab24e570fc0ccbbbab86b= 6b50aad23=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/virtio/virtio-iommu.c=0D =0D Log Message:=0D -----------=0D virtio-iommu: Handle non power of 2 range invalidations=0D =0D Unmap notifiers work with an address mask assuming an=0D invalidation range of a power of 2. Nothing mandates this=0D in the VIRTIO-IOMMU spec.=0D =0D So in case the range is not a power of 2, split it into=0D several invalidations.=0D =0D Signed-off-by: Eric Auger =0D Reviewed-by: Peter Xu =0D Message-id: 20210309102742.30442-4-eric.auger@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: a4b6e1be2c8fd60381feb00f06cf3b6373bbbf07=0D https://github.com/qemu/qemu/commit/a4b6e1be2c8fd60381feb00f06cf3b6= 373bbbf07=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/smmu-common.c=0D =0D Log Message:=0D -----------=0D hw/arm/smmu-common: Fix smmu_iotlb_inv_iova when asid is not set=0D =0D If the asid is not set, do not attempt to locate the key directly=0D as all inserted keys have a valid asid.=0D =0D Use g_hash_table_foreach_remove instead.=0D =0D Signed-off-by: Eric Auger =0D Message-id: 20210309102742.30442-5-eric.auger@redhat.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 6d9cd115b9dfee08faef0f64c3b90ac5c79ededc=0D https://github.com/qemu/qemu/commit/6d9cd115b9dfee08faef0f64c3b90ac= 5c79ededc=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/smmu-common.c=0D M hw/arm/smmuv3.c=0D =0D Log Message:=0D -----------=0D hw/arm/smmuv3: Enforce invalidation on a power of two range=0D =0D As of today, the driver can invalidate a number of pages that is=0D not a power of 2. However IOTLB unmap notifications and internal=0D IOTLB invalidations work with masks leading to erroneous=0D invalidations.=0D =0D In case the range is not a power of 2, split invalidations into=0D power of 2 invalidations.=0D =0D When looking for a single page entry in the vSMMU internal IOTLB,=0D let's make sure that if the entry is not found using a=0D g_hash_table_remove() we iterate over all the entries to find a=0D potential range that overlaps it.=0D =0D Signed-off-by: Eric Auger =0D Message-id: 20210309102742.30442-6-eric.auger@redhat.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 1194140b7fab588b4b9de9aeacbe9672f06c1d8f=0D https://github.com/qemu/qemu/commit/1194140b7fab588b4b9de9aeacbe967= 2f06c1d8f=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/smmu-internal.h=0D M hw/arm/smmuv3.c=0D =0D Log Message:=0D -----------=0D hw/arm/smmuv3: Fix SMMU_CMD_CFGI_STE_RANGE handling=0D =0D If the whole SID range (32b) is invalidated (SMMU_CMD_CFGI_ALL),=0D @end overflows and we fail to handle the command properly.=0D =0D Once this gets fixed, the current code really is awkward in the=0D sense it loops over the whole range instead of removing the=0D currently cached configs through a hash table lookup.=0D =0D Fix both the overflow and the lookup.=0D =0D Signed-off-by: Eric Auger =0D Reviewed-by: Peter Maydell =0D Message-id: 20210309102742.30442-7-eric.auger@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: fe2f5cbcfc96f1db3e1a277233f52e2fd993a9e1=0D https://github.com/qemu/qemu/commit/fe2f5cbcfc96f1db3e1a277233f52e2= fd993a9e1=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/trace-events=0D =0D Log Message:=0D -----------=0D hw/arm/smmuv3: Uniformize sid traces=0D =0D Convert all sid printouts to sid=3D0x%x.=0D =0D Signed-off-by: Eric Auger =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210309102742.30442-8-eric.auger@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 226e6c046c0fce8da32575aad020ca56a5a8064d=0D https://github.com/qemu/qemu/commit/226e6c046c0fce8da32575aad020ca5= 6a5a8064d=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D =0D Log Message:=0D -----------=0D target/arm: Fix sve_uzp_p vs odd vector lengths=0D =0D Missed out on compressing the second half of a predicate=0D with length vl % 512 > 256.=0D =0D Adjust all of the x + (y << s) to x | (y << s) as a=0D general style fix. Drop the extract64 because the input=0D uint64_t are known to be already zero-extended from the=0D current size of the predicate.=0D =0D Reported-by: Laurent Desnogues =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-2-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 8e7fefed1bdcc0f7e722ccf2a2fc2b4f79fe725e=0D https://github.com/qemu/qemu/commit/8e7fefed1bdcc0f7e722ccf2a2fc2b4= f79fe725e=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D =0D Log Message:=0D -----------=0D target/arm: Fix sve_zip_p vs odd vector lengths=0D =0D Wrote too much with low-half zip (zip1) with vl % 512 !=3D 0.=0D =0D Adjust all of the x + (y << s) to x | (y << s) as a style fix.=0D =0D We only ever have exact overlap between D, M, and N. Therefore=0D we only need a single temporary, and we do not need to check for=0D partial overlap.=0D =0D Reported-by: Laurent Desnogues =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-3-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: fd911a21414b5a17663fa2b97f1059fb11cee99d=0D https://github.com/qemu/qemu/commit/fd911a21414b5a17663fa2b97f1059f= b11cee99d=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D =0D Log Message:=0D -----------=0D target/arm: Fix sve_punpk_p vs odd vector lengths=0D =0D Wrote too much with punpk1 with vl % 512 !=3D 0.=0D =0D Reviewed-by: Peter Maydell =0D Reported-by: Laurent Desnogues =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-4-richard.henderson@linaro.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 2acbfbe4313daf43b6653ee5d82bcaeaa155e895=0D https://github.com/qemu/qemu/commit/2acbfbe4313daf43b6653ee5d82bcae= aa155e895=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D M target/arm/translate-sve.c=0D =0D Log Message:=0D -----------=0D target/arm: Update find_last_active for PREDDESC=0D =0D Since b64ee454a4a0, all predicate operations should be=0D using these field macros for predicates.=0D =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-5-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 04c774a25da78eb07d505ee5923167c2010b9f8c=0D https://github.com/qemu/qemu/commit/04c774a25da78eb07d505ee5923167c= 2010b9f8c=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D M target/arm/translate-sve.c=0D =0D Log Message:=0D -----------=0D target/arm: Update BRKA, BRKB, BRKN for PREDDESC=0D =0D Since b64ee454a4a0, all predicate operations should be=0D using these field macros for predicates.=0D =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-6-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: f556a201b5bbeb59841b37247969fcfc1ab7bd5d=0D https://github.com/qemu/qemu/commit/f556a201b5bbeb59841b37247969fcf= c1ab7bd5d=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D M target/arm/translate-sve.c=0D =0D Log Message:=0D -----------=0D target/arm: Update CNTP for PREDDESC=0D =0D Since b64ee454a4a0, all predicate operations should be=0D using these field macros for predicates.=0D =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-7-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: e610906c56f98c76888d45beb7f579935dd61a70=0D https://github.com/qemu/qemu/commit/e610906c56f98c76888d45beb7f5799= 35dd61a70=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D M target/arm/translate-sve.c=0D =0D Log Message:=0D -----------=0D target/arm: Update WHILE for PREDDESC=0D =0D Since b64ee454a4a0, all predicate operations should be=0D using these field macros for predicates.=0D =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-8-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: c648c9b7e1ccff94b51ecbebe86a206952c47e75=0D https://github.com/qemu/qemu/commit/c648c9b7e1ccff94b51ecbebe86a206= 952c47e75=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D M target/arm/translate-sve.c=0D =0D Log Message:=0D -----------=0D target/arm: Update sve reduction vs simd_desc=0D =0D With the reduction operations, we intentionally increase maxsz to=0D the next power of 2, so as to fill out the reduction tree correctly.=0D Since e2e7168a214b, oprsz must equal maxsz, with exceptions for small=0D vectors, so this triggers an assertion for vector sizes > 32 that are=0D not themselves a power of 2.=0D =0D Pass the power-of-two value in the simd_data field instead.=0D =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-9-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: b6f03acc8fe205a11e7040830f63113b7282538d=0D https://github.com/qemu/qemu/commit/b6f03acc8fe205a11e7040830f63113= b7282538d=0D Author: Niek Linnenbank =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/net/allwinner-sun8i-emac.c=0D =0D Log Message:=0D -----------=0D hw/net/allwinner-sun8i-emac: traverse transmit queue using TX_CUR_DESC = register value=0D =0D Currently the emulated EMAC for sun8i always traverses the transmit queue= =0D from the head when transferring packets. It searches for a list of consec= utive=0D descriptors whichs are flagged as ready for processing and transmits thei= r payloads=0D accordingly. The controller stops processing once it finds a descriptor t= hat is not=0D marked ready.=0D =0D While the above behaviour works in most situations, it is not the same as= the actual=0D EMAC in hardware. Actual hardware uses the TX_CUR_DESC register value to = keep track=0D of the last position in the transmit queue and continues processing from = that position=0D when software triggers the start of DMA processing. The currently emulate= d behaviour can=0D lead to packet loss on transmit when software fills the transmit queue wi= th ready=0D descriptors that overlap the tail of the circular list.=0D =0D This commit modifies the emulated EMAC for sun8i such that it processes=0D= the transmit queue using the TX_CUR_DESC register in the same way as hard= ware.=0D =0D Signed-off-by: Niek Linnenbank =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210310195820.21950-2-nieklinnenbank@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: a30e114f3c41871753856e19abf6a7e0715e81c1=0D https://github.com/qemu/qemu/commit/a30e114f3c41871753856e19abf6a7e= 0715e81c1=0D Author: Niek Linnenbank =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/boot_linux_console.py=0D =0D Log Message:=0D -----------=0D tests/acceptance/boot_linux_console: remove Armbian 19.11.3 bionic test= for orangepi-pc machine=0D =0D The image for Armbian 19.11.3 bionic has been removed from the armbian se= rver.=0D Without the image as input the test arm_orangepi_bionic_19_11 cannot run.= =0D =0D This commit removes the test completely and merges the code of the generi= c function=0D do_test_arm_orangepi_uboot_armbian back with the 20.08 test.=0D =0D Signed-off-by: Niek Linnenbank =0D Reviewed-by: Willian Rampazzo =0D Message-id: 20210310195820.21950-3-nieklinnenbank@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 875ee4179bea17bdb92798a060a9f2faef0dc7a2=0D https://github.com/qemu/qemu/commit/875ee4179bea17bdb92798a060a9f2f= aef0dc7a2=0D Author: Niek Linnenbank =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/boot_linux_console.py=0D =0D Log Message:=0D -----------=0D tests/acceptance/boot_linux_console: change URL for test_arm_orangepi_b= ionic_20_08=0D =0D Update the download URL of the Armbian 20.08 Bionic image for=0D test_arm_orangepi_bionic_20_08 of the orangepi-pc machine.=0D =0D The archive.armbian.com URL contains more images and should keep stable=0D= for a longer period of time than dl.armbian.com.=0D =0D Signed-off-by: Niek Linnenbank =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Willian Rampazzo =0D Message-id: 20210310195820.21950-4-nieklinnenbank@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: e384db41d8661ff570c2e31a4aa09b2f028b3987=0D https://github.com/qemu/qemu/commit/e384db41d8661ff570c2e31a4aa09b2= f028b3987=0D Author: Niek Linnenbank =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/boot_linux_console.py=0D M tests/acceptance/replay_kernel.py=0D =0D Log Message:=0D -----------=0D tests/acceptance: update sunxi kernel from armbian to 5.10.16=0D =0D The linux kernel 4.20.7 binary for sunxi has been removed from apt.armbia= n.com:=0D =0D $ ARMBIAN_ARTIFACTS_CACHED=3Dyes AVOCADO_ALLOW_LARGE_STORAGE=3Dyes avoc= ado --show=3Dapp,console run -t machine:orangepi-pc tests/acceptance/boot= _linux_console.py=0D Fetching asset from tests/acceptance/boot_linux_console.py:BootLinuxCon= sole.test_arm_orangepi=0D ...=0D (1/6) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_= orangepi:=0D CANCEL: Missing asset https://apt.armbian.com/pool/main/l/linux-4.20.= 7-sunxi/linux-image-dev-sunxi_5.75_armhf.deb (0.55 s)=0D =0D This commit updates the sunxi kernel to 5.10.16 for the acceptance=0D tests of the orangepi-pc and cubieboard machines.=0D =0D Signed-off-by: Niek Linnenbank =0D Reviewed-by: Willian Rampazzo =0D Message-id: 20210310195820.21950-5-nieklinnenbank@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: f4223d2e75a991c80393ac3c684b90c875d6efd9=0D https://github.com/qemu/qemu/commit/f4223d2e75a991c80393ac3c684b90c= 875d6efd9=0D Author: Niek Linnenbank =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/boot_linux_console.py=0D M tests/acceptance/replay_kernel.py=0D =0D Log Message:=0D -----------=0D tests/acceptance: drop ARMBIAN_ARTIFACTS_CACHED condition for orangepi-= pc, cubieboard tests=0D =0D Previously the ARMBIAN_ARTIFACTS_CACHED pre-condition was added to allow = running=0D tests that have already existing armbian.com artifacts stored in the loca= l avocado cache,=0D but do not have working URLs to download a fresh copy.=0D =0D At this time of writing the URLs for artifacts on the armbian.com server = are updated and working.=0D Any future broken URLs will result in a skipped acceptance test, for exam= ple:=0D =0D (1/5) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_o= rangepi:=0D CANCEL: Missing asset https://apt.armbian.com/pool/main/l/linux-4.20.7-= sunxi/linux-image-dev-sunxi_5.75_armhf.deb (0.53 s)=0D =0D This commits removes the ARMBIAN_ARTIFACTS_CACHED pre-condition such that= =0D the acceptance tests for the orangepi-pc and cubieboard machines can run.= =0D =0D Signed-off-by: Niek Linnenbank =0D Reviewed-by: Willian Rampazzo =0D Message-id: 20210310195820.21950-6-nieklinnenbank@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: fc49b77fd391fdcfc9c0b61a8c301ac0d15232e9=0D https://github.com/qemu/qemu/commit/fc49b77fd391fdcfc9c0b61a8c301ac= 0d15232e9=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/sse-timer.c=0D =0D Log Message:=0D -----------=0D hw/timer/sse-timer: Propagate eventual error in sse_timer_realize()=0D =0D If the SSECounter link is absent, we set an error message=0D in sse_timer_realize() but forgot to propagate this error.=0D Add the missing 'return'.=0D =0D Fixes: CID 1450755 (Null pointer dereferences)=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210312001845.1562670-1-f4bug@amsat.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 516fc0a081161eab5b3a89c7f243954945ee390e=0D https://github.com/qemu/qemu/commit/516fc0a081161eab5b3a89c7f243954= 945ee390e=0D Author: Andrew Jones =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M accel/kvm/kvm-all.c=0D M include/hw/boards.h=0D =0D Log Message:=0D -----------=0D accel: kvm: Fix kvm_type invocation=0D =0D Prior to commit f2ce39b4f067 a MachineClass kvm_type method=0D only needed to be registered to ensure it would be executed.=0D With commit f2ce39b4f067 a kvm-type machine property must also=0D be specified. hw/arm/virt relies on the kvm_type method to pass=0D its selected IPA limit to KVM, but this is not exposed as a=0D machine property. Restore the previous functionality of invoking=0D kvm_type when it's present.=0D =0D Fixes: f2ce39b4f067 ("vl: make qemu_get_machine_opts static")=0D Signed-off-by: Andrew Jones =0D Reviewed-by: Eric Auger =0D Message-id: 20210310135218.255205-2-drjones@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: bcb902a1ed1ad5e0ceebb9536f392bf6d46219f9=0D https://github.com/qemu/qemu/commit/bcb902a1ed1ad5e0ceebb9536f392bf= 6d46219f9=0D Author: Andrew Jones =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/virt.c=0D M target/arm/kvm.c=0D M target/arm/kvm_arm.h=0D =0D Log Message:=0D -----------=0D hw/arm/virt: KVM: The IPA lower bound is 32=0D =0D The virt machine already checks KVM_CAP_ARM_VM_IPA_SIZE to get the=0D upper bound of the IPA size. If that bound is lower than the highest=0D possible GPA for the machine, then QEMU will error out. However, the=0D IPA is set to 40 when the highest GPA is less than or equal to 40,=0D even when KVM may support an IPA limit as low as 32. This means KVM=0D may fail the VM creation unnecessarily. Additionally, 40 is selected=0D with the value 0, which means use the default, and that gets around=0D a check in some versions of KVM, causing a difficult to debug fail.=0D Always use the IPA size that corresponds to the highest possible GPA,=0D unless it's lower than 32, in which case use 32. Also, we must still=0D use 0 when KVM only supports the legacy fixed 40 bit IPA.=0D =0D Suggested-by: Marc Zyngier =0D Signed-off-by: Andrew Jones =0D Reviewed-by: Eric Auger =0D Reviewed-by: Marc Zyngier =0D Message-id: 20210310135218.255205-3-drjones@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 71b50b9d1ca2f5e8ae65678294ceacbd7b6520c8=0D https://github.com/qemu/qemu/commit/71b50b9d1ca2f5e8ae65678294ceacb= d7b6520c8=0D Author: Hao Wu =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/npcm7xx_pwm.c=0D M include/hw/misc/npcm7xx_pwm.h=0D =0D Log Message:=0D -----------=0D hw/misc: Add GPIOs for duty in NPCM7xx PWM=0D =0D This patch adds GPIOs in NPCM7xx PWM module for its duty values.=0D The purpose of this is to connect it to the MFT module to provide=0D an input for measuring a PWM fan's RPM. Each PWM module has=0D NPCM7XX_PWM_PER_MODULE of GPIOs, each one corresponds to=0D one PWM instance and can connect to multiple fan instances in MFT.=0D =0D Reviewed-by: Doug Evans =0D Reviewed-by: Tyrone Ting =0D Signed-off-by: Hao Wu =0D Reviewed-by: Peter Maydell =0D Message-id: 20210311180855.149764-2-wuhaotsh@google.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 380a37e49891f8d9462124f593516a9ced58343a=0D https://github.com/qemu/qemu/commit/380a37e49891f8d9462124f593516a9= ced58343a=0D Author: Hao Wu =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/meson.build=0D A hw/misc/npcm7xx_mft.c=0D M hw/misc/trace-events=0D A include/hw/misc/npcm7xx_mft.h=0D =0D Log Message:=0D -----------=0D hw/misc: Add NPCM7XX MFT Module=0D =0D This patch implements Multi Function Timer (MFT) module for NPCM7XX.=0D This module is mainly used to configure PWM fans. It has just enough=0D functionality to make the PWM fan kernel module work.=0D =0D The module takes two input, the max_rpm of a fan (modifiable via QMP)=0D and duty cycle (a GPIO from the PWM module.) The actual measured RPM=0D is equal to max_rpm * duty_cycle / NPCM7XX_PWM_MAX_DUTY. The RPM is=0D measured as a counter compared to a prescaled input clock. The kernel=0D driver reads this counter and report to user space.=0D =0D Refs:=0D https://github.com/torvalds/linux/blob/master/drivers/hwmon/npcm750-pwm-f= an.c=0D =0D Reviewed-by: Doug Evans =0D Reviewed-by: Tyrone Ting =0D Signed-off-by: Hao Wu =0D Message-id: 20210311180855.149764-3-wuhaotsh@google.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: fc11115f74b4355b38eeebc118e347cd74f35845=0D https://github.com/qemu/qemu/commit/fc11115f74b4355b38eeebc118e347c= d74f35845=0D Author: Hao Wu =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/nuvoton.rst=0D M hw/arm/npcm7xx.c=0D M include/hw/arm/npcm7xx.h=0D =0D Log Message:=0D -----------=0D hw/arm: Add MFT device to NPCM7xx Soc=0D =0D This patch adds the recently implemented MFT device to the NPCM7XX=0D SoC file.=0D =0D Reviewed-by: Doug Evans =0D Reviewed-by: Tyrone Ting =0D Signed-off-by: Hao Wu =0D Message-id: 20210311180855.149764-4-wuhaotsh@google.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: a9d3d7b17e5a3c246ecf4e420d2d4bb089a8d7c3=0D https://github.com/qemu/qemu/commit/a9d3d7b17e5a3c246ecf4e420d2d4bb= 089a8d7c3=0D Author: Hao Wu =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/npcm7xx_boards.c=0D M include/hw/arm/npcm7xx.h=0D =0D Log Message:=0D -----------=0D hw/arm: Connect PWM fans in NPCM7XX boards=0D =0D This patch adds fan_splitters (split IRQs) in NPCM7XX boards. Each fan=0D= splitter corresponds to 1 PWM output and can connect to multiple fan=0D inputs (MFT devices).=0D In NPCM7XX boards(NPCM750 EVB and Quanta GSJ boards), we initializes=0D these splitters and connect them to their corresponding modules=0D according their specific device trees.=0D =0D Reviewed-by: Doug Evans =0D Reviewed-by: Tyrone Ting =0D Signed-off-by: Hao Wu =0D Reviewed-by: Peter Maydell =0D Message-id: 20210311180855.149764-5-wuhaotsh@google.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: f68c886b525959c86166f20a2ef4797c321399e7=0D https://github.com/qemu/qemu/commit/f68c886b525959c86166f20a2ef4797= c321399e7=0D Author: Hao Wu =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/npcm7xx_pwm-test.c=0D =0D Log Message:=0D -----------=0D tests/qtest: Test PWM fan RPM using MFT in PWM test=0D =0D This patch adds testing of PWM fan RPMs in the existing npcm7xx pwm=0D test. It tests whether the MFT module can measure correct fan values=0D for a PWM fan in NPCM7XX boards.=0D =0D Reviewed-by: Doug Evans =0D Reviewed-by: Tyrone Ting =0D Signed-off-by: Hao Wu =0D Reviewed-by: Peter Maydell =0D Message-id: 20210311180855.149764-6-wuhaotsh@google.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 4e46bb8f06586ad41c2fe26e2d4070b8ba44aac5=0D https://github.com/qemu/qemu/commit/4e46bb8f06586ad41c2fe26e2d4070b= 8ba44aac5=0D Author: Peter Maydell =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pl110.c=0D =0D Log Message:=0D -----------=0D hw/display/pl110: Remove dead code for non-32-bpp surfaces=0D =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel. Remove the legacy dead=0D code from the pl110 display device which was handling the=0D possibility that the console surface was some other format.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-2-peter.maydell@linaro.org=0D =0D =0D Commit: 7cbd685f4a086f441aaa727d49f931631dada461=0D https://github.com/qemu/qemu/commit/7cbd685f4a086f441aaa727d49f9316= 31dada461=0D Author: Peter Maydell =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pl110.c=0D M hw/display/pl110_template.h=0D =0D Log Message:=0D -----------=0D hw/display/pl110: Pull included-once parts of template header into pl11= 0.c=0D =0D The pl110_template.h header has a doubly-nested multiple-include pattern:= =0D * pl110.c includes it once for each host bit depth (now always 32)=0D * every time it is included, it includes itself 6 times, to account=0D for multiple guest device pixel and byte orders=0D =0D Now we only have to deal with 32-bit host bit depths, we can move the=0D code corresponding to the outer layer of this double-nesting to be=0D directly in pl110.c and reduce the template header to a single layer=0D of nesting.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-3-peter.maydell@linaro.org=0D =0D =0D Commit: 971226f4f4e4091cefa071adcefee0b599cccbf2=0D https://github.com/qemu/qemu/commit/971226f4f4e4091cefa071adcefee0b= 599cccbf2=0D Author: Peter Maydell =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pl110.c=0D M hw/display/pl110_template.h=0D =0D Log Message:=0D -----------=0D hw/display/pl110: Remove use of BITS from pl110_template.h=0D =0D BITS is always 32, so remove all uses of it from the template header,=0D by dropping the trailing '32' from the draw function names and=0D not constructing the name of rgb_to_pixel32() via the glue() macro.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-4-peter.maydell@linaro.org=0D =0D =0D Commit: 68769c02abd42e09eba0e2c04992afeb94c2c6de=0D https://github.com/qemu/qemu/commit/68769c02abd42e09eba0e2c04992afe= b94c2c6de=0D Author: Peter Maydell =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pxa2xx_lcd.c=0D =0D Log Message:=0D -----------=0D hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfaces=0D =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel. Remove the legacy dead code=0D from the pxa2xx_lcd display device which was handling the possibility=0D that the console surface was some other format.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-5-peter.maydell@linaro.org=0D =0D =0D Commit: 9379e406a56db1cf1c73abfac10e75a8356e1f6a=0D https://github.com/qemu/qemu/commit/9379e406a56db1cf1c73abfac10e75a= 8356e1f6a=0D Author: Peter Maydell =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pxa2xx_lcd.c=0D =0D Log Message:=0D -----------=0D hw/display/pxa2xx_lcd: Remove dest_width state field=0D =0D Since the dest_width is now always 4 because the output surface is=0D 32bpp, we can replace the dest_width state field with a constant.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-6-peter.maydell@linaro.org=0D =0D =0D Commit: efdedd8c5a54b43b52a098405c26d94a57dac9f5=0D https://github.com/qemu/qemu/commit/efdedd8c5a54b43b52a098405c26d94= a57dac9f5=0D Author: Peter Maydell =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pxa2xx_template.h=0D =0D Log Message:=0D -----------=0D hw/display/pxa2xx: Remove use of BITS in pxa2xx_template.h=0D =0D Now that BITS is always 32, expand out all its uses in the template=0D header, including removing now-useless uses of the glue() macro.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-7-peter.maydell@linaro.org=0D =0D =0D Commit: b8a2eb9402f54b2af964420fd6178b89ea20f78c=0D https://github.com/qemu/qemu/commit/b8a2eb9402f54b2af964420fd6178b8= 9ea20f78c=0D Author: Peter Maydell =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pxa2xx_template.h=0D =0D Log Message:=0D -----------=0D hw/display/pxa2xx: Apply brace-related coding style fixes to template h= eader=0D =0D We're about to move code from the template header into pxa2xx_lcd.c.=0D Before doing that, make coding style fixes so checkpatch doesn't=0D complain about the patch which moves the code. This commit fixes=0D missing braces in the SKIP_PIXEL() macro definition and in if()=0D statements.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-8-peter.maydell@linaro.org=0D =0D =0D Commit: dcdeaaeda48c1540e8f2ede210433ad636ecd663=0D https://github.com/qemu/qemu/commit/dcdeaaeda48c1540e8f2ede210433ad= 636ecd663=0D Author: Peter Maydell =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pxa2xx_template.h=0D =0D Log Message:=0D -----------=0D hw/display/pxa2xx: Apply whitespace-only coding style fixes to template= header=0D =0D We're about to move code from the template header into pxa2xx_lcd.c.=0D Before doing that, make coding style fixes so checkpatch doesn't=0D complain about the patch which moves the code. This commit is=0D whitespace changes only:=0D * avoid hard-coded tabs=0D * fix ident on function prototypes=0D * no newline before open brace on array definitions=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-9-peter.maydell@linaro.org=0D =0D =0D Commit: 41f09f2e9f09e4dd386d84174a6dcb5136af17ca=0D https://github.com/qemu/qemu/commit/41f09f2e9f09e4dd386d84174a6dcb5= 136af17ca=0D Author: Peter Maydell =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pxa2xx_lcd.c=0D R hw/display/pxa2xx_template.h=0D =0D Log Message:=0D -----------=0D hw/display/pxa2xx: Inline template header=0D =0D The template header is now included only once; just inline its contents=0D= in hw/display/pxa2xx_lcd.c.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-10-peter.maydell@linaro.org=0D =0D =0D Commit: 9a954a4a62a7aee13422591408e0d10481c0966f=0D https://github.com/qemu/qemu/commit/9a954a4a62a7aee13422591408e0d10= 481c0966f=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M accel/kvm/kvm-all.c=0D M docs/system/arm/nuvoton.rst=0D M docs/system/arm/xlnx-versal-virt.rst=0D M hw/arm/npcm7xx.c=0D M hw/arm/npcm7xx_boards.c=0D M hw/arm/smmu-common.c=0D M hw/arm/smmu-internal.h=0D M hw/arm/smmuv3.c=0D M hw/arm/trace-events=0D M hw/arm/virt.c=0D M hw/arm/xlnx-versal.c=0D M hw/display/pl110.c=0D M hw/display/pl110_template.h=0D M hw/display/pxa2xx_lcd.c=0D R hw/display/pxa2xx_template.h=0D M hw/i386/intel_iommu.c=0D M hw/misc/meson.build=0D A hw/misc/npcm7xx_mft.c=0D M hw/misc/npcm7xx_pwm.c=0D M hw/misc/trace-events=0D A hw/misc/xlnx-versal-xramc.c=0D M hw/net/allwinner-sun8i-emac.c=0D M hw/timer/sse-timer.c=0D M hw/virtio/virtio-iommu.c=0D M include/hw/arm/npcm7xx.h=0D M include/hw/arm/xlnx-versal.h=0D M include/hw/boards.h=0D A include/hw/misc/npcm7xx_mft.h=0D M include/hw/misc/npcm7xx_pwm.h=0D A include/hw/misc/xlnx-versal-xramc.h=0D M include/sysemu/dma.h=0D M softmmu/dma-helpers.c=0D M target/arm/kvm.c=0D M target/arm/kvm_arm.h=0D M target/arm/sve_helper.c=0D M target/arm/translate-sve.c=0D M tests/acceptance/boot_linux_console.py=0D M tests/acceptance/replay_kernel.py=0D M tests/qtest/npcm7xx_pwm-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10312-1' into staging=0D =0D target-arm queue:=0D * versal: Support XRAMs and XRAM controller=0D * smmu: Various minor bug fixes=0D * SVE emulation: fix bugs handling odd vector lengths=0D * allwinner-sun8i-emac: traverse transmit queue using TX_CUR_DESC regist= er value=0D * tests/acceptance: fix orangepi-pc acceptance tests=0D * hw/timer/sse-timer: Propagate eventual error in sse_timer_realize()=0D= * hw/arm/virt: KVM: The IPA lower bound is 32=0D * npcm7xx: support MFT module=0D * pl110, pxa2xx_lcd: tidy up template headers=0D =0D # gpg: Signature made Fri 12 Mar 2021 13:50:34 GMT=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210312-1: (39 commits)=0D hw/display/pxa2xx: Inline template header=0D hw/display/pxa2xx: Apply whitespace-only coding style fixes to template= header=0D hw/display/pxa2xx: Apply brace-related coding style fixes to template h= eader=0D hw/display/pxa2xx: Remove use of BITS in pxa2xx_template.h=0D hw/display/pxa2xx_lcd: Remove dest_width state field=0D hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfaces=0D hw/display/pl110: Remove use of BITS from pl110_template.h=0D hw/display/pl110: Pull included-once parts of template header into pl11= 0.c=0D hw/display/pl110: Remove dead code for non-32-bpp surfaces=0D tests/qtest: Test PWM fan RPM using MFT in PWM test=0D hw/arm: Connect PWM fans in NPCM7XX boards=0D hw/arm: Add MFT device to NPCM7xx Soc=0D hw/misc: Add NPCM7XX MFT Module=0D hw/misc: Add GPIOs for duty in NPCM7xx PWM=0D hw/arm/virt: KVM: The IPA lower bound is 32=0D accel: kvm: Fix kvm_type invocation=0D hw/timer/sse-timer: Propagate eventual error in sse_timer_realize()=0D tests/acceptance: drop ARMBIAN_ARTIFACTS_CACHED condition for orangepi-= pc, cubieboard tests=0D tests/acceptance: update sunxi kernel from armbian to 5.10.16=0D tests/acceptance/boot_linux_console: change URL for test_arm_orangepi_b= ionic_20_08=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/8e6bc6cdc82d...9a954a4a62a7= =0D From MAILER-DAEMON Sun Mar 14 09:19:29 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLQeV-00041f-ST for mharc-qemu-commits@gnu.org; Sun, 14 Mar 2021 09:19:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38224) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLQeT-00040t-V6 for qemu-commits@nongnu.org; Sun, 14 Mar 2021 09:19:26 -0400 Received: from out-18.smtp.github.com ([192.30.252.201]:53559 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLQeR-0004o9-12 for qemu-commits@nongnu.org; Sun, 14 Mar 2021 09:19:25 -0400 Received: from github.com (hubbernetes-node-866bad3.va3-iad.github.net [10.48.112.46]) by smtp.github.com (Postfix) with ESMTPA id 48643340591 for ; Sun, 14 Mar 2021 06:19:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615727962; bh=Th1tUugOFnBn6l+zo8OWyqGvTIgidmnNeYXwQe6dNDk=; h=Date:From:To:Subject:From; b=g1EoAfzqpjSWrpPQ/OAlkEMzuXqPgsxg4thJCkh4k48UuqKFbiyHp+o/8AmvORPz6 v8CQ9gk2YOw36adLpAWHh9MkRgexgH3QhcKQ30CXVnv02SYl2cEo3DUpxNIUSfERh0 Y7L6GDYoj8gb2hPRZOHGB5JIaNEJKaGZKU2BSmck= Date: Sun, 14 Mar 2021 06:19:22 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 999be4: tests/qtest: Test PWM fan RPM using MFT in PWM test X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Mar 2021 13:19:26 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 999be4a2d3d156ba38d4620e3dbfc8851943874f https://github.com/qemu/qemu/commit/999be4a2d3d156ba38d4620e3dbfc8851943874f Author: Hao Wu Date: 2021-03-12 (Fri, 12 Mar 2021) Changed paths: M tests/qtest/npcm7xx_pwm-test.c Log Message: ----------- tests/qtest: Test PWM fan RPM using MFT in PWM test This patch adds testing of PWM fan RPMs in the existing npcm7xx pwm test. It tests whether the MFT module can measure correct fan values for a PWM fan in NPCM7XX boards. Reviewed-by: Doug Evans Reviewed-by: Tyrone Ting Signed-off-by: Hao Wu Reviewed-by: Peter Maydell Message-id: 20210311180855.149764-6-wuhaotsh@google.com [PMM: fixed format strings for printing uint64_t] Signed-off-by: Peter Maydell Commit: 62bdc8c1646fe710c35f34d0b63a2b520807696c https://github.com/qemu/qemu/commit/62bdc8c1646fe710c35f34d0b63a2b520807696c Author: Peter Maydell Date: 2021-03-14 (Sun, 14 Mar 2021) Changed paths: M hw/display/pl110.c Log Message: ----------- hw/display/pl110: Remove dead code for non-32-bpp surfaces For a long time now the UI layer has guaranteed that the console surface is always 32 bits per pixel. Remove the legacy dead code from the pl110 display device which was handling the possibility that the console surface was some other format. Signed-off-by: Peter Maydell Acked-by: Gerd Hoffmann Message-id: 20210211141515.8755-2-peter.maydell@linaro.org Commit: 560ebce6b2c54367e63757567230344c13999dc7 https://github.com/qemu/qemu/commit/560ebce6b2c54367e63757567230344c13999dc7 Author: Peter Maydell Date: 2021-03-14 (Sun, 14 Mar 2021) Changed paths: M hw/display/pl110.c M hw/display/pl110_template.h Log Message: ----------- hw/display/pl110: Pull included-once parts of template header into pl110.c The pl110_template.h header has a doubly-nested multiple-include pattern: * pl110.c includes it once for each host bit depth (now always 32) * every time it is included, it includes itself 6 times, to account for multiple guest device pixel and byte orders Now we only have to deal with 32-bit host bit depths, we can move the code corresponding to the outer layer of this double-nesting to be directly in pl110.c and reduce the template header to a single layer of nesting. Signed-off-by: Peter Maydell Acked-by: Gerd Hoffmann Message-id: 20210211141515.8755-3-peter.maydell@linaro.org Commit: ba1c16e425011cf5ad73a07d3fdcf080e08c91e4 https://github.com/qemu/qemu/commit/ba1c16e425011cf5ad73a07d3fdcf080e08c91e4 Author: Peter Maydell Date: 2021-03-14 (Sun, 14 Mar 2021) Changed paths: M hw/display/pl110.c M hw/display/pl110_template.h Log Message: ----------- hw/display/pl110: Remove use of BITS from pl110_template.h BITS is always 32, so remove all uses of it from the template header, by dropping the trailing '32' from the draw function names and not constructing the name of rgb_to_pixel32() via the glue() macro. Signed-off-by: Peter Maydell Acked-by: Gerd Hoffmann Message-id: 20210211141515.8755-4-peter.maydell@linaro.org Commit: e834dfc64c8df1b28b3bf903a6fc231d033e7d5e https://github.com/qemu/qemu/commit/e834dfc64c8df1b28b3bf903a6fc231d033e7d5e Author: Peter Maydell Date: 2021-03-14 (Sun, 14 Mar 2021) Changed paths: M hw/display/pxa2xx_lcd.c Log Message: ----------- hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfaces For a long time now the UI layer has guaranteed that the console surface is always 32 bits per pixel. Remove the legacy dead code from the pxa2xx_lcd display device which was handling the possibility that the console surface was some other format. Signed-off-by: Peter Maydell Acked-by: Gerd Hoffmann Message-id: 20210211141515.8755-5-peter.maydell@linaro.org Commit: 9e53ecdc20c0d94550c7bfde217e63e4362196f3 https://github.com/qemu/qemu/commit/9e53ecdc20c0d94550c7bfde217e63e4362196f3 Author: Peter Maydell Date: 2021-03-14 (Sun, 14 Mar 2021) Changed paths: M hw/display/pxa2xx_lcd.c Log Message: ----------- hw/display/pxa2xx_lcd: Remove dest_width state field Since the dest_width is now always 4 because the output surface is 32bpp, we can replace the dest_width state field with a constant. Signed-off-by: Peter Maydell Acked-by: Gerd Hoffmann Message-id: 20210211141515.8755-6-peter.maydell@linaro.org Commit: b48b884fc45cfc1d615ed5d028abbe278992800a https://github.com/qemu/qemu/commit/b48b884fc45cfc1d615ed5d028abbe278992800a Author: Peter Maydell Date: 2021-03-14 (Sun, 14 Mar 2021) Changed paths: M hw/display/pxa2xx_template.h Log Message: ----------- hw/display/pxa2xx: Remove use of BITS in pxa2xx_template.h Now that BITS is always 32, expand out all its uses in the template header, including removing now-useless uses of the glue() macro. Signed-off-by: Peter Maydell Acked-by: Gerd Hoffmann Message-id: 20210211141515.8755-7-peter.maydell@linaro.org Commit: 9347e042088430e3bb860692b02fdec6be1ac4da https://github.com/qemu/qemu/commit/9347e042088430e3bb860692b02fdec6be1ac4da Author: Peter Maydell Date: 2021-03-14 (Sun, 14 Mar 2021) Changed paths: M hw/display/pxa2xx_template.h Log Message: ----------- hw/display/pxa2xx: Apply brace-related coding style fixes to template header We're about to move code from the template header into pxa2xx_lcd.c. Before doing that, make coding style fixes so checkpatch doesn't complain about the patch which moves the code. This commit fixes missing braces in the SKIP_PIXEL() macro definition and in if() statements. Signed-off-by: Peter Maydell Acked-by: Gerd Hoffmann Message-id: 20210211141515.8755-8-peter.maydell@linaro.org Commit: 540817e22f6bf92b68ef894dacccb2a057d3b668 https://github.com/qemu/qemu/commit/540817e22f6bf92b68ef894dacccb2a057d3b668 Author: Peter Maydell Date: 2021-03-14 (Sun, 14 Mar 2021) Changed paths: M hw/display/pxa2xx_template.h Log Message: ----------- hw/display/pxa2xx: Apply whitespace-only coding style fixes to template header We're about to move code from the template header into pxa2xx_lcd.c. Before doing that, make coding style fixes so checkpatch doesn't complain about the patch which moves the code. This commit is whitespace changes only: * avoid hard-coded tabs * fix ident on function prototypes * no newline before open brace on array definitions Signed-off-by: Peter Maydell Acked-by: Gerd Hoffmann Message-id: 20210211141515.8755-9-peter.maydell@linaro.org Commit: 6500ac13ff8e5c64ca69f5ef5d456028cfda6139 https://github.com/qemu/qemu/commit/6500ac13ff8e5c64ca69f5ef5d456028cfda6139 Author: Peter Maydell Date: 2021-03-14 (Sun, 14 Mar 2021) Changed paths: M hw/display/pxa2xx_lcd.c R hw/display/pxa2xx_template.h Log Message: ----------- hw/display/pxa2xx: Inline template header The template header is now included only once; just inline its contents in hw/display/pxa2xx_lcd.c. Signed-off-by: Peter Maydell Acked-by: Gerd Hoffmann Message-id: 20210211141515.8755-10-peter.maydell@linaro.org Commit: 6f8a81fc296535f73c48cf9563862e088cc71c57 https://github.com/qemu/qemu/commit/6f8a81fc296535f73c48cf9563862e088cc71c57 Author: Peter Maydell Date: 2021-03-14 (Sun, 14 Mar 2021) Changed paths: M accel/kvm/kvm-all.c M docs/system/arm/nuvoton.rst M docs/system/arm/xlnx-versal-virt.rst M hw/arm/npcm7xx.c M hw/arm/npcm7xx_boards.c M hw/arm/smmu-common.c M hw/arm/smmu-internal.h M hw/arm/smmuv3.c M hw/arm/trace-events M hw/arm/virt.c M hw/arm/xlnx-versal.c M hw/display/pl110.c M hw/display/pl110_template.h M hw/display/pxa2xx_lcd.c R hw/display/pxa2xx_template.h M hw/i386/intel_iommu.c M hw/misc/meson.build A hw/misc/npcm7xx_mft.c M hw/misc/npcm7xx_pwm.c M hw/misc/trace-events A hw/misc/xlnx-versal-xramc.c M hw/net/allwinner-sun8i-emac.c M hw/timer/sse-timer.c M hw/virtio/virtio-iommu.c M include/hw/arm/npcm7xx.h M include/hw/arm/xlnx-versal.h M include/hw/boards.h A include/hw/misc/npcm7xx_mft.h M include/hw/misc/npcm7xx_pwm.h A include/hw/misc/xlnx-versal-xramc.h M include/sysemu/dma.h M softmmu/dma-helpers.c M target/arm/kvm.c M target/arm/kvm_arm.h M target/arm/sve_helper.c M target/arm/translate-sve.c M tests/acceptance/boot_linux_console.py M tests/acceptance/replay_kernel.py M tests/qtest/npcm7xx_pwm-test.c Log Message: ----------- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210314' into staging target-arm queue: * versal: Support XRAMs and XRAM controller * smmu: Various minor bug fixes * SVE emulation: fix bugs handling odd vector lengths * allwinner-sun8i-emac: traverse transmit queue using TX_CUR_DESC register value * tests/acceptance: fix orangepi-pc acceptance tests * hw/timer/sse-timer: Propagate eventual error in sse_timer_realize() * hw/arm/virt: KVM: The IPA lower bound is 32 * npcm7xx: support MFT module * pl110, pxa2xx_lcd: tidy up template headers # gpg: Signature made Sun 14 Mar 2021 13:17:43 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell " [ultimate] # gpg: aka "Peter Maydell " [ultimate] # gpg: aka "Peter Maydell " [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210314: (39 commits) hw/display/pxa2xx: Inline template header hw/display/pxa2xx: Apply whitespace-only coding style fixes to template header hw/display/pxa2xx: Apply brace-related coding style fixes to template header hw/display/pxa2xx: Remove use of BITS in pxa2xx_template.h hw/display/pxa2xx_lcd: Remove dest_width state field hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfaces hw/display/pl110: Remove use of BITS from pl110_template.h hw/display/pl110: Pull included-once parts of template header into pl110.c hw/display/pl110: Remove dead code for non-32-bpp surfaces tests/qtest: Test PWM fan RPM using MFT in PWM test hw/arm: Connect PWM fans in NPCM7XX boards hw/arm: Add MFT device to NPCM7xx Soc hw/misc: Add NPCM7XX MFT Module hw/misc: Add GPIOs for duty in NPCM7xx PWM hw/arm/virt: KVM: The IPA lower bound is 32 accel: kvm: Fix kvm_type invocation hw/timer/sse-timer: Propagate eventual error in sse_timer_realize() tests/acceptance: drop ARMBIAN_ARTIFACTS_CACHED condition for orangepi-pc, cubieboard tests tests/acceptance: update sunxi kernel from armbian to 5.10.16 tests/acceptance/boot_linux_console: change URL for test_arm_orangepi_bionic_20_08 ... Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/9a954a4a62a7...6f8a81fc2965 From MAILER-DAEMON Sun Mar 14 11:13:04 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLSQR-0005kU-SP for mharc-qemu-commits@gnu.org; Sun, 14 Mar 2021 11:13:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53982) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLSQQ-0005jE-Dp for qemu-commits@nongnu.org; Sun, 14 Mar 2021 11:13:02 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:45157 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLSQL-0005oZ-OP for qemu-commits@nongnu.org; Sun, 14 Mar 2021 11:13:02 -0400 Received: from github.com (hubbernetes-node-b91220c.va3-iad.github.net [10.48.119.78]) by smtp.github.com (Postfix) with ESMTPA id 225655C0155 for ; Sun, 14 Mar 2021 08:12:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615734777; bh=GVry9MA3a8xVmWWrqkHJ4LWt5ealNcQLaERaFpVlV8w=; h=Date:From:To:Subject:From; b=xJ8UY9XnUyHwnvzZC8Zqwp75vkuNrLrJa3nbvX0iXbZ3Vo7/y1Zu5llAeOlA1jlEr LjMVTX9Z/H8SQ2PNfDPVDUc+jLq7yy5LwZ4W1y6AHCBGSXnyofDV2C1CTz0/bWRHb5 pu3jqUSmoKjZJblrXxxq0vYbd0dLsf3Y8gquBoug= Date: Sun, 14 Mar 2021 08:12:57 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -63 X-Spam_score: -6.4 X-Spam_bar: ------ X-Spam_report: (-6.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HEXHASH_WORD=1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 9f6176: hw/misc: versal: Add a model of the XRAM controller X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Mar 2021 15:13:02 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 9f61763574fb19525a68c46f3b8f763e5936a6fe=0D https://github.com/qemu/qemu/commit/9f61763574fb19525a68c46f3b8f763= e5936a6fe=0D Author: Edgar E. Iglesias =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/meson.build=0D A hw/misc/xlnx-versal-xramc.c=0D A include/hw/misc/xlnx-versal-xramc.h=0D =0D Log Message:=0D -----------=0D hw/misc: versal: Add a model of the XRAM controller=0D =0D Add a model of the Xilinx Versal Accelerator RAM (XRAM).=0D This is mainly a stub to make firmware happy. The size of=0D the RAMs can be probed. The interrupt mask logic is=0D modelled but none of the interrups will ever be raised=0D unless injected.=0D =0D Signed-off-by: Edgar E. Iglesias =0D Message-id: 20210308224637.2949533-2-edgar.iglesias@gmail.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: a55b441b2ca578417ab3a7a62129cd801e22abf4=0D https://github.com/qemu/qemu/commit/a55b441b2ca578417ab3a7a62129cd8= 01e22abf4=0D Author: Edgar E. Iglesias =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/xlnx-versal-virt.rst=0D M hw/arm/xlnx-versal.c=0D M include/hw/arm/xlnx-versal.h=0D =0D Log Message:=0D -----------=0D hw/arm: versal: Add support for the XRAMs=0D =0D Connect the support for the Versal Accelerator RAMs (XRAMs).=0D =0D Reviewed-by: Luc Michel =0D Acked-by: Alistair Francis =0D Signed-off-by: Edgar E. Iglesias =0D Message-id: 20210308224637.2949533-3-edgar.iglesias@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 41ce9a912641cd7f820bcfccea15e30efc32104e=0D https://github.com/qemu/qemu/commit/41ce9a912641cd7f820bcfccea15e30= efc32104e=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/i386/intel_iommu.c=0D =0D Log Message:=0D -----------=0D intel_iommu: Fix mask may be uninitialized in vtd_context_device_invali= date=0D =0D With -Werror=3Dmaybe-uninitialized configuration we get=0D ../hw/i386/intel_iommu.c: In function =E2=80=98vtd_context_device_invalid= ate=E2=80=99:=0D ../hw/i386/intel_iommu.c:1888:10: error: =E2=80=98mask=E2=80=99 may be us= ed=0D uninitialized in this function [-Werror=3Dmaybe-uninitialized]=0D 1888 | mask =3D ~mask;=0D | ~~~~~^~~~~~~=0D =0D Add a g_assert_not_reached() to avoid the error.=0D =0D Signed-off-by: Eric Auger =0D Reviewed-by: Peter Xu =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210309102742.30442-2-eric.auger@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: f14fb6c2db961c3665a61b342ab329b7bd20d1e7=0D https://github.com/qemu/qemu/commit/f14fb6c2db961c3665a61b342ab329b= 7bd20d1e7=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/i386/intel_iommu.c=0D M include/sysemu/dma.h=0D M softmmu/dma-helpers.c=0D =0D Log Message:=0D -----------=0D dma: Introduce dma_aligned_pow2_mask()=0D =0D Currently get_naturally_aligned_size() is used by the intel iommu=0D to compute the maximum invalidation range based on @size which is=0D a power of 2 while being aligned with the @start address and less=0D than the maximum range defined by @gaw.=0D =0D This helper is also useful for other iommu devices (virtio-iommu,=0D SMMUv3) to make sure IOMMU UNMAP notifiers only are called with=0D power of 2 range sizes.=0D =0D Let's move this latter into dma-helpers.c and rename it into=0D dma_aligned_pow2_mask(). Also rewrite the helper so that it=0D accomodates UINT64_MAX values for the size mask and max mask.=0D It now returns a mask instead of a size. Change the caller.=0D =0D Signed-off-by: Eric Auger =0D Reviewed-by: Peter Xu =0D Message-id: 20210309102742.30442-3-eric.auger@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: dde3f08b5cab24e570fc0ccbbbab86b6b50aad23=0D https://github.com/qemu/qemu/commit/dde3f08b5cab24e570fc0ccbbbab86b= 6b50aad23=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/virtio/virtio-iommu.c=0D =0D Log Message:=0D -----------=0D virtio-iommu: Handle non power of 2 range invalidations=0D =0D Unmap notifiers work with an address mask assuming an=0D invalidation range of a power of 2. Nothing mandates this=0D in the VIRTIO-IOMMU spec.=0D =0D So in case the range is not a power of 2, split it into=0D several invalidations.=0D =0D Signed-off-by: Eric Auger =0D Reviewed-by: Peter Xu =0D Message-id: 20210309102742.30442-4-eric.auger@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: a4b6e1be2c8fd60381feb00f06cf3b6373bbbf07=0D https://github.com/qemu/qemu/commit/a4b6e1be2c8fd60381feb00f06cf3b6= 373bbbf07=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/smmu-common.c=0D =0D Log Message:=0D -----------=0D hw/arm/smmu-common: Fix smmu_iotlb_inv_iova when asid is not set=0D =0D If the asid is not set, do not attempt to locate the key directly=0D as all inserted keys have a valid asid.=0D =0D Use g_hash_table_foreach_remove instead.=0D =0D Signed-off-by: Eric Auger =0D Message-id: 20210309102742.30442-5-eric.auger@redhat.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 6d9cd115b9dfee08faef0f64c3b90ac5c79ededc=0D https://github.com/qemu/qemu/commit/6d9cd115b9dfee08faef0f64c3b90ac= 5c79ededc=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/smmu-common.c=0D M hw/arm/smmuv3.c=0D =0D Log Message:=0D -----------=0D hw/arm/smmuv3: Enforce invalidation on a power of two range=0D =0D As of today, the driver can invalidate a number of pages that is=0D not a power of 2. However IOTLB unmap notifications and internal=0D IOTLB invalidations work with masks leading to erroneous=0D invalidations.=0D =0D In case the range is not a power of 2, split invalidations into=0D power of 2 invalidations.=0D =0D When looking for a single page entry in the vSMMU internal IOTLB,=0D let's make sure that if the entry is not found using a=0D g_hash_table_remove() we iterate over all the entries to find a=0D potential range that overlaps it.=0D =0D Signed-off-by: Eric Auger =0D Message-id: 20210309102742.30442-6-eric.auger@redhat.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 1194140b7fab588b4b9de9aeacbe9672f06c1d8f=0D https://github.com/qemu/qemu/commit/1194140b7fab588b4b9de9aeacbe967= 2f06c1d8f=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/smmu-internal.h=0D M hw/arm/smmuv3.c=0D =0D Log Message:=0D -----------=0D hw/arm/smmuv3: Fix SMMU_CMD_CFGI_STE_RANGE handling=0D =0D If the whole SID range (32b) is invalidated (SMMU_CMD_CFGI_ALL),=0D @end overflows and we fail to handle the command properly.=0D =0D Once this gets fixed, the current code really is awkward in the=0D sense it loops over the whole range instead of removing the=0D currently cached configs through a hash table lookup.=0D =0D Fix both the overflow and the lookup.=0D =0D Signed-off-by: Eric Auger =0D Reviewed-by: Peter Maydell =0D Message-id: 20210309102742.30442-7-eric.auger@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: fe2f5cbcfc96f1db3e1a277233f52e2fd993a9e1=0D https://github.com/qemu/qemu/commit/fe2f5cbcfc96f1db3e1a277233f52e2= fd993a9e1=0D Author: Eric Auger =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/trace-events=0D =0D Log Message:=0D -----------=0D hw/arm/smmuv3: Uniformize sid traces=0D =0D Convert all sid printouts to sid=3D0x%x.=0D =0D Signed-off-by: Eric Auger =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210309102742.30442-8-eric.auger@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 226e6c046c0fce8da32575aad020ca56a5a8064d=0D https://github.com/qemu/qemu/commit/226e6c046c0fce8da32575aad020ca5= 6a5a8064d=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D =0D Log Message:=0D -----------=0D target/arm: Fix sve_uzp_p vs odd vector lengths=0D =0D Missed out on compressing the second half of a predicate=0D with length vl % 512 > 256.=0D =0D Adjust all of the x + (y << s) to x | (y << s) as a=0D general style fix. Drop the extract64 because the input=0D uint64_t are known to be already zero-extended from the=0D current size of the predicate.=0D =0D Reported-by: Laurent Desnogues =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-2-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 8e7fefed1bdcc0f7e722ccf2a2fc2b4f79fe725e=0D https://github.com/qemu/qemu/commit/8e7fefed1bdcc0f7e722ccf2a2fc2b4= f79fe725e=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D =0D Log Message:=0D -----------=0D target/arm: Fix sve_zip_p vs odd vector lengths=0D =0D Wrote too much with low-half zip (zip1) with vl % 512 !=3D 0.=0D =0D Adjust all of the x + (y << s) to x | (y << s) as a style fix.=0D =0D We only ever have exact overlap between D, M, and N. Therefore=0D we only need a single temporary, and we do not need to check for=0D partial overlap.=0D =0D Reported-by: Laurent Desnogues =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-3-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: fd911a21414b5a17663fa2b97f1059fb11cee99d=0D https://github.com/qemu/qemu/commit/fd911a21414b5a17663fa2b97f1059f= b11cee99d=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D =0D Log Message:=0D -----------=0D target/arm: Fix sve_punpk_p vs odd vector lengths=0D =0D Wrote too much with punpk1 with vl % 512 !=3D 0.=0D =0D Reviewed-by: Peter Maydell =0D Reported-by: Laurent Desnogues =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-4-richard.henderson@linaro.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 2acbfbe4313daf43b6653ee5d82bcaeaa155e895=0D https://github.com/qemu/qemu/commit/2acbfbe4313daf43b6653ee5d82bcae= aa155e895=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D M target/arm/translate-sve.c=0D =0D Log Message:=0D -----------=0D target/arm: Update find_last_active for PREDDESC=0D =0D Since b64ee454a4a0, all predicate operations should be=0D using these field macros for predicates.=0D =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-5-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 04c774a25da78eb07d505ee5923167c2010b9f8c=0D https://github.com/qemu/qemu/commit/04c774a25da78eb07d505ee5923167c= 2010b9f8c=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D M target/arm/translate-sve.c=0D =0D Log Message:=0D -----------=0D target/arm: Update BRKA, BRKB, BRKN for PREDDESC=0D =0D Since b64ee454a4a0, all predicate operations should be=0D using these field macros for predicates.=0D =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-6-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: f556a201b5bbeb59841b37247969fcfc1ab7bd5d=0D https://github.com/qemu/qemu/commit/f556a201b5bbeb59841b37247969fcf= c1ab7bd5d=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D M target/arm/translate-sve.c=0D =0D Log Message:=0D -----------=0D target/arm: Update CNTP for PREDDESC=0D =0D Since b64ee454a4a0, all predicate operations should be=0D using these field macros for predicates.=0D =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-7-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: e610906c56f98c76888d45beb7f579935dd61a70=0D https://github.com/qemu/qemu/commit/e610906c56f98c76888d45beb7f5799= 35dd61a70=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D M target/arm/translate-sve.c=0D =0D Log Message:=0D -----------=0D target/arm: Update WHILE for PREDDESC=0D =0D Since b64ee454a4a0, all predicate operations should be=0D using these field macros for predicates.=0D =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-8-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: c648c9b7e1ccff94b51ecbebe86a206952c47e75=0D https://github.com/qemu/qemu/commit/c648c9b7e1ccff94b51ecbebe86a206= 952c47e75=0D Author: Richard Henderson =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M target/arm/sve_helper.c=0D M target/arm/translate-sve.c=0D =0D Log Message:=0D -----------=0D target/arm: Update sve reduction vs simd_desc=0D =0D With the reduction operations, we intentionally increase maxsz to=0D the next power of 2, so as to fill out the reduction tree correctly.=0D Since e2e7168a214b, oprsz must equal maxsz, with exceptions for small=0D vectors, so this triggers an assertion for vector sizes > 32 that are=0D not themselves a power of 2.=0D =0D Pass the power-of-two value in the simd_data field instead.=0D =0D Signed-off-by: Richard Henderson =0D Message-id: 20210309155305.11301-9-richard.henderson@linaro.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: b6f03acc8fe205a11e7040830f63113b7282538d=0D https://github.com/qemu/qemu/commit/b6f03acc8fe205a11e7040830f63113= b7282538d=0D Author: Niek Linnenbank =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/net/allwinner-sun8i-emac.c=0D =0D Log Message:=0D -----------=0D hw/net/allwinner-sun8i-emac: traverse transmit queue using TX_CUR_DESC = register value=0D =0D Currently the emulated EMAC for sun8i always traverses the transmit queue= =0D from the head when transferring packets. It searches for a list of consec= utive=0D descriptors whichs are flagged as ready for processing and transmits thei= r payloads=0D accordingly. The controller stops processing once it finds a descriptor t= hat is not=0D marked ready.=0D =0D While the above behaviour works in most situations, it is not the same as= the actual=0D EMAC in hardware. Actual hardware uses the TX_CUR_DESC register value to = keep track=0D of the last position in the transmit queue and continues processing from = that position=0D when software triggers the start of DMA processing. The currently emulate= d behaviour can=0D lead to packet loss on transmit when software fills the transmit queue wi= th ready=0D descriptors that overlap the tail of the circular list.=0D =0D This commit modifies the emulated EMAC for sun8i such that it processes=0D= the transmit queue using the TX_CUR_DESC register in the same way as hard= ware.=0D =0D Signed-off-by: Niek Linnenbank =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210310195820.21950-2-nieklinnenbank@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: a30e114f3c41871753856e19abf6a7e0715e81c1=0D https://github.com/qemu/qemu/commit/a30e114f3c41871753856e19abf6a7e= 0715e81c1=0D Author: Niek Linnenbank =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/boot_linux_console.py=0D =0D Log Message:=0D -----------=0D tests/acceptance/boot_linux_console: remove Armbian 19.11.3 bionic test= for orangepi-pc machine=0D =0D The image for Armbian 19.11.3 bionic has been removed from the armbian se= rver.=0D Without the image as input the test arm_orangepi_bionic_19_11 cannot run.= =0D =0D This commit removes the test completely and merges the code of the generi= c function=0D do_test_arm_orangepi_uboot_armbian back with the 20.08 test.=0D =0D Signed-off-by: Niek Linnenbank =0D Reviewed-by: Willian Rampazzo =0D Message-id: 20210310195820.21950-3-nieklinnenbank@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 875ee4179bea17bdb92798a060a9f2faef0dc7a2=0D https://github.com/qemu/qemu/commit/875ee4179bea17bdb92798a060a9f2f= aef0dc7a2=0D Author: Niek Linnenbank =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/boot_linux_console.py=0D =0D Log Message:=0D -----------=0D tests/acceptance/boot_linux_console: change URL for test_arm_orangepi_b= ionic_20_08=0D =0D Update the download URL of the Armbian 20.08 Bionic image for=0D test_arm_orangepi_bionic_20_08 of the orangepi-pc machine.=0D =0D The archive.armbian.com URL contains more images and should keep stable=0D= for a longer period of time than dl.armbian.com.=0D =0D Signed-off-by: Niek Linnenbank =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Willian Rampazzo =0D Message-id: 20210310195820.21950-4-nieklinnenbank@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: e384db41d8661ff570c2e31a4aa09b2f028b3987=0D https://github.com/qemu/qemu/commit/e384db41d8661ff570c2e31a4aa09b2= f028b3987=0D Author: Niek Linnenbank =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/boot_linux_console.py=0D M tests/acceptance/replay_kernel.py=0D =0D Log Message:=0D -----------=0D tests/acceptance: update sunxi kernel from armbian to 5.10.16=0D =0D The linux kernel 4.20.7 binary for sunxi has been removed from apt.armbia= n.com:=0D =0D $ ARMBIAN_ARTIFACTS_CACHED=3Dyes AVOCADO_ALLOW_LARGE_STORAGE=3Dyes avoc= ado --show=3Dapp,console run -t machine:orangepi-pc tests/acceptance/boot= _linux_console.py=0D Fetching asset from tests/acceptance/boot_linux_console.py:BootLinuxCon= sole.test_arm_orangepi=0D ...=0D (1/6) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_= orangepi:=0D CANCEL: Missing asset https://apt.armbian.com/pool/main/l/linux-4.20.= 7-sunxi/linux-image-dev-sunxi_5.75_armhf.deb (0.55 s)=0D =0D This commit updates the sunxi kernel to 5.10.16 for the acceptance=0D tests of the orangepi-pc and cubieboard machines.=0D =0D Signed-off-by: Niek Linnenbank =0D Reviewed-by: Willian Rampazzo =0D Message-id: 20210310195820.21950-5-nieklinnenbank@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: f4223d2e75a991c80393ac3c684b90c875d6efd9=0D https://github.com/qemu/qemu/commit/f4223d2e75a991c80393ac3c684b90c= 875d6efd9=0D Author: Niek Linnenbank =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/boot_linux_console.py=0D M tests/acceptance/replay_kernel.py=0D =0D Log Message:=0D -----------=0D tests/acceptance: drop ARMBIAN_ARTIFACTS_CACHED condition for orangepi-= pc, cubieboard tests=0D =0D Previously the ARMBIAN_ARTIFACTS_CACHED pre-condition was added to allow = running=0D tests that have already existing armbian.com artifacts stored in the loca= l avocado cache,=0D but do not have working URLs to download a fresh copy.=0D =0D At this time of writing the URLs for artifacts on the armbian.com server = are updated and working.=0D Any future broken URLs will result in a skipped acceptance test, for exam= ple:=0D =0D (1/5) tests/acceptance/boot_linux_console.py:BootLinuxConsole.test_arm_o= rangepi:=0D CANCEL: Missing asset https://apt.armbian.com/pool/main/l/linux-4.20.7-= sunxi/linux-image-dev-sunxi_5.75_armhf.deb (0.53 s)=0D =0D This commits removes the ARMBIAN_ARTIFACTS_CACHED pre-condition such that= =0D the acceptance tests for the orangepi-pc and cubieboard machines can run.= =0D =0D Signed-off-by: Niek Linnenbank =0D Reviewed-by: Willian Rampazzo =0D Message-id: 20210310195820.21950-6-nieklinnenbank@gmail.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: fc49b77fd391fdcfc9c0b61a8c301ac0d15232e9=0D https://github.com/qemu/qemu/commit/fc49b77fd391fdcfc9c0b61a8c301ac= 0d15232e9=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/sse-timer.c=0D =0D Log Message:=0D -----------=0D hw/timer/sse-timer: Propagate eventual error in sse_timer_realize()=0D =0D If the SSECounter link is absent, we set an error message=0D in sse_timer_realize() but forgot to propagate this error.=0D Add the missing 'return'.=0D =0D Fixes: CID 1450755 (Null pointer dereferences)=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210312001845.1562670-1-f4bug@amsat.org=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 516fc0a081161eab5b3a89c7f243954945ee390e=0D https://github.com/qemu/qemu/commit/516fc0a081161eab5b3a89c7f243954= 945ee390e=0D Author: Andrew Jones =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M accel/kvm/kvm-all.c=0D M include/hw/boards.h=0D =0D Log Message:=0D -----------=0D accel: kvm: Fix kvm_type invocation=0D =0D Prior to commit f2ce39b4f067 a MachineClass kvm_type method=0D only needed to be registered to ensure it would be executed.=0D With commit f2ce39b4f067 a kvm-type machine property must also=0D be specified. hw/arm/virt relies on the kvm_type method to pass=0D its selected IPA limit to KVM, but this is not exposed as a=0D machine property. Restore the previous functionality of invoking=0D kvm_type when it's present.=0D =0D Fixes: f2ce39b4f067 ("vl: make qemu_get_machine_opts static")=0D Signed-off-by: Andrew Jones =0D Reviewed-by: Eric Auger =0D Message-id: 20210310135218.255205-2-drjones@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: bcb902a1ed1ad5e0ceebb9536f392bf6d46219f9=0D https://github.com/qemu/qemu/commit/bcb902a1ed1ad5e0ceebb9536f392bf= 6d46219f9=0D Author: Andrew Jones =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/virt.c=0D M target/arm/kvm.c=0D M target/arm/kvm_arm.h=0D =0D Log Message:=0D -----------=0D hw/arm/virt: KVM: The IPA lower bound is 32=0D =0D The virt machine already checks KVM_CAP_ARM_VM_IPA_SIZE to get the=0D upper bound of the IPA size. If that bound is lower than the highest=0D possible GPA for the machine, then QEMU will error out. However, the=0D IPA is set to 40 when the highest GPA is less than or equal to 40,=0D even when KVM may support an IPA limit as low as 32. This means KVM=0D may fail the VM creation unnecessarily. Additionally, 40 is selected=0D with the value 0, which means use the default, and that gets around=0D a check in some versions of KVM, causing a difficult to debug fail.=0D Always use the IPA size that corresponds to the highest possible GPA,=0D unless it's lower than 32, in which case use 32. Also, we must still=0D use 0 when KVM only supports the legacy fixed 40 bit IPA.=0D =0D Suggested-by: Marc Zyngier =0D Signed-off-by: Andrew Jones =0D Reviewed-by: Eric Auger =0D Reviewed-by: Marc Zyngier =0D Message-id: 20210310135218.255205-3-drjones@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 71b50b9d1ca2f5e8ae65678294ceacbd7b6520c8=0D https://github.com/qemu/qemu/commit/71b50b9d1ca2f5e8ae65678294ceacb= d7b6520c8=0D Author: Hao Wu =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/npcm7xx_pwm.c=0D M include/hw/misc/npcm7xx_pwm.h=0D =0D Log Message:=0D -----------=0D hw/misc: Add GPIOs for duty in NPCM7xx PWM=0D =0D This patch adds GPIOs in NPCM7xx PWM module for its duty values.=0D The purpose of this is to connect it to the MFT module to provide=0D an input for measuring a PWM fan's RPM. Each PWM module has=0D NPCM7XX_PWM_PER_MODULE of GPIOs, each one corresponds to=0D one PWM instance and can connect to multiple fan instances in MFT.=0D =0D Reviewed-by: Doug Evans =0D Reviewed-by: Tyrone Ting =0D Signed-off-by: Hao Wu =0D Reviewed-by: Peter Maydell =0D Message-id: 20210311180855.149764-2-wuhaotsh@google.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 380a37e49891f8d9462124f593516a9ced58343a=0D https://github.com/qemu/qemu/commit/380a37e49891f8d9462124f593516a9= ced58343a=0D Author: Hao Wu =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/meson.build=0D A hw/misc/npcm7xx_mft.c=0D M hw/misc/trace-events=0D A include/hw/misc/npcm7xx_mft.h=0D =0D Log Message:=0D -----------=0D hw/misc: Add NPCM7XX MFT Module=0D =0D This patch implements Multi Function Timer (MFT) module for NPCM7XX.=0D This module is mainly used to configure PWM fans. It has just enough=0D functionality to make the PWM fan kernel module work.=0D =0D The module takes two input, the max_rpm of a fan (modifiable via QMP)=0D and duty cycle (a GPIO from the PWM module.) The actual measured RPM=0D is equal to max_rpm * duty_cycle / NPCM7XX_PWM_MAX_DUTY. The RPM is=0D measured as a counter compared to a prescaled input clock. The kernel=0D driver reads this counter and report to user space.=0D =0D Refs:=0D https://github.com/torvalds/linux/blob/master/drivers/hwmon/npcm750-pwm-f= an.c=0D =0D Reviewed-by: Doug Evans =0D Reviewed-by: Tyrone Ting =0D Signed-off-by: Hao Wu =0D Message-id: 20210311180855.149764-3-wuhaotsh@google.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: fc11115f74b4355b38eeebc118e347cd74f35845=0D https://github.com/qemu/qemu/commit/fc11115f74b4355b38eeebc118e347c= d74f35845=0D Author: Hao Wu =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M docs/system/arm/nuvoton.rst=0D M hw/arm/npcm7xx.c=0D M include/hw/arm/npcm7xx.h=0D =0D Log Message:=0D -----------=0D hw/arm: Add MFT device to NPCM7xx Soc=0D =0D This patch adds the recently implemented MFT device to the NPCM7XX=0D SoC file.=0D =0D Reviewed-by: Doug Evans =0D Reviewed-by: Tyrone Ting =0D Signed-off-by: Hao Wu =0D Message-id: 20210311180855.149764-4-wuhaotsh@google.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: a9d3d7b17e5a3c246ecf4e420d2d4bb089a8d7c3=0D https://github.com/qemu/qemu/commit/a9d3d7b17e5a3c246ecf4e420d2d4bb= 089a8d7c3=0D Author: Hao Wu =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/npcm7xx_boards.c=0D M include/hw/arm/npcm7xx.h=0D =0D Log Message:=0D -----------=0D hw/arm: Connect PWM fans in NPCM7XX boards=0D =0D This patch adds fan_splitters (split IRQs) in NPCM7XX boards. Each fan=0D= splitter corresponds to 1 PWM output and can connect to multiple fan=0D inputs (MFT devices).=0D In NPCM7XX boards(NPCM750 EVB and Quanta GSJ boards), we initializes=0D these splitters and connect them to their corresponding modules=0D according their specific device trees.=0D =0D Reviewed-by: Doug Evans =0D Reviewed-by: Tyrone Ting =0D Signed-off-by: Hao Wu =0D Reviewed-by: Peter Maydell =0D Message-id: 20210311180855.149764-5-wuhaotsh@google.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 999be4a2d3d156ba38d4620e3dbfc8851943874f=0D https://github.com/qemu/qemu/commit/999be4a2d3d156ba38d4620e3dbfc88= 51943874f=0D Author: Hao Wu =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/npcm7xx_pwm-test.c=0D =0D Log Message:=0D -----------=0D tests/qtest: Test PWM fan RPM using MFT in PWM test=0D =0D This patch adds testing of PWM fan RPMs in the existing npcm7xx pwm=0D test. It tests whether the MFT module can measure correct fan values=0D for a PWM fan in NPCM7XX boards.=0D =0D Reviewed-by: Doug Evans =0D Reviewed-by: Tyrone Ting =0D Signed-off-by: Hao Wu =0D Reviewed-by: Peter Maydell =0D Message-id: 20210311180855.149764-6-wuhaotsh@google.com=0D [PMM: fixed format strings for printing uint64_t]=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 62bdc8c1646fe710c35f34d0b63a2b520807696c=0D https://github.com/qemu/qemu/commit/62bdc8c1646fe710c35f34d0b63a2b5= 20807696c=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pl110.c=0D =0D Log Message:=0D -----------=0D hw/display/pl110: Remove dead code for non-32-bpp surfaces=0D =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel. Remove the legacy dead=0D code from the pl110 display device which was handling the=0D possibility that the console surface was some other format.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-2-peter.maydell@linaro.org=0D =0D =0D Commit: 560ebce6b2c54367e63757567230344c13999dc7=0D https://github.com/qemu/qemu/commit/560ebce6b2c54367e63757567230344= c13999dc7=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pl110.c=0D M hw/display/pl110_template.h=0D =0D Log Message:=0D -----------=0D hw/display/pl110: Pull included-once parts of template header into pl11= 0.c=0D =0D The pl110_template.h header has a doubly-nested multiple-include pattern:= =0D * pl110.c includes it once for each host bit depth (now always 32)=0D * every time it is included, it includes itself 6 times, to account=0D for multiple guest device pixel and byte orders=0D =0D Now we only have to deal with 32-bit host bit depths, we can move the=0D code corresponding to the outer layer of this double-nesting to be=0D directly in pl110.c and reduce the template header to a single layer=0D of nesting.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-3-peter.maydell@linaro.org=0D =0D =0D Commit: ba1c16e425011cf5ad73a07d3fdcf080e08c91e4=0D https://github.com/qemu/qemu/commit/ba1c16e425011cf5ad73a07d3fdcf08= 0e08c91e4=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pl110.c=0D M hw/display/pl110_template.h=0D =0D Log Message:=0D -----------=0D hw/display/pl110: Remove use of BITS from pl110_template.h=0D =0D BITS is always 32, so remove all uses of it from the template header,=0D by dropping the trailing '32' from the draw function names and=0D not constructing the name of rgb_to_pixel32() via the glue() macro.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-4-peter.maydell@linaro.org=0D =0D =0D Commit: e834dfc64c8df1b28b3bf903a6fc231d033e7d5e=0D https://github.com/qemu/qemu/commit/e834dfc64c8df1b28b3bf903a6fc231= d033e7d5e=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pxa2xx_lcd.c=0D =0D Log Message:=0D -----------=0D hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfaces=0D =0D For a long time now the UI layer has guaranteed that the console=0D surface is always 32 bits per pixel. Remove the legacy dead code=0D from the pxa2xx_lcd display device which was handling the possibility=0D that the console surface was some other format.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-5-peter.maydell@linaro.org=0D =0D =0D Commit: 9e53ecdc20c0d94550c7bfde217e63e4362196f3=0D https://github.com/qemu/qemu/commit/9e53ecdc20c0d94550c7bfde217e63e= 4362196f3=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pxa2xx_lcd.c=0D =0D Log Message:=0D -----------=0D hw/display/pxa2xx_lcd: Remove dest_width state field=0D =0D Since the dest_width is now always 4 because the output surface is=0D 32bpp, we can replace the dest_width state field with a constant.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-6-peter.maydell@linaro.org=0D =0D =0D Commit: b48b884fc45cfc1d615ed5d028abbe278992800a=0D https://github.com/qemu/qemu/commit/b48b884fc45cfc1d615ed5d028abbe2= 78992800a=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pxa2xx_template.h=0D =0D Log Message:=0D -----------=0D hw/display/pxa2xx: Remove use of BITS in pxa2xx_template.h=0D =0D Now that BITS is always 32, expand out all its uses in the template=0D header, including removing now-useless uses of the glue() macro.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-7-peter.maydell@linaro.org=0D =0D =0D Commit: 9347e042088430e3bb860692b02fdec6be1ac4da=0D https://github.com/qemu/qemu/commit/9347e042088430e3bb860692b02fdec= 6be1ac4da=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pxa2xx_template.h=0D =0D Log Message:=0D -----------=0D hw/display/pxa2xx: Apply brace-related coding style fixes to template h= eader=0D =0D We're about to move code from the template header into pxa2xx_lcd.c.=0D Before doing that, make coding style fixes so checkpatch doesn't=0D complain about the patch which moves the code. This commit fixes=0D missing braces in the SKIP_PIXEL() macro definition and in if()=0D statements.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-8-peter.maydell@linaro.org=0D =0D =0D Commit: 540817e22f6bf92b68ef894dacccb2a057d3b668=0D https://github.com/qemu/qemu/commit/540817e22f6bf92b68ef894dacccb2a= 057d3b668=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pxa2xx_template.h=0D =0D Log Message:=0D -----------=0D hw/display/pxa2xx: Apply whitespace-only coding style fixes to template= header=0D =0D We're about to move code from the template header into pxa2xx_lcd.c.=0D Before doing that, make coding style fixes so checkpatch doesn't=0D complain about the patch which moves the code. This commit is=0D whitespace changes only:=0D * avoid hard-coded tabs=0D * fix ident on function prototypes=0D * no newline before open brace on array definitions=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-9-peter.maydell@linaro.org=0D =0D =0D Commit: 6500ac13ff8e5c64ca69f5ef5d456028cfda6139=0D https://github.com/qemu/qemu/commit/6500ac13ff8e5c64ca69f5ef5d45602= 8cfda6139=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M hw/display/pxa2xx_lcd.c=0D R hw/display/pxa2xx_template.h=0D =0D Log Message:=0D -----------=0D hw/display/pxa2xx: Inline template header=0D =0D The template header is now included only once; just inline its contents=0D= in hw/display/pxa2xx_lcd.c.=0D =0D Signed-off-by: Peter Maydell =0D Acked-by: Gerd Hoffmann =0D Message-id: 20210211141515.8755-10-peter.maydell@linaro.org=0D =0D =0D Commit: 6f8a81fc296535f73c48cf9563862e088cc71c57=0D https://github.com/qemu/qemu/commit/6f8a81fc296535f73c48cf9563862e0= 88cc71c57=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M accel/kvm/kvm-all.c=0D M docs/system/arm/nuvoton.rst=0D M docs/system/arm/xlnx-versal-virt.rst=0D M hw/arm/npcm7xx.c=0D M hw/arm/npcm7xx_boards.c=0D M hw/arm/smmu-common.c=0D M hw/arm/smmu-internal.h=0D M hw/arm/smmuv3.c=0D M hw/arm/trace-events=0D M hw/arm/virt.c=0D M hw/arm/xlnx-versal.c=0D M hw/display/pl110.c=0D M hw/display/pl110_template.h=0D M hw/display/pxa2xx_lcd.c=0D R hw/display/pxa2xx_template.h=0D M hw/i386/intel_iommu.c=0D M hw/misc/meson.build=0D A hw/misc/npcm7xx_mft.c=0D M hw/misc/npcm7xx_pwm.c=0D M hw/misc/trace-events=0D A hw/misc/xlnx-versal-xramc.c=0D M hw/net/allwinner-sun8i-emac.c=0D M hw/timer/sse-timer.c=0D M hw/virtio/virtio-iommu.c=0D M include/hw/arm/npcm7xx.h=0D M include/hw/arm/xlnx-versal.h=0D M include/hw/boards.h=0D A include/hw/misc/npcm7xx_mft.h=0D M include/hw/misc/npcm7xx_pwm.h=0D A include/hw/misc/xlnx-versal-xramc.h=0D M include/sysemu/dma.h=0D M softmmu/dma-helpers.c=0D M target/arm/kvm.c=0D M target/arm/kvm_arm.h=0D M target/arm/sve_helper.c=0D M target/arm/translate-sve.c=0D M tests/acceptance/boot_linux_console.py=0D M tests/acceptance/replay_kernel.py=0D M tests/qtest/npcm7xx_pwm-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10314' into staging=0D =0D target-arm queue:=0D * versal: Support XRAMs and XRAM controller=0D * smmu: Various minor bug fixes=0D * SVE emulation: fix bugs handling odd vector lengths=0D * allwinner-sun8i-emac: traverse transmit queue using TX_CUR_DESC regist= er value=0D * tests/acceptance: fix orangepi-pc acceptance tests=0D * hw/timer/sse-timer: Propagate eventual error in sse_timer_realize()=0D= * hw/arm/virt: KVM: The IPA lower bound is 32=0D * npcm7xx: support MFT module=0D * pl110, pxa2xx_lcd: tidy up template headers=0D =0D # gpg: Signature made Sun 14 Mar 2021 13:17:43 GMT=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210314: (39 commits)=0D hw/display/pxa2xx: Inline template header=0D hw/display/pxa2xx: Apply whitespace-only coding style fixes to template= header=0D hw/display/pxa2xx: Apply brace-related coding style fixes to template h= eader=0D hw/display/pxa2xx: Remove use of BITS in pxa2xx_template.h=0D hw/display/pxa2xx_lcd: Remove dest_width state field=0D hw/display/pxa2xx_lcd: Remove dead code for non-32-bpp surfaces=0D hw/display/pl110: Remove use of BITS from pl110_template.h=0D hw/display/pl110: Pull included-once parts of template header into pl11= 0.c=0D hw/display/pl110: Remove dead code for non-32-bpp surfaces=0D tests/qtest: Test PWM fan RPM using MFT in PWM test=0D hw/arm: Connect PWM fans in NPCM7XX boards=0D hw/arm: Add MFT device to NPCM7xx Soc=0D hw/misc: Add NPCM7XX MFT Module=0D hw/misc: Add GPIOs for duty in NPCM7xx PWM=0D hw/arm/virt: KVM: The IPA lower bound is 32=0D accel: kvm: Fix kvm_type invocation=0D hw/timer/sse-timer: Propagate eventual error in sse_timer_realize()=0D tests/acceptance: drop ARMBIAN_ARTIFACTS_CACHED condition for orangepi-= pc, cubieboard tests=0D tests/acceptance: update sunxi kernel from armbian to 5.10.16=0D tests/acceptance/boot_linux_console: change URL for test_arm_orangepi_b= ionic_20_08=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/8e6bc6cdc82d...6f8a81fc2965= =0D From MAILER-DAEMON Sun Mar 14 11:19:35 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLSWl-0007Ug-HD for mharc-qemu-commits@gnu.org; Sun, 14 Mar 2021 11:19:35 -0400 Received: from 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Pg6RIZPeGSicfDMjqXWrusAtVD/Rs7YfuEurATz4= Date: Sun, 14 Mar 2021 08:19:26 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] da668a: tests: Move unit tests into a separate directory X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Mar 2021 15:19:35 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: da668aa15b99150a8595c491aee00d5d2426aaf9=0D https://github.com/qemu/qemu/commit/da668aa15b99150a8595c491aee00d5= d2426aaf9=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D R tests/check-block-qdict.c=0D R tests/check-qdict.c=0D R tests/check-qjson.c=0D R tests/check-qlist.c=0D R tests/check-qlit.c=0D R tests/check-qnull.c=0D R tests/check-qnum.c=0D R tests/check-qobject.c=0D R tests/check-qom-interface.c=0D R tests/check-qom-proplist.c=0D R tests/check-qstring.c=0D R tests/crypto-tls-psk-helpers.c=0D R tests/crypto-tls-psk-helpers.h=0D R tests/crypto-tls-x509-helpers.c=0D R tests/crypto-tls-x509-helpers.h=0D R tests/io-channel-helpers.c=0D R tests/io-channel-helpers.h=0D R tests/iothread.c=0D R tests/iothread.h=0D M tests/meson.build=0D R tests/pkix_asn1_tab.c=0D R tests/ptimer-test-stubs.c=0D R tests/ptimer-test.c=0D R tests/ptimer-test.h=0D R tests/rcutorture.c=0D R tests/socket-helpers.c=0D R tests/socket-helpers.h=0D R tests/test-aio-multithread.c=0D R tests/test-aio.c=0D R tests/test-authz-list.c=0D R tests/test-authz-listfile.c=0D R tests/test-authz-pam.c=0D R tests/test-authz-simple.c=0D R tests/test-base64.c=0D R tests/test-bdrv-drain.c=0D R tests/test-bdrv-graph-mod.c=0D R tests/test-bitcnt.c=0D R tests/test-bitmap.c=0D R tests/test-bitops.c=0D R tests/test-block-backend.c=0D R tests/test-block-iothread.c=0D R tests/test-blockjob-txn.c=0D R tests/test-blockjob.c=0D R tests/test-bufferiszero.c=0D R tests/test-char.c=0D R tests/test-clone-visitor.c=0D R tests/test-coroutine.c=0D R tests/test-crypto-afsplit.c=0D R tests/test-crypto-block.c=0D R tests/test-crypto-cipher.c=0D R tests/test-crypto-hash.c=0D R tests/test-crypto-hmac.c=0D R tests/test-crypto-ivgen.c=0D R tests/test-crypto-pbkdf.c=0D R tests/test-crypto-secret.c=0D R tests/test-crypto-tlscredsx509.c=0D R tests/test-crypto-tlssession.c=0D R tests/test-crypto-xts.c=0D R tests/test-cutils.c=0D R tests/test-fdmon-epoll.c=0D R tests/test-hbitmap.c=0D R tests/test-image-locking.c=0D R tests/test-int128.c=0D R tests/test-io-channel-buffer.c=0D R tests/test-io-channel-command.c=0D R tests/test-io-channel-file.c=0D R tests/test-io-channel-socket.c=0D R tests/test-io-channel-tls.c=0D R tests/test-io-task.c=0D R tests/test-iov.c=0D R tests/test-keyval.c=0D R tests/test-logging.c=0D R tests/test-mul64.c=0D R tests/test-opts-visitor.c=0D R tests/test-qapi-util.c=0D R tests/test-qdev-global-props.c=0D R tests/test-qdist.c=0D R tests/test-qemu-opts.c=0D R tests/test-qga.c=0D R tests/test-qgraph.c=0D R tests/test-qht.c=0D R tests/test-qmp-cmds.c=0D R tests/test-qmp-event.c=0D R tests/test-qobject-input-visitor.c=0D R tests/test-qobject-output-visitor.c=0D R tests/test-rcu-list.c=0D R tests/test-rcu-simpleq.c=0D R tests/test-rcu-slist.c=0D R tests/test-rcu-tailq.c=0D R tests/test-replication.c=0D R tests/test-shift128.c=0D R tests/test-string-input-visitor.c=0D R tests/test-string-output-visitor.c=0D R tests/test-thread-pool.c=0D R tests/test-throttle.c=0D R tests/test-timed-average.c=0D R tests/test-util-filemonitor.c=0D R tests/test-util-sockets.c=0D R tests/test-uuid.c=0D R tests/test-visitor-serialization.c=0D R tests/test-vmstate.c=0D R tests/test-write-threshold.c=0D R tests/test-x86-cpuid.c=0D R tests/test-xbzrle.c=0D A tests/unit/check-block-qdict.c=0D A tests/unit/check-qdict.c=0D A tests/unit/check-qjson.c=0D A tests/unit/check-qlist.c=0D A tests/unit/check-qlit.c=0D A tests/unit/check-qnull.c=0D A tests/unit/check-qnum.c=0D A tests/unit/check-qobject.c=0D A tests/unit/check-qom-interface.c=0D A tests/unit/check-qom-proplist.c=0D A tests/unit/check-qstring.c=0D A tests/unit/crypto-tls-psk-helpers.c=0D A tests/unit/crypto-tls-psk-helpers.h=0D A tests/unit/crypto-tls-x509-helpers.c=0D A tests/unit/crypto-tls-x509-helpers.h=0D A tests/unit/io-channel-helpers.c=0D A tests/unit/io-channel-helpers.h=0D A tests/unit/iothread.c=0D A tests/unit/iothread.h=0D A tests/unit/meson.build=0D A tests/unit/pkix_asn1_tab.c=0D A tests/unit/ptimer-test-stubs.c=0D A tests/unit/ptimer-test.c=0D A tests/unit/ptimer-test.h=0D A tests/unit/rcutorture.c=0D A tests/unit/socket-helpers.c=0D A tests/unit/socket-helpers.h=0D A tests/unit/test-aio-multithread.c=0D A tests/unit/test-aio.c=0D A tests/unit/test-authz-list.c=0D A tests/unit/test-authz-listfile.c=0D A tests/unit/test-authz-pam.c=0D A tests/unit/test-authz-simple.c=0D A tests/unit/test-base64.c=0D A tests/unit/test-bdrv-drain.c=0D A tests/unit/test-bdrv-graph-mod.c=0D A tests/unit/test-bitcnt.c=0D A tests/unit/test-bitmap.c=0D A tests/unit/test-bitops.c=0D A tests/unit/test-block-backend.c=0D A tests/unit/test-block-iothread.c=0D A tests/unit/test-blockjob-txn.c=0D A tests/unit/test-blockjob.c=0D A tests/unit/test-bufferiszero.c=0D A tests/unit/test-char.c=0D A tests/unit/test-clone-visitor.c=0D A tests/unit/test-coroutine.c=0D A tests/unit/test-crypto-afsplit.c=0D A tests/unit/test-crypto-block.c=0D A tests/unit/test-crypto-cipher.c=0D A tests/unit/test-crypto-hash.c=0D A tests/unit/test-crypto-hmac.c=0D A tests/unit/test-crypto-ivgen.c=0D A tests/unit/test-crypto-pbkdf.c=0D A tests/unit/test-crypto-secret.c=0D A tests/unit/test-crypto-tlscredsx509.c=0D A tests/unit/test-crypto-tlssession.c=0D A tests/unit/test-crypto-xts.c=0D A tests/unit/test-cutils.c=0D A tests/unit/test-fdmon-epoll.c=0D A tests/unit/test-hbitmap.c=0D A tests/unit/test-image-locking.c=0D A tests/unit/test-int128.c=0D A tests/unit/test-io-channel-buffer.c=0D A tests/unit/test-io-channel-command.c=0D A tests/unit/test-io-channel-file.c=0D A tests/unit/test-io-channel-socket.c=0D A tests/unit/test-io-channel-tls.c=0D A tests/unit/test-io-task.c=0D A tests/unit/test-iov.c=0D A tests/unit/test-keyval.c=0D A tests/unit/test-logging.c=0D A tests/unit/test-mul64.c=0D A tests/unit/test-opts-visitor.c=0D A tests/unit/test-qapi-util.c=0D A tests/unit/test-qdev-global-props.c=0D A tests/unit/test-qdist.c=0D A tests/unit/test-qemu-opts.c=0D A tests/unit/test-qga.c=0D A tests/unit/test-qgraph.c=0D A tests/unit/test-qht.c=0D A tests/unit/test-qmp-cmds.c=0D A tests/unit/test-qmp-event.c=0D A tests/unit/test-qobject-input-visitor.c=0D A tests/unit/test-qobject-output-visitor.c=0D A tests/unit/test-rcu-list.c=0D A tests/unit/test-rcu-simpleq.c=0D A tests/unit/test-rcu-slist.c=0D A tests/unit/test-rcu-tailq.c=0D A tests/unit/test-replication.c=0D A tests/unit/test-shift128.c=0D A tests/unit/test-string-input-visitor.c=0D A tests/unit/test-string-output-visitor.c=0D A tests/unit/test-thread-pool.c=0D A tests/unit/test-throttle.c=0D A tests/unit/test-timed-average.c=0D A tests/unit/test-util-filemonitor.c=0D A tests/unit/test-util-sockets.c=0D A tests/unit/test-uuid.c=0D A tests/unit/test-visitor-serialization.c=0D A tests/unit/test-vmstate.c=0D A tests/unit/test-write-threshold.c=0D A tests/unit/test-x86-cpuid.c=0D A tests/unit/test-xbzrle.c=0D =0D Log Message:=0D -----------=0D tests: Move unit tests into a separate directory=0D =0D The main tests directory still looks very crowded, and it's not=0D clear which files are part of a unit tests and which belong to=0D a different test subsystem. Let's clean up the mess and move the=0D unit tests to a separate directory.=0D =0D Message-Id: <20210310063314.1049838-1-thuth@redhat.com>=0D Acked-by: Paolo Bonzini =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 3b472e71d50fe33f2e0dfdd447dde5910ddf0761=0D https://github.com/qemu/qemu/commit/3b472e71d50fe33f2e0dfdd447dde59= 10ddf0761=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D R tests/atomic64-bench.c=0D R tests/atomic_add-bench.c=0D A tests/bench/atomic64-bench.c=0D A tests/bench/atomic_add-bench.c=0D A tests/bench/benchmark-crypto-cipher.c=0D A tests/bench/benchmark-crypto-hash.c=0D A tests/bench/benchmark-crypto-hmac.c=0D A tests/bench/meson.build=0D A tests/bench/qht-bench.c=0D R tests/benchmark-crypto-cipher.c=0D R tests/benchmark-crypto-hash.c=0D R tests/benchmark-crypto-hmac.c=0D M tests/meson.build=0D R tests/qht-bench.c=0D =0D Log Message:=0D -----------=0D tests: Move benchmarks into a separate folder=0D =0D Make it clear that these files are related to benchmarks by moving=0D them into a new folder called "bench".=0D =0D Message-Id: <20210312092238.79509-1-thuth@redhat.com>=0D Acked-by: Paolo Bonzini =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: dd188e41847ced8f49c9ab6bb392e39456690f63=0D https://github.com/qemu/qemu/commit/dd188e41847ced8f49c9ab6bb392e39= 456690f63=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Move build-tools-and-docs-debian to a better place=0D =0D The "build-tools-and-docs-debian" job had been added in between=0D the "check-system-debian" and the "accepance-system-debian" jobs=0D and thus separates the jobs that belong together. Move it away,=0D to the end of the file, next to the "pages" job that depends on it.=0D And while we're at it, also add a proper "needs:" line to the=0D job so that it can be started as soon as possible instead of always=0D waiting for the previous stage to finish.=0D =0D Message-Id: <20210311142211.1547864-2-thuth@redhat.com>=0D Reviewed-by: Richard Henderson =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 4a859abd1d24fa9eb7f048b82f7b015f9cf6a8c1=0D https://github.com/qemu/qemu/commit/4a859abd1d24fa9eb7f048b82f7b015= f9cf6a8c1=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Add some missing dependencies to the jobs=0D =0D Let's make sure that all jobs have proper "needs:" statements so that=0D they can start as soon as possible, without having to wait for the=0D previous pipeline stage to finish.=0D =0D Message-Id: <20210311142211.1547864-3-thuth@redhat.com>=0D Reviewed-by: Richard Henderson =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 7da153e81873ca5a1037c0c43b5766dfa2357db5=0D https://github.com/qemu/qemu/commit/7da153e81873ca5a1037c0c43b5766d= fa2357db5=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Merge one of the coroutine jobs with the tcg-disabled jo= b=0D =0D Our gitlab-ci got quite slow in the past weeks, due to the immense amount= =0D of jobs that we have, so we should try to reduce the number of jobs.=0D Since we already have a job that builds without TCG, we can merge=0D one of the "build-coroutine" jobs with it to get rid of at least one=0D job.=0D =0D Message-Id: <20210311142211.1547864-4-thuth@redhat.com>=0D Reviewed-by: Richard Henderson =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 342409564ca6fec299cea3cb618156c649748a4c=0D https://github.com/qemu/qemu/commit/342409564ca6fec299cea3cb618156c= 649748a4c=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Merge check-crypto-old jobs into the build-crypto-old jo= bs=0D =0D Both, the build-crypto-old and the check-crypto-old jobs finish reasonabl= y=0D fast, and the build artifacts are only used for the single corresponding=0D= check jobs, so there is no reason for doing the check step in a separate=0D= job here. Thus let's stop wasting artifacts space and job scheduler over-= =0D head by simply merging the test step into the build jobs.=0D =0D Message-Id: <20210311142211.1547864-5-thuth@redhat.com>=0D Reviewed-by: Richard Henderson =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 8e19c0098c290e2dea060eec113c4bf104b1f82c=0D https://github.com/qemu/qemu/commit/8e19c0098c290e2dea060eec113c4bf= 104b1f82c=0D Author: Paolo Bonzini =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/Makefile.include=0D =0D Log Message:=0D -----------=0D tests: remove "make check-speed" in favor of "make bench"=0D =0D "make check-speed" has been broken since the removal of ninja2make=0D last October. It was just a backwards-compatibility alias for=0D "make bench-speed", which in turn is in principle a subset of=0D "make bench". Advertise the latter and drop "make check-speed"=0D completely since no one has noticed.=0D =0D Reported-by: Thomas Huth =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210310164612.285362-1-pbonzini@redhat.com>=0D Reviewed-by: Thomas Huth =0D Reviewed-by: Willian Rampazzo =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 9872ba0a8ab01a9af9f62e780c22edf86e0bc804=0D https://github.com/qemu/qemu/commit/9872ba0a8ab01a9af9f62e780c22edf= 86e0bc804=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: Merge the Gitlab-CI section into the generic CI section=0D= =0D The status of the gitlab-CI files is currently somewhat confusing, and=0D= it is often not quite clear whether a patch should go via my tree or=0D via the testing tree of Alex. That situation has grown historically...=0D= Initially, I was the only one using the gitlab-CI, just for my private=0D= repository there. But in the course of time, the gitlab-CI switched to=0D= use the containers from tests/docker/ (which is not part of the gitlab-CI= =0D section in the MAINTAINERS file), and QEMU now even switched to gitlab.co= m=0D completely for the repository and will soon use it as its gating CI, too,= =0D so it makes way more sense if the gitlab-ci.yml files belong to the peopl= e=0D who are owning the qemu-project on gitlab.com and take care of the gitlab= =0D CI there. Thus let's merge the gitlab-ci section into the common "test an= d=0D build automation" section.=0D =0D And while we're at it, I'm also removing the line with Fam there for now,= =0D since he was hardly active during the last years in this area anymore.=0D= If he ever gets more time for this part again in the future, we surely=0D= can add the line back again. I'm also removing the Patchew URL from this=0D= section now since Patchew's files are not tracked in the main QEMU repo=0D= and it is also not maintained by Alex, Philippe and myself.=0D The maintainers of Patchew are still listed more accurately in the wiki o= n=0D https://wiki.qemu.org/AdminContacts & https://wiki.qemu.org/Testing/CI/Pa= tchew=0D instead.=0D =0D Now to avoid that Alex is listed here in this section alone, Philippe and= =0D I agreed to help as backup maintainers here, too. And Willian volunteered= =0D to be an additional reviewer.=0D =0D Message-Id: <20210309112356.737266-1-thuth@redhat.com>=0D Reviewed-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Willian Rampazzo =0D Acked-by: Wainer dos Santos Moschetta =0D Acked-by: Fam Zheng =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 33bf47291ed575847d7de26b503c50e72f5aa6c3=0D https://github.com/qemu/qemu/commit/33bf47291ed575847d7de26b503c50e= 72f5aa6c3=0D Author: John Snow =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M README.rst=0D =0D Log Message:=0D -----------=0D README: Add Documentation blurb=0D =0D Add it in a prominent place: Right after figuring out what QEMU is,=0D users may wish to know how to use it more than they want to know how to=0D= build their own version of it.=0D =0D Signed-off-by: John Snow =0D Message-Id: <20201104193032.1319248-1-jsnow@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 757acb9a8295e8be4a37b2cfc1cd947e357fd29c=0D https://github.com/qemu/qemu/commit/757acb9a8295e8be4a37b2cfc1cd947= e357fd29c=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D M MAINTAINERS=0D M README.rst=0D M tests/Makefile.include=0D R tests/atomic64-bench.c=0D R tests/atomic_add-bench.c=0D A tests/bench/atomic64-bench.c=0D A tests/bench/atomic_add-bench.c=0D A tests/bench/benchmark-crypto-cipher.c=0D A tests/bench/benchmark-crypto-hash.c=0D A tests/bench/benchmark-crypto-hmac.c=0D A tests/bench/meson.build=0D A tests/bench/qht-bench.c=0D R tests/benchmark-crypto-cipher.c=0D R tests/benchmark-crypto-hash.c=0D R tests/benchmark-crypto-hmac.c=0D R tests/check-block-qdict.c=0D R tests/check-qdict.c=0D R tests/check-qjson.c=0D R tests/check-qlist.c=0D R tests/check-qlit.c=0D R tests/check-qnull.c=0D R tests/check-qnum.c=0D R tests/check-qobject.c=0D R tests/check-qom-interface.c=0D R tests/check-qom-proplist.c=0D R tests/check-qstring.c=0D R tests/crypto-tls-psk-helpers.c=0D R tests/crypto-tls-psk-helpers.h=0D R tests/crypto-tls-x509-helpers.c=0D R tests/crypto-tls-x509-helpers.h=0D R tests/io-channel-helpers.c=0D R tests/io-channel-helpers.h=0D R tests/iothread.c=0D R tests/iothread.h=0D M tests/meson.build=0D R tests/pkix_asn1_tab.c=0D R tests/ptimer-test-stubs.c=0D R tests/ptimer-test.c=0D R tests/ptimer-test.h=0D R tests/qht-bench.c=0D R tests/rcutorture.c=0D R tests/socket-helpers.c=0D R tests/socket-helpers.h=0D R tests/test-aio-multithread.c=0D R tests/test-aio.c=0D R tests/test-authz-list.c=0D R tests/test-authz-listfile.c=0D R tests/test-authz-pam.c=0D R tests/test-authz-simple.c=0D R tests/test-base64.c=0D R tests/test-bdrv-drain.c=0D R tests/test-bdrv-graph-mod.c=0D R tests/test-bitcnt.c=0D R tests/test-bitmap.c=0D R tests/test-bitops.c=0D R tests/test-block-backend.c=0D R tests/test-block-iothread.c=0D R tests/test-blockjob-txn.c=0D R tests/test-blockjob.c=0D R tests/test-bufferiszero.c=0D R tests/test-char.c=0D R tests/test-clone-visitor.c=0D R tests/test-coroutine.c=0D R tests/test-crypto-afsplit.c=0D R tests/test-crypto-block.c=0D R tests/test-crypto-cipher.c=0D R tests/test-crypto-hash.c=0D R tests/test-crypto-hmac.c=0D R tests/test-crypto-ivgen.c=0D R tests/test-crypto-pbkdf.c=0D R tests/test-crypto-secret.c=0D R tests/test-crypto-tlscredsx509.c=0D R tests/test-crypto-tlssession.c=0D R tests/test-crypto-xts.c=0D R tests/test-cutils.c=0D R tests/test-fdmon-epoll.c=0D R tests/test-hbitmap.c=0D R tests/test-image-locking.c=0D R tests/test-int128.c=0D R tests/test-io-channel-buffer.c=0D R tests/test-io-channel-command.c=0D R tests/test-io-channel-file.c=0D R tests/test-io-channel-socket.c=0D R tests/test-io-channel-tls.c=0D R tests/test-io-task.c=0D R tests/test-iov.c=0D R tests/test-keyval.c=0D R tests/test-logging.c=0D R tests/test-mul64.c=0D R tests/test-opts-visitor.c=0D R tests/test-qapi-util.c=0D R tests/test-qdev-global-props.c=0D R tests/test-qdist.c=0D R tests/test-qemu-opts.c=0D R tests/test-qga.c=0D R tests/test-qgraph.c=0D R tests/test-qht.c=0D R tests/test-qmp-cmds.c=0D R tests/test-qmp-event.c=0D R tests/test-qobject-input-visitor.c=0D R tests/test-qobject-output-visitor.c=0D R tests/test-rcu-list.c=0D R tests/test-rcu-simpleq.c=0D R tests/test-rcu-slist.c=0D R tests/test-rcu-tailq.c=0D R tests/test-replication.c=0D R tests/test-shift128.c=0D R tests/test-string-input-visitor.c=0D R tests/test-string-output-visitor.c=0D R tests/test-thread-pool.c=0D R tests/test-throttle.c=0D R tests/test-timed-average.c=0D R tests/test-util-filemonitor.c=0D R tests/test-util-sockets.c=0D R tests/test-uuid.c=0D R tests/test-visitor-serialization.c=0D R tests/test-vmstate.c=0D R tests/test-write-threshold.c=0D R tests/test-x86-cpuid.c=0D R tests/test-xbzrle.c=0D A tests/unit/check-block-qdict.c=0D A tests/unit/check-qdict.c=0D A tests/unit/check-qjson.c=0D A tests/unit/check-qlist.c=0D A tests/unit/check-qlit.c=0D A tests/unit/check-qnull.c=0D A tests/unit/check-qnum.c=0D A tests/unit/check-qobject.c=0D A tests/unit/check-qom-interface.c=0D A tests/unit/check-qom-proplist.c=0D A tests/unit/check-qstring.c=0D A tests/unit/crypto-tls-psk-helpers.c=0D A tests/unit/crypto-tls-psk-helpers.h=0D A tests/unit/crypto-tls-x509-helpers.c=0D A tests/unit/crypto-tls-x509-helpers.h=0D A tests/unit/io-channel-helpers.c=0D A tests/unit/io-channel-helpers.h=0D A tests/unit/iothread.c=0D A tests/unit/iothread.h=0D A tests/unit/meson.build=0D A tests/unit/pkix_asn1_tab.c=0D A tests/unit/ptimer-test-stubs.c=0D A tests/unit/ptimer-test.c=0D A tests/unit/ptimer-test.h=0D A tests/unit/rcutorture.c=0D A tests/unit/socket-helpers.c=0D A tests/unit/socket-helpers.h=0D A tests/unit/test-aio-multithread.c=0D A tests/unit/test-aio.c=0D A tests/unit/test-authz-list.c=0D A tests/unit/test-authz-listfile.c=0D A tests/unit/test-authz-pam.c=0D A tests/unit/test-authz-simple.c=0D A tests/unit/test-base64.c=0D A tests/unit/test-bdrv-drain.c=0D A tests/unit/test-bdrv-graph-mod.c=0D A tests/unit/test-bitcnt.c=0D A tests/unit/test-bitmap.c=0D A tests/unit/test-bitops.c=0D A tests/unit/test-block-backend.c=0D A tests/unit/test-block-iothread.c=0D A tests/unit/test-blockjob-txn.c=0D A tests/unit/test-blockjob.c=0D A tests/unit/test-bufferiszero.c=0D A tests/unit/test-char.c=0D A tests/unit/test-clone-visitor.c=0D A tests/unit/test-coroutine.c=0D A tests/unit/test-crypto-afsplit.c=0D A tests/unit/test-crypto-block.c=0D A tests/unit/test-crypto-cipher.c=0D A tests/unit/test-crypto-hash.c=0D A tests/unit/test-crypto-hmac.c=0D A tests/unit/test-crypto-ivgen.c=0D A tests/unit/test-crypto-pbkdf.c=0D A tests/unit/test-crypto-secret.c=0D A tests/unit/test-crypto-tlscredsx509.c=0D A tests/unit/test-crypto-tlssession.c=0D A tests/unit/test-crypto-xts.c=0D A tests/unit/test-cutils.c=0D A tests/unit/test-fdmon-epoll.c=0D A tests/unit/test-hbitmap.c=0D A tests/unit/test-image-locking.c=0D A tests/unit/test-int128.c=0D A tests/unit/test-io-channel-buffer.c=0D A tests/unit/test-io-channel-command.c=0D A tests/unit/test-io-channel-file.c=0D A tests/unit/test-io-channel-socket.c=0D A tests/unit/test-io-channel-tls.c=0D A tests/unit/test-io-task.c=0D A tests/unit/test-iov.c=0D A tests/unit/test-keyval.c=0D A tests/unit/test-logging.c=0D A tests/unit/test-mul64.c=0D A tests/unit/test-opts-visitor.c=0D A tests/unit/test-qapi-util.c=0D A tests/unit/test-qdev-global-props.c=0D A tests/unit/test-qdist.c=0D A tests/unit/test-qemu-opts.c=0D A tests/unit/test-qga.c=0D A tests/unit/test-qgraph.c=0D A tests/unit/test-qht.c=0D A tests/unit/test-qmp-cmds.c=0D A tests/unit/test-qmp-event.c=0D A tests/unit/test-qobject-input-visitor.c=0D A tests/unit/test-qobject-output-visitor.c=0D A tests/unit/test-rcu-list.c=0D A tests/unit/test-rcu-simpleq.c=0D A tests/unit/test-rcu-slist.c=0D A tests/unit/test-rcu-tailq.c=0D A tests/unit/test-replication.c=0D A tests/unit/test-shift128.c=0D A tests/unit/test-string-input-visitor.c=0D A tests/unit/test-string-output-visitor.c=0D A tests/unit/test-thread-pool.c=0D A tests/unit/test-throttle.c=0D A tests/unit/test-timed-average.c=0D A tests/unit/test-util-filemonitor.c=0D A tests/unit/test-util-sockets.c=0D A tests/unit/test-uuid.c=0D A tests/unit/test-visitor-serialization.c=0D A tests/unit/test-vmstate.c=0D A tests/unit/test-write-threshold.c=0D A tests/unit/test-x86-cpuid.c=0D A tests/unit/test-xbzrle.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-20= 21-03-12' into staging=0D =0D * Move unit and bench tests into separate directories=0D * Clean-up and improve gitlab-ci jobs=0D * Drop the non-working "check-speed" makefile target=0D * Minor documentation updates=0D =0D # gpg: Signature made Fri 12 Mar 2021 17:18:45 GMT=0D # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702= DB5=0D # gpg: issuer "thuth@redhat.com"=0D # gpg: Good signature from "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [unknown]=0D= # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 = 2DB5=0D =0D * remotes/thuth-gitlab/tags/pull-request-2021-03-12:=0D README: Add Documentation blurb=0D MAINTAINERS: Merge the Gitlab-CI section into the generic CI section=0D= tests: remove "make check-speed" in favor of "make bench"=0D gitlab-ci.yml: Merge check-crypto-old jobs into the build-crypto-old jo= bs=0D gitlab-ci.yml: Merge one of the coroutine jobs with the tcg-disabled jo= b=0D gitlab-ci.yml: Add some missing dependencies to the jobs=0D gitlab-ci.yml: Move build-tools-and-docs-debian to a better place=0D tests: Move benchmarks into a separate folder=0D tests: Move unit tests into a separate directory=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/6f8a81fc2965...757acb9a8295= =0D From MAILER-DAEMON Sun Mar 14 13:47:58 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLUqM-0003O8-5U for mharc-qemu-commits@gnu.org; Sun, 14 Mar 2021 13:47:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46554) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLUqJ-0003Nq-5k for qemu-commits@nongnu.org; Sun, 14 Mar 2021 13:47:56 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:35965 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLUqF-0005US-Fx for qemu-commits@nongnu.org; Sun, 14 Mar 2021 13:47:54 -0400 Received: from github.com (hubbernetes-node-34872bc.va3-iad.github.net [10.48.111.61]) by smtp.github.com (Postfix) with ESMTPA id D46A15C005C for ; Sun, 14 Mar 2021 10:47:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615744070; bh=gRNrTM6iYo3uXP6bg0/F3pfKJ4QMWNh9oC3Ke3aBeqs=; h=Date:From:To:Subject:From; b=imGcZWbPh6tbE7yhaCeRC8HDascoPSwXE/tXAlPeEAsB8e98/hIPjtJSzv/LvacqQ qjUz02pBuDja6eWNTXyGaUslHNaomJsHN6cZddxovVRULkWxCqw5eBwOA4tSu4T6Ze gox5jqZ5+lIMCs98FySdnL7oOY0PY8TR2SKErjv8= Date: Sun, 14 Mar 2021 10:47:50 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] da668a: tests: Move unit tests into a separate directory X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Mar 2021 17:47:56 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: da668aa15b99150a8595c491aee00d5d2426aaf9=0D https://github.com/qemu/qemu/commit/da668aa15b99150a8595c491aee00d5= d2426aaf9=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D R tests/check-block-qdict.c=0D R tests/check-qdict.c=0D R tests/check-qjson.c=0D R tests/check-qlist.c=0D R tests/check-qlit.c=0D R tests/check-qnull.c=0D R tests/check-qnum.c=0D R tests/check-qobject.c=0D R tests/check-qom-interface.c=0D R tests/check-qom-proplist.c=0D R tests/check-qstring.c=0D R tests/crypto-tls-psk-helpers.c=0D R tests/crypto-tls-psk-helpers.h=0D R tests/crypto-tls-x509-helpers.c=0D R tests/crypto-tls-x509-helpers.h=0D R tests/io-channel-helpers.c=0D R tests/io-channel-helpers.h=0D R tests/iothread.c=0D R tests/iothread.h=0D M tests/meson.build=0D R tests/pkix_asn1_tab.c=0D R tests/ptimer-test-stubs.c=0D R tests/ptimer-test.c=0D R tests/ptimer-test.h=0D R tests/rcutorture.c=0D R tests/socket-helpers.c=0D R tests/socket-helpers.h=0D R tests/test-aio-multithread.c=0D R tests/test-aio.c=0D R tests/test-authz-list.c=0D R tests/test-authz-listfile.c=0D R tests/test-authz-pam.c=0D R tests/test-authz-simple.c=0D R tests/test-base64.c=0D R tests/test-bdrv-drain.c=0D R tests/test-bdrv-graph-mod.c=0D R tests/test-bitcnt.c=0D R tests/test-bitmap.c=0D R tests/test-bitops.c=0D R tests/test-block-backend.c=0D R tests/test-block-iothread.c=0D R tests/test-blockjob-txn.c=0D R tests/test-blockjob.c=0D R tests/test-bufferiszero.c=0D R tests/test-char.c=0D R tests/test-clone-visitor.c=0D R tests/test-coroutine.c=0D R tests/test-crypto-afsplit.c=0D R tests/test-crypto-block.c=0D R tests/test-crypto-cipher.c=0D R tests/test-crypto-hash.c=0D R tests/test-crypto-hmac.c=0D R tests/test-crypto-ivgen.c=0D R tests/test-crypto-pbkdf.c=0D R tests/test-crypto-secret.c=0D R tests/test-crypto-tlscredsx509.c=0D R tests/test-crypto-tlssession.c=0D R tests/test-crypto-xts.c=0D R tests/test-cutils.c=0D R tests/test-fdmon-epoll.c=0D R tests/test-hbitmap.c=0D R tests/test-image-locking.c=0D R tests/test-int128.c=0D R tests/test-io-channel-buffer.c=0D R tests/test-io-channel-command.c=0D R tests/test-io-channel-file.c=0D R tests/test-io-channel-socket.c=0D R tests/test-io-channel-tls.c=0D R tests/test-io-task.c=0D R tests/test-iov.c=0D R tests/test-keyval.c=0D R tests/test-logging.c=0D R tests/test-mul64.c=0D R tests/test-opts-visitor.c=0D R tests/test-qapi-util.c=0D R tests/test-qdev-global-props.c=0D R tests/test-qdist.c=0D R tests/test-qemu-opts.c=0D R tests/test-qga.c=0D R tests/test-qgraph.c=0D R tests/test-qht.c=0D R tests/test-qmp-cmds.c=0D R tests/test-qmp-event.c=0D R tests/test-qobject-input-visitor.c=0D R tests/test-qobject-output-visitor.c=0D R tests/test-rcu-list.c=0D R tests/test-rcu-simpleq.c=0D R tests/test-rcu-slist.c=0D R tests/test-rcu-tailq.c=0D R tests/test-replication.c=0D R tests/test-shift128.c=0D R tests/test-string-input-visitor.c=0D R tests/test-string-output-visitor.c=0D R tests/test-thread-pool.c=0D R tests/test-throttle.c=0D R tests/test-timed-average.c=0D R tests/test-util-filemonitor.c=0D R tests/test-util-sockets.c=0D R tests/test-uuid.c=0D R tests/test-visitor-serialization.c=0D R tests/test-vmstate.c=0D R tests/test-write-threshold.c=0D R tests/test-x86-cpuid.c=0D R tests/test-xbzrle.c=0D A tests/unit/check-block-qdict.c=0D A tests/unit/check-qdict.c=0D A tests/unit/check-qjson.c=0D A tests/unit/check-qlist.c=0D A tests/unit/check-qlit.c=0D A tests/unit/check-qnull.c=0D A tests/unit/check-qnum.c=0D A tests/unit/check-qobject.c=0D A tests/unit/check-qom-interface.c=0D A tests/unit/check-qom-proplist.c=0D A tests/unit/check-qstring.c=0D A tests/unit/crypto-tls-psk-helpers.c=0D A tests/unit/crypto-tls-psk-helpers.h=0D A tests/unit/crypto-tls-x509-helpers.c=0D A tests/unit/crypto-tls-x509-helpers.h=0D A tests/unit/io-channel-helpers.c=0D A tests/unit/io-channel-helpers.h=0D A tests/unit/iothread.c=0D A tests/unit/iothread.h=0D A tests/unit/meson.build=0D A tests/unit/pkix_asn1_tab.c=0D A tests/unit/ptimer-test-stubs.c=0D A tests/unit/ptimer-test.c=0D A tests/unit/ptimer-test.h=0D A tests/unit/rcutorture.c=0D A tests/unit/socket-helpers.c=0D A tests/unit/socket-helpers.h=0D A tests/unit/test-aio-multithread.c=0D A tests/unit/test-aio.c=0D A tests/unit/test-authz-list.c=0D A tests/unit/test-authz-listfile.c=0D A tests/unit/test-authz-pam.c=0D A tests/unit/test-authz-simple.c=0D A tests/unit/test-base64.c=0D A tests/unit/test-bdrv-drain.c=0D A tests/unit/test-bdrv-graph-mod.c=0D A tests/unit/test-bitcnt.c=0D A tests/unit/test-bitmap.c=0D A tests/unit/test-bitops.c=0D A tests/unit/test-block-backend.c=0D A tests/unit/test-block-iothread.c=0D A tests/unit/test-blockjob-txn.c=0D A tests/unit/test-blockjob.c=0D A tests/unit/test-bufferiszero.c=0D A tests/unit/test-char.c=0D A tests/unit/test-clone-visitor.c=0D A tests/unit/test-coroutine.c=0D A tests/unit/test-crypto-afsplit.c=0D A tests/unit/test-crypto-block.c=0D A tests/unit/test-crypto-cipher.c=0D A tests/unit/test-crypto-hash.c=0D A tests/unit/test-crypto-hmac.c=0D A tests/unit/test-crypto-ivgen.c=0D A tests/unit/test-crypto-pbkdf.c=0D A tests/unit/test-crypto-secret.c=0D A tests/unit/test-crypto-tlscredsx509.c=0D A tests/unit/test-crypto-tlssession.c=0D A tests/unit/test-crypto-xts.c=0D A tests/unit/test-cutils.c=0D A tests/unit/test-fdmon-epoll.c=0D A tests/unit/test-hbitmap.c=0D A tests/unit/test-image-locking.c=0D A tests/unit/test-int128.c=0D A tests/unit/test-io-channel-buffer.c=0D A tests/unit/test-io-channel-command.c=0D A tests/unit/test-io-channel-file.c=0D A tests/unit/test-io-channel-socket.c=0D A tests/unit/test-io-channel-tls.c=0D A tests/unit/test-io-task.c=0D A tests/unit/test-iov.c=0D A tests/unit/test-keyval.c=0D A tests/unit/test-logging.c=0D A tests/unit/test-mul64.c=0D A tests/unit/test-opts-visitor.c=0D A tests/unit/test-qapi-util.c=0D A tests/unit/test-qdev-global-props.c=0D A tests/unit/test-qdist.c=0D A tests/unit/test-qemu-opts.c=0D A tests/unit/test-qga.c=0D A tests/unit/test-qgraph.c=0D A tests/unit/test-qht.c=0D A tests/unit/test-qmp-cmds.c=0D A tests/unit/test-qmp-event.c=0D A tests/unit/test-qobject-input-visitor.c=0D A tests/unit/test-qobject-output-visitor.c=0D A tests/unit/test-rcu-list.c=0D A tests/unit/test-rcu-simpleq.c=0D A tests/unit/test-rcu-slist.c=0D A tests/unit/test-rcu-tailq.c=0D A tests/unit/test-replication.c=0D A tests/unit/test-shift128.c=0D A tests/unit/test-string-input-visitor.c=0D A tests/unit/test-string-output-visitor.c=0D A tests/unit/test-thread-pool.c=0D A tests/unit/test-throttle.c=0D A tests/unit/test-timed-average.c=0D A tests/unit/test-util-filemonitor.c=0D A tests/unit/test-util-sockets.c=0D A tests/unit/test-uuid.c=0D A tests/unit/test-visitor-serialization.c=0D A tests/unit/test-vmstate.c=0D A tests/unit/test-write-threshold.c=0D A tests/unit/test-x86-cpuid.c=0D A tests/unit/test-xbzrle.c=0D =0D Log Message:=0D -----------=0D tests: Move unit tests into a separate directory=0D =0D The main tests directory still looks very crowded, and it's not=0D clear which files are part of a unit tests and which belong to=0D a different test subsystem. Let's clean up the mess and move the=0D unit tests to a separate directory.=0D =0D Message-Id: <20210310063314.1049838-1-thuth@redhat.com>=0D Acked-by: Paolo Bonzini =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 3b472e71d50fe33f2e0dfdd447dde5910ddf0761=0D https://github.com/qemu/qemu/commit/3b472e71d50fe33f2e0dfdd447dde59= 10ddf0761=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D R tests/atomic64-bench.c=0D R tests/atomic_add-bench.c=0D A tests/bench/atomic64-bench.c=0D A tests/bench/atomic_add-bench.c=0D A tests/bench/benchmark-crypto-cipher.c=0D A tests/bench/benchmark-crypto-hash.c=0D A tests/bench/benchmark-crypto-hmac.c=0D A tests/bench/meson.build=0D A tests/bench/qht-bench.c=0D R tests/benchmark-crypto-cipher.c=0D R tests/benchmark-crypto-hash.c=0D R tests/benchmark-crypto-hmac.c=0D M tests/meson.build=0D R tests/qht-bench.c=0D =0D Log Message:=0D -----------=0D tests: Move benchmarks into a separate folder=0D =0D Make it clear that these files are related to benchmarks by moving=0D them into a new folder called "bench".=0D =0D Message-Id: <20210312092238.79509-1-thuth@redhat.com>=0D Acked-by: Paolo Bonzini =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: dd188e41847ced8f49c9ab6bb392e39456690f63=0D https://github.com/qemu/qemu/commit/dd188e41847ced8f49c9ab6bb392e39= 456690f63=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Move build-tools-and-docs-debian to a better place=0D =0D The "build-tools-and-docs-debian" job had been added in between=0D the "check-system-debian" and the "accepance-system-debian" jobs=0D and thus separates the jobs that belong together. Move it away,=0D to the end of the file, next to the "pages" job that depends on it.=0D And while we're at it, also add a proper "needs:" line to the=0D job so that it can be started as soon as possible instead of always=0D waiting for the previous stage to finish.=0D =0D Message-Id: <20210311142211.1547864-2-thuth@redhat.com>=0D Reviewed-by: Richard Henderson =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 4a859abd1d24fa9eb7f048b82f7b015f9cf6a8c1=0D https://github.com/qemu/qemu/commit/4a859abd1d24fa9eb7f048b82f7b015= f9cf6a8c1=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Add some missing dependencies to the jobs=0D =0D Let's make sure that all jobs have proper "needs:" statements so that=0D they can start as soon as possible, without having to wait for the=0D previous pipeline stage to finish.=0D =0D Message-Id: <20210311142211.1547864-3-thuth@redhat.com>=0D Reviewed-by: Richard Henderson =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 7da153e81873ca5a1037c0c43b5766dfa2357db5=0D https://github.com/qemu/qemu/commit/7da153e81873ca5a1037c0c43b5766d= fa2357db5=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Merge one of the coroutine jobs with the tcg-disabled jo= b=0D =0D Our gitlab-ci got quite slow in the past weeks, due to the immense amount= =0D of jobs that we have, so we should try to reduce the number of jobs.=0D Since we already have a job that builds without TCG, we can merge=0D one of the "build-coroutine" jobs with it to get rid of at least one=0D job.=0D =0D Message-Id: <20210311142211.1547864-4-thuth@redhat.com>=0D Reviewed-by: Richard Henderson =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 342409564ca6fec299cea3cb618156c649748a4c=0D https://github.com/qemu/qemu/commit/342409564ca6fec299cea3cb618156c= 649748a4c=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Merge check-crypto-old jobs into the build-crypto-old jo= bs=0D =0D Both, the build-crypto-old and the check-crypto-old jobs finish reasonabl= y=0D fast, and the build artifacts are only used for the single corresponding=0D= check jobs, so there is no reason for doing the check step in a separate=0D= job here. Thus let's stop wasting artifacts space and job scheduler over-= =0D head by simply merging the test step into the build jobs.=0D =0D Message-Id: <20210311142211.1547864-5-thuth@redhat.com>=0D Reviewed-by: Richard Henderson =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 8e19c0098c290e2dea060eec113c4bf104b1f82c=0D https://github.com/qemu/qemu/commit/8e19c0098c290e2dea060eec113c4bf= 104b1f82c=0D Author: Paolo Bonzini =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M tests/Makefile.include=0D =0D Log Message:=0D -----------=0D tests: remove "make check-speed" in favor of "make bench"=0D =0D "make check-speed" has been broken since the removal of ninja2make=0D last October. It was just a backwards-compatibility alias for=0D "make bench-speed", which in turn is in principle a subset of=0D "make bench". Advertise the latter and drop "make check-speed"=0D completely since no one has noticed.=0D =0D Reported-by: Thomas Huth =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210310164612.285362-1-pbonzini@redhat.com>=0D Reviewed-by: Thomas Huth =0D Reviewed-by: Willian Rampazzo =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 9872ba0a8ab01a9af9f62e780c22edf86e0bc804=0D https://github.com/qemu/qemu/commit/9872ba0a8ab01a9af9f62e780c22edf= 86e0bc804=0D Author: Thomas Huth =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: Merge the Gitlab-CI section into the generic CI section=0D= =0D The status of the gitlab-CI files is currently somewhat confusing, and=0D= it is often not quite clear whether a patch should go via my tree or=0D via the testing tree of Alex. That situation has grown historically...=0D= Initially, I was the only one using the gitlab-CI, just for my private=0D= repository there. But in the course of time, the gitlab-CI switched to=0D= use the containers from tests/docker/ (which is not part of the gitlab-CI= =0D section in the MAINTAINERS file), and QEMU now even switched to gitlab.co= m=0D completely for the repository and will soon use it as its gating CI, too,= =0D so it makes way more sense if the gitlab-ci.yml files belong to the peopl= e=0D who are owning the qemu-project on gitlab.com and take care of the gitlab= =0D CI there. Thus let's merge the gitlab-ci section into the common "test an= d=0D build automation" section.=0D =0D And while we're at it, I'm also removing the line with Fam there for now,= =0D since he was hardly active during the last years in this area anymore.=0D= If he ever gets more time for this part again in the future, we surely=0D= can add the line back again. I'm also removing the Patchew URL from this=0D= section now since Patchew's files are not tracked in the main QEMU repo=0D= and it is also not maintained by Alex, Philippe and myself.=0D The maintainers of Patchew are still listed more accurately in the wiki o= n=0D https://wiki.qemu.org/AdminContacts & https://wiki.qemu.org/Testing/CI/Pa= tchew=0D instead.=0D =0D Now to avoid that Alex is listed here in this section alone, Philippe and= =0D I agreed to help as backup maintainers here, too. And Willian volunteered= =0D to be an additional reviewer.=0D =0D Message-Id: <20210309112356.737266-1-thuth@redhat.com>=0D Reviewed-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Willian Rampazzo =0D Acked-by: Wainer dos Santos Moschetta =0D Acked-by: Fam Zheng =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 33bf47291ed575847d7de26b503c50e72f5aa6c3=0D https://github.com/qemu/qemu/commit/33bf47291ed575847d7de26b503c50e= 72f5aa6c3=0D Author: John Snow =0D Date: 2021-03-12 (Fri, 12 Mar 2021)=0D =0D Changed paths:=0D M README.rst=0D =0D Log Message:=0D -----------=0D README: Add Documentation blurb=0D =0D Add it in a prominent place: Right after figuring out what QEMU is,=0D users may wish to know how to use it more than they want to know how to=0D= build their own version of it.=0D =0D Signed-off-by: John Snow =0D Message-Id: <20201104193032.1319248-1-jsnow@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 757acb9a8295e8be4a37b2cfc1cd947e357fd29c=0D https://github.com/qemu/qemu/commit/757acb9a8295e8be4a37b2cfc1cd947= e357fd29c=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D M MAINTAINERS=0D M README.rst=0D M tests/Makefile.include=0D R tests/atomic64-bench.c=0D R tests/atomic_add-bench.c=0D A tests/bench/atomic64-bench.c=0D A tests/bench/atomic_add-bench.c=0D A tests/bench/benchmark-crypto-cipher.c=0D A tests/bench/benchmark-crypto-hash.c=0D A tests/bench/benchmark-crypto-hmac.c=0D A tests/bench/meson.build=0D A tests/bench/qht-bench.c=0D R tests/benchmark-crypto-cipher.c=0D R tests/benchmark-crypto-hash.c=0D R tests/benchmark-crypto-hmac.c=0D R tests/check-block-qdict.c=0D R tests/check-qdict.c=0D R tests/check-qjson.c=0D R tests/check-qlist.c=0D R tests/check-qlit.c=0D R tests/check-qnull.c=0D R tests/check-qnum.c=0D R tests/check-qobject.c=0D R tests/check-qom-interface.c=0D R tests/check-qom-proplist.c=0D R tests/check-qstring.c=0D R tests/crypto-tls-psk-helpers.c=0D R tests/crypto-tls-psk-helpers.h=0D R tests/crypto-tls-x509-helpers.c=0D R tests/crypto-tls-x509-helpers.h=0D R tests/io-channel-helpers.c=0D R tests/io-channel-helpers.h=0D R tests/iothread.c=0D R tests/iothread.h=0D M tests/meson.build=0D R tests/pkix_asn1_tab.c=0D R tests/ptimer-test-stubs.c=0D R tests/ptimer-test.c=0D R tests/ptimer-test.h=0D R tests/qht-bench.c=0D R tests/rcutorture.c=0D R tests/socket-helpers.c=0D R tests/socket-helpers.h=0D R tests/test-aio-multithread.c=0D R tests/test-aio.c=0D R tests/test-authz-list.c=0D R tests/test-authz-listfile.c=0D R tests/test-authz-pam.c=0D R tests/test-authz-simple.c=0D R tests/test-base64.c=0D R tests/test-bdrv-drain.c=0D R tests/test-bdrv-graph-mod.c=0D R tests/test-bitcnt.c=0D R tests/test-bitmap.c=0D R tests/test-bitops.c=0D R tests/test-block-backend.c=0D R tests/test-block-iothread.c=0D R tests/test-blockjob-txn.c=0D R tests/test-blockjob.c=0D R tests/test-bufferiszero.c=0D R tests/test-char.c=0D R tests/test-clone-visitor.c=0D R tests/test-coroutine.c=0D R tests/test-crypto-afsplit.c=0D R tests/test-crypto-block.c=0D R tests/test-crypto-cipher.c=0D R tests/test-crypto-hash.c=0D R tests/test-crypto-hmac.c=0D R tests/test-crypto-ivgen.c=0D R tests/test-crypto-pbkdf.c=0D R tests/test-crypto-secret.c=0D R tests/test-crypto-tlscredsx509.c=0D R tests/test-crypto-tlssession.c=0D R tests/test-crypto-xts.c=0D R tests/test-cutils.c=0D R tests/test-fdmon-epoll.c=0D R tests/test-hbitmap.c=0D R tests/test-image-locking.c=0D R tests/test-int128.c=0D R tests/test-io-channel-buffer.c=0D R tests/test-io-channel-command.c=0D R tests/test-io-channel-file.c=0D R tests/test-io-channel-socket.c=0D R tests/test-io-channel-tls.c=0D R tests/test-io-task.c=0D R tests/test-iov.c=0D R tests/test-keyval.c=0D R tests/test-logging.c=0D R tests/test-mul64.c=0D R tests/test-opts-visitor.c=0D R tests/test-qapi-util.c=0D R tests/test-qdev-global-props.c=0D R tests/test-qdist.c=0D R tests/test-qemu-opts.c=0D R tests/test-qga.c=0D R tests/test-qgraph.c=0D R tests/test-qht.c=0D R tests/test-qmp-cmds.c=0D R tests/test-qmp-event.c=0D R tests/test-qobject-input-visitor.c=0D R tests/test-qobject-output-visitor.c=0D R tests/test-rcu-list.c=0D R tests/test-rcu-simpleq.c=0D R tests/test-rcu-slist.c=0D R tests/test-rcu-tailq.c=0D R tests/test-replication.c=0D R tests/test-shift128.c=0D R tests/test-string-input-visitor.c=0D R tests/test-string-output-visitor.c=0D R tests/test-thread-pool.c=0D R tests/test-throttle.c=0D R tests/test-timed-average.c=0D R tests/test-util-filemonitor.c=0D R tests/test-util-sockets.c=0D R tests/test-uuid.c=0D R tests/test-visitor-serialization.c=0D R tests/test-vmstate.c=0D R tests/test-write-threshold.c=0D R tests/test-x86-cpuid.c=0D R tests/test-xbzrle.c=0D A tests/unit/check-block-qdict.c=0D A tests/unit/check-qdict.c=0D A tests/unit/check-qjson.c=0D A tests/unit/check-qlist.c=0D A tests/unit/check-qlit.c=0D A tests/unit/check-qnull.c=0D A tests/unit/check-qnum.c=0D A tests/unit/check-qobject.c=0D A tests/unit/check-qom-interface.c=0D A tests/unit/check-qom-proplist.c=0D A tests/unit/check-qstring.c=0D A tests/unit/crypto-tls-psk-helpers.c=0D A tests/unit/crypto-tls-psk-helpers.h=0D A tests/unit/crypto-tls-x509-helpers.c=0D A tests/unit/crypto-tls-x509-helpers.h=0D A tests/unit/io-channel-helpers.c=0D A tests/unit/io-channel-helpers.h=0D A tests/unit/iothread.c=0D A tests/unit/iothread.h=0D A tests/unit/meson.build=0D A tests/unit/pkix_asn1_tab.c=0D A tests/unit/ptimer-test-stubs.c=0D A tests/unit/ptimer-test.c=0D A tests/unit/ptimer-test.h=0D A tests/unit/rcutorture.c=0D A tests/unit/socket-helpers.c=0D A tests/unit/socket-helpers.h=0D A tests/unit/test-aio-multithread.c=0D A tests/unit/test-aio.c=0D A tests/unit/test-authz-list.c=0D A tests/unit/test-authz-listfile.c=0D A tests/unit/test-authz-pam.c=0D A tests/unit/test-authz-simple.c=0D A tests/unit/test-base64.c=0D A tests/unit/test-bdrv-drain.c=0D A tests/unit/test-bdrv-graph-mod.c=0D A tests/unit/test-bitcnt.c=0D A tests/unit/test-bitmap.c=0D A tests/unit/test-bitops.c=0D A tests/unit/test-block-backend.c=0D A tests/unit/test-block-iothread.c=0D A tests/unit/test-blockjob-txn.c=0D A tests/unit/test-blockjob.c=0D A tests/unit/test-bufferiszero.c=0D A tests/unit/test-char.c=0D A tests/unit/test-clone-visitor.c=0D A tests/unit/test-coroutine.c=0D A tests/unit/test-crypto-afsplit.c=0D A tests/unit/test-crypto-block.c=0D A tests/unit/test-crypto-cipher.c=0D A tests/unit/test-crypto-hash.c=0D A tests/unit/test-crypto-hmac.c=0D A tests/unit/test-crypto-ivgen.c=0D A tests/unit/test-crypto-pbkdf.c=0D A tests/unit/test-crypto-secret.c=0D A tests/unit/test-crypto-tlscredsx509.c=0D A tests/unit/test-crypto-tlssession.c=0D A tests/unit/test-crypto-xts.c=0D A tests/unit/test-cutils.c=0D A tests/unit/test-fdmon-epoll.c=0D A tests/unit/test-hbitmap.c=0D A tests/unit/test-image-locking.c=0D A tests/unit/test-int128.c=0D A tests/unit/test-io-channel-buffer.c=0D A tests/unit/test-io-channel-command.c=0D A tests/unit/test-io-channel-file.c=0D A tests/unit/test-io-channel-socket.c=0D A tests/unit/test-io-channel-tls.c=0D A tests/unit/test-io-task.c=0D A tests/unit/test-iov.c=0D A tests/unit/test-keyval.c=0D A tests/unit/test-logging.c=0D A tests/unit/test-mul64.c=0D A tests/unit/test-opts-visitor.c=0D A tests/unit/test-qapi-util.c=0D A tests/unit/test-qdev-global-props.c=0D A tests/unit/test-qdist.c=0D A tests/unit/test-qemu-opts.c=0D A tests/unit/test-qga.c=0D A tests/unit/test-qgraph.c=0D A tests/unit/test-qht.c=0D A tests/unit/test-qmp-cmds.c=0D A tests/unit/test-qmp-event.c=0D A tests/unit/test-qobject-input-visitor.c=0D A tests/unit/test-qobject-output-visitor.c=0D A tests/unit/test-rcu-list.c=0D A tests/unit/test-rcu-simpleq.c=0D A tests/unit/test-rcu-slist.c=0D A tests/unit/test-rcu-tailq.c=0D A tests/unit/test-replication.c=0D A tests/unit/test-shift128.c=0D A tests/unit/test-string-input-visitor.c=0D A tests/unit/test-string-output-visitor.c=0D A tests/unit/test-thread-pool.c=0D A tests/unit/test-throttle.c=0D A tests/unit/test-timed-average.c=0D A tests/unit/test-util-filemonitor.c=0D A tests/unit/test-util-sockets.c=0D A tests/unit/test-uuid.c=0D A tests/unit/test-visitor-serialization.c=0D A tests/unit/test-vmstate.c=0D A tests/unit/test-write-threshold.c=0D A tests/unit/test-x86-cpuid.c=0D A tests/unit/test-xbzrle.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-20= 21-03-12' into staging=0D =0D * Move unit and bench tests into separate directories=0D * Clean-up and improve gitlab-ci jobs=0D * Drop the non-working "check-speed" makefile target=0D * Minor documentation updates=0D =0D # gpg: Signature made Fri 12 Mar 2021 17:18:45 GMT=0D # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702= DB5=0D # gpg: issuer "thuth@redhat.com"=0D # gpg: Good signature from "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [unknown]=0D= # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 = 2DB5=0D =0D * remotes/thuth-gitlab/tags/pull-request-2021-03-12:=0D README: Add Documentation blurb=0D MAINTAINERS: Merge the Gitlab-CI section into the generic CI section=0D= tests: remove "make check-speed" in favor of "make bench"=0D gitlab-ci.yml: Merge check-crypto-old jobs into the build-crypto-old jo= bs=0D gitlab-ci.yml: Merge one of the coroutine jobs with the tcg-disabled jo= b=0D gitlab-ci.yml: Add some missing dependencies to the jobs=0D gitlab-ci.yml: Move build-tools-and-docs-debian to a better place=0D tests: Move benchmarks into a separate folder=0D tests: Move unit tests into a separate directory=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/6f8a81fc2965...757acb9a8295= =0D From MAILER-DAEMON Sun Mar 14 13:53:29 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLUvh-0000Gm-99 for mharc-qemu-commits@gnu.org; Sun, 14 Mar 2021 13:53:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47346) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLUvg-0000F1-BD for qemu-commits@nongnu.org; Sun, 14 Mar 2021 13:53:28 -0400 Received: from out-25.smtp.github.com ([192.30.252.208]:54365 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLUvd-0007xU-To for qemu-commits@nongnu.org; Sun, 14 Mar 2021 13:53:27 -0400 Received: from github.com (hubbernetes-node-4ae7af3.ash1-iad.github.net [10.56.111.24]) by smtp.github.com (Postfix) with ESMTPA id E3B2B840092 for ; Sun, 14 Mar 2021 10:53:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615744404; bh=PwRooShnFr6VWe+Yx2pq8AilJ+FFpj+DpVEnDczKalk=; h=Date:From:To:Subject:From; b=nq+7znar0whc5HKLvygcy5CRQSJcTyjsJYeg8x4eCW10Y2QrN7P8qEB5cBsjLrKDK Voh43G9MqwPBhQHVZqNnrLIG6YnyNsYd7yq3ErYm3UqCrEOdO3XKszGPgxvUc0IOae towL1/LTi1loXs7uuHKloQq3ToQkQArEVlBuckrk= Date: Sun, 14 Mar 2021 10:53:24 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -63 X-Spam_score: -6.4 X-Spam_bar: ------ X-Spam_report: (-6.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HEXHASH_WORD=1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 08f3a9: linux-user: Fix executable page of /proc/self/maps X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Mar 2021 17:53:28 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 08f3a96b33e7eef39b651af9edb5e6de8ff13371=0D https://github.com/qemu/qemu/commit/08f3a96b33e7eef39b651af9edb5e6d= e8ff13371=0D Author: Nicolas Surbayrole =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M linux-user/syscall.c=0D =0D Log Message:=0D -----------=0D linux-user: Fix executable page of /proc/self/maps=0D =0D The guest binary and libraries are not always map with the=0D executable bit in the host process. The guest may read a=0D /proc/self/maps with no executable address range. The=0D perm fields should be based on the guest permission inside=0D Qemu.=0D =0D Signed-off-by: Nicolas Surbayrole =0D Reviewed-by: Richard Henderson =0D Acked-by: Alex Benn=C3=A9e =0D Message-Id: <20210308091959.986540-1-nsurbayrole@quarkslab.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 6e1c0d7b951e19c53b8467e8bc4b71ee73a394ea=0D https://github.com/qemu/qemu/commit/6e1c0d7b951e19c53b8467e8bc4b71e= e73a394ea=0D Author: Laurent Vivier =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M linux-user/main.c=0D M scripts/qemu-binfmt-conf.sh=0D =0D Log Message:=0D -----------=0D linux-user: manage binfmt-misc preserve-arg[0] flag=0D =0D Add --preserve-argv0 in qemu-binfmt-conf.sh to configure the preserve-arg= v0=0D flag.=0D =0D This patch allows to use new flag in AT_FLAGS to detect if=0D preserve-argv0 is configured for this interpreter:=0D argv[0] (the full pathname provided by binfmt-misc) is removed and=0D replaced by argv[1] (the original argv[0] provided by binfmt-misc when=0D= 'P'/preserve-arg[0] is set)=0D =0D For instance with this patch and kernel support for AT_FLAGS:=0D =0D $ sudo chroot m68k-chroot sh -c 'echo $0'=0D sh=0D =0D without this patch:=0D =0D $ sudo chroot m68k-chroot sh -c 'echo $0'=0D /usr/bin/sh=0D =0D The new flag is available in kernel (v5.12) since:=0D 2347961b11d4 ("binfmt_misc: pass binfmt_misc flags to the interpreter")=0D= =0D This can be tested with something like:=0D =0D # cp ..../qemu-ppc /chroot/powerpc/jessie=0D =0D # qemu-binfmt-conf.sh --qemu-path / --systemd ppc --credential yes \=0D= --persistent no --preserve-argv0 yes=0D # systemctl restart systemd-binfmt.service=0D # cat /proc/sys/fs/binfmt_misc/qemu-ppc=0D enabled=0D interpreter //qemu-ppc=0D flags: POC=0D offset 0=0D magic 7f454c4601020100000000000000000000020014=0D mask ffffffffffffff00fffffffffffffffffffeffff=0D # chroot /chroot/powerpc/jessie sh -c 'echo $0'=0D sh=0D =0D # qemu-binfmt-conf.sh --qemu-path / --systemd ppc --credential yes \=0D= --persistent no --preserve-argv0 no=0D # systemctl restart systemd-binfmt.service=0D # cat /proc/sys/fs/binfmt_misc/qemu-ppc=0D enabled=0D interpreter //qemu-ppc=0D flags: OC=0D offset 0=0D magic 7f454c4601020100000000000000000000020014=0D mask ffffffffffffff00fffffffffffffffffffeffff=0D # chroot /chroot/powerpc/jessie sh -c 'echo $0'=0D /bin/sh=0D =0D Signed-off-by: Laurent Vivier =0D Message-Id: <20210222105004.1642234-1-laurent@vivier.eu>=0D =0D =0D Commit: 7e588fbc57397daac02cf23677d1849aab7c7507=0D https://github.com/qemu/qemu/commit/7e588fbc57397daac02cf23677d1849= aab7c7507=0D Author: Vincent Fazio =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M linux-user/elfload.c=0D =0D Log Message:=0D -----------=0D linux-user/elfload: munmap proper address in pgd_find_hole_fallback=0D =0D Previously, if the build host's libc did not define MAP_FIXED_NOREPLACE=0D= or if the running kernel didn't support that flag, it was possible for=0D= pgd_find_hole_fallback to munmap an incorrect address which could lead to= =0D SIGSEGV if the range happened to overlap with the mapped address of the=0D= QEMU binary.=0D =0D mmap(0x1000, 22261224, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_NORESER= VE, -1, 0) =3D 0x7f889d331000=0D munmap(0x1000, 22261224) =3D 0=0D --- SIGSEGV {si_signo=3DSIGSEGV, si_code=3DSEGV_MAPERR, si_addr=3D0x84b= 817} ---=0D ++ killed by SIGSEGV +++=0D =0D Now, always munmap the address returned by mmap.=0D =0D Fixes: 2667e069e7b5 ("linux-user: don't use MAP_FIXED in pgd_find_hole_fa= llback")=0D Signed-off-by: Vincent Fazio =0D Reviewed-by: Laurent Vivier =0D Reviewed-by: Alex Benn=C3=A9e =0D Message-Id: <20210131061849.12615-1-vfazio@xes-inc.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 934eed517857ce2de9a8a92c2599612581b4eb4a=0D https://github.com/qemu/qemu/commit/934eed517857ce2de9a8a92c2599612= 581b4eb4a=0D Author: Vincent Fazio =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M linux-user/elfload.c=0D =0D Log Message:=0D -----------=0D linux-user/elfload: do not assume MAP_FIXED_NOREPLACE kernel support=0D= =0D Previously, pgd_find_hole_fallback assumed that if the build host's libc=0D= had MAP_FIXED_NOREPLACE defined that the address returned by mmap would=0D= match the requested address. This is not a safe assumption for Linux=0D kernels prior to 4.17=0D =0D Now, we always compare mmap's resultant address with the requested=0D address and no longer short-circuit based on MAP_FIXED_NOREPLACE.=0D =0D Fixes: 2667e069e7b5 ("linux-user: don't use MAP_FIXED in pgd_find_hole_fa= llback")=0D Signed-off-by: Vincent Fazio =0D Reviewed-by: Laurent Vivier =0D Reviewed-by: Alex Benn=C3=A9e =0D Message-Id: <20210131061930.14554-1-vfazio@xes-inc.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 0266e8e3b3981b492e82be20bb97e8ed9792ed00=0D https://github.com/qemu/qemu/commit/0266e8e3b3981b492e82be20bb97e8e= d9792ed00=0D Author: Vincent Fazio =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M linux-user/elfload.c=0D =0D Log Message:=0D -----------=0D linux-user/elfload: fix address calculation in fallback scenario=0D =0D Previously, guest_loaddr was not taken into account when returning an=0D address from pgb_find_hole when /proc/self/maps was unavailable which=0D caused an improper guest_base address to be calculated.=0D =0D This could cause a SIGSEGV later in load_elf_image -> target_mmap for=0D ET_EXEC type images since the mmap MAP_FIXED flag is specified which=0D could clobber existing mappings at the address returnd by g2h().=0D =0D mmap(0xd87000, 16846912, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_NORES= ERVE|0x100000, -1, 0) =3D 0xd87000=0D munmap(0xd87000, 16846912) =3D 0=0D write(2, "Locating guest address space @ 0"..., 40Locating guest addres= s space @ 0xd87000) =3D 40=0D mmap(0x1187000, 16850944, PROT_NONE, MAP_PRIVATE|MAP_FIXED|MAP_ANONYMOU= S|MAP_NORESERVE, -1, 0) =3D 0x1187000=0D --- SIGSEGV {si_signo=3DSIGSEGV, si_code=3DSEGV_ACCERR, si_addr=3D0x218= 8310} ---=0D +++ killed by SIGSEGV +++=0D =0D Now, pgd_find_hole accounts for guest_loaddr in this scenario.=0D =0D Fixes: ad592e37dfcc ("linux-user: provide fallback pgd_find_hole for bare= chroots")=0D Signed-off-by: Vincent Fazio =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210131061948.15990-1-vfazio@xes-inc.com>=0D [lv: updated it to check if ret =3D=3D -1]=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 6157b0e19721aadb4c7fdcfe57b2924af6144b14=0D https://github.com/qemu/qemu/commit/6157b0e19721aadb4c7fdcfe57b2924= af6144b14=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M linux-user/elfload.c=0D M linux-user/main.c=0D M linux-user/syscall.c=0D M scripts/qemu-binfmt-conf.sh=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.0-p= ull-request' into staging=0D =0D linux-user pull request 20210313=0D =0D - fix elfload=0D - fix executable page of /proc/self/maps=0D - add preserve-arg[0] support for binfmt_misc=0D =0D # gpg: Signature made Sat 13 Mar 2021 09:47:23 GMT=0D # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FB= E3C=0D # gpg: issuer "laurent@vivier.eu"=0D # gpg: Good signature from "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier (Red Hat) = " [full]=0D # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F = BE3C=0D =0D * remotes/vivier2/tags/linux-user-for-6.0-pull-request:=0D linux-user/elfload: fix address calculation in fallback scenario=0D linux-user/elfload: do not assume MAP_FIXED_NOREPLACE kernel support=0D= linux-user/elfload: munmap proper address in pgd_find_hole_fallback=0D linux-user: manage binfmt-misc preserve-arg[0] flag=0D linux-user: Fix executable page of /proc/self/maps=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/757acb9a8295...6157b0e19721= =0D From MAILER-DAEMON Sun Mar 14 15:15:59 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLWDX-0002Fs-2e for mharc-qemu-commits@gnu.org; Sun, 14 Mar 2021 15:15:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34492) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLWDV-0002FR-CC for qemu-commits@nongnu.org; Sun, 14 Mar 2021 15:15:58 -0400 Received: from out-25.smtp.github.com ([192.30.252.208]:40495 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLWDS-0003DB-E5 for qemu-commits@nongnu.org; Sun, 14 Mar 2021 15:15:56 -0400 Received: from github.com (hubbernetes-node-6dc2761.ash1-iad.github.net [10.56.109.72]) by smtp.github.com (Postfix) with ESMTPA id 9EB8A840065 for ; Sun, 14 Mar 2021 12:15:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615749353; bh=r4srhBkNt8PC7rENv4RXvwgnkHxWL7gg09FaEIkEEGo=; h=Date:From:To:Subject:From; b=k1m7/Rw15ZcoeYE7m7PEeCs49WQ14hWG4knjmVhp7JZot9gYM62yKnsBFgSXwTabN ucd6kOg2OI6rHRLJgb0Hz83O/4qmgckD6BZ1r+aKYQrT6c4Fxh+LIEGHpo0582OZ2s VXWZeFcjvDpeI0JIPcpfno5RlBB5cceKXDQmo2uI= Date: Sun, 14 Mar 2021 12:15:53 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -63 X-Spam_score: -6.4 X-Spam_bar: ------ X-Spam_report: (-6.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, HEXHASH_WORD=1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 08f3a9: linux-user: Fix executable page of /proc/self/maps X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Mar 2021 19:15:58 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 08f3a96b33e7eef39b651af9edb5e6de8ff13371=0D https://github.com/qemu/qemu/commit/08f3a96b33e7eef39b651af9edb5e6d= e8ff13371=0D Author: Nicolas Surbayrole =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M linux-user/syscall.c=0D =0D Log Message:=0D -----------=0D linux-user: Fix executable page of /proc/self/maps=0D =0D The guest binary and libraries are not always map with the=0D executable bit in the host process. The guest may read a=0D /proc/self/maps with no executable address range. The=0D perm fields should be based on the guest permission inside=0D Qemu.=0D =0D Signed-off-by: Nicolas Surbayrole =0D Reviewed-by: Richard Henderson =0D Acked-by: Alex Benn=C3=A9e =0D Message-Id: <20210308091959.986540-1-nsurbayrole@quarkslab.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 6e1c0d7b951e19c53b8467e8bc4b71ee73a394ea=0D https://github.com/qemu/qemu/commit/6e1c0d7b951e19c53b8467e8bc4b71e= e73a394ea=0D Author: Laurent Vivier =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M linux-user/main.c=0D M scripts/qemu-binfmt-conf.sh=0D =0D Log Message:=0D -----------=0D linux-user: manage binfmt-misc preserve-arg[0] flag=0D =0D Add --preserve-argv0 in qemu-binfmt-conf.sh to configure the preserve-arg= v0=0D flag.=0D =0D This patch allows to use new flag in AT_FLAGS to detect if=0D preserve-argv0 is configured for this interpreter:=0D argv[0] (the full pathname provided by binfmt-misc) is removed and=0D replaced by argv[1] (the original argv[0] provided by binfmt-misc when=0D= 'P'/preserve-arg[0] is set)=0D =0D For instance with this patch and kernel support for AT_FLAGS:=0D =0D $ sudo chroot m68k-chroot sh -c 'echo $0'=0D sh=0D =0D without this patch:=0D =0D $ sudo chroot m68k-chroot sh -c 'echo $0'=0D /usr/bin/sh=0D =0D The new flag is available in kernel (v5.12) since:=0D 2347961b11d4 ("binfmt_misc: pass binfmt_misc flags to the interpreter")=0D= =0D This can be tested with something like:=0D =0D # cp ..../qemu-ppc /chroot/powerpc/jessie=0D =0D # qemu-binfmt-conf.sh --qemu-path / --systemd ppc --credential yes \=0D= --persistent no --preserve-argv0 yes=0D # systemctl restart systemd-binfmt.service=0D # cat /proc/sys/fs/binfmt_misc/qemu-ppc=0D enabled=0D interpreter //qemu-ppc=0D flags: POC=0D offset 0=0D magic 7f454c4601020100000000000000000000020014=0D mask ffffffffffffff00fffffffffffffffffffeffff=0D # chroot /chroot/powerpc/jessie sh -c 'echo $0'=0D sh=0D =0D # qemu-binfmt-conf.sh --qemu-path / --systemd ppc --credential yes \=0D= --persistent no --preserve-argv0 no=0D # systemctl restart systemd-binfmt.service=0D # cat /proc/sys/fs/binfmt_misc/qemu-ppc=0D enabled=0D interpreter //qemu-ppc=0D flags: OC=0D offset 0=0D magic 7f454c4601020100000000000000000000020014=0D mask ffffffffffffff00fffffffffffffffffffeffff=0D # chroot /chroot/powerpc/jessie sh -c 'echo $0'=0D /bin/sh=0D =0D Signed-off-by: Laurent Vivier =0D Message-Id: <20210222105004.1642234-1-laurent@vivier.eu>=0D =0D =0D Commit: 7e588fbc57397daac02cf23677d1849aab7c7507=0D https://github.com/qemu/qemu/commit/7e588fbc57397daac02cf23677d1849= aab7c7507=0D Author: Vincent Fazio =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M linux-user/elfload.c=0D =0D Log Message:=0D -----------=0D linux-user/elfload: munmap proper address in pgd_find_hole_fallback=0D =0D Previously, if the build host's libc did not define MAP_FIXED_NOREPLACE=0D= or if the running kernel didn't support that flag, it was possible for=0D= pgd_find_hole_fallback to munmap an incorrect address which could lead to= =0D SIGSEGV if the range happened to overlap with the mapped address of the=0D= QEMU binary.=0D =0D mmap(0x1000, 22261224, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_NORESER= VE, -1, 0) =3D 0x7f889d331000=0D munmap(0x1000, 22261224) =3D 0=0D --- SIGSEGV {si_signo=3DSIGSEGV, si_code=3DSEGV_MAPERR, si_addr=3D0x84b= 817} ---=0D ++ killed by SIGSEGV +++=0D =0D Now, always munmap the address returned by mmap.=0D =0D Fixes: 2667e069e7b5 ("linux-user: don't use MAP_FIXED in pgd_find_hole_fa= llback")=0D Signed-off-by: Vincent Fazio =0D Reviewed-by: Laurent Vivier =0D Reviewed-by: Alex Benn=C3=A9e =0D Message-Id: <20210131061849.12615-1-vfazio@xes-inc.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 934eed517857ce2de9a8a92c2599612581b4eb4a=0D https://github.com/qemu/qemu/commit/934eed517857ce2de9a8a92c2599612= 581b4eb4a=0D Author: Vincent Fazio =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M linux-user/elfload.c=0D =0D Log Message:=0D -----------=0D linux-user/elfload: do not assume MAP_FIXED_NOREPLACE kernel support=0D= =0D Previously, pgd_find_hole_fallback assumed that if the build host's libc=0D= had MAP_FIXED_NOREPLACE defined that the address returned by mmap would=0D= match the requested address. This is not a safe assumption for Linux=0D kernels prior to 4.17=0D =0D Now, we always compare mmap's resultant address with the requested=0D address and no longer short-circuit based on MAP_FIXED_NOREPLACE.=0D =0D Fixes: 2667e069e7b5 ("linux-user: don't use MAP_FIXED in pgd_find_hole_fa= llback")=0D Signed-off-by: Vincent Fazio =0D Reviewed-by: Laurent Vivier =0D Reviewed-by: Alex Benn=C3=A9e =0D Message-Id: <20210131061930.14554-1-vfazio@xes-inc.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 0266e8e3b3981b492e82be20bb97e8ed9792ed00=0D https://github.com/qemu/qemu/commit/0266e8e3b3981b492e82be20bb97e8e= d9792ed00=0D Author: Vincent Fazio =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M linux-user/elfload.c=0D =0D Log Message:=0D -----------=0D linux-user/elfload: fix address calculation in fallback scenario=0D =0D Previously, guest_loaddr was not taken into account when returning an=0D address from pgb_find_hole when /proc/self/maps was unavailable which=0D caused an improper guest_base address to be calculated.=0D =0D This could cause a SIGSEGV later in load_elf_image -> target_mmap for=0D ET_EXEC type images since the mmap MAP_FIXED flag is specified which=0D could clobber existing mappings at the address returnd by g2h().=0D =0D mmap(0xd87000, 16846912, PROT_NONE, MAP_PRIVATE|MAP_ANONYMOUS|MAP_NORES= ERVE|0x100000, -1, 0) =3D 0xd87000=0D munmap(0xd87000, 16846912) =3D 0=0D write(2, "Locating guest address space @ 0"..., 40Locating guest addres= s space @ 0xd87000) =3D 40=0D mmap(0x1187000, 16850944, PROT_NONE, MAP_PRIVATE|MAP_FIXED|MAP_ANONYMOU= S|MAP_NORESERVE, -1, 0) =3D 0x1187000=0D --- SIGSEGV {si_signo=3DSIGSEGV, si_code=3DSEGV_ACCERR, si_addr=3D0x218= 8310} ---=0D +++ killed by SIGSEGV +++=0D =0D Now, pgd_find_hole accounts for guest_loaddr in this scenario.=0D =0D Fixes: ad592e37dfcc ("linux-user: provide fallback pgd_find_hole for bare= chroots")=0D Signed-off-by: Vincent Fazio =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210131061948.15990-1-vfazio@xes-inc.com>=0D [lv: updated it to check if ret =3D=3D -1]=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 6157b0e19721aadb4c7fdcfe57b2924af6144b14=0D https://github.com/qemu/qemu/commit/6157b0e19721aadb4c7fdcfe57b2924= af6144b14=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M linux-user/elfload.c=0D M linux-user/main.c=0D M linux-user/syscall.c=0D M scripts/qemu-binfmt-conf.sh=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.0-p= ull-request' into staging=0D =0D linux-user pull request 20210313=0D =0D - fix elfload=0D - fix executable page of /proc/self/maps=0D - add preserve-arg[0] support for binfmt_misc=0D =0D # gpg: Signature made Sat 13 Mar 2021 09:47:23 GMT=0D # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FB= E3C=0D # gpg: issuer "laurent@vivier.eu"=0D # gpg: Good signature from "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier (Red Hat) = " [full]=0D # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F = BE3C=0D =0D * remotes/vivier2/tags/linux-user-for-6.0-pull-request:=0D linux-user/elfload: fix address calculation in fallback scenario=0D linux-user/elfload: do not assume MAP_FIXED_NOREPLACE kernel support=0D= linux-user/elfload: munmap proper address in pgd_find_hole_fallback=0D linux-user: manage binfmt-misc preserve-arg[0] flag=0D linux-user: Fix executable page of /proc/self/maps=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/757acb9a8295...6157b0e19721= =0D From MAILER-DAEMON Sun Mar 14 15:21:55 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLWJH-0004rK-Li for mharc-qemu-commits@gnu.org; Sun, 14 Mar 2021 15:21:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35790) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLWJF-0004qm-HV for qemu-commits@nongnu.org; Sun, 14 Mar 2021 15:21:53 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:38449) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLWJB-0006v1-Vr for qemu-commits@nongnu.org; Sun, 14 Mar 2021 15:21:52 -0400 Received: from github.com (hubbernetes-node-8e6ce34.ash1-iad.github.net [10.56.102.69]) by smtp.github.com (Postfix) with ESMTPA id CA3A0900C1D for ; Sun, 14 Mar 2021 12:21:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615749708; bh=DBK0xdgFYxTFYXVKzvbewCepfWyNEE0Qjy6Lc8mNK9s=; h=Date:From:To:Subject:From; b=FC0ziEkPePZChwu09GDeCfh8LNXD/N/z4A4boaBMBh7m8D63EZW9XTuHClW+RssqB WvGZepwGuP+v9Z63IePRzTvaGHqCv7jn3KooZ1uYJFzLCXVBtOJDnmdoVFM7ei9mDn P2TPqVmYoqMf2eeRG0QMSZmRxpgOl0qmynprlimU= Date: Sun, 14 Mar 2021 12:21:48 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -46 X-Spam_score: -4.7 X-Spam_bar: ---- X-Spam_report: (-4.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 260290: hw/mips/gt64xxx: Initialize ISD I/O memory region ... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 14 Mar 2021 19:21:53 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 260290677e62473f1901608cc89c6e919bb77fc6=0D https://github.com/qemu/qemu/commit/260290677e62473f1901608cc89c6e9= 19bb77fc6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M hw/mips/gt64xxx_pci.c=0D =0D Log Message:=0D -----------=0D hw/mips/gt64xxx: Initialize ISD I/O memory region in DeviceRealize()=0D= =0D The ISD I/O region belongs to the TYPE_GT64120_PCI_HOST_BRIDGE,=0D so initialize it before it is realized, not after.=0D Rename the region as 'gt64120-isd' so it is clearer to realize=0D it belongs to the GT64120 in the memory tree view.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: BALATON Zoltan =0D Message-Id: <20210309142630.728014-2-f4bug@amsat.org>=0D =0D =0D Commit: 8d492c5f06e107b2f7ebeb66ccb25537cccbf269=0D https://github.com/qemu/qemu/commit/8d492c5f06e107b2f7ebeb66ccb2553= 7cccbf269=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M hw/mips/gt64xxx_pci.c=0D =0D Log Message:=0D -----------=0D hw/mips/gt64xxx: Simplify ISD MemoryRegion read/write handlers=0D =0D The ISD MemoryRegion is implemented for 32-bit accesses.=0D Simplify it by setting the MemoryRegionOps::impl min/max=0D access size fields.=0D =0D Since the region is registered with a size of 0x1000 bytes,=0D we can remove the hwaddr mask.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: BALATON Zoltan =0D Message-Id: <20210309142630.728014-3-f4bug@amsat.org>=0D =0D =0D Commit: 1c8d4071ee95de26a7f1feff8e94ebc6e12e0b19=0D https://github.com/qemu/qemu/commit/1c8d4071ee95de26a7f1feff8e94ebc= 6e12e0b19=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M hw/mips/gt64xxx_pci.c=0D =0D Log Message:=0D -----------=0D hw/mips/gt64xxx: Fix typos in qemu_log_mask() formats=0D =0D Fix the following typos:=0D - GT_PCI1_CFGDATA is not a timer register but a PCI one,=0D - zero-padding flag is out of the format=0D =0D Fixes: 641ca2bfcd5 ("hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of = debug printf()")=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: BALATON Zoltan =0D Message-Id: <20210309142630.728014-4-f4bug@amsat.org>=0D =0D =0D Commit: 1b3422bde22b2cbdee4304369a2a9acfea75515c=0D https://github.com/qemu/qemu/commit/1b3422bde22b2cbdee4304369a2a9ac= fea75515c=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M hw/mips/gt64xxx_pci.c=0D M hw/mips/trace-events=0D =0D Log Message:=0D -----------=0D hw/mips/gt64xxx: Rename trace events related to interrupt registers=0D =0D We want to trace all register accesses. First rename the current=0D gt64120_read / gt64120_write events with '_intreg' suffix, as they=0D are restricted to interrupt registers.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: BALATON Zoltan =0D Message-Id: <20210309142630.728014-5-f4bug@amsat.org>=0D =0D =0D Commit: f8ead0d7bdebd81f4d8457c48f1d003fd4d94c69=0D https://github.com/qemu/qemu/commit/f8ead0d7bdebd81f4d8457c48f1d003= fd4d94c69=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M hw/mips/gt64xxx_pci.c=0D M hw/mips/trace-events=0D =0D Log Message:=0D -----------=0D hw/mips/gt64xxx: Trace accesses to ISD registers=0D =0D Trace all accesses to Internal Space Decode (ISD) registers.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: BALATON Zoltan =0D Message-Id: <20210309142630.728014-6-f4bug@amsat.org>=0D =0D =0D Commit: 2897579982c3d53e3f808bf1e7cdc465ea0ea421=0D https://github.com/qemu/qemu/commit/2897579982c3d53e3f808bf1e7cdc46= 5ea0ea421=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/meson.build=0D =0D Log Message:=0D -----------=0D target/mips/meson: Introduce mips_tcg source set=0D =0D Introduce the 'mips_tcg' source set to collect TCG specific files.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-2-f4bug@amsat.org>=0D =0D =0D Commit: 21fb03be67fa63670796f7b5d7bcd1194e6a8154=0D https://github.com/qemu/qemu/commit/21fb03be67fa63670796f7b5d7bcd11= 94e6a8154=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/meson.build=0D =0D Log Message:=0D -----------=0D target/mips/meson: Restrict mips-semi.c to TCG=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-3-f4bug@amsat.org>=0D =0D =0D Commit: 4f57f43cb8c2402d5ca552eafac438ea14d584df=0D https://github.com/qemu/qemu/commit/4f57f43cb8c2402d5ca552eafac438e= a14d584df=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Rewrite complex ifdef'ry=0D =0D No need for this obfuscated ifdef'ry, KISS.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-4-f4bug@amsat.org>=0D =0D =0D Commit: 2090713f650b4832b9661cdcdf193f3602d0e0c0=0D https://github.com/qemu/qemu/commit/2090713f650b4832b9661cdcdf193f3= 602d0e0c0=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Remove XBurst Media eXtension Unit dead code=0D =0D All these unimplemented MXU opcodes end up calling=0D gen_reserved_instruction() which is the default switch=0D case in decode_opc_mxu().=0D =0D The translate.c file is already big enough and hard to maintain,=0D remove 1300 lines of unnecessary code and /* TODO */ comments.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-5-f4bug@amsat.org>=0D =0D =0D Commit: 21d66ead6a7577ad7d6699a4ff99d231a5cfa0b0=0D https://github.com/qemu/qemu/commit/21d66ead6a7577ad7d6699a4ff99d23= 1a5cfa0b0=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Remove unused CPUMIPSState* from MXU functions=0D =0D None of these MXU functions use their CPUMIPSState* env argument,=0D remove it.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-6-f4bug@amsat.org>=0D =0D =0D Commit: 965eb74bb597d4f43dbefa85244891d67634a818=0D https://github.com/qemu/qemu/commit/965eb74bb597d4f43dbefa85244891d= 67634a818=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Pass instruction opcode to decode_opc_mxu()=0D =0D In the next commit we'll make decode_opc_mxu() match decodetree=0D prototype by returning a boolean. First pass ctx->opcode as an=0D argument.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-7-f4bug@amsat.org>=0D =0D =0D Commit: de5af7c5e64addc0eb89cde3cc6b0ece0225a73e=0D https://github.com/qemu/qemu/commit/de5af7c5e64addc0eb89cde3cc6b0ec= e0225a73e=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Use OPC_MUL instead of OPC__MXU_MUL=0D =0D We already have a macro and definition to extract / check=0D the Special2 MUL opcode. Use it instead of the unnecessary=0D OPC__MXU_MUL macro.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-8-f4bug@amsat.org>=0D =0D =0D Commit: 2234528618e49d27b85fab4389f393de0fe8ca98=0D https://github.com/qemu/qemu/commit/2234528618e49d27b85fab4389f393d= e0fe8ca98=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Move MUL opcode check from decode_mxu() to decode_legacy()= =0D =0D Move the check for MUL opcode from decode_opc_mxu() callee=0D to decode_opc_legacy() caller, so we can simplify the ifdef'ry=0D and elide the call in few commits.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-9-f4bug@amsat.org>=0D =0D =0D Commit: e31b43ec507ba35a804f6323d94522c5a2e5581a=0D https://github.com/qemu/qemu/commit/e31b43ec507ba35a804f6323d94522c= 5a2e5581a=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Rename decode_opc_mxu() as decode_ase_mxu()=0D =0D Use "decode_{isa,ase,ext}_$name()" function name pattern for=0D public decodetree entrypoints.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-10-f4bug@amsat.org>=0D =0D =0D Commit: a8dad35388987fe3d55d6166d7f3f188eb607e97=0D https://github.com/qemu/qemu/commit/a8dad35388987fe3d55d6166d7f3f18= 8eb607e97=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Convert decode_ase_mxu() to decodetree prototype=0D =0D To easily convert MXU code to decodetree, making it return a boolean.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-11-f4bug@amsat.org>=0D =0D =0D Commit: c7abe00ae9336892ae615fbc39157ba110d1716b=0D https://github.com/qemu/qemu/commit/c7abe00ae9336892ae615fbc39157ba= 110d1716b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/translate.h=0D =0D Log Message:=0D -----------=0D target/mips: Simplify decode_opc_mxu() ifdef'ry=0D =0D By making the prototype public and checking=0D 'TARGET_LONG_BITS =3D=3D 32' we let the compiler=0D elide the decode_opc_mxu() call.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-12-f4bug@amsat.org>=0D =0D =0D Commit: fe35ea94838d8faba749ecfd49256f59e5fe0653=0D https://github.com/qemu/qemu/commit/fe35ea94838d8faba749ecfd49256f5= 9e5fe0653=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/translate.h=0D =0D Log Message:=0D -----------=0D target/mips: Introduce mxu_translate_init() helper=0D =0D Extract the MXU register initialization code from mips_tcg_init()=0D as a new mxu_translate_init() helper. Make it public and replace=0D !TARGET_MIPS64 ifdef'ry by the 'TARGET_LONG_BITS =3D=3D 32' check to=0D elide this code at preprocessing time.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-13-f4bug@amsat.org>=0D =0D =0D Commit: b24db6fcd4063db6d001e958b28bfc2dadb249d9=0D https://github.com/qemu/qemu/commit/b24db6fcd4063db6d001e958b28bfc2= dadb249d9=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/meson.build=0D A target/mips/mxu_translate.c=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Extract MXU code to new mxu_translate.c file=0D =0D Extract 1600+ lines from the big translate.c into a new file.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-14-f4bug@amsat.org>=0D =0D =0D Commit: c27b4579371e5d8eaed54182243ece54c752a4e5=0D https://github.com/qemu/qemu/commit/c27b4579371e5d8eaed54182243ece5= 4c752a4e5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Use gen_load_gpr[_hi]() when possible=0D =0D Use gen_load_gpr[_hi]() instead of open coding it.=0D =0D Patch generated using the following spatch script:=0D =0D @gen_load_gpr@=0D identifier reg_idx;=0D expression tcg_reg;=0D @@=0D -if (reg_idx =3D=3D 0) {=0D - tcg_gen_movi_tl(tcg_reg, 0);=0D -} else {=0D - tcg_gen_mov_tl(tcg_reg, cpu_gpr[reg_idx]);=0D -}=0D +gen_load_gpr(tcg_reg, reg_idx);=0D =0D @gen_load_gpr_hi@=0D identifier reg_idx;=0D expression tcg_reg;=0D @@=0D -if (reg_idx =3D=3D 0) {=0D - tcg_gen_movi_i64(tcg_reg, 0);=0D -} else {=0D - tcg_gen_mov_i64(tcg_reg, cpu_gpr_hi[reg_idx]);=0D -}=0D +gen_load_gpr_hi(tcg_reg, reg_idx);=0D =0D Suggested-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210308131604.460693-1-f4bug@amsat.org>=0D =0D =0D Commit: ffc672aa977131ccfccfd0c2aee2b004adb69ed5=0D https://github.com/qemu/qemu/commit/ffc672aa977131ccfccfd0c2aee2b00= 4adb69ed5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/meson.build=0D M target/mips/translate.c=0D M target/mips/translate.h=0D A target/mips/tx79.decode=0D A target/mips/tx79_translate.c=0D A target/mips/txx9_translate.c=0D =0D Log Message:=0D -----------=0D target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree=0D =0D Introduce decodetree structure to decode the tx79 opcodes.=0D Start it by moving the existing MFHI1 and MFLO1 opcodes.=0D Remove unnecessary comments.=0D =0D As the TX79 share opcodes with the TX19/TX39/TX49 CPUs,=0D we introduce the decode_ext_txx9() dispatcher where we=0D will add the other decoders later.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-9-f4bug@amsat.org>=0D =0D =0D Commit: 1f9408d5502c877ddf91ce00f529488c4b5c98d5=0D https://github.com/qemu/qemu/commit/1f9408d5502c877ddf91ce00f529488= c4b5c98d5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/tx79.decode=0D M target/mips/tx79_translate.c=0D =0D Log Message:=0D -----------=0D target/mips/tx79: Move MTHI1 / MTLO1 opcodes to decodetree=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-10-f4bug@amsat.org>=0D =0D =0D Commit: f9fa53f19786c82cab2e7ca0274d6d9f9bb59f4f=0D https://github.com/qemu/qemu/commit/f9fa53f19786c82cab2e7ca0274d6d9= f9bb59f4f=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/translate.h=0D =0D Log Message:=0D -----------=0D target/mips/translate: Make gen_rdhwr() public=0D =0D We will use gen_rdhwr() outside of translate.c, make it public.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-28-f4bug@amsat.org>=0D =0D =0D Commit: ca8def9bdbf3e62ef0afd9e02a51ef536019791a=0D https://github.com/qemu/qemu/commit/ca8def9bdbf3e62ef0afd9e02a51ef5= 36019791a=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips/translate: Simplify PCPYH using deposit_i64()=0D =0D Simplify the PCPYH (Parallel Copy Halfword) instruction by using=0D multiple calls to deposit_i64() which can be optimized by some=0D TCG backends.=0D =0D Suggested-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-11-f4bug@amsat.org>=0D =0D =0D Commit: 5a976c002518d46a030f125e2170d78204528497=0D https://github.com/qemu/qemu/commit/5a976c002518d46a030f125e2170d78= 204528497=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/tx79.decode=0D M target/mips/tx79_translate.c=0D =0D Log Message:=0D -----------=0D target/mips/tx79: Move PCPYH opcode to decodetree=0D =0D Move the existing PCPYH opcode (Parallel Copy Halfword) to decodetree.=0D= Remove unnecessary code / comments.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-12-f4bug@amsat.org>=0D =0D =0D Commit: 94c882f7d159c6f412b1778cd71d58d9e39b8ef9=0D https://github.com/qemu/qemu/commit/94c882f7d159c6f412b1778cd71d58d= 9e39b8ef9=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/tx79.decode=0D M target/mips/tx79_translate.c=0D =0D Log Message:=0D -----------=0D target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree=0D =0D Move PCPYLD (Parallel Copy Lower Doubleword) and PCPYUD=0D (Parallel Copy Upper Doubleword) to decodetree. Remove=0D unnecessary code / comments.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-13-f4bug@amsat.org>=0D =0D =0D Commit: e71d0f56cedfeebe8adbf5a4fa4e84b2e2de3fdf=0D https://github.com/qemu/qemu/commit/e71d0f56cedfeebe8adbf5a4fa4e84b= 2e2de3fdf=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Remove 'C790 Multimedia Instructions' dead code=0D =0D We have almost 400 lines of code full of /* TODO */ comments=0D which end calling gen_reserved_instruction().=0D =0D As we are not going to implement them, and all the caller's=0D switch() default cases already call gen_reserved_instruction(),=0D we can remove this altogether.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-14-f4bug@amsat.org>=0D =0D =0D Commit: d27fadddc673dd85a34102342b43be23d27eaab6=0D https://github.com/qemu/qemu/commit/d27fadddc673dd85a34102342b43be2= 3d27eaab6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/tx79_translate.c=0D =0D Log Message:=0D -----------=0D target/mips/tx79: Salvage instructions description comment=0D =0D This comment describing the tx79 opcodes is helpful. As we=0D will implement these instructions in tx79_translate.c, move=0D the comment there.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-15-f4bug@amsat.org>=0D =0D =0D Commit: 36d840f35b4fc7e2d47fb54313950f82690b2286=0D https://github.com/qemu/qemu/commit/36d840f35b4fc7e2d47fb54313950f8= 2690b2286=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M hw/mips/gt64xxx_pci.c=0D M hw/mips/trace-events=0D M target/mips/meson.build=0D A target/mips/mxu_translate.c=0D M target/mips/translate.c=0D M target/mips/translate.h=0D A target/mips/tx79.decode=0D A target/mips/tx79_translate.c=0D A target/mips/txx9_translate.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/philmd/tags/mips-20210313' into s= taging=0D =0D MIPS patches queue=0D =0D - Tidy up the GT64120 north bridge=0D - Move XBurst Media eXtension Unit code to mxu_translate.c=0D - Convert TX79 to decodetree=0D =0D # gpg: Signature made Sat 13 Mar 2021 22:44:44 GMT=0D # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC= 0DE=0D # gpg: Good signature from "Philippe Mathieu-Daud=C3=A9 (F4BUG) " [full]=0D # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD = C0DE=0D =0D * remotes/philmd/tags/mips-20210313: (27 commits)=0D target/mips/tx79: Salvage instructions description comment=0D target/mips: Remove 'C790 Multimedia Instructions' dead code=0D target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree=0D target/mips/tx79: Move PCPYH opcode to decodetree=0D target/mips/translate: Simplify PCPYH using deposit_i64()=0D target/mips/translate: Make gen_rdhwr() public=0D target/mips/tx79: Move MTHI1 / MTLO1 opcodes to decodetree=0D target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree=0D target/mips: Use gen_load_gpr[_hi]() when possible=0D target/mips: Extract MXU code to new mxu_translate.c file=0D target/mips: Introduce mxu_translate_init() helper=0D target/mips: Simplify decode_opc_mxu() ifdef'ry=0D target/mips: Convert decode_ase_mxu() to decodetree prototype=0D target/mips: Rename decode_opc_mxu() as decode_ase_mxu()=0D target/mips: Move MUL opcode check from decode_mxu() to decode_legacy()= =0D target/mips: Use OPC_MUL instead of OPC__MXU_MUL=0D target/mips: Pass instruction opcode to decode_opc_mxu()=0D target/mips: Remove unused CPUMIPSState* from MXU functions=0D target/mips: Remove XBurst Media eXtension Unit dead code=0D target/mips: Rewrite complex ifdef'ry=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/6157b0e19721...36d840f35b4f= =0D From MAILER-DAEMON Mon Mar 15 11:34:39 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLpEt-0001mQ-OD for mharc-qemu-commits@gnu.org; Mon, 15 Mar 2021 11:34:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44588) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLpEs-0001l2-CR for qemu-commits@nongnu.org; Mon, 15 Mar 2021 11:34:38 -0400 Received: from out-19.smtp.github.com ([192.30.252.202]:39519) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLpEp-0004Z1-9a for qemu-commits@nongnu.org; Mon, 15 Mar 2021 11:34:38 -0400 Received: from github.com (hubbernetes-node-f4b6ba3.va3-iad.github.net [10.48.123.73]) by smtp.github.com (Postfix) with ESMTPA id 719B3E0DAB for ; Mon, 15 Mar 2021 08:34:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615822474; bh=YOtXjczBL7K+b0cE6cRlalEL8c+rOwMn4NewwPMdxSE=; h=Date:From:To:Subject:From; b=jFEf6sSVmS87zRFk6ILT+rR6FsDFtlLZAJqzjJzdkegp9bXXGx1ognrgwjXlSqAfv y1JWMYspjpkXjAJ3t5noFyVwJ1UiWqHW8xDqcbOGTcMJSKADF0ExjCyg7dRwlZOujQ w8o8FqM9gUs3mlpjI1iYtsbv/43llOQtRDyf8Kic= Date: Mon, 15 Mar 2021 08:34:34 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.202; envelope-from=noreply@github.com; helo=out-19.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 260290: hw/mips/gt64xxx: Initialize ISD I/O memory region ... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Mar 2021 15:34:38 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 260290677e62473f1901608cc89c6e919bb77fc6=0D https://github.com/qemu/qemu/commit/260290677e62473f1901608cc89c6e9= 19bb77fc6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M hw/mips/gt64xxx_pci.c=0D =0D Log Message:=0D -----------=0D hw/mips/gt64xxx: Initialize ISD I/O memory region in DeviceRealize()=0D= =0D The ISD I/O region belongs to the TYPE_GT64120_PCI_HOST_BRIDGE,=0D so initialize it before it is realized, not after.=0D Rename the region as 'gt64120-isd' so it is clearer to realize=0D it belongs to the GT64120 in the memory tree view.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: BALATON Zoltan =0D Message-Id: <20210309142630.728014-2-f4bug@amsat.org>=0D =0D =0D Commit: 8d492c5f06e107b2f7ebeb66ccb25537cccbf269=0D https://github.com/qemu/qemu/commit/8d492c5f06e107b2f7ebeb66ccb2553= 7cccbf269=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M hw/mips/gt64xxx_pci.c=0D =0D Log Message:=0D -----------=0D hw/mips/gt64xxx: Simplify ISD MemoryRegion read/write handlers=0D =0D The ISD MemoryRegion is implemented for 32-bit accesses.=0D Simplify it by setting the MemoryRegionOps::impl min/max=0D access size fields.=0D =0D Since the region is registered with a size of 0x1000 bytes,=0D we can remove the hwaddr mask.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: BALATON Zoltan =0D Message-Id: <20210309142630.728014-3-f4bug@amsat.org>=0D =0D =0D Commit: 1c8d4071ee95de26a7f1feff8e94ebc6e12e0b19=0D https://github.com/qemu/qemu/commit/1c8d4071ee95de26a7f1feff8e94ebc= 6e12e0b19=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M hw/mips/gt64xxx_pci.c=0D =0D Log Message:=0D -----------=0D hw/mips/gt64xxx: Fix typos in qemu_log_mask() formats=0D =0D Fix the following typos:=0D - GT_PCI1_CFGDATA is not a timer register but a PCI one,=0D - zero-padding flag is out of the format=0D =0D Fixes: 641ca2bfcd5 ("hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of = debug printf()")=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: BALATON Zoltan =0D Message-Id: <20210309142630.728014-4-f4bug@amsat.org>=0D =0D =0D Commit: 1b3422bde22b2cbdee4304369a2a9acfea75515c=0D https://github.com/qemu/qemu/commit/1b3422bde22b2cbdee4304369a2a9ac= fea75515c=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M hw/mips/gt64xxx_pci.c=0D M hw/mips/trace-events=0D =0D Log Message:=0D -----------=0D hw/mips/gt64xxx: Rename trace events related to interrupt registers=0D =0D We want to trace all register accesses. First rename the current=0D gt64120_read / gt64120_write events with '_intreg' suffix, as they=0D are restricted to interrupt registers.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: BALATON Zoltan =0D Message-Id: <20210309142630.728014-5-f4bug@amsat.org>=0D =0D =0D Commit: f8ead0d7bdebd81f4d8457c48f1d003fd4d94c69=0D https://github.com/qemu/qemu/commit/f8ead0d7bdebd81f4d8457c48f1d003= fd4d94c69=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M hw/mips/gt64xxx_pci.c=0D M hw/mips/trace-events=0D =0D Log Message:=0D -----------=0D hw/mips/gt64xxx: Trace accesses to ISD registers=0D =0D Trace all accesses to Internal Space Decode (ISD) registers.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: BALATON Zoltan =0D Message-Id: <20210309142630.728014-6-f4bug@amsat.org>=0D =0D =0D Commit: 2897579982c3d53e3f808bf1e7cdc465ea0ea421=0D https://github.com/qemu/qemu/commit/2897579982c3d53e3f808bf1e7cdc46= 5ea0ea421=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/meson.build=0D =0D Log Message:=0D -----------=0D target/mips/meson: Introduce mips_tcg source set=0D =0D Introduce the 'mips_tcg' source set to collect TCG specific files.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-2-f4bug@amsat.org>=0D =0D =0D Commit: 21fb03be67fa63670796f7b5d7bcd1194e6a8154=0D https://github.com/qemu/qemu/commit/21fb03be67fa63670796f7b5d7bcd11= 94e6a8154=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/meson.build=0D =0D Log Message:=0D -----------=0D target/mips/meson: Restrict mips-semi.c to TCG=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-3-f4bug@amsat.org>=0D =0D =0D Commit: 4f57f43cb8c2402d5ca552eafac438ea14d584df=0D https://github.com/qemu/qemu/commit/4f57f43cb8c2402d5ca552eafac438e= a14d584df=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Rewrite complex ifdef'ry=0D =0D No need for this obfuscated ifdef'ry, KISS.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-4-f4bug@amsat.org>=0D =0D =0D Commit: 2090713f650b4832b9661cdcdf193f3602d0e0c0=0D https://github.com/qemu/qemu/commit/2090713f650b4832b9661cdcdf193f3= 602d0e0c0=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Remove XBurst Media eXtension Unit dead code=0D =0D All these unimplemented MXU opcodes end up calling=0D gen_reserved_instruction() which is the default switch=0D case in decode_opc_mxu().=0D =0D The translate.c file is already big enough and hard to maintain,=0D remove 1300 lines of unnecessary code and /* TODO */ comments.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-5-f4bug@amsat.org>=0D =0D =0D Commit: 21d66ead6a7577ad7d6699a4ff99d231a5cfa0b0=0D https://github.com/qemu/qemu/commit/21d66ead6a7577ad7d6699a4ff99d23= 1a5cfa0b0=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Remove unused CPUMIPSState* from MXU functions=0D =0D None of these MXU functions use their CPUMIPSState* env argument,=0D remove it.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-6-f4bug@amsat.org>=0D =0D =0D Commit: 965eb74bb597d4f43dbefa85244891d67634a818=0D https://github.com/qemu/qemu/commit/965eb74bb597d4f43dbefa85244891d= 67634a818=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Pass instruction opcode to decode_opc_mxu()=0D =0D In the next commit we'll make decode_opc_mxu() match decodetree=0D prototype by returning a boolean. First pass ctx->opcode as an=0D argument.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-7-f4bug@amsat.org>=0D =0D =0D Commit: de5af7c5e64addc0eb89cde3cc6b0ece0225a73e=0D https://github.com/qemu/qemu/commit/de5af7c5e64addc0eb89cde3cc6b0ec= e0225a73e=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Use OPC_MUL instead of OPC__MXU_MUL=0D =0D We already have a macro and definition to extract / check=0D the Special2 MUL opcode. Use it instead of the unnecessary=0D OPC__MXU_MUL macro.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-8-f4bug@amsat.org>=0D =0D =0D Commit: 2234528618e49d27b85fab4389f393de0fe8ca98=0D https://github.com/qemu/qemu/commit/2234528618e49d27b85fab4389f393d= e0fe8ca98=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Move MUL opcode check from decode_mxu() to decode_legacy()= =0D =0D Move the check for MUL opcode from decode_opc_mxu() callee=0D to decode_opc_legacy() caller, so we can simplify the ifdef'ry=0D and elide the call in few commits.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-9-f4bug@amsat.org>=0D =0D =0D Commit: e31b43ec507ba35a804f6323d94522c5a2e5581a=0D https://github.com/qemu/qemu/commit/e31b43ec507ba35a804f6323d94522c= 5a2e5581a=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Rename decode_opc_mxu() as decode_ase_mxu()=0D =0D Use "decode_{isa,ase,ext}_$name()" function name pattern for=0D public decodetree entrypoints.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-10-f4bug@amsat.org>=0D =0D =0D Commit: a8dad35388987fe3d55d6166d7f3f188eb607e97=0D https://github.com/qemu/qemu/commit/a8dad35388987fe3d55d6166d7f3f18= 8eb607e97=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Convert decode_ase_mxu() to decodetree prototype=0D =0D To easily convert MXU code to decodetree, making it return a boolean.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-11-f4bug@amsat.org>=0D =0D =0D Commit: c7abe00ae9336892ae615fbc39157ba110d1716b=0D https://github.com/qemu/qemu/commit/c7abe00ae9336892ae615fbc39157ba= 110d1716b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/translate.h=0D =0D Log Message:=0D -----------=0D target/mips: Simplify decode_opc_mxu() ifdef'ry=0D =0D By making the prototype public and checking=0D 'TARGET_LONG_BITS =3D=3D 32' we let the compiler=0D elide the decode_opc_mxu() call.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-12-f4bug@amsat.org>=0D =0D =0D Commit: fe35ea94838d8faba749ecfd49256f59e5fe0653=0D https://github.com/qemu/qemu/commit/fe35ea94838d8faba749ecfd49256f5= 9e5fe0653=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/translate.h=0D =0D Log Message:=0D -----------=0D target/mips: Introduce mxu_translate_init() helper=0D =0D Extract the MXU register initialization code from mips_tcg_init()=0D as a new mxu_translate_init() helper. Make it public and replace=0D !TARGET_MIPS64 ifdef'ry by the 'TARGET_LONG_BITS =3D=3D 32' check to=0D elide this code at preprocessing time.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-13-f4bug@amsat.org>=0D =0D =0D Commit: b24db6fcd4063db6d001e958b28bfc2dadb249d9=0D https://github.com/qemu/qemu/commit/b24db6fcd4063db6d001e958b28bfc2= dadb249d9=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/meson.build=0D A target/mips/mxu_translate.c=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Extract MXU code to new mxu_translate.c file=0D =0D Extract 1600+ lines from the big translate.c into a new file.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210226093111.3865906-14-f4bug@amsat.org>=0D =0D =0D Commit: c27b4579371e5d8eaed54182243ece54c752a4e5=0D https://github.com/qemu/qemu/commit/c27b4579371e5d8eaed54182243ece5= 4c752a4e5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Use gen_load_gpr[_hi]() when possible=0D =0D Use gen_load_gpr[_hi]() instead of open coding it.=0D =0D Patch generated using the following spatch script:=0D =0D @gen_load_gpr@=0D identifier reg_idx;=0D expression tcg_reg;=0D @@=0D -if (reg_idx =3D=3D 0) {=0D - tcg_gen_movi_tl(tcg_reg, 0);=0D -} else {=0D - tcg_gen_mov_tl(tcg_reg, cpu_gpr[reg_idx]);=0D -}=0D +gen_load_gpr(tcg_reg, reg_idx);=0D =0D @gen_load_gpr_hi@=0D identifier reg_idx;=0D expression tcg_reg;=0D @@=0D -if (reg_idx =3D=3D 0) {=0D - tcg_gen_movi_i64(tcg_reg, 0);=0D -} else {=0D - tcg_gen_mov_i64(tcg_reg, cpu_gpr_hi[reg_idx]);=0D -}=0D +gen_load_gpr_hi(tcg_reg, reg_idx);=0D =0D Suggested-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210308131604.460693-1-f4bug@amsat.org>=0D =0D =0D Commit: ffc672aa977131ccfccfd0c2aee2b004adb69ed5=0D https://github.com/qemu/qemu/commit/ffc672aa977131ccfccfd0c2aee2b00= 4adb69ed5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/meson.build=0D M target/mips/translate.c=0D M target/mips/translate.h=0D A target/mips/tx79.decode=0D A target/mips/tx79_translate.c=0D A target/mips/txx9_translate.c=0D =0D Log Message:=0D -----------=0D target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree=0D =0D Introduce decodetree structure to decode the tx79 opcodes.=0D Start it by moving the existing MFHI1 and MFLO1 opcodes.=0D Remove unnecessary comments.=0D =0D As the TX79 share opcodes with the TX19/TX39/TX49 CPUs,=0D we introduce the decode_ext_txx9() dispatcher where we=0D will add the other decoders later.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-9-f4bug@amsat.org>=0D =0D =0D Commit: 1f9408d5502c877ddf91ce00f529488c4b5c98d5=0D https://github.com/qemu/qemu/commit/1f9408d5502c877ddf91ce00f529488= c4b5c98d5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/tx79.decode=0D M target/mips/tx79_translate.c=0D =0D Log Message:=0D -----------=0D target/mips/tx79: Move MTHI1 / MTLO1 opcodes to decodetree=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-10-f4bug@amsat.org>=0D =0D =0D Commit: f9fa53f19786c82cab2e7ca0274d6d9f9bb59f4f=0D https://github.com/qemu/qemu/commit/f9fa53f19786c82cab2e7ca0274d6d9= f9bb59f4f=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/translate.h=0D =0D Log Message:=0D -----------=0D target/mips/translate: Make gen_rdhwr() public=0D =0D We will use gen_rdhwr() outside of translate.c, make it public.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-28-f4bug@amsat.org>=0D =0D =0D Commit: ca8def9bdbf3e62ef0afd9e02a51ef536019791a=0D https://github.com/qemu/qemu/commit/ca8def9bdbf3e62ef0afd9e02a51ef5= 36019791a=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips/translate: Simplify PCPYH using deposit_i64()=0D =0D Simplify the PCPYH (Parallel Copy Halfword) instruction by using=0D multiple calls to deposit_i64() which can be optimized by some=0D TCG backends.=0D =0D Suggested-by: Richard Henderson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-11-f4bug@amsat.org>=0D =0D =0D Commit: 5a976c002518d46a030f125e2170d78204528497=0D https://github.com/qemu/qemu/commit/5a976c002518d46a030f125e2170d78= 204528497=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/tx79.decode=0D M target/mips/tx79_translate.c=0D =0D Log Message:=0D -----------=0D target/mips/tx79: Move PCPYH opcode to decodetree=0D =0D Move the existing PCPYH opcode (Parallel Copy Halfword) to decodetree.=0D= Remove unnecessary code / comments.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-12-f4bug@amsat.org>=0D =0D =0D Commit: 94c882f7d159c6f412b1778cd71d58d9e39b8ef9=0D https://github.com/qemu/qemu/commit/94c882f7d159c6f412b1778cd71d58d= 9e39b8ef9=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/tx79.decode=0D M target/mips/tx79_translate.c=0D =0D Log Message:=0D -----------=0D target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree=0D =0D Move PCPYLD (Parallel Copy Lower Doubleword) and PCPYUD=0D (Parallel Copy Upper Doubleword) to decodetree. Remove=0D unnecessary code / comments.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-13-f4bug@amsat.org>=0D =0D =0D Commit: e71d0f56cedfeebe8adbf5a4fa4e84b2e2de3fdf=0D https://github.com/qemu/qemu/commit/e71d0f56cedfeebe8adbf5a4fa4e84b= 2e2de3fdf=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D =0D Log Message:=0D -----------=0D target/mips: Remove 'C790 Multimedia Instructions' dead code=0D =0D We have almost 400 lines of code full of /* TODO */ comments=0D which end calling gen_reserved_instruction().=0D =0D As we are not going to implement them, and all the caller's=0D switch() default cases already call gen_reserved_instruction(),=0D we can remove this altogether.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-14-f4bug@amsat.org>=0D =0D =0D Commit: d27fadddc673dd85a34102342b43be23d27eaab6=0D https://github.com/qemu/qemu/commit/d27fadddc673dd85a34102342b43be2= 3d27eaab6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-13 (Sat, 13 Mar 2021)=0D =0D Changed paths:=0D M target/mips/translate.c=0D M target/mips/tx79_translate.c=0D =0D Log Message:=0D -----------=0D target/mips/tx79: Salvage instructions description comment=0D =0D This comment describing the tx79 opcodes is helpful. As we=0D will implement these instructions in tx79_translate.c, move=0D the comment there.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210214175912.732946-15-f4bug@amsat.org>=0D =0D =0D Commit: 36d840f35b4fc7e2d47fb54313950f82690b2286=0D https://github.com/qemu/qemu/commit/36d840f35b4fc7e2d47fb54313950f8= 2690b2286=0D Author: Peter Maydell =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M hw/mips/gt64xxx_pci.c=0D M hw/mips/trace-events=0D M target/mips/meson.build=0D A target/mips/mxu_translate.c=0D M target/mips/translate.c=0D M target/mips/translate.h=0D A target/mips/tx79.decode=0D A target/mips/tx79_translate.c=0D A target/mips/txx9_translate.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/philmd/tags/mips-20210313' into s= taging=0D =0D MIPS patches queue=0D =0D - Tidy up the GT64120 north bridge=0D - Move XBurst Media eXtension Unit code to mxu_translate.c=0D - Convert TX79 to decodetree=0D =0D # gpg: Signature made Sat 13 Mar 2021 22:44:44 GMT=0D # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC= 0DE=0D # gpg: Good signature from "Philippe Mathieu-Daud=C3=A9 (F4BUG) " [full]=0D # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD = C0DE=0D =0D * remotes/philmd/tags/mips-20210313: (27 commits)=0D target/mips/tx79: Salvage instructions description comment=0D target/mips: Remove 'C790 Multimedia Instructions' dead code=0D target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree=0D target/mips/tx79: Move PCPYH opcode to decodetree=0D target/mips/translate: Simplify PCPYH using deposit_i64()=0D target/mips/translate: Make gen_rdhwr() public=0D target/mips/tx79: Move MTHI1 / MTLO1 opcodes to decodetree=0D target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree=0D target/mips: Use gen_load_gpr[_hi]() when possible=0D target/mips: Extract MXU code to new mxu_translate.c file=0D target/mips: Introduce mxu_translate_init() helper=0D target/mips: Simplify decode_opc_mxu() ifdef'ry=0D target/mips: Convert decode_ase_mxu() to decodetree prototype=0D target/mips: Rename decode_opc_mxu() as decode_ase_mxu()=0D target/mips: Move MUL opcode check from decode_mxu() to decode_legacy()= =0D target/mips: Use OPC_MUL instead of OPC__MXU_MUL=0D target/mips: Pass instruction opcode to decode_opc_mxu()=0D target/mips: Remove unused CPUMIPSState* from MXU functions=0D target/mips: Remove XBurst Media eXtension Unit dead code=0D target/mips: Rewrite complex ifdef'ry=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/6157b0e19721...36d840f35b4f= =0D From MAILER-DAEMON Mon Mar 15 11:40:50 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLpKr-0005Zz-6W for mharc-qemu-commits@gnu.org; Mon, 15 Mar 2021 11:40:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45912) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLpKZ-0005Sc-Ru for qemu-commits@nongnu.org; Mon, 15 Mar 2021 11:40:33 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:47547 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLpKV-0006Tf-ET for qemu-commits@nongnu.org; Mon, 15 Mar 2021 11:40:31 -0400 Received: from github.com (hubbernetes-node-f85e6aa.va3-iad.github.net [10.48.100.60]) by smtp.github.com (Postfix) with ESMTPA id 989265C08E8 for ; Mon, 15 Mar 2021 08:40:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615822823; bh=CmmPCUjGZEmq9p4pmCmyr6gc9t7tKO16PuJWWqR8QL0=; h=Date:From:To:Subject:From; b=ZUj1eE9RoI1f9fQ9r07YMPVohzp2dmj6yMdDftoM5gvP2j099QOfjZrp6TLiLN89+ J7MMhGS+R2XwKKJAVvgOa1jkyI6WfmdGQbfyJK2BB3uWzNW2459DrmSK/G2c++LRnh 8/nXc0FACcdW7NgN3gF1nvl1J9rgT+UM9Tsn3q3A= Date: Mon, 15 Mar 2021 08:40:23 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 34602f: tricore: added triboard with tc27x_soc X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Mar 2021 15:40:33 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 34602f9904aaea163e63a157a568ccc70d38397c=0D https://github.com/qemu/qemu/commit/34602f9904aaea163e63a157a568ccc= 70d38397c=0D Author: Andreas Konopik =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M default-configs/devices/tricore-softmmu.mak=0D M hw/tricore/Kconfig=0D M hw/tricore/meson.build=0D A hw/tricore/tc27x_soc.c=0D A hw/tricore/triboard.c=0D A include/hw/tricore/tc27x_soc.h=0D A include/hw/tricore/triboard.h=0D =0D Log Message:=0D -----------=0D tricore: added triboard with tc27x_soc=0D =0D Reviewed-by: Bastian Koppelmann =0D Signed-off-by: Andreas Konopik =0D Signed-off-by: David Brenken =0D Signed-off-by: Georg Hofstetter =0D Signed-off-by: Robert Rasche =0D Signed-off-by: Lars Biermanski =0D Message-Id: <20201109165055.10508-2-david.brenken@efs-auto.org>=0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: 27e4661638c16e9f4f5941019ad5e0ebce8b7815=0D https://github.com/qemu/qemu/commit/27e4661638c16e9f4f5941019ad5e0e= bce8b7815=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M target/tricore/helper.c=0D =0D Log Message:=0D -----------=0D target/tricore: Replace magic value by MMU_DATA_LOAD definition=0D =0D cpu_get_phys_page_debug() uses 'DATA LOAD' MMU access type.=0D =0D Reviewed-by: Bastian Koppelmann =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210127224255.3505711-2-f4bug@amsat.org>=0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: 5513b7700c6cfa1beebcfcd20e9c7458d1ebd3ea=0D https://github.com/qemu/qemu/commit/5513b7700c6cfa1beebcfcd20e9c745= 8d1ebd3ea=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M target/tricore/helper.c=0D =0D Log Message:=0D -----------=0D target/tricore: Pass MMUAccessType to get_physical_address()=0D =0D 'int access_type' and ACCESS_INT are unused, drop them.=0D Provide the mmu_idx argument to match other targets.=0D 'int rw' is actually the MMUAccessType, rename it.=0D =0D Reviewed-by: Bastian Koppelmann =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210127224255.3505711-3-f4bug@amsat.org>=0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: 4f293079402ad9cd1eae73c256d7adedc0b897b5=0D https://github.com/qemu/qemu/commit/4f293079402ad9cd1eae73c256d7ade= dc0b897b5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M target/tricore/cpu.h=0D =0D Log Message:=0D -----------=0D target/tricore: Remove unused definitions=0D =0D Remove these confusing and unused definitions.=0D =0D Reviewed-by: Bastian Koppelmann =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210127224255.3505711-4-f4bug@amsat.org>=0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: 9b620609d79ca0e101af024435c5b38b80478969=0D https://github.com/qemu/qemu/commit/9b620609d79ca0e101af024435c5b38= b80478969=0D Author: Andreas Konopik =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M target/tricore/translate.c=0D =0D Log Message:=0D -----------=0D tricore: fixed faulty conditions for extr and imask=0D =0D According to the TC 1.3.1. Architecture Manual [1; page 174], results are= =0D undefined, if pos + width > 32 and not 31 or if width =3D 0.=0D =0D We found this error because of a different behavior between qemu-tricore=0D= and the real tricore processor. For pos + width =3D 32, qemu-tricore did = not=0D generate any intermediate code and ran into a different state compared to= =0D the real hardware.=0D =0D [1] https://www.infineon.com/dgdl/tc_v131_instructionset_v138.pdf?fileId=3D= db3a304412b407950112b409b6dd0352=0D =0D [BK: Add the why to the commit message]=0D Reviewed-by: Bastian Koppelmann =0D Signed-off-by: Andreas Konopik =0D Signed-off-by: Georg Hofstetter =0D Signed-off-by: David Brenken =0D Message-Id: <20210211115329.8984-2-david.brenken@efs-auto.org>=0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: 007479842b27e03173a333b8c2e0dae14be64f8d=0D https://github.com/qemu/qemu/commit/007479842b27e03173a333b8c2e0dae= 14be64f8d=0D Author: Bastian Koppelmann =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M target/tricore/translate.c=0D =0D Log Message:=0D -----------=0D target/tricore: Fix imask OPC2_32_RRPW_IMASK for r3+1 =3D=3D r2=0D =0D if r3+1 and r2 are the same then we would overwrite r2 with our first=0D move and use the wrong result for the shift. Thus we store the result=0D from the mov in a temp.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: a21993c7f98862823280d1eb6d3e93cf6267896f=0D https://github.com/qemu/qemu/commit/a21993c7f98862823280d1eb6d3e93c= f6267896f=0D Author: Bastian Koppelmann =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M target/tricore/translate.c=0D =0D Log Message:=0D -----------=0D target/tricore: Fix OPC2_32_RRPW_EXTR for width=3D0=0D =0D if width was 0 we would run into the assertion:=0D =0D qemu-system-tricore: tcg/tcg-op.c:217: tcg_gen_sari_i32: Assertion `arg2 = >=3D 0 && arg2 < 32' failed.o=0D =0D The instruction manual specifies undefined behaviour for this case. So=0D= we bring this in line with the golden Infineon simlator 'tsim', which=0D simply writes 0 to the result in case of width=3D0.=0D =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: 51204c2f188ec1e2a38f14718d38a3772f850a4b=0D https://github.com/qemu/qemu/commit/51204c2f188ec1e2a38f14718d38a37= 72f850a4b=0D Author: Peter Maydell =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M default-configs/devices/tricore-softmmu.mak=0D M hw/tricore/Kconfig=0D M hw/tricore/meson.build=0D A hw/tricore/tc27x_soc.c=0D A hw/tricore/triboard.c=0D A include/hw/tricore/tc27x_soc.h=0D A include/hw/tricore/triboard.h=0D M target/tricore/cpu.h=0D M target/tricore/helper.c=0D M target/tricore/translate.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/bkoppelmann2/tags/pull-tricore-20= 210314' into staging=0D =0D - Added triboard with tc27x_soc=0D - Cleaned up get_physical_address()=0D - Fixed corner case bugs in OPC2_32_RRPW_IMASK and OPC2_32_RRPW_IMASK=0D insns=0D =0D # gpg: Signature made Sun 14 Mar 2021 13:53:11 GMT=0D # gpg: using RSA key 6E636A7E83F2DD0CFA6E6E370AD2C6396B69C= A14=0D # gpg: issuer "kbastian@mail.uni-paderborn.de"=0D # gpg: Good signature from "Bastian Koppelmann " [full]=0D # Primary key fingerprint: 6E63 6A7E 83F2 DD0C FA6E 6E37 0AD2 C639 6B69 = CA14=0D =0D * remotes/bkoppelmann2/tags/pull-tricore-20210314:=0D target/tricore: Fix OPC2_32_RRPW_EXTR for width=3D0=0D target/tricore: Fix imask OPC2_32_RRPW_IMASK for r3+1 =3D=3D r2=0D tricore: fixed faulty conditions for extr and imask=0D target/tricore: Remove unused definitions=0D target/tricore: Pass MMUAccessType to get_physical_address()=0D target/tricore: Replace magic value by MMU_DATA_LOAD definition=0D tricore: added triboard with tc27x_soc=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/36d840f35b4f...51204c2f188e= =0D From MAILER-DAEMON Mon Mar 15 12:54:26 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLqU5-00022Y-SC for mharc-qemu-commits@gnu.org; Mon, 15 Mar 2021 12:54:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39440) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLqU2-0001zF-JF for qemu-commits@nongnu.org; Mon, 15 Mar 2021 12:54:24 -0400 Received: from out-26.smtp.github.com ([192.30.252.209]:41983 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLqTz-0006h7-Rk for qemu-commits@nongnu.org; Mon, 15 Mar 2021 12:54:22 -0400 Received: from github.com (hubbernetes-node-2ab9f1f.ash1-iad.github.net [10.56.110.64]) by smtp.github.com (Postfix) with ESMTPA id 1F5165E08EE for ; Mon, 15 Mar 2021 09:54:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615827259; bh=F8V5aWQ6a7VDxM+rIspGDgYrtMUI54kQMAKq3KgmoGg=; h=Date:From:To:Subject:From; b=go6c34ePnYN1vwo3IDu07bpBPIsmGsXiby4eYwxmOJ5h/chXNFOUtpTLjTbK62X8x xDa1R55SQRNUOU+8lGOMp9F69Asx2w0q1BOhV9igP+s/E242XvIOZvIgb/bP/e/seg ay1Sq3/sfuKjNN67MvgzBoiO79BR3lySnwOQ73Cs= Date: Mon, 15 Mar 2021 09:54:19 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 34602f: tricore: added triboard with tc27x_soc X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Mar 2021 16:54:24 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 34602f9904aaea163e63a157a568ccc70d38397c=0D https://github.com/qemu/qemu/commit/34602f9904aaea163e63a157a568ccc= 70d38397c=0D Author: Andreas Konopik =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M default-configs/devices/tricore-softmmu.mak=0D M hw/tricore/Kconfig=0D M hw/tricore/meson.build=0D A hw/tricore/tc27x_soc.c=0D A hw/tricore/triboard.c=0D A include/hw/tricore/tc27x_soc.h=0D A include/hw/tricore/triboard.h=0D =0D Log Message:=0D -----------=0D tricore: added triboard with tc27x_soc=0D =0D Reviewed-by: Bastian Koppelmann =0D Signed-off-by: Andreas Konopik =0D Signed-off-by: David Brenken =0D Signed-off-by: Georg Hofstetter =0D Signed-off-by: Robert Rasche =0D Signed-off-by: Lars Biermanski =0D Message-Id: <20201109165055.10508-2-david.brenken@efs-auto.org>=0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: 27e4661638c16e9f4f5941019ad5e0ebce8b7815=0D https://github.com/qemu/qemu/commit/27e4661638c16e9f4f5941019ad5e0e= bce8b7815=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M target/tricore/helper.c=0D =0D Log Message:=0D -----------=0D target/tricore: Replace magic value by MMU_DATA_LOAD definition=0D =0D cpu_get_phys_page_debug() uses 'DATA LOAD' MMU access type.=0D =0D Reviewed-by: Bastian Koppelmann =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210127224255.3505711-2-f4bug@amsat.org>=0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: 5513b7700c6cfa1beebcfcd20e9c7458d1ebd3ea=0D https://github.com/qemu/qemu/commit/5513b7700c6cfa1beebcfcd20e9c745= 8d1ebd3ea=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M target/tricore/helper.c=0D =0D Log Message:=0D -----------=0D target/tricore: Pass MMUAccessType to get_physical_address()=0D =0D 'int access_type' and ACCESS_INT are unused, drop them.=0D Provide the mmu_idx argument to match other targets.=0D 'int rw' is actually the MMUAccessType, rename it.=0D =0D Reviewed-by: Bastian Koppelmann =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210127224255.3505711-3-f4bug@amsat.org>=0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: 4f293079402ad9cd1eae73c256d7adedc0b897b5=0D https://github.com/qemu/qemu/commit/4f293079402ad9cd1eae73c256d7ade= dc0b897b5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M target/tricore/cpu.h=0D =0D Log Message:=0D -----------=0D target/tricore: Remove unused definitions=0D =0D Remove these confusing and unused definitions.=0D =0D Reviewed-by: Bastian Koppelmann =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210127224255.3505711-4-f4bug@amsat.org>=0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: 9b620609d79ca0e101af024435c5b38b80478969=0D https://github.com/qemu/qemu/commit/9b620609d79ca0e101af024435c5b38= b80478969=0D Author: Andreas Konopik =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M target/tricore/translate.c=0D =0D Log Message:=0D -----------=0D tricore: fixed faulty conditions for extr and imask=0D =0D According to the TC 1.3.1. Architecture Manual [1; page 174], results are= =0D undefined, if pos + width > 32 and not 31 or if width =3D 0.=0D =0D We found this error because of a different behavior between qemu-tricore=0D= and the real tricore processor. For pos + width =3D 32, qemu-tricore did = not=0D generate any intermediate code and ran into a different state compared to= =0D the real hardware.=0D =0D [1] https://www.infineon.com/dgdl/tc_v131_instructionset_v138.pdf?fileId=3D= db3a304412b407950112b409b6dd0352=0D =0D [BK: Add the why to the commit message]=0D Reviewed-by: Bastian Koppelmann =0D Signed-off-by: Andreas Konopik =0D Signed-off-by: Georg Hofstetter =0D Signed-off-by: David Brenken =0D Message-Id: <20210211115329.8984-2-david.brenken@efs-auto.org>=0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: 007479842b27e03173a333b8c2e0dae14be64f8d=0D https://github.com/qemu/qemu/commit/007479842b27e03173a333b8c2e0dae= 14be64f8d=0D Author: Bastian Koppelmann =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M target/tricore/translate.c=0D =0D Log Message:=0D -----------=0D target/tricore: Fix imask OPC2_32_RRPW_IMASK for r3+1 =3D=3D r2=0D =0D if r3+1 and r2 are the same then we would overwrite r2 with our first=0D move and use the wrong result for the shift. Thus we store the result=0D from the mov in a temp.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: a21993c7f98862823280d1eb6d3e93cf6267896f=0D https://github.com/qemu/qemu/commit/a21993c7f98862823280d1eb6d3e93c= f6267896f=0D Author: Bastian Koppelmann =0D Date: 2021-03-14 (Sun, 14 Mar 2021)=0D =0D Changed paths:=0D M target/tricore/translate.c=0D =0D Log Message:=0D -----------=0D target/tricore: Fix OPC2_32_RRPW_EXTR for width=3D0=0D =0D if width was 0 we would run into the assertion:=0D =0D qemu-system-tricore: tcg/tcg-op.c:217: tcg_gen_sari_i32: Assertion `arg2 = >=3D 0 && arg2 < 32' failed.o=0D =0D The instruction manual specifies undefined behaviour for this case. So=0D= we bring this in line with the golden Infineon simlator 'tsim', which=0D simply writes 0 to the result in case of width=3D0.=0D =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Bastian Koppelmann =0D =0D =0D Commit: 51204c2f188ec1e2a38f14718d38a3772f850a4b=0D https://github.com/qemu/qemu/commit/51204c2f188ec1e2a38f14718d38a37= 72f850a4b=0D Author: Peter Maydell =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M default-configs/devices/tricore-softmmu.mak=0D M hw/tricore/Kconfig=0D M hw/tricore/meson.build=0D A hw/tricore/tc27x_soc.c=0D A hw/tricore/triboard.c=0D A include/hw/tricore/tc27x_soc.h=0D A include/hw/tricore/triboard.h=0D M target/tricore/cpu.h=0D M target/tricore/helper.c=0D M target/tricore/translate.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/bkoppelmann2/tags/pull-tricore-20= 210314' into staging=0D =0D - Added triboard with tc27x_soc=0D - Cleaned up get_physical_address()=0D - Fixed corner case bugs in OPC2_32_RRPW_IMASK and OPC2_32_RRPW_IMASK=0D insns=0D =0D # gpg: Signature made Sun 14 Mar 2021 13:53:11 GMT=0D # gpg: using RSA key 6E636A7E83F2DD0CFA6E6E370AD2C6396B69C= A14=0D # gpg: issuer "kbastian@mail.uni-paderborn.de"=0D # gpg: Good signature from "Bastian Koppelmann " [full]=0D # Primary key fingerprint: 6E63 6A7E 83F2 DD0C FA6E 6E37 0AD2 C639 6B69 = CA14=0D =0D * remotes/bkoppelmann2/tags/pull-tricore-20210314:=0D target/tricore: Fix OPC2_32_RRPW_EXTR for width=3D0=0D target/tricore: Fix imask OPC2_32_RRPW_IMASK for r3+1 =3D=3D r2=0D tricore: fixed faulty conditions for extr and imask=0D target/tricore: Remove unused definitions=0D target/tricore: Pass MMUAccessType to get_physical_address()=0D target/tricore: Replace magic value by MMU_DATA_LOAD definition=0D tricore: added triboard with tc27x_soc=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/36d840f35b4f...51204c2f188e= =0D From MAILER-DAEMON Mon Mar 15 13:00:53 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLqaJ-0007AR-9z for mharc-qemu-commits@gnu.org; Mon, 15 Mar 2021 13:00:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41314) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLqaE-00079G-SV for qemu-commits@nongnu.org; Mon, 15 Mar 2021 13:00:48 -0400 Received: from out-24.smtp.github.com ([192.30.252.207]:49367) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLqa7-0000JR-E4 for qemu-commits@nongnu.org; Mon, 15 Mar 2021 13:00:46 -0400 Received: from github.com (hubbernetes-node-7b40740.ac4-iad.github.net [10.52.207.48]) by smtp.github.com (Postfix) with ESMTPA id A1E2E600C57 for ; Mon, 15 Mar 2021 10:00:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615827638; bh=QIMoNkbAp49HEMsweDIaahnSitUsmn11Obuc+cGXP4Y=; h=Date:From:To:Subject:From; b=x7ozK7BaNGMd6ZzwQxKT+OG3+VvgNFkjz0Pc1PDSdTxIh68WGUlBlDlyVR9zrMxdp UnFiqCa8dxwgHZh+Mr0Km38Q46y7ubR3lJzwP8Pp469Pq6U16j18j1B+mCV8xmikYO GYXpArWfsdna+S2CdNdFryvFruv5EfwBDCnXNdMk= Date: Mon, 15 Mar 2021 10:00:38 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 956eb2: hw/misc/led: Add yellow LED X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Mar 2021 17:00:48 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 956eb2043a9367296af7bd9b725f1971af48efa9=0D https://github.com/qemu/qemu/commit/956eb2043a9367296af7bd9b725f197= 1af48efa9=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/led.c=0D M include/hw/misc/led.h=0D =0D Log Message:=0D -----------=0D hw/misc/led: Add yellow LED=0D =0D Add the yellow "lime" LED.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Michael Rolnik =0D Message-Id: <20210313165445.2113938-2-f4bug@amsat.org>=0D =0D =0D Commit: 15991968a072bca0f73eaa7929273afd80f70979=0D https://github.com/qemu/qemu/commit/15991968a072bca0f73eaa7929273af= d80f70979=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/avr/arduino.c=0D =0D Log Message:=0D -----------=0D hw/avr/arduino: List board schematic links=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Michael Rolnik =0D Message-Id: <20210313165445.2113938-3-f4bug@amsat.org>=0D =0D =0D Commit: 2e35dfb634daba466adbc382da64e5fd4ce9d2ed=0D https://github.com/qemu/qemu/commit/2e35dfb634daba466adbc382da64e5f= d4ce9d2ed=0D Author: Lichang Zhao =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/avr/helper.c=0D =0D Log Message:=0D -----------=0D target/avr: Fix some comment spelling errors=0D =0D I found that there are many spelling errors in the comments of qemu/targe= t/avr.=0D I used spellcheck to check the spelling errors and found some errors in t= he folder.=0D =0D Signed-off-by: Lichang Zhao =0D Reviewed-by: David Edmondson =0D Reviewed-by: Philippe Mathieu-Daude=0D Message-Id: <20201009064449.2336-12-zhaolichang@huawei.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Michael Rolnik =0D =0D =0D Commit: 56b90e60c4019b08012bd8bd1459efc00b055577=0D https://github.com/qemu/qemu/commit/56b90e60c4019b08012bd8bd1459efc= 00b055577=0D Author: Ivanov Arkasha =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/avr/helper.c=0D =0D Log Message:=0D -----------=0D target/avr: Fix interrupt execution=0D =0D Only one interrupt is in progress at the moment.=0D It is only necessary to set to reset interrupt_request=0D after all interrupts have been executed.=0D =0D Signed-off-by: Ivanov Arkasha =0D Message-Id: <20210312164754.18437-1-arkaisp2021@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Michael Rolnik =0D =0D =0D Commit: e7c6a8cf9f5c82aa152273e1c9e80d07b1b0c32c=0D https://github.com/qemu/qemu/commit/e7c6a8cf9f5c82aa152273e1c9e80d0= 7b1b0c32c=0D Author: Peter Maydell =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/avr/arduino.c=0D M hw/misc/led.c=0D M include/hw/misc/led.h=0D M target/avr/helper.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/philmd/tags/avr-20210315' into st= aging=0D =0D AVR patches queue=0D =0D - Only reset 'interrupt_request' mask once all interrupts executed=0D - Documentation and typo fixes=0D =0D # gpg: Signature made Sun 14 Mar 2021 23:45:34 GMT=0D # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC= 0DE=0D # gpg: Good signature from "Philippe Mathieu-Daud=C3=A9 (F4BUG) " [full]=0D # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD = C0DE=0D =0D * remotes/philmd/tags/avr-20210315:=0D target/avr: Fix interrupt execution=0D target/avr: Fix some comment spelling errors=0D hw/avr/arduino: List board schematic links=0D hw/misc/led: Add yellow LED=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/51204c2f188e...e7c6a8cf9f5c= =0D From MAILER-DAEMON Mon Mar 15 15:23:16 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLso4-0001Ni-6q for mharc-qemu-commits@gnu.org; Mon, 15 Mar 2021 15:23:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58610) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLso2-0001Iz-Ey for qemu-commits@nongnu.org; Mon, 15 Mar 2021 15:23:10 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:41199) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLsnz-0000Vr-8N for qemu-commits@nongnu.org; Mon, 15 Mar 2021 15:23:09 -0400 Received: from github.com (hubbernetes-node-8e6ce34.ash1-iad.github.net [10.56.102.69]) by smtp.github.com (Postfix) with ESMTPA id 6F29590076D for ; Mon, 15 Mar 2021 12:23:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615836186; bh=0jVo1Xjqfy7+ej2kWFtT0AeFtNR+3T/0RuX7FfVHg/Q=; h=Date:From:To:Subject:From; b=ECUIPhlSLAHGm6OFkpmAM3Oz3N8F41wiY1Ue8FN0Ach2cAFMJfYWZJEbPTM55ZAYm 5vwE6VjidrfxtNfWaKeNrHfbI3F8xDve4rKfkiTMYO4XefL58+XGak5+fD+reVkj2W hMg5F+2El/3KQW8PiL/bqHCqg0C0dpUt2yhXtHxA= Date: Mon, 15 Mar 2021 12:23:06 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -46 X-Spam_score: -4.7 X-Spam_bar: ---- X-Spam_report: (-4.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 956eb2: hw/misc/led: Add yellow LED X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Mar 2021 19:23:10 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 956eb2043a9367296af7bd9b725f1971af48efa9=0D https://github.com/qemu/qemu/commit/956eb2043a9367296af7bd9b725f197= 1af48efa9=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/misc/led.c=0D M include/hw/misc/led.h=0D =0D Log Message:=0D -----------=0D hw/misc/led: Add yellow LED=0D =0D Add the yellow "lime" LED.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Michael Rolnik =0D Message-Id: <20210313165445.2113938-2-f4bug@amsat.org>=0D =0D =0D Commit: 15991968a072bca0f73eaa7929273afd80f70979=0D https://github.com/qemu/qemu/commit/15991968a072bca0f73eaa7929273af= d80f70979=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/avr/arduino.c=0D =0D Log Message:=0D -----------=0D hw/avr/arduino: List board schematic links=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Michael Rolnik =0D Message-Id: <20210313165445.2113938-3-f4bug@amsat.org>=0D =0D =0D Commit: 2e35dfb634daba466adbc382da64e5fd4ce9d2ed=0D https://github.com/qemu/qemu/commit/2e35dfb634daba466adbc382da64e5f= d4ce9d2ed=0D Author: Lichang Zhao =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/avr/helper.c=0D =0D Log Message:=0D -----------=0D target/avr: Fix some comment spelling errors=0D =0D I found that there are many spelling errors in the comments of qemu/targe= t/avr.=0D I used spellcheck to check the spelling errors and found some errors in t= he folder.=0D =0D Signed-off-by: Lichang Zhao =0D Reviewed-by: David Edmondson =0D Reviewed-by: Philippe Mathieu-Daude=0D Message-Id: <20201009064449.2336-12-zhaolichang@huawei.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Michael Rolnik =0D =0D =0D Commit: 56b90e60c4019b08012bd8bd1459efc00b055577=0D https://github.com/qemu/qemu/commit/56b90e60c4019b08012bd8bd1459efc= 00b055577=0D Author: Ivanov Arkasha =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/avr/helper.c=0D =0D Log Message:=0D -----------=0D target/avr: Fix interrupt execution=0D =0D Only one interrupt is in progress at the moment.=0D It is only necessary to set to reset interrupt_request=0D after all interrupts have been executed.=0D =0D Signed-off-by: Ivanov Arkasha =0D Message-Id: <20210312164754.18437-1-arkaisp2021@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Michael Rolnik =0D =0D =0D Commit: e7c6a8cf9f5c82aa152273e1c9e80d07b1b0c32c=0D https://github.com/qemu/qemu/commit/e7c6a8cf9f5c82aa152273e1c9e80d0= 7b1b0c32c=0D Author: Peter Maydell =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/avr/arduino.c=0D M hw/misc/led.c=0D M include/hw/misc/led.h=0D M target/avr/helper.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/philmd/tags/avr-20210315' into st= aging=0D =0D AVR patches queue=0D =0D - Only reset 'interrupt_request' mask once all interrupts executed=0D - Documentation and typo fixes=0D =0D # gpg: Signature made Sun 14 Mar 2021 23:45:34 GMT=0D # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC= 0DE=0D # gpg: Good signature from "Philippe Mathieu-Daud=C3=A9 (F4BUG) " [full]=0D # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD = C0DE=0D =0D * remotes/philmd/tags/avr-20210315:=0D target/avr: Fix interrupt execution=0D target/avr: Fix some comment spelling errors=0D hw/avr/arduino: List board schematic links=0D hw/misc/led: Add yellow LED=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/51204c2f188e...e7c6a8cf9f5c= =0D From MAILER-DAEMON Mon Mar 15 15:28:43 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLstP-0005MP-Rc for mharc-qemu-commits@gnu.org; Mon, 15 Mar 2021 15:28:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60338) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLstO-0005Kq-BT for qemu-commits@nongnu.org; Mon, 15 Mar 2021 15:28:42 -0400 Received: from out-25.smtp.github.com ([192.30.252.208]:40821 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLstM-0002t1-Ho for qemu-commits@nongnu.org; Mon, 15 Mar 2021 15:28:42 -0400 Received: from github.com (hubbernetes-node-2d29616.ash1-iad.github.net [10.56.102.71]) by smtp.github.com (Postfix) with ESMTPA id B6075840D5F for ; Mon, 15 Mar 2021 12:28:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615836519; bh=XgyJuodXc3TrYn+aAvXMIoIKe70aKdHHAxwPdE0J+bA=; h=Date:From:To:Subject:From; b=oqUIif2KPdjXsK31auWe0KDLqoIdkUWdP3xkJQavH4X3IRm+JlvXLYuQ0gyxOcOZc OssM2sClmZxU3X6fxB5vO/0gpLSCtcCBuvb5DHpgjFXW6Z781+47qQjvus1zXXZsa1 CzvSJ96YlOml4/qPw+Z4RdSBtUl0OgA32X12MU3M= Date: Mon, 15 Mar 2021 12:28:39 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] fb0b15: virtio-blk: Respect discard granularity X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Mar 2021 19:28:42 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: fb0b154c801e3447e505de420195fb7038695941 https://github.com/qemu/qemu/commit/fb0b154c801e3447e505de420195fb7038695941 Author: Akihiko Odaki Date: 2021-03-15 (Mon, 15 Mar 2021) Changed paths: M hw/block/virtio-blk.c M hw/core/machine.c M include/hw/virtio/virtio-blk.h Log Message: ----------- virtio-blk: Respect discard granularity Report the configured granularity for discard operation to the guest. If this is not set use the block size. Since until now we have ignored the configured discard granularity and always reported the block size, let's add 'report-discard-granularity' property and disable it for older machine types to avoid migration issues. Signed-off-by: Akihiko Odaki Reviewed-by: Stefano Garzarella Signed-off-by: Stefan Hajnoczi Message-Id: <20210225001239.47046-1-akihiko.odaki@gmail.com> Commit: 2615a5e433aeb812c300d3a48e1a88e1303e2339 https://github.com/qemu/qemu/commit/2615a5e433aeb812c300d3a48e1a88e1303e2339 Author: Peter Maydell Date: 2021-03-15 (Mon, 15 Mar 2021) Changed paths: M hw/block/virtio-blk.c M hw/core/machine.c M include/hw/virtio/virtio-blk.h Log Message: ----------- Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging Pull request # gpg: Signature made Mon 15 Mar 2021 09:50:58 GMT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi " [full] # gpg: aka "Stefan Hajnoczi " [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha-gitlab/tags/block-pull-request: virtio-blk: Respect discard granularity Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/e7c6a8cf9f5c...2615a5e433ae From MAILER-DAEMON Mon Mar 15 18:01:47 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLvHX-0004Ig-1h for mharc-qemu-commits@gnu.org; Mon, 15 Mar 2021 18:01:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42920) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLvHV-0004Fn-MI for qemu-commits@nongnu.org; Mon, 15 Mar 2021 18:01:45 -0400 Received: from out-26.smtp.github.com ([192.30.252.209]:33859 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLvHT-0004Ya-OJ for qemu-commits@nongnu.org; Mon, 15 Mar 2021 18:01:45 -0400 Received: from github.com (hubbernetes-node-3b167ec.ash1-iad.github.net [10.56.102.68]) by smtp.github.com (Postfix) with ESMTPA id 146415E0912 for ; Mon, 15 Mar 2021 15:01:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615845703; bh=GZXhnNDXai+jrJfhrwqBoyyF8tPy7tnlkZ7h0O02aWE=; h=Date:From:To:Subject:From; b=tM5mjDSkLSKvRCwSiSj5Xow4GZwzNTN6pEcetq/kNSzzvU+DJy5W8GeSeGkOq1PhG QnC9E59KGUGpMCEPMlsP3CKWbEXmfReSPZpfpHjz/swJr4qMYRH0JvRFMR2StJj5oW HhIf708D9pJzUwvDAEQH9nxoyAoDshru3P+TCIS8= Date: Mon, 15 Mar 2021 15:01:43 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] fb0b15: virtio-blk: Respect discard granularity X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Mar 2021 22:01:46 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: fb0b154c801e3447e505de420195fb7038695941 https://github.com/qemu/qemu/commit/fb0b154c801e3447e505de420195fb7038695941 Author: Akihiko Odaki Date: 2021-03-15 (Mon, 15 Mar 2021) Changed paths: M hw/block/virtio-blk.c M hw/core/machine.c M include/hw/virtio/virtio-blk.h Log Message: ----------- virtio-blk: Respect discard granularity Report the configured granularity for discard operation to the guest. If this is not set use the block size. Since until now we have ignored the configured discard granularity and always reported the block size, let's add 'report-discard-granularity' property and disable it for older machine types to avoid migration issues. Signed-off-by: Akihiko Odaki Reviewed-by: Stefano Garzarella Signed-off-by: Stefan Hajnoczi Message-Id: <20210225001239.47046-1-akihiko.odaki@gmail.com> Commit: 2615a5e433aeb812c300d3a48e1a88e1303e2339 https://github.com/qemu/qemu/commit/2615a5e433aeb812c300d3a48e1a88e1303e2339 Author: Peter Maydell Date: 2021-03-15 (Mon, 15 Mar 2021) Changed paths: M hw/block/virtio-blk.c M hw/core/machine.c M include/hw/virtio/virtio-blk.h Log Message: ----------- Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging Pull request # gpg: Signature made Mon 15 Mar 2021 09:50:58 GMT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi " [full] # gpg: aka "Stefan Hajnoczi " [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha-gitlab/tags/block-pull-request: virtio-blk: Respect discard granularity Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/e7c6a8cf9f5c...2615a5e433ae From MAILER-DAEMON Mon Mar 15 18:07:22 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lLvMw-0008Qv-RC for mharc-qemu-commits@gnu.org; Mon, 15 Mar 2021 18:07:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44614) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLvMw-0008Q4-6m for qemu-commits@nongnu.org; Mon, 15 Mar 2021 18:07:22 -0400 Received: from out-27.smtp.github.com ([192.30.252.210]:34509) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lLvMu-0007Fd-6L for qemu-commits@nongnu.org; Mon, 15 Mar 2021 18:07:21 -0400 Received: from github.com (hubbernetes-node-3c03362.ash1-iad.github.net [10.56.122.42]) by smtp.github.com (Postfix) with ESMTPA id 8D81A900B3D for ; Mon, 15 Mar 2021 15:07:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615846039; bh=KOMnfjQ6/XRnmJBEstBfLrE3mgxUnQGizZ5TLz+f0SA=; h=Date:From:To:Subject:From; b=iQVKI+3KU5fMSKAq/5Js4+hGN/3JljS/wiWmYVDQ0fvrrTw/+h2Wckx6vvXrRFY/e yDXNZT3VGjEFh0rbQ0LBfBIyZuh0yNoWCjZ1b3+nyDl3aeKjw6zqh96uixX+t5/zFk ThHv1q9rPByOP/pd5ZqX695ga3fibqqsSPI/hY4I= Date: Mon, 15 Mar 2021 15:07:19 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.210; envelope-from=noreply@github.com; helo=out-27.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 8ab73f: hexagon: do not specify executables as inputs X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Mar 2021 22:07:22 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 8ab73f5572b9db672e0cbb943d5dd0f55711b9ef=0D https://github.com/qemu/qemu/commit/8ab73f5572b9db672e0cbb943d5dd0f= 55711b9ef=0D Author: Paolo Bonzini =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/hexagon/meson.build=0D =0D Log Message:=0D -----------=0D hexagon: do not specify executables as inputs=0D =0D gen_semantics is an executable, not an input. Meson 0.57 special cases=0D= the first argument and @INPUT@ is not expanded there. Fix that by=0D not including it in the input, only in the command.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 4268cb4020c28bceb48c05678bea430310408bf0=0D https://github.com/qemu/qemu/commit/4268cb4020c28bceb48c05678bea430= 310408bf0=0D Author: Paolo Bonzini =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/hexagon/meson.build=0D =0D Log Message:=0D -----------=0D hexagon: do not specify Python scripts as inputs=0D =0D Python scripts are not inputs, and putting them in @INPUT@. This=0D puts requirements on the command line format, keeping all inputs=0D close to the name of the script. Avoid that by not including the=0D script in the command and not in the inputs.=0D =0D Also wrap "PYTHONPATH" usage with "env", since setting the environment=0D= this way is not valid under Windows.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 81316e456e42b802b3e273ad4eb2bfdd2f148e75=0D https://github.com/qemu/qemu/commit/81316e456e42b802b3e273ad4eb2bfd= d2f148e75=0D Author: Paolo Bonzini =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M meson=0D =0D Log Message:=0D -----------=0D meson: bump submodule to 0.57.1=0D =0D The main advantage of 0.57 is that it fixes=0D https://github.com/mesonbuild/meson/pull/7900, thus avoiding unnecessary=0D= rebuilds after running meson.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 2c5c80f9bb85e8dc5d32cb1ae9320cf8c636c669=0D https://github.com/qemu/qemu/commit/2c5c80f9bb85e8dc5d32cb1ae9320cf= 8c636c669=0D Author: Paolo Bonzini =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M configure=0D M docs/meson.build=0D M meson.build=0D M plugins/meson.build=0D M scripts/mtest2make.py=0D M tests/docker/dockerfiles/centos7.docker=0D M tests/qapi-schema/meson.build=0D M tests/qtest/meson.build=0D M tests/unit/meson.build=0D M trace/meson.build=0D =0D Log Message:=0D -----------=0D meson: switch minimum meson version to 0.57.0=0D =0D Meson 0.57.0 does not need b_staticpic=3D$pie anymore, and has=0D stabilized the keyval module. Remove the workaround and use a few=0D replacements for features deprecated in the 0.57.0 release cycle.=0D =0D The CentOS 7 dockerfile change forces the rebuild of the container.=0D =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 57d42c3b774d0716b9ad1a5a576480521edc7201=0D https://github.com/qemu/qemu/commit/57d42c3b774d0716b9ad1a5a5764805= 21edc7201=0D Author: Paolo Bonzini =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/hexagon/meson.build=0D =0D Log Message:=0D -----------=0D hexagon: use env keyword argument to pass PYTHONPATH=0D =0D This feature is new in meson 0.57 and allows getting rid of the "env" wra= pper.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: f84e7fb68d554654487bb64787656b6f4a0bcfbc=0D https://github.com/qemu/qemu/commit/f84e7fb68d554654487bb64787656b6= f4a0bcfbc=0D Author: Peter Maydell =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M configure=0D M docs/meson.build=0D M meson=0D M meson.build=0D M plugins/meson.build=0D M scripts/mtest2make.py=0D M target/hexagon/meson.build=0D M tests/docker/dockerfiles/centos7.docker=0D M tests/qapi-schema/meson.build=0D M tests/qtest/meson.build=0D M tests/unit/meson.build=0D M trace/meson.build=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream-= meson-0.57' into staging=0D =0D Update Meson to 0.57.=0D =0D # gpg: Signature made Mon 15 Mar 2021 17:10:46 GMT=0D # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7A= E83=0D # gpg: issuer "pbonzini@redhat.com"=0D # gpg: Good signature from "Paolo Bonzini " [full]=0D # gpg: aka "Paolo Bonzini " [full]=0D= # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 = 69B1=0D # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 = AE83=0D =0D * remotes/bonzini-gitlab/tags/for-upstream-meson-0.57:=0D hexagon: use env keyword argument to pass PYTHONPATH=0D meson: switch minimum meson version to 0.57.0=0D meson: bump submodule to 0.57.1=0D hexagon: do not specify Python scripts as inputs=0D hexagon: do not specify executables as inputs=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/2615a5e433ae...f84e7fb68d55= =0D From MAILER-DAEMON Tue Mar 16 06:54:47 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lM7La-0007Se-TE for mharc-qemu-commits@gnu.org; Tue, 16 Mar 2021 06:54:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49462) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lM7LV-0007Qe-Hm for qemu-commits@nongnu.org; Tue, 16 Mar 2021 06:54:41 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:35765 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lM7LR-0003kz-I0 for qemu-commits@nongnu.org; Tue, 16 Mar 2021 06:54:40 -0400 Received: from github.com (hubbernetes-node-a0d78de.va3-iad.github.net [10.48.17.63]) by smtp.github.com (Postfix) with ESMTPA id 5BD7F5C0429 for ; Tue, 16 Mar 2021 03:54:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615892076; bh=/XVqtqCR4KPQPFjUmHM5dggEFS3riiP7y0oXoK1d+gU=; h=Date:From:To:Subject:From; b=C/DhYwR2YA80MDObml5+zsO/415PF1HzhFU2dwKlQID7WpuFkvgeUJnf86QBYEi+D TaX6MBZtrHO3zTINqE0h3miJmcLmlhQAkI3cEenSO+uGeim4kIf/QaXVILHqw51lPh 7jNztCjp8Gi75j2WQil2Zu3kpIFhI/AnLqq+Sts4= Date: Tue, 16 Mar 2021 03:54:36 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 51a81a: virtio-net: calculating proper msix vectors on init X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Mar 2021 10:54:41 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 51a81a2118df0c70988f00d61647da9e298483a4=0D https://github.com/qemu/qemu/commit/51a81a2118df0c70988f00d61647da9= e298483a4=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/core/machine.c=0D M hw/virtio/virtio-net-pci.c=0D =0D Log Message:=0D -----------=0D virtio-net: calculating proper msix vectors on init=0D =0D Currently, the default msix vectors for virtio-net-pci is 3 which is=0D obvious not suitable for multiqueue guest, so we depends on the user=0D or management tools to pass a correct vectors parameter. In fact, we=0D can simplifying this by calculating the number of vectors on realize.=0D =0D Consider we have N queues, the number of vectors needed is 2*N + 2=0D (#queue pairs + plus one config interrupt and control vq). We didn't=0D check whether or not host support control vq because it was added=0D unconditionally by qemu to avoid breaking legacy guests such as Minix.=0D= =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Stefan Hajnoczi =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 26d0586fc931dd541d5c040c5e3b2a7bb183f96c=0D https://github.com/qemu/qemu/commit/26d0586fc931dd541d5c040c5e3b2a7= bb183f96c=0D Author: Bin Meng =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M net/net.c=0D =0D Log Message:=0D -----------=0D net: Fix build error when DEBUG_NET is on=0D =0D "qemu-common.h" should be included to provide the forward declaration=0D of qemu_hexdump() when DEBUG_NET is on.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: e73b4317b7b7a9d67368387c2f4fbfba6c43e39f=0D https://github.com/qemu/qemu/commit/e73b4317b7b7a9d67368387c2f4fbfb= a6c43e39f=0D Author: Paolo Bonzini =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M net/net.c=0D =0D Log Message:=0D -----------=0D net: validate that ids are well formed=0D =0D When a network or network device is created from the command line or HMP,= =0D QemuOpts ensures that the id passes the id_wellformed check. However,=0D= QMP skips this:=0D =0D $ qemu-system-x86_64 -qmp stdio -S -nic user,id=3D123/456=0D qemu-system-x86_64: -nic user,id=3D123/456: Parameter id expects an id= entifier=0D Identifiers consist of letters, digits, -, ., _, starting with a lette= r.=0D =0D $ qemu-system-x86_64 -qmp stdio -S=0D {"execute":"qmp_capabilities"}=0D {"return": {}}=0D {"execute":"netdev_add", "arguments": {"type": "user", "id": "123/456"= }}=0D {"return": {}}=0D =0D After:=0D =0D $ qemu-system-x86_64 -qmp stdio -S=0D {"execute":"qmp_capabilities"}=0D {"return": {}}=0D {"execute":"netdev_add", "arguments": {"type": "user", "id": "123/456"= }}=0D {"error": {"class": "GenericError", "desc": "Parameter "id" expects an= identifier"}}=0D =0D Validity checks should be performed always at the bottom of the call chai= n,=0D because QMP skips all the steps above. At the same time we know that eve= ry=0D call chain should go through either QMP or (for legacy) through QemuOpts.= =0D Because the id for -net and -nic is automatically generated and not=0D well-formed by design, just add the check to QMP.=0D =0D Cc: Jason Wang =0D Signed-off-by: Paolo Bonzini =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 3de46e6fc489c52c9431a8a832ad8170a7569bd8=0D https://github.com/qemu/qemu/commit/3de46e6fc489c52c9431a8a832ad817= 0a7569bd8=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/e1000.c=0D =0D Log Message:=0D -----------=0D e1000: fail early for evil descriptor=0D =0D During procss_tx_desc(), driver can try to chain data descriptor with=0D legacy descriptor, when will lead underflow for the following=0D calculation in process_tx_desc() for bytes:=0D =0D if (tp->size + bytes > msh)=0D bytes =3D msh - tp->size;=0D =0D This will lead a infinite loop. So check and fail early if tp->size if=0D= greater or equal to msh.=0D =0D Reported-by: Alexander Bulekov =0D Reported-by: Cheolwoo Myung =0D Reported-by: Ruhr-University Bochum =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 705df5466c98f3efdd2b68d3b31dad86858acad7=0D https://github.com/qemu/qemu/commit/705df5466c98f3efdd2b68d3b31dad8= 6858acad7=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M include/net/net.h=0D M include/net/queue.h=0D M net/net.c=0D M net/queue.c=0D =0D Log Message:=0D -----------=0D net: introduce qemu_receive_packet()=0D =0D Some NIC supports loopback mode and this is done by calling=0D nc->info->receive() directly which in fact suppresses the effort of=0D reentrancy check that is done in qemu_net_queue_send().=0D =0D Unfortunately we can't use qemu_net_queue_send() here since for=0D loopback there's no sender as peer, so this patch introduce a=0D qemu_receive_packet() which is used for implementing loopback mode=0D for a NIC with this check.=0D =0D NIC that supports loopback mode will be converted to this helper.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Cc: qemu-stable@nongnu.org=0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 1caff0340f49c93d535c6558a5138d20d475315c=0D https://github.com/qemu/qemu/commit/1caff0340f49c93d535c6558a5138d2= 0d475315c=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/e1000.c=0D =0D Log Message:=0D -----------=0D e1000: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 331d2ac9ea307c990dc86e6493e8f0c48d14bb33=0D https://github.com/qemu/qemu/commit/331d2ac9ea307c990dc86e6493e8f0c= 48d14bb33=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/dp8393x.c=0D =0D Log Message:=0D -----------=0D dp8393x: switch to use qemu_receive_packet() for loopback packet=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 26194a58f4eb83c5bdf4061a1628508084450ba1=0D https://github.com/qemu/qemu/commit/26194a58f4eb83c5bdf4061a1628508= 084450ba1=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/msf2-emac.c=0D =0D Log Message:=0D -----------=0D msf2-mac: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 8c92060d3c0248bd4d515719a35922cd2391b9b4=0D https://github.com/qemu/qemu/commit/8c92060d3c0248bd4d515719a35922c= d2391b9b4=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/sungem.c=0D =0D Log Message:=0D -----------=0D sungem: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Alistair Francis =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 8c552542b81e56ff532dd27ec6e5328954bdda73=0D https://github.com/qemu/qemu/commit/8c552542b81e56ff532dd27ec6e5328= 954bdda73=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/net_tx_pkt.c=0D =0D Log Message:=0D -----------=0D tx_pkt: switch to use qemu_receive_packet_iov() for loopback=0D =0D This patch switches to use qemu_receive_receive_iov() which can detect=0D= reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 5311fb805a4403bba024e83886fa0e7572265de4=0D https://github.com/qemu/qemu/commit/5311fb805a4403bba024e83886fa0e7= 572265de4=0D Author: Alexander Bulekov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/rtl8139.c=0D =0D Log Message:=0D -----------=0D rtl8139: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1910826=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 99ccfaa1edafd79f7a3a0ff7b58ae4da7c514928=0D https://github.com/qemu/qemu/commit/99ccfaa1edafd79f7a3a0ff7b58ae4d= a7c514928=0D Author: Alexander Bulekov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/pcnet.c=0D =0D Log Message:=0D -----------=0D pcnet: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1917085=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: e73adfbeec9d4e008630c814759052ed945c3fed=0D https://github.com/qemu/qemu/commit/e73adfbeec9d4e008630c814759052e= d945c3fed=0D Author: Alexander Bulekov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/cadence_gem.c=0D =0D Log Message:=0D -----------=0D cadence_gem: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alexander Bulekov =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 37cee01784ff0df13e5209517e1b3594a5e792d1=0D https://github.com/qemu/qemu/commit/37cee01784ff0df13e5209517e1b359= 4a5e792d1=0D Author: Alexander Bulekov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/lan9118.c=0D =0D Log Message:=0D -----------=0D lan9118: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 3aa1b7af0f5fbfdf1b4759658e1445bda680b40d=0D https://github.com/qemu/qemu/commit/3aa1b7af0f5fbfdf1b4759658e1445b= da680b40d=0D Author: Cornelia Huck =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/rdma/vmw/pvrdma.h=0D M hw/rdma/vmw/pvrdma_cmd.c=0D M hw/rdma/vmw/pvrdma_dev_ring.c=0D M hw/rdma/vmw/pvrdma_dev_ring.h=0D M hw/rdma/vmw/pvrdma_main.c=0D R include/standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_ri= ng.h=0D M scripts/update-linux-headers.sh=0D =0D Log Message:=0D -----------=0D pvrdma: wean code off pvrdma_ring.h kernel header=0D =0D The pvrdma code relies on the pvrdma_ring.h kernel header for some=0D basic ring buffer handling. The content of that header isn't very=0D exciting, but contains some (q)atomic_*() invocations that (a)=0D cause manual massaging when doing a headers update, and (b) are=0D an indication that we probably should not be importing that header=0D at all.=0D =0D Let's reimplement the ring buffer handling directly in the pvrdma=0D code instead. This arguably also improves readability of the code.=0D =0D Importing the header can now be dropped.=0D =0D Signed-off-by: Cornelia Huck =0D Reviewed-by: Paolo Bonzini =0D Reviewed-by: Yuval Shaia =0D Tested-by: Yuval Shaia =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: d32ad10a14d46dfe9304e3ed5858a11dcd5c71a0=0D https://github.com/qemu/qemu/commit/d32ad10a14d46dfe9304e3ed5858a11= dcd5c71a0=0D Author: Alexey Kirillov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M include/net/net.h=0D M net/l2tpv3.c=0D M net/net.c=0D M net/netmap.c=0D M net/slirp.c=0D M net/socket.c=0D M net/tap-win32.c=0D M net/tap.c=0D M net/vde.c=0D M net/vhost-user.c=0D M net/vhost-vdpa.c=0D M qapi/net.json=0D =0D Log Message:=0D -----------=0D qapi: net: Add query-netdev command=0D =0D The query-netdev command is used to get the configuration of the current=0D= network device backends (netdevs).=0D This is the QMP analog of the HMP command "info network" but only for=0D netdevs (i.e. excluding NIC and hubports).=0D =0D The query-netdev command returns an array of objects of the NetdevInfo=0D= type, which are an extension of Netdev type. It means that response can=0D= be used for netdev-add after small modification. This can be useful for=0D= recreate the same netdev configuration.=0D =0D Information about the network device is filled in when it is created or=0D= modified and is available through the NetClientState->stored_config.=0D =0D Signed-off-by: Alexey Kirillov =0D Acked-by: Markus Armbruster =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 3c3b656885473ef0d699290ba966177f17839aa5=0D https://github.com/qemu/qemu/commit/3c3b656885473ef0d699290ba966177= f17839aa5=0D Author: Alexey Kirillov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/meson.build=0D A tests/qtest/test-query-netdev.c=0D =0D Log Message:=0D -----------=0D tests: Add tests for query-netdev command=0D =0D A simply qtest that checks for correct number of netdevs in the response=0D= of the query-netdev.=0D =0D Signed-off-by: Alexey Kirillov =0D Acked-by: Thomas Huth =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 59b5437eb732d6b103a9bc279c3482c834d1eff9=0D https://github.com/qemu/qemu/commit/59b5437eb732d6b103a9bc279c3482c= 834d1eff9=0D Author: Alexey Kirillov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/xen_nic.c=0D M include/net/net.h=0D M net/l2tpv3.c=0D M net/net.c=0D M net/slirp.c=0D M net/socket.c=0D M net/tap-win32.c=0D M net/tap.c=0D M net/vde.c=0D M net/vhost-user.c=0D M net/vhost-vdpa.c=0D =0D Log Message:=0D -----------=0D net: Move NetClientState.info_str to dynamic allocations=0D =0D The info_str field of the NetClientState structure is static and has a si= ze=0D of 256 bytes. This amount is often unclaimed, and the field itself is use= d=0D exclusively for HMP "info network".=0D =0D The patch translates info_str to dynamic memory allocation.=0D =0D This action is also allows us to painlessly discard usage of this field=0D= for backend devices.=0D =0D Signed-off-by: Alexey Kirillov =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: a0724776c5a98a08fc946bb5a4ad16410ca64c0e=0D https://github.com/qemu/qemu/commit/a0724776c5a98a08fc946bb5a4ad164= 10ca64c0e=0D Author: Alexey Kirillov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D A include/qapi/hmp-output-visitor.h=0D M net/net.c=0D A qapi/hmp-output-visitor.c=0D M qapi/meson.build=0D =0D Log Message:=0D -----------=0D hmp: Use QAPI NetdevInfo in hmp_info_network=0D =0D Replace usage of legacy field info_str of NetClientState for backend=0D network devices with QAPI NetdevInfo stored_config that already used=0D in QMP query-netdev.=0D =0D This change increases the detail of the "info network" output and takes=0D= a more general approach to composing the output.=0D =0D NIC and hubports still use legacy info_str field.=0D =0D Signed-off-by: Alexey Kirillov =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: f2e8319d456724c3d8514d943dc4607e2f08e88a=0D https://github.com/qemu/qemu/commit/f2e8319d456724c3d8514d943dc4607= e2f08e88a=0D Author: Alexey Kirillov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M net/l2tpv3.c=0D M net/slirp.c=0D M net/socket.c=0D M net/tap-win32.c=0D M net/tap.c=0D M net/vde.c=0D M net/vhost-user.c=0D M net/vhost-vdpa.c=0D =0D Log Message:=0D -----------=0D net: Do not fill legacy info_str for backends=0D =0D As we use QAPI NetClientState->stored_config to store and get information= =0D about backend network devices, we can drop fill of legacy field info_str=0D= for them.=0D =0D We still use info_str field for NIC and hubports, so we can not completel= y=0D remove it.=0D =0D Signed-off-by: Alexey Kirillov =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 6e31b3a5c34c6e5be7ef60773e607f189eaa15f3=0D https://github.com/qemu/qemu/commit/6e31b3a5c34c6e5be7ef60773e607f1= 89eaa15f3=0D Author: Peter Maydell =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/core/machine.c=0D M hw/net/cadence_gem.c=0D M hw/net/dp8393x.c=0D M hw/net/e1000.c=0D M hw/net/lan9118.c=0D M hw/net/msf2-emac.c=0D M hw/net/net_tx_pkt.c=0D M hw/net/pcnet.c=0D M hw/net/rtl8139.c=0D M hw/net/sungem.c=0D M hw/net/xen_nic.c=0D M hw/rdma/vmw/pvrdma.h=0D M hw/rdma/vmw/pvrdma_cmd.c=0D M hw/rdma/vmw/pvrdma_dev_ring.c=0D M hw/rdma/vmw/pvrdma_dev_ring.h=0D M hw/rdma/vmw/pvrdma_main.c=0D M hw/virtio/virtio-net-pci.c=0D M include/net/net.h=0D M include/net/queue.h=0D A include/qapi/hmp-output-visitor.h=0D R include/standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_ri= ng.h=0D M net/l2tpv3.c=0D M net/net.c=0D M net/netmap.c=0D M net/queue.c=0D M net/slirp.c=0D M net/socket.c=0D M net/tap-win32.c=0D M net/tap.c=0D M net/vde.c=0D M net/vhost-user.c=0D M net/vhost-vdpa.c=0D A qapi/hmp-output-visitor.c=0D M qapi/meson.build=0D M qapi/net.json=0D M scripts/update-linux-headers.sh=0D M tests/qtest/meson.build=0D A tests/qtest/test-query-netdev.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' i= nto staging=0D =0D # gpg: Signature made Mon 15 Mar 2021 08:42:25 GMT=0D # gpg: using RSA key EF04965B398D6211=0D # gpg: Good signature from "Jason Wang (Jason Wang on RedHat) " [marginal]=0D # gpg: WARNING: This key is not certified with sufficiently trusted signa= tures!=0D # gpg: It is not certain that the signature belongs to the owner= .=0D # Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D = 6211=0D =0D * remotes/jasowang/tags/net-pull-request:=0D net: Do not fill legacy info_str for backends=0D hmp: Use QAPI NetdevInfo in hmp_info_network=0D net: Move NetClientState.info_str to dynamic allocations=0D tests: Add tests for query-netdev command=0D qapi: net: Add query-netdev command=0D pvrdma: wean code off pvrdma_ring.h kernel header=0D lan9118: switch to use qemu_receive_packet() for loopback=0D cadence_gem: switch to use qemu_receive_packet() for loopback=0D pcnet: switch to use qemu_receive_packet() for loopback=0D rtl8139: switch to use qemu_receive_packet() for loopback=0D tx_pkt: switch to use qemu_receive_packet_iov() for loopback=0D sungem: switch to use qemu_receive_packet() for loopback=0D msf2-mac: switch to use qemu_receive_packet() for loopback=0D dp8393x: switch to use qemu_receive_packet() for loopback packet=0D e1000: switch to use qemu_receive_packet() for loopback=0D net: introduce qemu_receive_packet()=0D e1000: fail early for evil descriptor=0D net: validate that ids are well formed=0D net: Fix build error when DEBUG_NET is on=0D virtio-net: calculating proper msix vectors on init=0D =0D Signed-off-by: Peter Maydell =0D =0D # Conflicts:=0D # hw/core/machine.c=0D =0D =0D Compare: https://github.com/qemu/qemu/compare/f84e7fb68d55...6e31b3a5c34c= =0D From MAILER-DAEMON Tue Mar 16 08:31:39 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lM8rL-0000TE-DP for mharc-qemu-commits@gnu.org; Tue, 16 Mar 2021 08:31:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43686) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lM8rJ-0000Op-JV for qemu-commits@nongnu.org; Tue, 16 Mar 2021 08:31:37 -0400 Received: from out-25.smtp.github.com ([192.30.252.208]:37693 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lM8rF-0001Ws-R8 for qemu-commits@nongnu.org; Tue, 16 Mar 2021 08:31:36 -0400 Received: from github.com (hubbernetes-node-9328396.ash1-iad.github.net [10.56.113.42]) by smtp.github.com (Postfix) with ESMTPA id 084FA840904 for ; Tue, 16 Mar 2021 05:31:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615897893; bh=EDLzMCd0rqvSS6ulrDloryFEaybcSJPgiyAbn03RtBU=; h=Date:From:To:Subject:From; b=G9TUSVEqCiW4LYkxidJiJ+TmKxGOdk6hnvlIDrSPRuqInq2XX10Pr37pU1bCoYK7d 1VcBhICLXsxVyk33vgpnYQGGdjMQ1YenbbeE6WNDGLJwbAFjSpb2L5Jhw4hGFQXLb7 actZikYcBUkUm2TZlkQkJBBvlDZmhtP0w37s/f7g= Date: Tue, 16 Mar 2021 05:31:33 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 51a81a: virtio-net: calculating proper msix vectors on init X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Mar 2021 12:31:38 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 51a81a2118df0c70988f00d61647da9e298483a4=0D https://github.com/qemu/qemu/commit/51a81a2118df0c70988f00d61647da9= e298483a4=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/core/machine.c=0D M hw/virtio/virtio-net-pci.c=0D =0D Log Message:=0D -----------=0D virtio-net: calculating proper msix vectors on init=0D =0D Currently, the default msix vectors for virtio-net-pci is 3 which is=0D obvious not suitable for multiqueue guest, so we depends on the user=0D or management tools to pass a correct vectors parameter. In fact, we=0D can simplifying this by calculating the number of vectors on realize.=0D =0D Consider we have N queues, the number of vectors needed is 2*N + 2=0D (#queue pairs + plus one config interrupt and control vq). We didn't=0D check whether or not host support control vq because it was added=0D unconditionally by qemu to avoid breaking legacy guests such as Minix.=0D= =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Stefan Hajnoczi =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 26d0586fc931dd541d5c040c5e3b2a7bb183f96c=0D https://github.com/qemu/qemu/commit/26d0586fc931dd541d5c040c5e3b2a7= bb183f96c=0D Author: Bin Meng =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M net/net.c=0D =0D Log Message:=0D -----------=0D net: Fix build error when DEBUG_NET is on=0D =0D "qemu-common.h" should be included to provide the forward declaration=0D of qemu_hexdump() when DEBUG_NET is on.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: e73b4317b7b7a9d67368387c2f4fbfba6c43e39f=0D https://github.com/qemu/qemu/commit/e73b4317b7b7a9d67368387c2f4fbfb= a6c43e39f=0D Author: Paolo Bonzini =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M net/net.c=0D =0D Log Message:=0D -----------=0D net: validate that ids are well formed=0D =0D When a network or network device is created from the command line or HMP,= =0D QemuOpts ensures that the id passes the id_wellformed check. However,=0D= QMP skips this:=0D =0D $ qemu-system-x86_64 -qmp stdio -S -nic user,id=3D123/456=0D qemu-system-x86_64: -nic user,id=3D123/456: Parameter id expects an id= entifier=0D Identifiers consist of letters, digits, -, ., _, starting with a lette= r.=0D =0D $ qemu-system-x86_64 -qmp stdio -S=0D {"execute":"qmp_capabilities"}=0D {"return": {}}=0D {"execute":"netdev_add", "arguments": {"type": "user", "id": "123/456"= }}=0D {"return": {}}=0D =0D After:=0D =0D $ qemu-system-x86_64 -qmp stdio -S=0D {"execute":"qmp_capabilities"}=0D {"return": {}}=0D {"execute":"netdev_add", "arguments": {"type": "user", "id": "123/456"= }}=0D {"error": {"class": "GenericError", "desc": "Parameter "id" expects an= identifier"}}=0D =0D Validity checks should be performed always at the bottom of the call chai= n,=0D because QMP skips all the steps above. At the same time we know that eve= ry=0D call chain should go through either QMP or (for legacy) through QemuOpts.= =0D Because the id for -net and -nic is automatically generated and not=0D well-formed by design, just add the check to QMP.=0D =0D Cc: Jason Wang =0D Signed-off-by: Paolo Bonzini =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 3de46e6fc489c52c9431a8a832ad8170a7569bd8=0D https://github.com/qemu/qemu/commit/3de46e6fc489c52c9431a8a832ad817= 0a7569bd8=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/e1000.c=0D =0D Log Message:=0D -----------=0D e1000: fail early for evil descriptor=0D =0D During procss_tx_desc(), driver can try to chain data descriptor with=0D legacy descriptor, when will lead underflow for the following=0D calculation in process_tx_desc() for bytes:=0D =0D if (tp->size + bytes > msh)=0D bytes =3D msh - tp->size;=0D =0D This will lead a infinite loop. So check and fail early if tp->size if=0D= greater or equal to msh.=0D =0D Reported-by: Alexander Bulekov =0D Reported-by: Cheolwoo Myung =0D Reported-by: Ruhr-University Bochum =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 705df5466c98f3efdd2b68d3b31dad86858acad7=0D https://github.com/qemu/qemu/commit/705df5466c98f3efdd2b68d3b31dad8= 6858acad7=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M include/net/net.h=0D M include/net/queue.h=0D M net/net.c=0D M net/queue.c=0D =0D Log Message:=0D -----------=0D net: introduce qemu_receive_packet()=0D =0D Some NIC supports loopback mode and this is done by calling=0D nc->info->receive() directly which in fact suppresses the effort of=0D reentrancy check that is done in qemu_net_queue_send().=0D =0D Unfortunately we can't use qemu_net_queue_send() here since for=0D loopback there's no sender as peer, so this patch introduce a=0D qemu_receive_packet() which is used for implementing loopback mode=0D for a NIC with this check.=0D =0D NIC that supports loopback mode will be converted to this helper.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Cc: qemu-stable@nongnu.org=0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 1caff0340f49c93d535c6558a5138d20d475315c=0D https://github.com/qemu/qemu/commit/1caff0340f49c93d535c6558a5138d2= 0d475315c=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/e1000.c=0D =0D Log Message:=0D -----------=0D e1000: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 331d2ac9ea307c990dc86e6493e8f0c48d14bb33=0D https://github.com/qemu/qemu/commit/331d2ac9ea307c990dc86e6493e8f0c= 48d14bb33=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/dp8393x.c=0D =0D Log Message:=0D -----------=0D dp8393x: switch to use qemu_receive_packet() for loopback packet=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 26194a58f4eb83c5bdf4061a1628508084450ba1=0D https://github.com/qemu/qemu/commit/26194a58f4eb83c5bdf4061a1628508= 084450ba1=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/msf2-emac.c=0D =0D Log Message:=0D -----------=0D msf2-mac: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 8c92060d3c0248bd4d515719a35922cd2391b9b4=0D https://github.com/qemu/qemu/commit/8c92060d3c0248bd4d515719a35922c= d2391b9b4=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/sungem.c=0D =0D Log Message:=0D -----------=0D sungem: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Mark Cave-Ayland =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Alistair Francis =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 8c552542b81e56ff532dd27ec6e5328954bdda73=0D https://github.com/qemu/qemu/commit/8c552542b81e56ff532dd27ec6e5328= 954bdda73=0D Author: Jason Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/net_tx_pkt.c=0D =0D Log Message:=0D -----------=0D tx_pkt: switch to use qemu_receive_packet_iov() for loopback=0D =0D This patch switches to use qemu_receive_receive_iov() which can detect=0D= reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 5311fb805a4403bba024e83886fa0e7572265de4=0D https://github.com/qemu/qemu/commit/5311fb805a4403bba024e83886fa0e7= 572265de4=0D Author: Alexander Bulekov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/rtl8139.c=0D =0D Log Message:=0D -----------=0D rtl8139: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1910826=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 99ccfaa1edafd79f7a3a0ff7b58ae4da7c514928=0D https://github.com/qemu/qemu/commit/99ccfaa1edafd79f7a3a0ff7b58ae4d= a7c514928=0D Author: Alexander Bulekov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/pcnet.c=0D =0D Log Message:=0D -----------=0D pcnet: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1917085=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: e73adfbeec9d4e008630c814759052ed945c3fed=0D https://github.com/qemu/qemu/commit/e73adfbeec9d4e008630c814759052e= d945c3fed=0D Author: Alexander Bulekov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/cadence_gem.c=0D =0D Log Message:=0D -----------=0D cadence_gem: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Alexander Bulekov =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 37cee01784ff0df13e5209517e1b3594a5e792d1=0D https://github.com/qemu/qemu/commit/37cee01784ff0df13e5209517e1b359= 4a5e792d1=0D Author: Alexander Bulekov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/lan9118.c=0D =0D Log Message:=0D -----------=0D lan9118: switch to use qemu_receive_packet() for loopback=0D =0D This patch switches to use qemu_receive_packet() which can detect=0D reentrancy and return early.=0D =0D This is intended to address CVE-2021-3416.=0D =0D Cc: Prasad J Pandit =0D Cc: qemu-stable@nongnu.org=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 3aa1b7af0f5fbfdf1b4759658e1445bda680b40d=0D https://github.com/qemu/qemu/commit/3aa1b7af0f5fbfdf1b4759658e1445b= da680b40d=0D Author: Cornelia Huck =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/rdma/vmw/pvrdma.h=0D M hw/rdma/vmw/pvrdma_cmd.c=0D M hw/rdma/vmw/pvrdma_dev_ring.c=0D M hw/rdma/vmw/pvrdma_dev_ring.h=0D M hw/rdma/vmw/pvrdma_main.c=0D R include/standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_ri= ng.h=0D M scripts/update-linux-headers.sh=0D =0D Log Message:=0D -----------=0D pvrdma: wean code off pvrdma_ring.h kernel header=0D =0D The pvrdma code relies on the pvrdma_ring.h kernel header for some=0D basic ring buffer handling. The content of that header isn't very=0D exciting, but contains some (q)atomic_*() invocations that (a)=0D cause manual massaging when doing a headers update, and (b) are=0D an indication that we probably should not be importing that header=0D at all.=0D =0D Let's reimplement the ring buffer handling directly in the pvrdma=0D code instead. This arguably also improves readability of the code.=0D =0D Importing the header can now be dropped.=0D =0D Signed-off-by: Cornelia Huck =0D Reviewed-by: Paolo Bonzini =0D Reviewed-by: Yuval Shaia =0D Tested-by: Yuval Shaia =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: d32ad10a14d46dfe9304e3ed5858a11dcd5c71a0=0D https://github.com/qemu/qemu/commit/d32ad10a14d46dfe9304e3ed5858a11= dcd5c71a0=0D Author: Alexey Kirillov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M include/net/net.h=0D M net/l2tpv3.c=0D M net/net.c=0D M net/netmap.c=0D M net/slirp.c=0D M net/socket.c=0D M net/tap-win32.c=0D M net/tap.c=0D M net/vde.c=0D M net/vhost-user.c=0D M net/vhost-vdpa.c=0D M qapi/net.json=0D =0D Log Message:=0D -----------=0D qapi: net: Add query-netdev command=0D =0D The query-netdev command is used to get the configuration of the current=0D= network device backends (netdevs).=0D This is the QMP analog of the HMP command "info network" but only for=0D netdevs (i.e. excluding NIC and hubports).=0D =0D The query-netdev command returns an array of objects of the NetdevInfo=0D= type, which are an extension of Netdev type. It means that response can=0D= be used for netdev-add after small modification. This can be useful for=0D= recreate the same netdev configuration.=0D =0D Information about the network device is filled in when it is created or=0D= modified and is available through the NetClientState->stored_config.=0D =0D Signed-off-by: Alexey Kirillov =0D Acked-by: Markus Armbruster =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 3c3b656885473ef0d699290ba966177f17839aa5=0D https://github.com/qemu/qemu/commit/3c3b656885473ef0d699290ba966177= f17839aa5=0D Author: Alexey Kirillov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/meson.build=0D A tests/qtest/test-query-netdev.c=0D =0D Log Message:=0D -----------=0D tests: Add tests for query-netdev command=0D =0D A simply qtest that checks for correct number of netdevs in the response=0D= of the query-netdev.=0D =0D Signed-off-by: Alexey Kirillov =0D Acked-by: Thomas Huth =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 59b5437eb732d6b103a9bc279c3482c834d1eff9=0D https://github.com/qemu/qemu/commit/59b5437eb732d6b103a9bc279c3482c= 834d1eff9=0D Author: Alexey Kirillov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/net/xen_nic.c=0D M include/net/net.h=0D M net/l2tpv3.c=0D M net/net.c=0D M net/slirp.c=0D M net/socket.c=0D M net/tap-win32.c=0D M net/tap.c=0D M net/vde.c=0D M net/vhost-user.c=0D M net/vhost-vdpa.c=0D =0D Log Message:=0D -----------=0D net: Move NetClientState.info_str to dynamic allocations=0D =0D The info_str field of the NetClientState structure is static and has a si= ze=0D of 256 bytes. This amount is often unclaimed, and the field itself is use= d=0D exclusively for HMP "info network".=0D =0D The patch translates info_str to dynamic memory allocation.=0D =0D This action is also allows us to painlessly discard usage of this field=0D= for backend devices.=0D =0D Signed-off-by: Alexey Kirillov =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: a0724776c5a98a08fc946bb5a4ad16410ca64c0e=0D https://github.com/qemu/qemu/commit/a0724776c5a98a08fc946bb5a4ad164= 10ca64c0e=0D Author: Alexey Kirillov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D A include/qapi/hmp-output-visitor.h=0D M net/net.c=0D A qapi/hmp-output-visitor.c=0D M qapi/meson.build=0D =0D Log Message:=0D -----------=0D hmp: Use QAPI NetdevInfo in hmp_info_network=0D =0D Replace usage of legacy field info_str of NetClientState for backend=0D network devices with QAPI NetdevInfo stored_config that already used=0D in QMP query-netdev.=0D =0D This change increases the detail of the "info network" output and takes=0D= a more general approach to composing the output.=0D =0D NIC and hubports still use legacy info_str field.=0D =0D Signed-off-by: Alexey Kirillov =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: f2e8319d456724c3d8514d943dc4607e2f08e88a=0D https://github.com/qemu/qemu/commit/f2e8319d456724c3d8514d943dc4607= e2f08e88a=0D Author: Alexey Kirillov =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M net/l2tpv3.c=0D M net/slirp.c=0D M net/socket.c=0D M net/tap-win32.c=0D M net/tap.c=0D M net/vde.c=0D M net/vhost-user.c=0D M net/vhost-vdpa.c=0D =0D Log Message:=0D -----------=0D net: Do not fill legacy info_str for backends=0D =0D As we use QAPI NetClientState->stored_config to store and get information= =0D about backend network devices, we can drop fill of legacy field info_str=0D= for them.=0D =0D We still use info_str field for NIC and hubports, so we can not completel= y=0D remove it.=0D =0D Signed-off-by: Alexey Kirillov =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 6e31b3a5c34c6e5be7ef60773e607f189eaa15f3=0D https://github.com/qemu/qemu/commit/6e31b3a5c34c6e5be7ef60773e607f1= 89eaa15f3=0D Author: Peter Maydell =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/core/machine.c=0D M hw/net/cadence_gem.c=0D M hw/net/dp8393x.c=0D M hw/net/e1000.c=0D M hw/net/lan9118.c=0D M hw/net/msf2-emac.c=0D M hw/net/net_tx_pkt.c=0D M hw/net/pcnet.c=0D M hw/net/rtl8139.c=0D M hw/net/sungem.c=0D M hw/net/xen_nic.c=0D M hw/rdma/vmw/pvrdma.h=0D M hw/rdma/vmw/pvrdma_cmd.c=0D M hw/rdma/vmw/pvrdma_dev_ring.c=0D M hw/rdma/vmw/pvrdma_dev_ring.h=0D M hw/rdma/vmw/pvrdma_main.c=0D M hw/virtio/virtio-net-pci.c=0D M include/net/net.h=0D M include/net/queue.h=0D A include/qapi/hmp-output-visitor.h=0D R include/standard-headers/drivers/infiniband/hw/vmw_pvrdma/pvrdma_ri= ng.h=0D M net/l2tpv3.c=0D M net/net.c=0D M net/netmap.c=0D M net/queue.c=0D M net/slirp.c=0D M net/socket.c=0D M net/tap-win32.c=0D M net/tap.c=0D M net/vde.c=0D M net/vhost-user.c=0D M net/vhost-vdpa.c=0D A qapi/hmp-output-visitor.c=0D M qapi/meson.build=0D M qapi/net.json=0D M scripts/update-linux-headers.sh=0D M tests/qtest/meson.build=0D A tests/qtest/test-query-netdev.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' i= nto staging=0D =0D # gpg: Signature made Mon 15 Mar 2021 08:42:25 GMT=0D # gpg: using RSA key EF04965B398D6211=0D # gpg: Good signature from "Jason Wang (Jason Wang on RedHat) " [marginal]=0D # gpg: WARNING: This key is not certified with sufficiently trusted signa= tures!=0D # gpg: It is not certain that the signature belongs to the owner= .=0D # Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D = 6211=0D =0D * remotes/jasowang/tags/net-pull-request:=0D net: Do not fill legacy info_str for backends=0D hmp: Use QAPI NetdevInfo in hmp_info_network=0D net: Move NetClientState.info_str to dynamic allocations=0D tests: Add tests for query-netdev command=0D qapi: net: Add query-netdev command=0D pvrdma: wean code off pvrdma_ring.h kernel header=0D lan9118: switch to use qemu_receive_packet() for loopback=0D cadence_gem: switch to use qemu_receive_packet() for loopback=0D pcnet: switch to use qemu_receive_packet() for loopback=0D rtl8139: switch to use qemu_receive_packet() for loopback=0D tx_pkt: switch to use qemu_receive_packet_iov() for loopback=0D sungem: switch to use qemu_receive_packet() for loopback=0D msf2-mac: switch to use qemu_receive_packet() for loopback=0D dp8393x: switch to use qemu_receive_packet() for loopback packet=0D e1000: switch to use qemu_receive_packet() for loopback=0D net: introduce qemu_receive_packet()=0D e1000: fail early for evil descriptor=0D net: validate that ids are well formed=0D net: Fix build error when DEBUG_NET is on=0D virtio-net: calculating proper msix vectors on init=0D =0D Signed-off-by: Peter Maydell =0D =0D # Conflicts:=0D # hw/core/machine.c=0D =0D =0D Compare: https://github.com/qemu/qemu/compare/2615a5e433ae...6e31b3a5c34c= =0D From MAILER-DAEMON Tue Mar 16 08:37:35 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lM8x4-00068L-PQ for mharc-qemu-commits@gnu.org; Tue, 16 Mar 2021 08:37:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45378) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lM8x3-00065a-3x for qemu-commits@nongnu.org; Tue, 16 Mar 2021 08:37:33 -0400 Received: from out-25.smtp.github.com ([192.30.252.208]:56603 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lM8wx-00054b-Oo for qemu-commits@nongnu.org; Tue, 16 Mar 2021 08:37:32 -0400 Received: from github.com (hubbernetes-node-df986b3.ash1-iad.github.net [10.56.120.45]) by smtp.github.com (Postfix) with ESMTPA id 17A638405FF for ; Tue, 16 Mar 2021 05:37:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615898247; bh=9h34XzY915XnD5rqy6J/o892xRPMiuw4W9qWQg+j/T8=; h=Date:From:To:Subject:From; b=jsj0E0xDunyxhweupfv3tGNNx0lOQh9QfOSCLAORzdCZ1qkldpaDBFL1NFqx5d0Lp GgpoP+K3jzeC0FmXLN+IsvctvaCClqtelE8B016zKRMaVO+UF9okIrkrZESGeJN645 CRw3J8dAIYGvBdRu0BKwthc1cpECAc64oxwc1Sgs= Date: Tue, 16 Mar 2021 05:37:27 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 48d9ca: block: remove format defaults from QemuOpts in bdr... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Mar 2021 12:37:33 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 48d9ca2860491288e248724b68348a6b627dfa97=0D https://github.com/qemu/qemu/commit/48d9ca2860491288e248724b68348a6= b627dfa97=0D Author: Stefano Garzarella =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M block.c=0D =0D Log Message:=0D -----------=0D block: remove format defaults from QemuOpts in bdrv_create_file()=0D =0D QemuOpts is usually created merging the QemuOptsList of format=0D and protocol. So, when the format calls bdr_create_file(), the 'opts'=0D parameter contains a QemuOptsList with a combination of format and=0D protocol default values.=0D =0D The format properly removes its options before calling=0D bdr_create_file(), but the default values remain in 'opts->list'.=0D So if the protocol has options with the same name (e.g. rbd has=0D 'cluster_size' as qcow2), it will see the default values of the format,=0D= since for overlapping options, the format wins.=0D =0D To avoid this issue, lets convert QemuOpts to QDict, in this way we take=0D= only the set options, and then convert it back to QemuOpts, using the=0D 'create_opts' of the protocol. So the new QemuOpts, will contain only the= =0D protocol defaults.=0D =0D Suggested-by: Kevin Wolf =0D Signed-off-by: Stefano Garzarella =0D Message-Id: <20210308161232.248833-1-sgarzare@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 0eaa23947e4c5dca8547cc3c869bc4b92044cab2=0D https://github.com/qemu/qemu/commit/0eaa23947e4c5dca8547cc3c869bc4b= 92044cab2=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D A tests/qemu-iotests/tests/qsd-jobs=0D A tests/qemu-iotests/tests/qsd-jobs.out=0D =0D Log Message:=0D -----------=0D storage-daemon: Call job_cancel_sync_all() on shutdown=0D =0D bdrv_close_all() asserts that no jobs are running any more, so we need=0D= to cancel all jobs first to avoid failing the assertion.=0D =0D Fixes: b55a3c8860b763b62b2cc2f4a6f55379977bbde5=0D Reported-by: Nini Gu =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210309121814.31078-1-kwolf@redhat.com>=0D Reviewed-by: Eric Blake =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 9fe401a0a1245a0fbe8173524ea0089b1df65c16=0D https://github.com/qemu/qemu/commit/9fe401a0a1245a0fbe8173524ea0089= b1df65c16=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M block/stream.c=0D M tests/qemu-iotests/tests/qsd-jobs=0D M tests/qemu-iotests/tests/qsd-jobs.out=0D =0D Log Message:=0D -----------=0D stream: Don't crash when node permission is denied=0D =0D The image streaming block job restricts shared permissions of the nodes=0D= it accesses. This can obviously fail when other users already got these=0D= permissions. &error_abort is therefore wrong and can crash. Handle these=0D= errors gracefully and just fail starting the block job.=0D =0D Reported-by: Nini Gu =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210309173451.45152-1-kwolf@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: Alberto Garcia =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 6eab3b20221be5249416197a999205bfddb8df0a=0D https://github.com/qemu/qemu/commit/6eab3b20221be5249416197a999205b= fddb8df0a=0D Author: Max Reitz =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M block/curl.c=0D =0D Log Message:=0D -----------=0D curl: Store BDRVCURLState pointer in CURLSocket=0D =0D A socket does not really belong to any specific state. We do not need=0D= to store a pointer to "its" state in it, a pointer to the common=0D BDRVCURLState is sufficient.=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210309130541.37540-2-mreitz@redhat.com>=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 209fd3e8d92a3bd23ff10e19be0eed80a23a9ce1=0D https://github.com/qemu/qemu/commit/209fd3e8d92a3bd23ff10e19be0eed8= 0a23a9ce1=0D Author: Max Reitz =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M block/curl.c=0D =0D Log Message:=0D -----------=0D curl: Disconnect sockets from CURLState=0D =0D When a curl transfer is finished, that does not mean that CURL lets go=0D= of all the sockets it used for it. We therefore must not free a=0D CURLSocket object before CURL has invoked curl_sock_cb() to tell us to=0D= remove it. Otherwise, we may get a use-after-free, as described in this=0D= bug report: https://bugs.launchpad.net/qemu/+bug/1916501=0D =0D (Reproducer from that report:=0D $ qemu-img convert -f qcow2 -O raw \=0D https://download.cirros-cloud.net/0.4.0/cirros-0.4.0-x86_64-disk.img \=0D= out.img=0D )=0D =0D (Alternatively, it might seem logical to force-drop all sockets that=0D have been used for a state when the respective transfer is done, kind of=0D= like it is done now, but including unsetting the AIO handlers.=0D Unfortunately, doing so makes the driver just hang instead of crashing,=0D= which seems to evidence that CURL still uses those sockets.)=0D =0D Make the CURLSocket object independent of "its" CURLState by putting all=0D= sockets into a hash table belonging to the BDRVCURLState instead of a=0D list that belongs to a CURLState. Do not touch any sockets in=0D curl_clean_state().=0D =0D Testing, it seems like all sockets are indeed gone by the time the curl=0D= BDS is closed, so it seems like there really was no point in freeing any=0D= socket just because a transfer is done. libcurl does invoke=0D curl_sock_cb() with CURL_POLL_REMOVE for every socket it has.=0D =0D Buglink: https://bugs.launchpad.net/qemu/+bug/1916501=0D Signed-off-by: Max Reitz =0D Message-Id: <20210309130541.37540-3-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: b1cc869b1abd67a46823663a7caef80e805c7f90=0D https://github.com/qemu/qemu/commit/b1cc869b1abd67a46823663a7caef80= e805c7f90=0D Author: Stefan Hajnoczi =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: disable VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD for now=0D =0D The vhost-user in-flight shmfd feature has not been tested with=0D qemu-storage-daemon's vhost-user-blk server. Disable this optional=0D feature for now because it requires MFD_ALLOW_SEALING, which is not=0D available in some CI environments.=0D =0D If we need this feature in the future it can be re-enabled after=0D testing.=0D =0D Reported-by: Peter Maydell =0D Cc: Kevin Wolf =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210309094106.196911-2-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 39130ebe43144af7a6e6dea0e28ebbba043a1052=0D https://github.com/qemu/qemu/commit/39130ebe43144af7a6e6dea0e28ebbb= a043a1052=0D Author: Coiby Xu =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M tests/qtest/libqos/meson.build=0D A tests/qtest/libqos/vhost-user-blk.c=0D A tests/qtest/libqos/vhost-user-blk.h=0D M tests/qtest/meson.build=0D A tests/qtest/vhost-user-blk-test.c=0D =0D Log Message:=0D -----------=0D test: new qTest case to test the vhost-user-blk-server=0D =0D This test case has the same tests as tests/virtio-blk-test.c except for=0D= tests have block_resize. Since the vhost-user-blk export only serves one=0D= client one time, two exports are started by qemu-storage-daemon for the=0D= hotplug test.=0D =0D Suggested-by: Thomas Huth =0D Signed-off-by: Coiby Xu =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210309094106.196911-3-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 85f51460043b794a154f5df5613a331433dc91b0=0D https://github.com/qemu/qemu/commit/85f51460043b794a154f5df5613a331= 433dc91b0=0D Author: Stefan Hajnoczi =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/vhost-user-blk-test.c=0D =0D Log Message:=0D -----------=0D tests/qtest: add multi-queue test case to vhost-user-blk-test=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210309094106.196911-4-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: d568888d71283a1f08ef466b4564f2998baa913f=0D https://github.com/qemu/qemu/commit/d568888d71283a1f08ef466b4564f29= 98baa913f=0D Author: Stefan Hajnoczi =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/vhost-user-blk-test.c=0D =0D Log Message:=0D -----------=0D vhost-user-blk-test: test discard/write zeroes invalid inputs=0D =0D Exercise input validation code paths in=0D block/export/vhost-user-blk-server.c.=0D =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210309094106.196911-5-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 918d2a2677670178fe6f05905615218b99373d4a=0D https://github.com/qemu/qemu/commit/918d2a2677670178fe6f05905615218= b99373d4a=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/qmp-cmd-test.c=0D M tests/qtest/test-netfilter.c=0D =0D Log Message:=0D -----------=0D tests: Drop 'props' from object-add calls=0D =0D The 'props' option has been deprecated in 5.0 in favour of a flattened=0D= object-add command. Time to change our test cases to drop the deprecated=0D= option.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 2609504806914cd1c9edec6af89d0cb93f694328=0D https://github.com/qemu/qemu/commit/2609504806914cd1c9edec6af89d0cb= 93f694328=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M qapi/qom.json=0D M qom/qom-qmp-cmds.c=0D =0D Log Message:=0D -----------=0D qapi/qom: Drop deprecated 'props' from object-add=0D =0D The option has been deprecated in QEMU 5.0, remove it.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 99d62a547fd873dccc5d02fdd9449cb147565ff1=0D https://github.com/qemu/qemu/commit/99d62a547fd873dccc5d02fdd9449cb= 147565ff1=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for iothread=0D =0D Add an ObjectOptions union that will eventually describe the options of=0D= all user creatable object types. As unions can't exist without any=0D branches, also add the first object type.=0D =0D This adds a QAPI schema for the properties of the iothread object.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: dc7a3801c958b631137ba7126dc1ea0688eecec2=0D https://github.com/qemu/qemu/commit/dc7a3801c958b631137ba7126dc1ea0= 688eecec2=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/authz.json=0D M qapi/qom.json=0D M storage-daemon/qapi/qapi-schema.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for authz-*=0D =0D This adds a QAPI schema for the properties of the authz-* objects.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 7ec606da351361f3796ba97d8f5a4e26618c56dd=0D https://github.com/qemu/qemu/commit/7ec606da351361f3796ba97d8f5a4e2= 6618c56dd=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for cryptodev-*=0D =0D This adds a QAPI schema for the properties of the cryptodev-* objects.=0D= =0D These interfaces have some questionable aspects (cryptodev-backend is=0D really an abstract base class without function, and the queues option=0D only makes sense for cryptodev-vhost-user), but as the goal is to=0D represent the existing interface in QAPI, leave these things in place.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 1e4c63d08beed069ba46a6d0ae0cbe8c8c6662ea=0D https://github.com/qemu/qemu/commit/1e4c63d08beed069ba46a6d0ae0cbe8= c8c6662ea=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for dbus-vmstate=0D =0D This adds a QAPI schema for the properties of the dbus-vmstate object.=0D= =0D A list represented as a comma separated string is clearly not very=0D QAPI-like, but for now just describe the existing interface.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: b76cf64be103c90a51eada28f3b4822a8bc3e8e9=0D https://github.com/qemu/qemu/commit/b76cf64be103c90a51eada28f3b4822= a8bc3e8e9=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/common.json=0D M qapi/machine.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for memory-backend-*=0D =0D This adds a QAPI schema for the properties of the memory-backend-*=0D objects.=0D =0D HostMemPolicy has to be moved to an include file that can be used by the=0D= storage daemon, too, because ObjectOptions must be the same in all=0D binaries if we don't want to compile the whole code multiple times.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 18fcda5db5326d6a690bfac8989b0d71cd70a4c1=0D https://github.com/qemu/qemu/commit/18fcda5db5326d6a690bfac8989b0d7= 1cd70a4c1=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for rng-*, deprecate 'opened'=0D =0D This adds a QAPI schema for the properties of the rng-* objects.=0D =0D The 'opened' property doesn't seem to make sense as an external=0D interface: It is automatically set to true in ucc->complete, and=0D explicitly setting it to true earlier just means that trying to set=0D additional options will result in an error. After the property has once=0D= been set to true (i.e. when the object construction has completed), it=0D= can never be reset to false. In other words, the 'opened' property is=0D useless. Mark it as deprecated in the schema from the start.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 4a4becf630189fd350fafd04cb4afd3410c6044d=0D https://github.com/qemu/qemu/commit/4a4becf630189fd350fafd04cb4afd3= 410c6044d=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/block-core.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for throttle-group=0D =0D This adds a QAPI schema for the properties of the throttle-group object.=0D= =0D The only purpose of the x-* properties is to make the nested options in=0D= 'limits' available for a command line parser that doesn't support=0D structs. Any parser that will use the QAPI schema will supports structs,=0D= though, so they will not be needed in the schema in the future.=0D =0D To keep the conversion straightforward, add them to the schema anyway.=0D= We can then remove the options and adjust documentation, test cases etc.=0D= in a separate patch.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 0a3af58e7c99ce8bd3a137641c073d9cc4702a3f=0D https://github.com/qemu/qemu/commit/0a3af58e7c99ce8bd3a137641c073d9= cc4702a3f=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qapi/crypto.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for secret*, deprecate 'loaded'=0D =0D This adds a QAPI schema for the properties of the secret* objects.=0D =0D The 'loaded' property doesn't seem to make sense as an external=0D interface: It is automatically set to true in ucc->complete, and=0D explicitly setting it to true earlier just means that additional options=0D= will be silently ignored.=0D =0D In other words, the 'loaded' property is useless. Mark it as deprecated=0D= in the schema from the start.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 34f9459d5a0da5e656ffe7903cbbffb034704cc9=0D https://github.com/qemu/qemu/commit/34f9459d5a0da5e656ffe7903cbbffb= 034704cc9=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/crypto.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for tls-*, deprecate 'loaded'=0D =0D This adds a QAPI schema for the properties of the tls-* objects.=0D =0D The 'loaded' property doesn't seem to make sense as an external=0D interface: It is automatically set to true in ucc->complete, and=0D explicitly setting it to true earlier just means that additional options=0D= will be silently ignored.=0D =0D In other words, the 'loaded' property is useless. Mark it as deprecated=0D= in the schema from the start.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 7826d393e96c6fca09fa0f1219d9d8171bd4e310=0D https://github.com/qemu/qemu/commit/7826d393e96c6fca09fa0f1219d9d81= 71bd4e310=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for can-*=0D =0D This adds a QAPI schema for the properties of the can-* objects.=0D =0D can-bus doesn't have any properties, so it only needs to be added to the=0D= ObjectType enum without adding a new branch to ObjectOptions.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 06d950359f026ed5985de751581eccee30c0fb68=0D https://github.com/qemu/qemu/commit/06d950359f026ed5985de751581ecce= e30c0fb68=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for colo-compare=0D =0D This adds a QAPI schema for the properties of the colo-compare object.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: a1113a669423f60b285ecd3fc8a64f8104dfc47d=0D https://github.com/qemu/qemu/commit/a1113a669423f60b285ecd3fc8a64f8= 104dfc47d=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/common.json=0D M qapi/net.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for filter-*=0D =0D This adds a QAPI schema for the properties of the filter-* objects.=0D =0D Some parts of the interface (in particular NetfilterProperties.position)=0D= are very unusual for QAPI, but for now just describe the existing=0D interface.=0D =0D net.json can't be included in qom.json because the storage daemon=0D doesn't have it. NetFilterDirection is still required in the new object=0D= property definitions in qom.json, so move this enum to common.json.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: cffc16c825aca272f9528b64ad6f342b7533a5e9=0D https://github.com/qemu/qemu/commit/cffc16c825aca272f9528b64ad6f342= b7533a5e9=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for pr-manager-helper=0D =0D This adds a QAPI schema for the properties of the pr-manager-helper=0D object.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: bb151973e60d5b668428f3575fb19b60e87de644=0D https://github.com/qemu/qemu/commit/bb151973e60d5b668428f3575fb19b6= 0e87de644=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for confidential-guest-support=0D =0D This adds a QAPI schema for the properties of the objects implementing=0D= the confidential-guest-support interface.=0D =0D pef-guest and s390x-pv-guest don't have any properties, so they only=0D need to be added to the ObjectType enum without adding a new branch to=0D= ObjectOptions.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: fa1ce8ab25fd6b982997868f766cababed18d63a=0D https://github.com/qemu/qemu/commit/fa1ce8ab25fd6b982997868f766caba= bed18d63a=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/common.json=0D M qapi/qom.json=0D M qapi/ui.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for input-*=0D =0D This adds a QAPI schema for the properties of the input-* objects.=0D =0D ui.json cannot be included in qom.json because the storage daemon can't=0D= use it, so move GrabToggleKeys to common.json.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 17cdbea1d117307f5cb0f1e777b5d318a2af78b9=0D https://github.com/qemu/qemu/commit/17cdbea1d117307f5cb0f1e777b5d31= 8a2af78b9=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for x-remote-object=0D =0D This adds a QAPI schema for the properties of the x-remote-object=0D object.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 2ff24f6610a7acecd3ea4a32e555363a2ffecec1=0D https://github.com/qemu/qemu/commit/2ff24f6610a7acecd3ea4a32e555363= a2ffecec1=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/block/xen-block.c=0D M include/qom/object_interfaces.h=0D M monitor/misc.c=0D M qapi/qom.json=0D M qom/qom-qmp-cmds.c=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qapi/qom: QAPIfy object-add=0D =0D This converts object-add from 'gen': false to the ObjectOptions QAPI=0D type. As an immediate benefit, clients can now use QAPI schema=0D introspection for user creatable QOM objects.=0D =0D It is also the first step towards making the QAPI schema the only=0D external interface for the creation of user creatable objects. Once all=0D= other places (HMP and command lines of the system emulator and all=0D tools) go through QAPI, too, some object implementations can be=0D simplified because some checks (e.g. that mandatory options are set) are=0D= already performed by QAPI, and in another step, QOM boilerplate code=0D could be generated from the schema.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 3641748c9b2c967519e7edbbe3d31fc292a04ed4=0D https://github.com/qemu/qemu/commit/3641748c9b2c967519e7edbbe3d31fc= 292a04ed4=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Make "object" QemuOptsList optional=0D =0D This code is going away anyway, but for a few more commits, we'll be in=0D= a state where some binaries still use QemuOpts and others don't. If the=0D= "object" QemuOptsList doesn't even exist, we don't have to remove (or=0D fail to remove, and therefore abort) a user creatable object from it.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 1fc19d69dbaad6d0104df95bf66d64784ab2019c=0D https://github.com/qemu/qemu/commit/1fc19d69dbaad6d0104df95bf66d647= 84ab2019c=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qemu-storage-daemon: Implement --object with qmp_object_add()=0D =0D This QAPIfies --object and ensures that QMP and the command line option=0D= behave the same.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 866ab41d3e12fe26a216feef0a5c1f5018991559=0D https://github.com/qemu/qemu/commit/866ab41d3e12fe26a216feef0a5c1f5= 018991559=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Remove user_creatable_add_dict()=0D =0D This function is now unused and can be removed.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 715ce7367acead8c16609990f83a4f4c96275666=0D https://github.com/qemu/qemu/commit/715ce7367acead8c16609990f83a4f4= c96275666=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D M qom/qom-qmp-cmds.c=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qom: Factor out user_creatable_process_cmdline()=0D =0D The implementation for --object can be shared between=0D qemu-storage-daemon and other binaries, so move it into a function in=0D qom/object_interfaces.c that is accessible from everywhere.=0D =0D This also requires moving the implementation of qmp_object_add() into a=0D= new user_creatable_add_qapi(), because qom/qom-qmp-cmds.c is not linked=0D= for tools.=0D =0D user_creatable_print_help_from_qdict() can become static now.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 47b776cc1b563558606973e7b0aad319edc5530e=0D https://github.com/qemu/qemu/commit/47b776cc1b563558606973e7b0aad31= 9edc5530e=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qemu-io.c=0D =0D Log Message:=0D -----------=0D qemu-io: Use user_creatable_process_cmdline() for --object=0D =0D This switches qemu-io from a QemuOpts-based parser for --object to=0D user_creatable_process_cmdline() which uses a keyval parser and enforces=0D= the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties accessible.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 1ccc89f44a9cf62fe16c975a9891506d12d0690b=0D https://github.com/qemu/qemu/commit/1ccc89f44a9cf62fe16c975a9891506= d12d0690b=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qemu-nbd.c=0D =0D Log Message:=0D -----------=0D qemu-nbd: Use user_creatable_process_cmdline() for --object=0D =0D This switches qemu-nbd from a QemuOpts-based parser for --object to=0D user_creatable_process_cmdline() which uses a keyval parser and enforces=0D= the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties accessible.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: d3cc008ee02827c6fc1cb47187ae206149faf1b8=0D https://github.com/qemu/qemu/commit/d3cc008ee02827c6fc1cb47187ae206= 149faf1b8=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Add user_creatable_add_from_str()=0D =0D This is a version of user_creatable_process_cmdline() with an Error=0D parameter that never calls exit() and is therefore usable in HMP.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 5bed51710f3029de99699b37dcf1374ca3eccbfa=0D https://github.com/qemu/qemu/commit/5bed51710f3029de99699b37dcf1374= ca3eccbfa=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-img.rst=0D M qemu-img.c=0D =0D Log Message:=0D -----------=0D qemu-img: Use user_creatable_process_cmdline() for --object=0D =0D This switches qemu-img from a QemuOpts-based parser for --object to=0D user_creatable_process_cmdline() which uses a keyval parser and enforces=0D= the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties accessible.=0D= =0D As a side effect, fix wrong exit codes in the object parsing error path=0D= of 'qemu-img compare'. This was broken in commit 334c43e2c3 because=0D &error_fatal exits with an exit code of 1, while it should have been 2.=0D= =0D Document that exit code 0 is also returned when just requested help was=0D= printed instead of comparing images. This is preexisting behaviour that=0D= isn't changed by this patch, though another instance of it is added with=0D= '--object help'.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 2202f38dbacd7744bda2800a9d4f7b0fb1fc461c=0D https://github.com/qemu/qemu/commit/2202f38dbacd7744bda2800a9d4f7b0= fb1fc461c=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hmp-commands.hx=0D M monitor/hmp-cmds.c=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D hmp: QAPIfy object_add=0D =0D This switches the HMP command object_add from a QemuOpts-based parser to=0D= user_creatable_add_from_str() which uses a keyval parser and enforces=0D the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties and help=0D accessible. In order for help to be printed to the monitor instead of=0D stdout, the printf() calls in the help functions are changed to=0D qemu_printf().=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D Reviewed-by: Dr. David Alan Gilbert =0D =0D =0D Commit: a1f468d66bbee55582e26a57910f2a93700d41b0=0D https://github.com/qemu/qemu/commit/a1f468d66bbee55582e26a57910f2a9= 3700d41b0=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Add user_creatable_parse_str()=0D =0D The system emulator has a more complicated way of handling command line=0D= options in that it reorders options before it processes them. This means=0D= that parsing object options and creating the object happen at two=0D different points. Split the parsing part into a separate function that=0D= can be reused by the system emulator command line.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 11abf88cf0638a4d2773d04a7872ac947563e037=0D https://github.com/qemu/qemu/commit/11abf88cf0638a4d2773d04a7872ac9= 47563e037=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D =0D Log Message:=0D -----------=0D char: Skip CLI aliases in query-chardev-backends=0D =0D The aliases "tty" and "parport" are only valid on the command line, QMP=0D= commands like chardev-add don't know them. query-chardev-backends should=0D= describe QMP and therefore not include them in the list of available=0D backends.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210311164253.338723-2-kwolf@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 3eda32b74e7bd72d4b7ae1c9ad9e92a8c3788ee9=0D https://github.com/qemu/qemu/commit/3eda32b74e7bd72d4b7ae1c9ad9e92a= 8c3788ee9=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D M docs/system/deprecated.rst=0D M tests/unit/test-char.c=0D =0D Log Message:=0D -----------=0D char: Deprecate backend aliases 'tty' and 'parport'=0D =0D QAPI doesn't know the aliases 'tty' and 'parport' and there is no=0D reason to prefer them to the real names of the backends 'serial' and=0D 'parallel'.=0D =0D Since warnings are not allowed in 'make check' output, we can't test=0D the deprecated alias any more. Remove it from test-char.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210311164253.338723-3-kwolf@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 086646e3526701cb45acc59f0e0cbcc64ed571d6=0D https://github.com/qemu/qemu/commit/086646e3526701cb45acc59f0e0cbcc= 64ed571d6=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D =0D Log Message:=0D -----------=0D char: Simplify chardev_name_foreach()=0D =0D Both callers use callbacks that don't do anything when they are called=0D= for CLI aliases. Instead of passing the cli_alias parameter, just don't=0D= call the callbacks for aliases in the first place.=0D =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210311164253.338723-4-kwolf@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 078ee48ef7d172df1b3ad020255d1eb6beda2daf=0D https://github.com/qemu/qemu/commit/078ee48ef7d172df1b3ad020255d1eb= 6beda2daf=0D Author: Kevin Wolf =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Support JSON in HMP object_add and tools --object=0D =0D Support JSON for --object in all tools and in HMP object_add in the same=0D= way as it is supported in qobject_input_visitor_new_str().=0D =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210312131921.421023-1-kwolf@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 0f8247d843768e9bba98dd42e5527035d3a580b4=0D https://github.com/qemu/qemu/commit/0f8247d843768e9bba98dd42e552703= 5d3a580b4=0D Author: Peter Maydell =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M block.c=0D M block/curl.c=0D M block/export/vhost-user-blk-server.c=0D M block/stream.c=0D M chardev/char.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M docs/tools/qemu-img.rst=0D M hmp-commands.hx=0D M hw/block/xen-block.c=0D M include/qom/object_interfaces.h=0D M monitor/hmp-cmds.c=0D M monitor/misc.c=0D M qapi/authz.json=0D M qapi/block-core.json=0D M qapi/common.json=0D M qapi/crypto.json=0D M qapi/machine.json=0D M qapi/net.json=0D M qapi/qom.json=0D M qapi/ui.json=0D M qemu-img.c=0D M qemu-io.c=0D M qemu-nbd.c=0D M qom/object_interfaces.c=0D M qom/qom-qmp-cmds.c=0D M storage-daemon/qapi/qapi-schema.json=0D M storage-daemon/qemu-storage-daemon.c=0D A tests/qemu-iotests/tests/qsd-jobs=0D A tests/qemu-iotests/tests/qsd-jobs.out=0D M tests/qtest/libqos/meson.build=0D A tests/qtest/libqos/vhost-user-blk.c=0D A tests/qtest/libqos/vhost-user-blk.h=0D M tests/qtest/meson.build=0D M tests/qtest/qmp-cmd-test.c=0D M tests/qtest/test-netfilter.c=0D A tests/qtest/vhost-user-blk-test.c=0D M tests/unit/test-char.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into sta= ging=0D =0D Block layer patches and object-add QAPIfication=0D =0D - QAPIfy object-add and --object for tools (keyval and JSON support)=0D - Add vhost-user-blk-test=0D - stream: Fail gracefully if permission is denied=0D - storage-daemon: Fix crash on quit when job is still running=0D - curl: Fix use after free=0D - char: Deprecate backend aliases, fix QMP query-chardev-backends=0D - Fix image creation option defaults that exist in both the format and=0D= the protocol layer (e.g. 'cluster_size' in qcow2 and rbd; the qcow2=0D default was incorrectly applied to the rbd layer)=0D =0D # gpg: Signature made Mon 15 Mar 2021 12:27:38 GMT=0D # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2= FD6=0D # gpg: issuer "kwolf@redhat.com"=0D # gpg: Good signature from "Kevin Wolf " [full]=0D # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F = 2FD6=0D =0D * remotes/kevin/tags/for-upstream: (42 commits)=0D qom: Support JSON in HMP object_add and tools --object=0D char: Simplify chardev_name_foreach()=0D char: Deprecate backend aliases 'tty' and 'parport'=0D char: Skip CLI aliases in query-chardev-backends=0D qom: Add user_creatable_parse_str()=0D hmp: QAPIfy object_add=0D qemu-img: Use user_creatable_process_cmdline() for --object=0D qom: Add user_creatable_add_from_str()=0D qemu-nbd: Use user_creatable_process_cmdline() for --object=0D qemu-io: Use user_creatable_process_cmdline() for --object=0D qom: Factor out user_creatable_process_cmdline()=0D qom: Remove user_creatable_add_dict()=0D qemu-storage-daemon: Implement --object with qmp_object_add()=0D qom: Make "object" QemuOptsList optional=0D qapi/qom: QAPIfy object-add=0D qapi/qom: Add ObjectOptions for x-remote-object=0D qapi/qom: Add ObjectOptions for input-*=0D qapi/qom: Add ObjectOptions for confidential-guest-support=0D qapi/qom: Add ObjectOptions for pr-manager-helper=0D qapi/qom: Add ObjectOptions for filter-*=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/6e31b3a5c34c...0f8247d84376= =0D From MAILER-DAEMON Tue Mar 16 09:19:06 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lM9bE-0002m0-2o for mharc-qemu-commits@gnu.org; Tue, 16 Mar 2021 09:19:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54850) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lM9bA-0002kO-UU for qemu-commits@nongnu.org; Tue, 16 Mar 2021 09:19:01 -0400 Received: from out-24.smtp.github.com ([192.30.252.207]:40315) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lM9b6-0004tJ-7q for qemu-commits@nongnu.org; Tue, 16 Mar 2021 09:19:00 -0400 Received: from github.com (hubbernetes-node-f7f585d.ac4-iad.github.net [10.52.205.51]) by smtp.github.com (Postfix) with ESMTPA id 2BB6960079A for ; Tue, 16 Mar 2021 06:18:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615900735; bh=6tc96xWxWSocN0IEWKZJasuE2x/yBT6VpdZdFYmCp54=; h=Date:From:To:Subject:From; b=UZ2w1goNVoR7y9rOPgoe5Js4QQNOQlTDZE6HvVzKGnkogEJDAH50v5mVMoP+0quar 3huew9WtuPMiDWb5/oiC91akwDGKhTNbHzJU4AA2GjNRHexXkStrpqQJL8eWpJqS8M kQgQ0ANFa2qpR3884IsrjSuLOTmSIB2gGMavfAyg= Date: Tue, 16 Mar 2021 06:18:55 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 7707be: hw/usb/bus: Remove the "full-path" property X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Mar 2021 13:19:02 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 7707beaea780d1ed918fd25a9ce84f055fe17921=0D https://github.com/qemu/qemu/commit/7707beaea780d1ed918fd25a9ce84f0= 55fe17921=0D Author: Thomas Huth =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/bus.c=0D M include/hw/usb.h=0D =0D Log Message:=0D -----------=0D hw/usb/bus: Remove the "full-path" property=0D =0D This property was only required for the pc-1.0 and earlier machine=0D types. Since these have been removed now, we can delete the property=0D as well.=0D =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210302120152.118042-1-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 405cf80ceb6ba62c7bafba55a85af51262d25b36=0D https://github.com/qemu/qemu/commit/405cf80ceb6ba62c7bafba55a85af51= 262d25b36=0D Author: Paolo Bonzini =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/bus.c=0D M hw/usb/dev-serial.c=0D M include/hw/usb.h=0D =0D Log Message:=0D -----------=0D usb: remove support for -usbdevice parameters=0D =0D No device needs them anymore and in fact they're undocumented.=0D Remove the code. The only change in behavior is that "-usbdevice=0D braille:hello" now reports an error, which is a bugfix.=0D =0D Signed-off-by: Paolo Bonzini =0D Cc: Gerd Hoffmann =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210310173323.1422754-2-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 6523c96c9ce0d4d8c34d447fbdf489ca0affb515=0D https://github.com/qemu/qemu/commit/6523c96c9ce0d4d8c34d447fbdf489c= a0affb515=0D Author: Paolo Bonzini =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/u2f.c=0D =0D Log Message:=0D -----------=0D usb: remove '-usbdevice u2f-key'=0D =0D It never worked.=0D =0D Signed-off-by: Paolo Bonzini =0D Cc: Gerd Hoffmann =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210310173323.1422754-3-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 6db34277e3b3071707a3a20afb82176e4f229b8f=0D https://github.com/qemu/qemu/commit/6db34277e3b3071707a3a20afb82176= e4f229b8f=0D Author: Thomas Huth =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/usb/dev-audio.c=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D usb: Un-deprecate -usbdevice (except for -usbdevice audio which gets re= moved)=0D =0D When trying to remove the -usbdevice option, there were complaints that=0D= "-usbdevice braille" is still a very useful shortcut for some people.=0D Thus we never remove this option. Since it's not such a big burden to=0D keep it around, and it's also convenient in the sense that you don't=0D have to worry to enable a host controller explicitly with this option,=0D= we should remove it from he deprecation list again.=0D =0D However, there is one exception: "-usbdevice audio" should go away, since= =0D audio devices without "audiodev=3D..." parameter are also on the deprecat= ion=0D list and you cannot use "-usbdevice audio" with "audiodev".=0D =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210310173323.1422754-4-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: c2a34ab2a0196e9a97e7206b94a6377cc70fb623=0D https://github.com/qemu/qemu/commit/c2a34ab2a0196e9a97e7206b94a6377= cc70fb623=0D Author: Thomas Huth =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D usb: Document the missing -usbdevice options=0D =0D There are some more -usbdevice options that have never been mentioned=0D in the documentation. Now that we removed -usbdevice from the list=0D of deprecated features again, we should document them properly.=0D =0D While we're at it, also sort them alphabetically.=0D =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210310173323.1422754-5-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: f4c46916dc670f894997409ea261e77867a136fa=0D https://github.com/qemu/qemu/commit/f4c46916dc670f894997409ea261e77= 867a136fa=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/isa/Kconfig=0D =0D Log Message:=0D -----------=0D hw/southbridge: Add missing Kconfig dependency VT82C686 on USB_UHCI=0D =0D The VT82C686 south bridge provides a USB UHCI bus via a PCI function.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: BALATON Zoltan =0D Message-Id: <20210309190802.830969-2-f4bug@amsat.org>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 9a4e12a64dffa241fc5c06e61c7f90799a67891e=0D https://github.com/qemu/qemu/commit/9a4e12a64dffa241fc5c06e61c7f907= 99a67891e=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/hcd-uhci.c=0D A hw/usb/hcd-uhci.h=0D =0D Log Message:=0D -----------=0D hw/usb/hcd-uhci: Expose generic prototypes to local header=0D =0D Extract generic UHCI prototypes into a new "hcd-uhci.h" local=0D header so we can reuse them in other units.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210309190802.830969-3-f4bug@amsat.org>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 6f2bcd5fc84700b5eabfd58c08cbc61f1d7b5b6e=0D https://github.com/qemu/qemu/commit/6f2bcd5fc84700b5eabfd58c08cbc61= f1d7b5b6e=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/usb/hcd-uhci.c=0D M hw/usb/meson.build=0D A hw/usb/vt82c686-uhci-pci.c=0D =0D Log Message:=0D -----------=0D hw/usb: Extract VT82C686 UHCI PCI function into a new unit=0D =0D Extract the VT82C686 PCI UHCI function into a new unit so=0D it is only build when the VT82C686 south bridge is selected.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210309190802.830969-4-f4bug@amsat.org>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: bbd8323d3196c9979385cba1b8b38859836e63c3=0D https://github.com/qemu/qemu/commit/bbd8323d3196c9979385cba1b8b3885= 9836e63c3=0D Author: Gerd Hoffmann =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/dev-storage.c=0D A include/hw/usb/msd.h=0D =0D Log Message:=0D -----------=0D usb/storage: move declarations to usb/msd.h header=0D =0D In preparation for splitting the usb-storage.c file move=0D declarations to the new usb/msd.h header file.=0D =0D Signed-off-by: Gerd Hoffmann =0D Message-Id: <20210312090425.772900-2-kraxel@redhat.com>=0D =0D =0D Commit: 31b7bed8b600e10c853595fb48f510c54ec86523=0D https://github.com/qemu/qemu/commit/31b7bed8b600e10c853595fb48f510c= 54ec86523=0D Author: Gerd Hoffmann =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D A hw/usb/dev-storage-bot.c=0D M hw/usb/dev-storage.c=0D M hw/usb/meson.build=0D =0D Log Message:=0D -----------=0D usb/storage: move usb-bot device to separate source file=0D =0D Pure code motion, no functional change.=0D =0D Signed-off-by: Gerd Hoffmann =0D Message-Id: <20210312090425.772900-3-kraxel@redhat.com>=0D =0D =0D Commit: 65561351e32d0cf7f0c1769003529cebec52d579=0D https://github.com/qemu/qemu/commit/65561351e32d0cf7f0c1769003529ce= bec52d579=0D Author: Gerd Hoffmann =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D A hw/usb/dev-storage-classic.c=0D M hw/usb/dev-storage.c=0D M hw/usb/meson.build=0D =0D Log Message:=0D -----------=0D usb/storage move usb-storage device to separate source file=0D =0D Pure code motion, no functional change.=0D =0D Signed-off-by: Gerd Hoffmann =0D Message-Id: <20210312090425.772900-4-kraxel@redhat.com>=0D =0D =0D Commit: f98c9bd45fb4f479ca38f8a2b2abcf27e9c2b9aa=0D https://github.com/qemu/qemu/commit/f98c9bd45fb4f479ca38f8a2b2abcf2= 7e9c2b9aa=0D Author: Gerd Hoffmann =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/Kconfig=0D M hw/usb/meson.build=0D =0D Log Message:=0D -----------=0D usb/storage: add kconfig symbols=0D =0D Add new kconfig symbols so usb-storage and usb-bot can=0D be enabled or disabled individually at build time.=0D =0D Signed-off-by: Gerd Hoffmann =0D Message-Id: <20210312090425.772900-5-kraxel@redhat.com>=0D =0D =0D Commit: 39912c14da07a2dbc73854addcfa0a42596340ac=0D https://github.com/qemu/qemu/commit/39912c14da07a2dbc73854addcfa0a4= 2596340ac=0D Author: Gerd Hoffmann =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/dev-storage.c=0D =0D Log Message:=0D -----------=0D usb/storage: clear csw on reset=0D =0D Stale data in csw (specifically residue) can confuse the state machine=0D= and allows the guest trigger an assert(). So clear csw on reset to=0D avoid this happening in case the guest resets the device in the middle=0D= of a request.=0D =0D Buglink: https://bugs.launchpad.net/qemu/+bug/1523811=0D Signed-off-by: Gerd Hoffmann =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210312094954.796799-1-kraxel@redhat.com>=0D =0D =0D Commit: 5b7f5586d182b0cafb1f8d558992a14763e2953e=0D https://github.com/qemu/qemu/commit/5b7f5586d182b0cafb1f8d558992a14= 763e2953e=0D Author: Peter Maydell =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/isa/Kconfig=0D M hw/usb/Kconfig=0D M hw/usb/bus.c=0D M hw/usb/dev-audio.c=0D M hw/usb/dev-serial.c=0D A hw/usb/dev-storage-bot.c=0D A hw/usb/dev-storage-classic.c=0D M hw/usb/dev-storage.c=0D M hw/usb/hcd-uhci.c=0D A hw/usb/hcd-uhci.h=0D M hw/usb/meson.build=0D M hw/usb/u2f.c=0D A hw/usb/vt82c686-uhci-pci.c=0D M include/hw/usb.h=0D A include/hw/usb/msd.h=0D M qemu-options.hx=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kraxel/tags/usb-20210315-pull-req= uest' into staging=0D =0D usb: -usbdevice cleanup and un-deprecation.=0D usb: split usb-storage.=0D usb: misc fixes and cleanups.=0D =0D # gpg: Signature made Mon 15 Mar 2021 18:02:28 GMT=0D # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87= 138=0D # gpg: Good signature from "Gerd Hoffmann (work) " [fu= ll]=0D # gpg: aka "Gerd Hoffmann " [full]=0D # gpg: aka "Gerd Hoffmann (private) " [= full]=0D # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 = 7138=0D =0D * remotes/kraxel/tags/usb-20210315-pull-request:=0D usb/storage: clear csw on reset=0D usb/storage: add kconfig symbols=0D usb/storage move usb-storage device to separate source file=0D usb/storage: move usb-bot device to separate source file=0D usb/storage: move declarations to usb/msd.h header=0D hw/usb: Extract VT82C686 UHCI PCI function into a new unit=0D hw/usb/hcd-uhci: Expose generic prototypes to local header=0D hw/southbridge: Add missing Kconfig dependency VT82C686 on USB_UHCI=0D usb: Document the missing -usbdevice options=0D usb: Un-deprecate -usbdevice (except for -usbdevice audio which gets re= moved)=0D usb: remove '-usbdevice u2f-key'=0D usb: remove support for -usbdevice parameters=0D hw/usb/bus: Remove the "full-path" property=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/0f8247d84376...5b7f5586d182= =0D From MAILER-DAEMON Tue Mar 16 17:08:00 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMGuy-0001LJ-Vw for mharc-qemu-commits@gnu.org; Tue, 16 Mar 2021 17:07:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49376) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMGuw-0001L6-N3 for qemu-commits@nongnu.org; Tue, 16 Mar 2021 17:07:54 -0400 Received: from out-22.smtp.github.com ([192.30.252.205]:34979 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMGut-0008BA-Gz for qemu-commits@nongnu.org; Tue, 16 Mar 2021 17:07:54 -0400 Received: from github.com (hubbernetes-node-89caa29.ac4-iad.github.net [10.52.201.75]) by smtp.github.com (Postfix) with ESMTPA id BBC555604A0 for ; Tue, 16 Mar 2021 14:07:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615928868; bh=TXMELwusRSIolJfkhQ9LlN1gqiKujiVDpiV8vqBYjLo=; h=Date:From:To:Subject:From; b=xp+WBkH7gVSvLvLwgiifqsVf1PxR2f57mhQrxO40GLs3AEmC75HleSR16AjrhVWEa yCsJeIRO+0T8tnuVHhoNcGsF6gbLUsIUKoTaOx8WWMiSF7X5DnQWwjTNweBx5WnqJt 0pUKNRDOUTHQ5HcVQO+fmPE8nTuHdQ78OUOgGwqU= Date: Tue, 16 Mar 2021 14:07:48 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 7707be: hw/usb/bus: Remove the "full-path" property X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Mar 2021 21:07:55 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 7707beaea780d1ed918fd25a9ce84f055fe17921=0D https://github.com/qemu/qemu/commit/7707beaea780d1ed918fd25a9ce84f0= 55fe17921=0D Author: Thomas Huth =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/bus.c=0D M include/hw/usb.h=0D =0D Log Message:=0D -----------=0D hw/usb/bus: Remove the "full-path" property=0D =0D This property was only required for the pc-1.0 and earlier machine=0D types. Since these have been removed now, we can delete the property=0D as well.=0D =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210302120152.118042-1-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 405cf80ceb6ba62c7bafba55a85af51262d25b36=0D https://github.com/qemu/qemu/commit/405cf80ceb6ba62c7bafba55a85af51= 262d25b36=0D Author: Paolo Bonzini =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/bus.c=0D M hw/usb/dev-serial.c=0D M include/hw/usb.h=0D =0D Log Message:=0D -----------=0D usb: remove support for -usbdevice parameters=0D =0D No device needs them anymore and in fact they're undocumented.=0D Remove the code. The only change in behavior is that "-usbdevice=0D braille:hello" now reports an error, which is a bugfix.=0D =0D Signed-off-by: Paolo Bonzini =0D Cc: Gerd Hoffmann =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210310173323.1422754-2-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 6523c96c9ce0d4d8c34d447fbdf489ca0affb515=0D https://github.com/qemu/qemu/commit/6523c96c9ce0d4d8c34d447fbdf489c= a0affb515=0D Author: Paolo Bonzini =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/u2f.c=0D =0D Log Message:=0D -----------=0D usb: remove '-usbdevice u2f-key'=0D =0D It never worked.=0D =0D Signed-off-by: Paolo Bonzini =0D Cc: Gerd Hoffmann =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210310173323.1422754-3-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 6db34277e3b3071707a3a20afb82176e4f229b8f=0D https://github.com/qemu/qemu/commit/6db34277e3b3071707a3a20afb82176= e4f229b8f=0D Author: Thomas Huth =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/usb/dev-audio.c=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D usb: Un-deprecate -usbdevice (except for -usbdevice audio which gets re= moved)=0D =0D When trying to remove the -usbdevice option, there were complaints that=0D= "-usbdevice braille" is still a very useful shortcut for some people.=0D Thus we never remove this option. Since it's not such a big burden to=0D keep it around, and it's also convenient in the sense that you don't=0D have to worry to enable a host controller explicitly with this option,=0D= we should remove it from he deprecation list again.=0D =0D However, there is one exception: "-usbdevice audio" should go away, since= =0D audio devices without "audiodev=3D..." parameter are also on the deprecat= ion=0D list and you cannot use "-usbdevice audio" with "audiodev".=0D =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210310173323.1422754-4-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: c2a34ab2a0196e9a97e7206b94a6377cc70fb623=0D https://github.com/qemu/qemu/commit/c2a34ab2a0196e9a97e7206b94a6377= cc70fb623=0D Author: Thomas Huth =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D usb: Document the missing -usbdevice options=0D =0D There are some more -usbdevice options that have never been mentioned=0D in the documentation. Now that we removed -usbdevice from the list=0D of deprecated features again, we should document them properly.=0D =0D While we're at it, also sort them alphabetically.=0D =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210310173323.1422754-5-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: f4c46916dc670f894997409ea261e77867a136fa=0D https://github.com/qemu/qemu/commit/f4c46916dc670f894997409ea261e77= 867a136fa=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/isa/Kconfig=0D =0D Log Message:=0D -----------=0D hw/southbridge: Add missing Kconfig dependency VT82C686 on USB_UHCI=0D =0D The VT82C686 south bridge provides a USB UHCI bus via a PCI function.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: BALATON Zoltan =0D Message-Id: <20210309190802.830969-2-f4bug@amsat.org>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 9a4e12a64dffa241fc5c06e61c7f90799a67891e=0D https://github.com/qemu/qemu/commit/9a4e12a64dffa241fc5c06e61c7f907= 99a67891e=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/hcd-uhci.c=0D A hw/usb/hcd-uhci.h=0D =0D Log Message:=0D -----------=0D hw/usb/hcd-uhci: Expose generic prototypes to local header=0D =0D Extract generic UHCI prototypes into a new "hcd-uhci.h" local=0D header so we can reuse them in other units.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210309190802.830969-3-f4bug@amsat.org>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 6f2bcd5fc84700b5eabfd58c08cbc61f1d7b5b6e=0D https://github.com/qemu/qemu/commit/6f2bcd5fc84700b5eabfd58c08cbc61= f1d7b5b6e=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/usb/hcd-uhci.c=0D M hw/usb/meson.build=0D A hw/usb/vt82c686-uhci-pci.c=0D =0D Log Message:=0D -----------=0D hw/usb: Extract VT82C686 UHCI PCI function into a new unit=0D =0D Extract the VT82C686 PCI UHCI function into a new unit so=0D it is only build when the VT82C686 south bridge is selected.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210309190802.830969-4-f4bug@amsat.org>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: bbd8323d3196c9979385cba1b8b38859836e63c3=0D https://github.com/qemu/qemu/commit/bbd8323d3196c9979385cba1b8b3885= 9836e63c3=0D Author: Gerd Hoffmann =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/dev-storage.c=0D A include/hw/usb/msd.h=0D =0D Log Message:=0D -----------=0D usb/storage: move declarations to usb/msd.h header=0D =0D In preparation for splitting the usb-storage.c file move=0D declarations to the new usb/msd.h header file.=0D =0D Signed-off-by: Gerd Hoffmann =0D Message-Id: <20210312090425.772900-2-kraxel@redhat.com>=0D =0D =0D Commit: 31b7bed8b600e10c853595fb48f510c54ec86523=0D https://github.com/qemu/qemu/commit/31b7bed8b600e10c853595fb48f510c= 54ec86523=0D Author: Gerd Hoffmann =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D A hw/usb/dev-storage-bot.c=0D M hw/usb/dev-storage.c=0D M hw/usb/meson.build=0D =0D Log Message:=0D -----------=0D usb/storage: move usb-bot device to separate source file=0D =0D Pure code motion, no functional change.=0D =0D Signed-off-by: Gerd Hoffmann =0D Message-Id: <20210312090425.772900-3-kraxel@redhat.com>=0D =0D =0D Commit: 65561351e32d0cf7f0c1769003529cebec52d579=0D https://github.com/qemu/qemu/commit/65561351e32d0cf7f0c1769003529ce= bec52d579=0D Author: Gerd Hoffmann =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D A hw/usb/dev-storage-classic.c=0D M hw/usb/dev-storage.c=0D M hw/usb/meson.build=0D =0D Log Message:=0D -----------=0D usb/storage move usb-storage device to separate source file=0D =0D Pure code motion, no functional change.=0D =0D Signed-off-by: Gerd Hoffmann =0D Message-Id: <20210312090425.772900-4-kraxel@redhat.com>=0D =0D =0D Commit: f98c9bd45fb4f479ca38f8a2b2abcf27e9c2b9aa=0D https://github.com/qemu/qemu/commit/f98c9bd45fb4f479ca38f8a2b2abcf2= 7e9c2b9aa=0D Author: Gerd Hoffmann =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/Kconfig=0D M hw/usb/meson.build=0D =0D Log Message:=0D -----------=0D usb/storage: add kconfig symbols=0D =0D Add new kconfig symbols so usb-storage and usb-bot can=0D be enabled or disabled individually at build time.=0D =0D Signed-off-by: Gerd Hoffmann =0D Message-Id: <20210312090425.772900-5-kraxel@redhat.com>=0D =0D =0D Commit: 39912c14da07a2dbc73854addcfa0a42596340ac=0D https://github.com/qemu/qemu/commit/39912c14da07a2dbc73854addcfa0a4= 2596340ac=0D Author: Gerd Hoffmann =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/dev-storage.c=0D =0D Log Message:=0D -----------=0D usb/storage: clear csw on reset=0D =0D Stale data in csw (specifically residue) can confuse the state machine=0D= and allows the guest trigger an assert(). So clear csw on reset to=0D avoid this happening in case the guest resets the device in the middle=0D= of a request.=0D =0D Buglink: https://bugs.launchpad.net/qemu/+bug/1523811=0D Signed-off-by: Gerd Hoffmann =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210312094954.796799-1-kraxel@redhat.com>=0D =0D =0D Commit: 5b7f5586d182b0cafb1f8d558992a14763e2953e=0D https://github.com/qemu/qemu/commit/5b7f5586d182b0cafb1f8d558992a14= 763e2953e=0D Author: Peter Maydell =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/isa/Kconfig=0D M hw/usb/Kconfig=0D M hw/usb/bus.c=0D M hw/usb/dev-audio.c=0D M hw/usb/dev-serial.c=0D A hw/usb/dev-storage-bot.c=0D A hw/usb/dev-storage-classic.c=0D M hw/usb/dev-storage.c=0D M hw/usb/hcd-uhci.c=0D A hw/usb/hcd-uhci.h=0D M hw/usb/meson.build=0D M hw/usb/u2f.c=0D A hw/usb/vt82c686-uhci-pci.c=0D M include/hw/usb.h=0D A include/hw/usb/msd.h=0D M qemu-options.hx=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kraxel/tags/usb-20210315-pull-req= uest' into staging=0D =0D usb: -usbdevice cleanup and un-deprecation.=0D usb: split usb-storage.=0D usb: misc fixes and cleanups.=0D =0D # gpg: Signature made Mon 15 Mar 2021 18:02:28 GMT=0D # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87= 138=0D # gpg: Good signature from "Gerd Hoffmann (work) " [fu= ll]=0D # gpg: aka "Gerd Hoffmann " [full]=0D # gpg: aka "Gerd Hoffmann (private) " [= full]=0D # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 = 7138=0D =0D * remotes/kraxel/tags/usb-20210315-pull-request:=0D usb/storage: clear csw on reset=0D usb/storage: add kconfig symbols=0D usb/storage move usb-storage device to separate source file=0D usb/storage: move usb-bot device to separate source file=0D usb/storage: move declarations to usb/msd.h header=0D hw/usb: Extract VT82C686 UHCI PCI function into a new unit=0D hw/usb/hcd-uhci: Expose generic prototypes to local header=0D hw/southbridge: Add missing Kconfig dependency VT82C686 on USB_UHCI=0D usb: Document the missing -usbdevice options=0D usb: Un-deprecate -usbdevice (except for -usbdevice audio which gets re= moved)=0D usb: remove '-usbdevice u2f-key'=0D usb: remove support for -usbdevice parameters=0D hw/usb/bus: Remove the "full-path" property=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/6e31b3a5c34c...5b7f5586d182= =0D From MAILER-DAEMON Tue Mar 16 17:13:49 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMH0f-00040s-Lx for mharc-qemu-commits@gnu.org; Tue, 16 Mar 2021 17:13:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51356) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMH0e-00040g-9P for qemu-commits@nongnu.org; Tue, 16 Mar 2021 17:13:48 -0400 Received: from out-18.smtp.github.com ([192.30.252.201]:59159 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMH0c-0002Yr-Jn for qemu-commits@nongnu.org; Tue, 16 Mar 2021 17:13:47 -0400 Received: from github.com (hubbernetes-node-7247464.va3-iad.github.net [10.48.112.57]) by smtp.github.com (Postfix) with ESMTPA id E3DB9340026 for ; Tue, 16 Mar 2021 14:13:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615929225; bh=R+czNBNz7jnoia1bEQQkQRQ8n8FDfEJqgocxDaCUS98=; h=Date:From:To:Subject:From; b=npOiIEfi+S7AzP0QCUJrCOkCDIjdVsNm4TZfxmfpAZHRgugHm9nMnzL/kh2tQ1JX1 wMbaFo51VfsDuuaJqqXJxGfVdch5nOuRgjv4g4Ig2l+a956aa09QxdPirmDr3tsuu3 cnxumaeJkdfnwt5qj4HQIPEmgaR+fN4wuqwt6HXU= Date: Tue, 16 Mar 2021 14:13:45 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 7625a1: utils: Use fixed-point arithmetic in qemu_strtosz X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Mar 2021 21:13:48 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 7625a1ed013a042748753750c9d9b1a33c9cd8e0 https://github.com/qemu/qemu/commit/7625a1ed013a042748753750c9d9b1a33c9cd8e0 Author: Richard Henderson Date: 2021-03-15 (Mon, 15 Mar 2021) Changed paths: M tests/unit/test-cutils.c M util/cutils.c Log Message: ----------- utils: Use fixed-point arithmetic in qemu_strtosz Once we've parsed the fractional value, extract it into an integral 64-bit fraction. Perform the scaling with integer arithmetic, and simplify the overflow detection. Reviewed-by: Eric Blake Message-Id: <20210315155835.1970210-2-richard.henderson@linaro.org> Signed-off-by: Richard Henderson Commit: 0693602a23276b076a679b1e7ed9125a444336b6 https://github.com/qemu/qemu/commit/0693602a23276b076a679b1e7ed9125a444336b6 Author: Peter Maydell Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M tests/unit/test-cutils.c M util/cutils.c Log Message: ----------- Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-misc-20210315' into staging Fix qemu_strtosz testsuite failures for i686. # gpg: Signature made Mon 15 Mar 2021 18:49:12 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson " [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-misc-20210315: utils: Use fixed-point arithmetic in qemu_strtosz Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/5b7f5586d182...0693602a2327 From MAILER-DAEMON Wed Mar 17 05:07:33 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMS9N-0002AG-He for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 05:07:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36502) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMS9M-00029C-GY for qemu-commits@nongnu.org; Wed, 17 Mar 2021 05:07:32 -0400 Received: from out-27.smtp.github.com ([192.30.252.210]:39117) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMS9J-00041n-09 for qemu-commits@nongnu.org; Wed, 17 Mar 2021 05:07:32 -0400 Received: from github.com (hubbernetes-node-360c797.ash1-iad.github.net [10.56.117.52]) by smtp.github.com (Postfix) with ESMTPA id 20A42900A6F for ; Wed, 17 Mar 2021 02:07:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615972047; bh=au4xlSs3bXv6ZAaYbRyrGdnHefWe9oWyJBhfyuxCsfA=; h=Date:From:To:Subject:From; b=ZVa7pm9/YkI1xMBll4hWEIyd38EuHnCc88t5ErMDeQETXm3zoJra8IZp6BPcLwkkY ozW5heWD1PsmFUrJSoPCTjtGbWJKzUsdflWdzmNfVUS5mjV3QejhtfVppV8oNQNW2f zBaheBVYzQ+8MsgZhv46KfIGhYTDkDKgKVii3Veo= Date: Wed, 17 Mar 2021 02:07:27 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.210; envelope-from=noreply@github.com; helo=out-27.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 7625a1: utils: Use fixed-point arithmetic in qemu_strtosz X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 09:07:32 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 7625a1ed013a042748753750c9d9b1a33c9cd8e0 https://github.com/qemu/qemu/commit/7625a1ed013a042748753750c9d9b1a33c9cd8e0 Author: Richard Henderson Date: 2021-03-15 (Mon, 15 Mar 2021) Changed paths: M tests/unit/test-cutils.c M util/cutils.c Log Message: ----------- utils: Use fixed-point arithmetic in qemu_strtosz Once we've parsed the fractional value, extract it into an integral 64-bit fraction. Perform the scaling with integer arithmetic, and simplify the overflow detection. Reviewed-by: Eric Blake Message-Id: <20210315155835.1970210-2-richard.henderson@linaro.org> Signed-off-by: Richard Henderson Commit: 0693602a23276b076a679b1e7ed9125a444336b6 https://github.com/qemu/qemu/commit/0693602a23276b076a679b1e7ed9125a444336b6 Author: Peter Maydell Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M tests/unit/test-cutils.c M util/cutils.c Log Message: ----------- Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-misc-20210315' into staging Fix qemu_strtosz testsuite failures for i686. # gpg: Signature made Mon 15 Mar 2021 18:49:12 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson " [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth-gitlab/tags/pull-misc-20210315: utils: Use fixed-point arithmetic in qemu_strtosz Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/5b7f5586d182...0693602a2327 From MAILER-DAEMON Wed Mar 17 05:13:21 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMSEy-0005H4-QT for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 05:13:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37756) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMSEw-0005FD-W6 for qemu-commits@nongnu.org; Wed, 17 Mar 2021 05:13:19 -0400 Received: from out-19.smtp.github.com ([192.30.252.202]:34547) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMSEr-0007sp-M1 for qemu-commits@nongnu.org; Wed, 17 Mar 2021 05:13:18 -0400 Received: from github.com (hubbernetes-node-fa6f02b.va3-iad.github.net [10.48.114.38]) by smtp.github.com (Postfix) with ESMTPA id 0EA18E0709 for ; Wed, 17 Mar 2021 02:13:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615972393; bh=ozw5/nDqir+9nVfxXrNR6EqBELNSdBfAtnvdHd4Latk=; h=Date:From:To:Subject:From; b=BVVVmv3DP0v3xiBf5lxOqmXO3BF/07ArX3fuw1iTij4iLiTtMVhCavClm2K3oLICe BRgZU7WQpsiEgfevRexkEuqg0ioZFpHpf/uzkg8DnUvqbG6QKMwZLuw7Ee4zXB2sxz AX9+OypONoFdF8sqiKMkXfPI+xOyJng+svSz3HHE= Date: Wed, 17 Mar 2021 02:13:13 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.202; envelope-from=noreply@github.com; helo=out-19.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 5bb832: virtiofsd: Release vu_dispatch_lock when stopping ... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 09:13:19 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 5bb8327b655dbce10a91ef809acb0875dd0ee0ed=0D https://github.com/qemu/qemu/commit/5bb8327b655dbce10a91ef809acb087= 5dd0ee0ed=0D Author: Greg Kurz =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tools/virtiofsd/fuse_virtio.c=0D =0D Log Message:=0D -----------=0D virtiofsd: Release vu_dispatch_lock when stopping queue=0D =0D QEMU can stop a virtqueue by sending a VHOST_USER_GET_VRING_BASE request=0D= to virtiofsd. As with all other vhost-user protocol messages, the thread=0D= that runs the main event loop in virtiofsd takes the vu_dispatch lock in=0D= write mode. This ensures that no other thread can access virtqueues or=0D= memory tables at the same time.=0D =0D In the case of VHOST_USER_GET_VRING_BASE, the main thread basically=0D notifies the queue thread that it should terminate and waits for its=0D termination:=0D =0D main()=0D virtio_loop()=0D vu_dispatch_wrlock()=0D vu_dispatch()=0D vu_process_message()=0D vu_get_vring_base_exec()=0D fv_queue_cleanup_thread()=0D pthread_join()=0D =0D Unfortunately, the queue thread ends up calling virtio_send_msg()=0D at some point, which itself needs to grab the lock:=0D =0D fv_queue_thread()=0D g_list_foreach()=0D fv_queue_worker()=0D fuse_session_process_buf_int()=0D do_release()=0D lo_release()=0D fuse_reply_err()=0D send_reply()=0D send_reply_iov()=0D fuse_send_reply_iov_nofree()=0D fuse_send_msg()=0D virtio_send_msg()=0D vu_dispatch_rdlock() <-- Deadlock !=0D =0D Simply have the main thread to release the lock before going to=0D sleep and take it back afterwards. A very similar patch was already=0D sent by Vivek Goyal sometime back:=0D =0D https://listman.redhat.com/archives/virtio-fs/2021-January/msg00073.html=0D= =0D The only difference here is that this done in fv_queue_set_started()=0D because fv_queue_cleanup_thread() can also be called from virtio_loop()=0D= without the lock being held.=0D =0D Signed-off-by: Greg Kurz =0D Reviewed-by: Vivek Goyal =0D Reviewed-by: Stefan Hajnoczi =0D Message-Id: <20210312092212.782255-8-groug@kaod.org>=0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 6d118c4349966a1890d00bbbdc42001f173c6e4d=0D https://github.com/qemu/qemu/commit/6d118c4349966a1890d00bbbdc42001= f173c6e4d=0D Author: Vivek Goyal =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tools/virtiofsd/passthrough_ll.c=0D =0D Log Message:=0D -----------=0D virtiofsd: Add qemu version and copyright info=0D =0D Option "-V" currently displays the fuse protocol version virtiofsd is=0D using. For example, I see this.=0D =0D $ ./virtiofsd -V=0D "using FUSE kernel interface version 7.33"=0D =0D People also want to know software version of virtiofsd so that they can=0D= figure out if a certain fix is part of currently running virtiofsd or=0D not. Eric Ernst ran into this issue.=0D =0D David Gilbert thinks that it probably is best that we simply carry the=0D= qemu version and display that information given we are part of qemu=0D tree.=0D =0D So this patch enhances version information and also adds qemu version=0D and copyright info. Not sure if copyright information is supposed=0D to be displayed along with version info. Given qemu-storage-daemon=0D and other utilities are doing it, so I continued with same pattern.=0D This is how now output looks like.=0D =0D $ ./virtiofsd -V=0D virtiofsd version 5.2.50 (v5.2.0-2357-gcbcf09872a-dirty)=0D Copyright (c) 2003-2020 Fabrice Bellard and the QEMU Project developers=0D= using FUSE kernel interface version 7.33=0D =0D Reported-by: Eric Ernst =0D Signed-off-by: Vivek Goyal =0D Message-Id: <20210303195339.GB3793@redhat.com>=0D Reviewed-by: Dr. David Alan Gilbert =0D Reviewed-by: Sergio Lopez =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 28d1ad0ea41342472afda15b515d95671eac4030=0D https://github.com/qemu/qemu/commit/28d1ad0ea41342472afda15b515d956= 71eac4030=0D Author: Greg Kurz =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tools/virtiofsd/passthrough_ll.c=0D =0D Log Message:=0D -----------=0D virtiofsd: Don't allow empty filenames=0D =0D POSIX.1-2017 clearly stipulates that empty filenames aren't=0D allowed ([1] and [2]). Since virtiofsd is supposed to mirror=0D the host file system hierarchy and the host can be assumed to=0D be linux, we don't really expect clients to pass requests with=0D an empty path in it. If they do so anyway, this would eventually=0D cause an error when trying to create/lookup the actual inode=0D on the underlying POSIX filesystem. But this could still confuse=0D some code that wouldn't be ready to cope with this.=0D =0D Filter out empty names coming from the client at the top level,=0D so that the rest doesn't have to care about it. This is done=0D everywhere we already call is_safe_path_component(), but=0D in a separate helper since the usual error for empty path=0D names is ENOENT instead of EINVAL.=0D =0D [1] https://pubs.opengroup.org/onlinepubs/9699919799/basedefs/V1_chap03.h= tml#tag_03_170=0D [2] https://pubs.opengroup.org/onlinepubs/9699919799/basedefs/V1_chap04.h= tml#tag_04_13=0D =0D Signed-off-by: Greg Kurz =0D Message-Id: <20210312141003.819108-4-groug@kaod.org>=0D Reviewed-by: Connor Kuehl =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 20afcc23b3212784c84fb06062f66d9d2ce6865d=0D https://github.com/qemu/qemu/commit/20afcc23b3212784c84fb06062f66d9= d2ce6865d=0D Author: Greg Kurz =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tools/virtiofsd/passthrough_ll.c=0D =0D Log Message:=0D -----------=0D virtiofsd: Don't allow empty paths in lookup_name()=0D =0D When passed an empty filename, lookup_name() returns the inode of=0D the parent directory, unless the parent is the root in which case=0D the st_dev doesn't match and lo_find() returns NULL. This is=0D because lookup_name() passes AT_EMPTY_PATH down to fstatat() or=0D statx().=0D =0D This behavior doesn't quite make sense because users of lookup_name()=0D then pass the name to unlinkat(), renameat() or renameat2(), all of=0D which will always fail on empty names.=0D =0D Drop AT_EMPTY_PATH from the flags in lookup_name() so that it has=0D the consistent behavior of "returning an existing child inode or=0D NULL" for all directories.=0D =0D Signed-off-by: Greg Kurz =0D Message-Id: <20210312141003.819108-2-groug@kaod.org>=0D Reviewed-by: Connor Kuehl =0D Reviewed-by: Vivek Goyal =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 03ccaaae48fe1bd3ee0842717008fe74d7745680=0D https://github.com/qemu/qemu/commit/03ccaaae48fe1bd3ee0842717008fe7= 4d7745680=0D Author: Greg Kurz =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tools/virtiofsd/passthrough_ll.c=0D =0D Log Message:=0D -----------=0D virtiofsd: Convert some functions to return bool=0D =0D Both currently only return 0 or 1.=0D =0D Signed-off-by: Greg Kurz =0D Message-Id: <20210312141003.819108-3-groug@kaod.org>=0D Reviewed-by: Connor Kuehl =0D Reviewed-by: Vivek Goyal =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: a339149afa50578380bf8a7c1ed5ae7061431db4=0D https://github.com/qemu/qemu/commit/a339149afa50578380bf8a7c1ed5ae7= 061431db4=0D Author: Hao Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M migration/multifd.c=0D =0D Log Message:=0D -----------=0D migration/tls: fix inverted semantics in multifd_channel_connect=0D =0D Function multifd_channel_connect() return "true" to indicate failure,=0D which is rather confusing. Fix that.=0D =0D Signed-off-by: Hao Wang =0D Message-Id: <20210209104237.2250941-2-wanghao232@huawei.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Chuan Zheng =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: fca676429ca7f309b5d492c7675d35fec484197c=0D https://github.com/qemu/qemu/commit/fca676429ca7f309b5d492c7675d35f= ec484197c=0D Author: Hao Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M migration/multifd.c=0D =0D Log Message:=0D -----------=0D migration/tls: add error handling in multifd_tls_handshake_thread=0D =0D If any error happens during multifd send thread creating (e.g. channel br= oke=0D because new domain is destroyed by the dst), multifd_tls_handshake_thread= =0D may exit silently, leaving main migration thread hanging (ram_save_setup = ->=0D multifd_send_sync_main -> qemu_sem_wait(&p->sem_sync)).=0D Fix that by adding error handling in multifd_tls_handshake_thread.=0D =0D Signed-off-by: Hao Wang =0D Message-Id: <20210209104237.2250941-3-wanghao232@huawei.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Chuan Zheng =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: a8e2ab5db2181b68f371ee794e1a0fe7ca6f5e24=0D https://github.com/qemu/qemu/commit/a8e2ab5db2181b68f371ee794e1a0fe= 7ca6f5e24=0D Author: Mahmoud Mandour =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M monitor/monitor.c=0D M monitor/qmp.c=0D =0D Log Message:=0D -----------=0D monitor: Replaced qemu_mutex_lock calls with QEMU_LOCK_GUARD=0D =0D Removed various qemu_mutex_lock and their respective qemu_mutex_unlock=0D= calls and used lock guard macros (QEMU_LOCK_GUARD and=0D WITH_QEMU_LOCK_GUARD). This simplifies the code by=0D eliminating qemu_mutex_unlock calls.=0D =0D Signed-off-by: Mahmoud Mandour =0D Message-Id: <20210311031538.5325-6-ma.mandourr@gmail.com>=0D Reviewed-by: Dr. David Alan Gilbert =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 373969507a3dc7de2d291da7e1bd03acf46ec643=0D https://github.com/qemu/qemu/commit/373969507a3dc7de2d291da7e1bd03a= cf46ec643=0D Author: Mahmoud Mandour =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M migration/migration.c=0D M migration/ram.c=0D =0D Log Message:=0D -----------=0D migration: Replaced qemu_mutex_lock calls with QEMU_LOCK_GUARD=0D =0D Replaced various qemu_mutex_lock calls and their respective=0D qemu_mutex_unlock calls with QEMU_LOCK_GUARD macro. This simplifies=0D the code by eliminating the respective qemu_mutex_unlock calls.=0D =0D Signed-off-by: Mahmoud Mandour =0D Message-Id: <20210311031538.5325-7-ma.mandourr@gmail.com>=0D Reviewed-by: Dr. David Alan Gilbert =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 5d1428d6c43942cfb40a909e4c30a5cbb81bda8f=0D https://github.com/qemu/qemu/commit/5d1428d6c43942cfb40a909e4c30a5c= bb81bda8f=0D Author: Peter Maydell =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M migration/migration.c=0D M migration/multifd.c=0D M migration/ram.c=0D M monitor/monitor.c=0D M monitor/qmp.c=0D M tools/virtiofsd/fuse_virtio.c=0D M tools/virtiofsd/passthrough_ll.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiof= s-20210315' into staging=0D =0D virtiofs and migration pull 2021-03-15=0D =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D # gpg: Signature made Mon 15 Mar 2021 20:03:03 GMT=0D # gpg: using RSA key 45F5C71B4A0CB7FB977A9FA90516331EBC5BF= DE7=0D # gpg: Good signature from "Dr. David Alan Gilbert (RH2) " [full]=0D # Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B = FDE7=0D =0D * remotes/dgilbert-gitlab/tags/pull-virtiofs-20210315:=0D migration: Replaced qemu_mutex_lock calls with QEMU_LOCK_GUARD=0D monitor: Replaced qemu_mutex_lock calls with QEMU_LOCK_GUARD=0D migration/tls: add error handling in multifd_tls_handshake_thread=0D migration/tls: fix inverted semantics in multifd_channel_connect=0D virtiofsd: Convert some functions to return bool=0D virtiofsd: Don't allow empty paths in lookup_name()=0D virtiofsd: Don't allow empty filenames=0D virtiofsd: Add qemu version and copyright info=0D virtiofsd: Release vu_dispatch_lock when stopping queue=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/0693602a2327...5d1428d6c439= =0D From MAILER-DAEMON Wed Mar 17 06:38:52 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMTZk-0003YF-On for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 06:38:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36062) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMTZf-0003Vo-4c for qemu-commits@nongnu.org; Wed, 17 Mar 2021 06:38:51 -0400 Received: from out-18.smtp.github.com ([192.30.252.201]:56831 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMTZZ-0000j6-Nl for qemu-commits@nongnu.org; Wed, 17 Mar 2021 06:38:46 -0400 Received: from github.com (hubbernetes-node-f2c6d15.va3-iad.github.net [10.48.121.77]) by smtp.github.com (Postfix) with ESMTPA id F07B0340056 for ; Wed, 17 Mar 2021 03:38:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615977521; bh=G8DsHJchmIDKT5bYLeX5Ksveul/COficXyI7d+shT2c=; h=Date:From:To:Subject:From; b=SbIE6r1xpCLfmZh9rkWQ08k11P1expdy2dG5tD0kfI4Ube1btAznRJ9kLb3At+FLO gum8Vm22TVELcXsYDfpnv72JH6KP2gGXANDt9rYctznqcYVcVc+Cxow5Dlh0Dj9zqo 3eVE6RNuCZEgO4vtLRifQ1TAkX1zp0hAOdx6v7rQ= Date: Wed, 17 Mar 2021 03:38:40 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 5bb832: virtiofsd: Release vu_dispatch_lock when stopping ... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 10:38:51 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 5bb8327b655dbce10a91ef809acb0875dd0ee0ed=0D https://github.com/qemu/qemu/commit/5bb8327b655dbce10a91ef809acb087= 5dd0ee0ed=0D Author: Greg Kurz =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tools/virtiofsd/fuse_virtio.c=0D =0D Log Message:=0D -----------=0D virtiofsd: Release vu_dispatch_lock when stopping queue=0D =0D QEMU can stop a virtqueue by sending a VHOST_USER_GET_VRING_BASE request=0D= to virtiofsd. As with all other vhost-user protocol messages, the thread=0D= that runs the main event loop in virtiofsd takes the vu_dispatch lock in=0D= write mode. This ensures that no other thread can access virtqueues or=0D= memory tables at the same time.=0D =0D In the case of VHOST_USER_GET_VRING_BASE, the main thread basically=0D notifies the queue thread that it should terminate and waits for its=0D termination:=0D =0D main()=0D virtio_loop()=0D vu_dispatch_wrlock()=0D vu_dispatch()=0D vu_process_message()=0D vu_get_vring_base_exec()=0D fv_queue_cleanup_thread()=0D pthread_join()=0D =0D Unfortunately, the queue thread ends up calling virtio_send_msg()=0D at some point, which itself needs to grab the lock:=0D =0D fv_queue_thread()=0D g_list_foreach()=0D fv_queue_worker()=0D fuse_session_process_buf_int()=0D do_release()=0D lo_release()=0D fuse_reply_err()=0D send_reply()=0D send_reply_iov()=0D fuse_send_reply_iov_nofree()=0D fuse_send_msg()=0D virtio_send_msg()=0D vu_dispatch_rdlock() <-- Deadlock !=0D =0D Simply have the main thread to release the lock before going to=0D sleep and take it back afterwards. A very similar patch was already=0D sent by Vivek Goyal sometime back:=0D =0D https://listman.redhat.com/archives/virtio-fs/2021-January/msg00073.html=0D= =0D The only difference here is that this done in fv_queue_set_started()=0D because fv_queue_cleanup_thread() can also be called from virtio_loop()=0D= without the lock being held.=0D =0D Signed-off-by: Greg Kurz =0D Reviewed-by: Vivek Goyal =0D Reviewed-by: Stefan Hajnoczi =0D Message-Id: <20210312092212.782255-8-groug@kaod.org>=0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 6d118c4349966a1890d00bbbdc42001f173c6e4d=0D https://github.com/qemu/qemu/commit/6d118c4349966a1890d00bbbdc42001= f173c6e4d=0D Author: Vivek Goyal =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tools/virtiofsd/passthrough_ll.c=0D =0D Log Message:=0D -----------=0D virtiofsd: Add qemu version and copyright info=0D =0D Option "-V" currently displays the fuse protocol version virtiofsd is=0D using. For example, I see this.=0D =0D $ ./virtiofsd -V=0D "using FUSE kernel interface version 7.33"=0D =0D People also want to know software version of virtiofsd so that they can=0D= figure out if a certain fix is part of currently running virtiofsd or=0D not. Eric Ernst ran into this issue.=0D =0D David Gilbert thinks that it probably is best that we simply carry the=0D= qemu version and display that information given we are part of qemu=0D tree.=0D =0D So this patch enhances version information and also adds qemu version=0D and copyright info. Not sure if copyright information is supposed=0D to be displayed along with version info. Given qemu-storage-daemon=0D and other utilities are doing it, so I continued with same pattern.=0D This is how now output looks like.=0D =0D $ ./virtiofsd -V=0D virtiofsd version 5.2.50 (v5.2.0-2357-gcbcf09872a-dirty)=0D Copyright (c) 2003-2020 Fabrice Bellard and the QEMU Project developers=0D= using FUSE kernel interface version 7.33=0D =0D Reported-by: Eric Ernst =0D Signed-off-by: Vivek Goyal =0D Message-Id: <20210303195339.GB3793@redhat.com>=0D Reviewed-by: Dr. David Alan Gilbert =0D Reviewed-by: Sergio Lopez =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 28d1ad0ea41342472afda15b515d95671eac4030=0D https://github.com/qemu/qemu/commit/28d1ad0ea41342472afda15b515d956= 71eac4030=0D Author: Greg Kurz =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tools/virtiofsd/passthrough_ll.c=0D =0D Log Message:=0D -----------=0D virtiofsd: Don't allow empty filenames=0D =0D POSIX.1-2017 clearly stipulates that empty filenames aren't=0D allowed ([1] and [2]). Since virtiofsd is supposed to mirror=0D the host file system hierarchy and the host can be assumed to=0D be linux, we don't really expect clients to pass requests with=0D an empty path in it. If they do so anyway, this would eventually=0D cause an error when trying to create/lookup the actual inode=0D on the underlying POSIX filesystem. But this could still confuse=0D some code that wouldn't be ready to cope with this.=0D =0D Filter out empty names coming from the client at the top level,=0D so that the rest doesn't have to care about it. This is done=0D everywhere we already call is_safe_path_component(), but=0D in a separate helper since the usual error for empty path=0D names is ENOENT instead of EINVAL.=0D =0D [1] https://pubs.opengroup.org/onlinepubs/9699919799/basedefs/V1_chap03.h= tml#tag_03_170=0D [2] https://pubs.opengroup.org/onlinepubs/9699919799/basedefs/V1_chap04.h= tml#tag_04_13=0D =0D Signed-off-by: Greg Kurz =0D Message-Id: <20210312141003.819108-4-groug@kaod.org>=0D Reviewed-by: Connor Kuehl =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 20afcc23b3212784c84fb06062f66d9d2ce6865d=0D https://github.com/qemu/qemu/commit/20afcc23b3212784c84fb06062f66d9= d2ce6865d=0D Author: Greg Kurz =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tools/virtiofsd/passthrough_ll.c=0D =0D Log Message:=0D -----------=0D virtiofsd: Don't allow empty paths in lookup_name()=0D =0D When passed an empty filename, lookup_name() returns the inode of=0D the parent directory, unless the parent is the root in which case=0D the st_dev doesn't match and lo_find() returns NULL. This is=0D because lookup_name() passes AT_EMPTY_PATH down to fstatat() or=0D statx().=0D =0D This behavior doesn't quite make sense because users of lookup_name()=0D then pass the name to unlinkat(), renameat() or renameat2(), all of=0D which will always fail on empty names.=0D =0D Drop AT_EMPTY_PATH from the flags in lookup_name() so that it has=0D the consistent behavior of "returning an existing child inode or=0D NULL" for all directories.=0D =0D Signed-off-by: Greg Kurz =0D Message-Id: <20210312141003.819108-2-groug@kaod.org>=0D Reviewed-by: Connor Kuehl =0D Reviewed-by: Vivek Goyal =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 03ccaaae48fe1bd3ee0842717008fe74d7745680=0D https://github.com/qemu/qemu/commit/03ccaaae48fe1bd3ee0842717008fe7= 4d7745680=0D Author: Greg Kurz =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M tools/virtiofsd/passthrough_ll.c=0D =0D Log Message:=0D -----------=0D virtiofsd: Convert some functions to return bool=0D =0D Both currently only return 0 or 1.=0D =0D Signed-off-by: Greg Kurz =0D Message-Id: <20210312141003.819108-3-groug@kaod.org>=0D Reviewed-by: Connor Kuehl =0D Reviewed-by: Vivek Goyal =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: a339149afa50578380bf8a7c1ed5ae7061431db4=0D https://github.com/qemu/qemu/commit/a339149afa50578380bf8a7c1ed5ae7= 061431db4=0D Author: Hao Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M migration/multifd.c=0D =0D Log Message:=0D -----------=0D migration/tls: fix inverted semantics in multifd_channel_connect=0D =0D Function multifd_channel_connect() return "true" to indicate failure,=0D which is rather confusing. Fix that.=0D =0D Signed-off-by: Hao Wang =0D Message-Id: <20210209104237.2250941-2-wanghao232@huawei.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Chuan Zheng =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: fca676429ca7f309b5d492c7675d35fec484197c=0D https://github.com/qemu/qemu/commit/fca676429ca7f309b5d492c7675d35f= ec484197c=0D Author: Hao Wang =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M migration/multifd.c=0D =0D Log Message:=0D -----------=0D migration/tls: add error handling in multifd_tls_handshake_thread=0D =0D If any error happens during multifd send thread creating (e.g. channel br= oke=0D because new domain is destroyed by the dst), multifd_tls_handshake_thread= =0D may exit silently, leaving main migration thread hanging (ram_save_setup = ->=0D multifd_send_sync_main -> qemu_sem_wait(&p->sem_sync)).=0D Fix that by adding error handling in multifd_tls_handshake_thread.=0D =0D Signed-off-by: Hao Wang =0D Message-Id: <20210209104237.2250941-3-wanghao232@huawei.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Chuan Zheng =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: a8e2ab5db2181b68f371ee794e1a0fe7ca6f5e24=0D https://github.com/qemu/qemu/commit/a8e2ab5db2181b68f371ee794e1a0fe= 7ca6f5e24=0D Author: Mahmoud Mandour =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M monitor/monitor.c=0D M monitor/qmp.c=0D =0D Log Message:=0D -----------=0D monitor: Replaced qemu_mutex_lock calls with QEMU_LOCK_GUARD=0D =0D Removed various qemu_mutex_lock and their respective qemu_mutex_unlock=0D= calls and used lock guard macros (QEMU_LOCK_GUARD and=0D WITH_QEMU_LOCK_GUARD). This simplifies the code by=0D eliminating qemu_mutex_unlock calls.=0D =0D Signed-off-by: Mahmoud Mandour =0D Message-Id: <20210311031538.5325-6-ma.mandourr@gmail.com>=0D Reviewed-by: Dr. David Alan Gilbert =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 373969507a3dc7de2d291da7e1bd03acf46ec643=0D https://github.com/qemu/qemu/commit/373969507a3dc7de2d291da7e1bd03a= cf46ec643=0D Author: Mahmoud Mandour =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M migration/migration.c=0D M migration/ram.c=0D =0D Log Message:=0D -----------=0D migration: Replaced qemu_mutex_lock calls with QEMU_LOCK_GUARD=0D =0D Replaced various qemu_mutex_lock calls and their respective=0D qemu_mutex_unlock calls with QEMU_LOCK_GUARD macro. This simplifies=0D the code by eliminating the respective qemu_mutex_unlock calls.=0D =0D Signed-off-by: Mahmoud Mandour =0D Message-Id: <20210311031538.5325-7-ma.mandourr@gmail.com>=0D Reviewed-by: Dr. David Alan Gilbert =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D =0D Commit: 5d1428d6c43942cfb40a909e4c30a5cbb81bda8f=0D https://github.com/qemu/qemu/commit/5d1428d6c43942cfb40a909e4c30a5c= bb81bda8f=0D Author: Peter Maydell =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M migration/migration.c=0D M migration/multifd.c=0D M migration/ram.c=0D M monitor/monitor.c=0D M monitor/qmp.c=0D M tools/virtiofsd/fuse_virtio.c=0D M tools/virtiofsd/passthrough_ll.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/pull-virtiof= s-20210315' into staging=0D =0D virtiofs and migration pull 2021-03-15=0D =0D Signed-off-by: Dr. David Alan Gilbert =0D =0D # gpg: Signature made Mon 15 Mar 2021 20:03:03 GMT=0D # gpg: using RSA key 45F5C71B4A0CB7FB977A9FA90516331EBC5BF= DE7=0D # gpg: Good signature from "Dr. David Alan Gilbert (RH2) " [full]=0D # Primary key fingerprint: 45F5 C71B 4A0C B7FB 977A 9FA9 0516 331E BC5B = FDE7=0D =0D * remotes/dgilbert-gitlab/tags/pull-virtiofs-20210315:=0D migration: Replaced qemu_mutex_lock calls with QEMU_LOCK_GUARD=0D monitor: Replaced qemu_mutex_lock calls with QEMU_LOCK_GUARD=0D migration/tls: add error handling in multifd_tls_handshake_thread=0D migration/tls: fix inverted semantics in multifd_channel_connect=0D virtiofsd: Convert some functions to return bool=0D virtiofsd: Don't allow empty paths in lookup_name()=0D virtiofsd: Don't allow empty filenames=0D virtiofsd: Add qemu version and copyright info=0D virtiofsd: Release vu_dispatch_lock when stopping queue=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/0693602a2327...5d1428d6c439= =0D From MAILER-DAEMON Wed Mar 17 06:44:16 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMTey-0007eO-Hh for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 06:44:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37082) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMTew-0007ao-Kw for qemu-commits@nongnu.org; Wed, 17 Mar 2021 06:44:14 -0400 Received: from out-19.smtp.github.com ([192.30.252.202]:33417) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMTeu-0003aJ-G1 for qemu-commits@nongnu.org; Wed, 17 Mar 2021 06:44:14 -0400 Received: from github.com (hubbernetes-node-c4fbef6.va3-iad.github.net [10.48.16.12]) by smtp.github.com (Postfix) with ESMTPA id C6FF3E0233 for ; Wed, 17 Mar 2021 03:44:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615977851; bh=sjzckDncib3fSVTeUgMMhi2qqAHiWh/4UGFhx8W6GRE=; h=Date:From:To:Subject:From; b=XvCToaz83HenVNfRPMJEGDYu5zIU5Au71OebtsrJGUR+3wmK0f/2y9qLsd+adiXkY RDiZYHt6BLuNtZf6lwkD78pkD4pQzg6YG1fpXK3Iry8CKnAH+qcVbzYqF4+K3rHjDW JNVM/SicCJeUMM0lh4zFw+0F6YaB2DRJeeloUk1k= Date: Wed, 17 Mar 2021 03:44:11 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.202; envelope-from=noreply@github.com; helo=out-19.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.25, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 8c6df1: hw/char: add goldfish-tty X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 10:44:14 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 8c6df16ff6080365642b0583514dd03d6a7729d6=0D https://github.com/qemu/qemu/commit/8c6df16ff6080365642b0583514dd03= d6a7729d6=0D Author: Laurent Vivier =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/char/Kconfig=0D A hw/char/goldfish_tty.c=0D M hw/char/meson.build=0D M hw/char/trace-events=0D A include/hw/char/goldfish_tty.h=0D =0D Log Message:=0D -----------=0D hw/char: add goldfish-tty=0D =0D Implement the goldfish tty device as defined in=0D =0D https://android.googlesource.com/platform/external/qemu/+/master/docs/GOL= DFISH-VIRTUAL-HARDWARE.TXT=0D =0D and based on the kernel driver code:=0D =0D https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/d= rivers/tty/goldfish.c=0D =0D Signed-off-by: Laurent Vivier =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210312214145.2936082-2-laurent@vivier.eu>=0D =0D =0D Commit: 87855593903fdc1809d6f6c2ac7f344c31cea799=0D https://github.com/qemu/qemu/commit/87855593903fdc1809d6f6c2ac7f344= c31cea799=0D Author: Laurent Vivier =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/intc/Kconfig=0D A hw/intc/goldfish_pic.c=0D M hw/intc/meson.build=0D M hw/intc/trace-events=0D A include/hw/intc/goldfish_pic.h=0D =0D Log Message:=0D -----------=0D hw/intc: add goldfish-pic=0D =0D Implement the goldfish pic device as defined in=0D =0D https://android.googlesource.com/platform/external/qemu/+/master/docs/GOL= DFISH-VIRTUAL-HARDWARE.TXT=0D =0D Signed-off-by: Laurent Vivier =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210312214145.2936082-3-laurent@vivier.eu>=0D =0D =0D Commit: 2fde99ee3120416251922282c364833473135765=0D https://github.com/qemu/qemu/commit/2fde99ee3120416251922282c364833= 473135765=0D Author: Laurent Vivier =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/intc/Kconfig=0D A hw/intc/m68k_irqc.c=0D M hw/intc/meson.build=0D A include/hw/intc/m68k_irqc.h=0D =0D Log Message:=0D -----------=0D m68k: add an interrupt controller=0D =0D A (generic) copy of the GLUE device we already have for q800 to use with=0D= the m68k-virt machine.=0D The q800 one would disappear in the future as q800 uses actually the djME= MC=0D controller.=0D =0D Signed-off-by: Laurent Vivier =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210312214145.2936082-4-laurent@vivier.eu>=0D =0D =0D Commit: 0791bc02b8fbf9d55626b57f45255ba1b6ea83d5=0D https://github.com/qemu/qemu/commit/0791bc02b8fbf9d55626b57f45255ba= 1b6ea83d5=0D Author: Laurent Vivier =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D A docs/specs/virt-ctlr.txt=0D M hw/misc/Kconfig=0D M hw/misc/meson.build=0D M hw/misc/trace-events=0D A hw/misc/virt_ctrl.c=0D A include/hw/misc/virt_ctrl.h=0D =0D Log Message:=0D -----------=0D m68k: add a system controller=0D =0D Add a system controller for the m68k-virt machine.=0D This controller allows the kernel to power off or reset the machine.=0D =0D Signed-off-by: Laurent Vivier =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210312214145.2936082-5-laurent@vivier.eu>=0D =0D =0D Commit: e1cecdca559d552bc5ab282696301858a97c3e8c=0D https://github.com/qemu/qemu/commit/e1cecdca559d552bc5ab28269630185= 8a97c3e8c=0D Author: Laurent Vivier =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M default-configs/devices/m68k-softmmu.mak=0D M hw/m68k/Kconfig=0D M hw/m68k/meson.build=0D A hw/m68k/virt.c=0D A include/standard-headers/asm-m68k/bootinfo-virt.h=0D =0D Log Message:=0D -----------=0D m68k: add Virtual M68k Machine=0D =0D The machine is based on Goldfish interfaces defined by Google=0D for Android simulator. It uses Goldfish-rtc (timer and RTC),=0D Goldfish-pic (PIC) and Goldfish-tty (for serial port and early tty).=0D =0D The machine is created with 128 virtio-mmio bus, and they can=0D be used to use serial console, GPU, disk, NIC, HID, ...=0D =0D Signed-off-by: Laurent Vivier =0D Reviewed-by: Richard Henderson =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210312214145.2936082-6-laurent@vivier.eu>=0D =0D =0D Commit: ff81439aafac58887b18032acd18a117f534cd75=0D https://github.com/qemu/qemu/commit/ff81439aafac58887b18032acd18a11= 7f534cd75=0D Author: Peter Maydell =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M default-configs/devices/m68k-softmmu.mak=0D A docs/specs/virt-ctlr.txt=0D M hw/char/Kconfig=0D A hw/char/goldfish_tty.c=0D M hw/char/meson.build=0D M hw/char/trace-events=0D M hw/intc/Kconfig=0D A hw/intc/goldfish_pic.c=0D A hw/intc/m68k_irqc.c=0D M hw/intc/meson.build=0D M hw/intc/trace-events=0D M hw/m68k/Kconfig=0D M hw/m68k/meson.build=0D A hw/m68k/virt.c=0D M hw/misc/Kconfig=0D M hw/misc/meson.build=0D M hw/misc/trace-events=0D A hw/misc/virt_ctrl.c=0D A include/hw/char/goldfish_tty.h=0D A include/hw/intc/goldfish_pic.h=0D A include/hw/intc/m68k_irqc.h=0D A include/hw/misc/virt_ctrl.h=0D A include/standard-headers/asm-m68k/bootinfo-virt.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.0-pull-req= uest' into staging=0D =0D m68k pull request 20210315=0D =0D Add m68k virt machine=0D =0D # gpg: Signature made Mon 15 Mar 2021 20:41:51 GMT=0D # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FB= E3C=0D # gpg: issuer "laurent@vivier.eu"=0D # gpg: Good signature from "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier (Red Hat) = " [full]=0D # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F = BE3C=0D =0D * remotes/vivier/tags/m68k-for-6.0-pull-request:=0D m68k: add Virtual M68k Machine=0D m68k: add a system controller=0D m68k: add an interrupt controller=0D hw/intc: add goldfish-pic=0D hw/char: add goldfish-tty=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/5d1428d6c439...ff81439aafac= =0D From MAILER-DAEMON Wed Mar 17 09:34:59 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMWKB-0004gH-4g for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 09:34:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46414) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMWKA-0004co-1D for qemu-commits@nongnu.org; Wed, 17 Mar 2021 09:34:58 -0400 Received: from out-22.smtp.github.com ([192.30.252.205]:37577 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMWK5-0002uV-00 for qemu-commits@nongnu.org; Wed, 17 Mar 2021 09:34:57 -0400 Received: from github.com (hubbernetes-node-d18a413.ac4-iad.github.net [10.52.202.88]) by smtp.github.com (Postfix) with ESMTPA id 696A5560428 for ; Wed, 17 Mar 2021 06:34:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615988091; bh=DmX3fTzTwb3Ec0ud0OSZXjmS/FSHcx88Ep/fXosM5UE=; h=Date:From:To:Subject:From; b=fZVyWWeEzaJghj54ZaWJMet0hFJN01p7eLYtGFHQTLTpkCTlRCYifbvwjUDZzKK/4 Uco7JHrb9YePsGoQv+/E9pLyKN70o56uK24wKqQkp+VP8Do6k7vEFA8Q5SV9R6KsN/ 66U3XfA83zVUEvHSKPAnvx3Em+XyVe+bTUfqVirM= Date: Wed, 17 Mar 2021 06:34:51 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 8c6df1: hw/char: add goldfish-tty X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 13:34:58 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 8c6df16ff6080365642b0583514dd03d6a7729d6=0D https://github.com/qemu/qemu/commit/8c6df16ff6080365642b0583514dd03= d6a7729d6=0D Author: Laurent Vivier =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/char/Kconfig=0D A hw/char/goldfish_tty.c=0D M hw/char/meson.build=0D M hw/char/trace-events=0D A include/hw/char/goldfish_tty.h=0D =0D Log Message:=0D -----------=0D hw/char: add goldfish-tty=0D =0D Implement the goldfish tty device as defined in=0D =0D https://android.googlesource.com/platform/external/qemu/+/master/docs/GOL= DFISH-VIRTUAL-HARDWARE.TXT=0D =0D and based on the kernel driver code:=0D =0D https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/d= rivers/tty/goldfish.c=0D =0D Signed-off-by: Laurent Vivier =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210312214145.2936082-2-laurent@vivier.eu>=0D =0D =0D Commit: 87855593903fdc1809d6f6c2ac7f344c31cea799=0D https://github.com/qemu/qemu/commit/87855593903fdc1809d6f6c2ac7f344= c31cea799=0D Author: Laurent Vivier =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/intc/Kconfig=0D A hw/intc/goldfish_pic.c=0D M hw/intc/meson.build=0D M hw/intc/trace-events=0D A include/hw/intc/goldfish_pic.h=0D =0D Log Message:=0D -----------=0D hw/intc: add goldfish-pic=0D =0D Implement the goldfish pic device as defined in=0D =0D https://android.googlesource.com/platform/external/qemu/+/master/docs/GOL= DFISH-VIRTUAL-HARDWARE.TXT=0D =0D Signed-off-by: Laurent Vivier =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210312214145.2936082-3-laurent@vivier.eu>=0D =0D =0D Commit: 2fde99ee3120416251922282c364833473135765=0D https://github.com/qemu/qemu/commit/2fde99ee3120416251922282c364833= 473135765=0D Author: Laurent Vivier =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/intc/Kconfig=0D A hw/intc/m68k_irqc.c=0D M hw/intc/meson.build=0D A include/hw/intc/m68k_irqc.h=0D =0D Log Message:=0D -----------=0D m68k: add an interrupt controller=0D =0D A (generic) copy of the GLUE device we already have for q800 to use with=0D= the m68k-virt machine.=0D The q800 one would disappear in the future as q800 uses actually the djME= MC=0D controller.=0D =0D Signed-off-by: Laurent Vivier =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210312214145.2936082-4-laurent@vivier.eu>=0D =0D =0D Commit: 0791bc02b8fbf9d55626b57f45255ba1b6ea83d5=0D https://github.com/qemu/qemu/commit/0791bc02b8fbf9d55626b57f45255ba= 1b6ea83d5=0D Author: Laurent Vivier =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D A docs/specs/virt-ctlr.txt=0D M hw/misc/Kconfig=0D M hw/misc/meson.build=0D M hw/misc/trace-events=0D A hw/misc/virt_ctrl.c=0D A include/hw/misc/virt_ctrl.h=0D =0D Log Message:=0D -----------=0D m68k: add a system controller=0D =0D Add a system controller for the m68k-virt machine.=0D This controller allows the kernel to power off or reset the machine.=0D =0D Signed-off-by: Laurent Vivier =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210312214145.2936082-5-laurent@vivier.eu>=0D =0D =0D Commit: e1cecdca559d552bc5ab282696301858a97c3e8c=0D https://github.com/qemu/qemu/commit/e1cecdca559d552bc5ab28269630185= 8a97c3e8c=0D Author: Laurent Vivier =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M default-configs/devices/m68k-softmmu.mak=0D M hw/m68k/Kconfig=0D M hw/m68k/meson.build=0D A hw/m68k/virt.c=0D A include/standard-headers/asm-m68k/bootinfo-virt.h=0D =0D Log Message:=0D -----------=0D m68k: add Virtual M68k Machine=0D =0D The machine is based on Goldfish interfaces defined by Google=0D for Android simulator. It uses Goldfish-rtc (timer and RTC),=0D Goldfish-pic (PIC) and Goldfish-tty (for serial port and early tty).=0D =0D The machine is created with 128 virtio-mmio bus, and they can=0D be used to use serial console, GPU, disk, NIC, HID, ...=0D =0D Signed-off-by: Laurent Vivier =0D Reviewed-by: Richard Henderson =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210312214145.2936082-6-laurent@vivier.eu>=0D =0D =0D Commit: ff81439aafac58887b18032acd18a117f534cd75=0D https://github.com/qemu/qemu/commit/ff81439aafac58887b18032acd18a11= 7f534cd75=0D Author: Peter Maydell =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M default-configs/devices/m68k-softmmu.mak=0D A docs/specs/virt-ctlr.txt=0D M hw/char/Kconfig=0D A hw/char/goldfish_tty.c=0D M hw/char/meson.build=0D M hw/char/trace-events=0D M hw/intc/Kconfig=0D A hw/intc/goldfish_pic.c=0D A hw/intc/m68k_irqc.c=0D M hw/intc/meson.build=0D M hw/intc/trace-events=0D M hw/m68k/Kconfig=0D M hw/m68k/meson.build=0D A hw/m68k/virt.c=0D M hw/misc/Kconfig=0D M hw/misc/meson.build=0D M hw/misc/trace-events=0D A hw/misc/virt_ctrl.c=0D A include/hw/char/goldfish_tty.h=0D A include/hw/intc/goldfish_pic.h=0D A include/hw/intc/m68k_irqc.h=0D A include/hw/misc/virt_ctrl.h=0D A include/standard-headers/asm-m68k/bootinfo-virt.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-6.0-pull-req= uest' into staging=0D =0D m68k pull request 20210315=0D =0D Add m68k virt machine=0D =0D # gpg: Signature made Mon 15 Mar 2021 20:41:51 GMT=0D # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FB= E3C=0D # gpg: issuer "laurent@vivier.eu"=0D # gpg: Good signature from "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier (Red Hat) = " [full]=0D # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F = BE3C=0D =0D * remotes/vivier/tags/m68k-for-6.0-pull-request:=0D m68k: add Virtual M68k Machine=0D m68k: add a system controller=0D m68k: add an interrupt controller=0D hw/intc: add goldfish-pic=0D hw/char: add goldfish-tty=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/5d1428d6c439...ff81439aafac= =0D From MAILER-DAEMON Wed Mar 17 09:40:40 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMWPg-0007J0-5M for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 09:40:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47344) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMWPe-0007Is-0Y for qemu-commits@nongnu.org; Wed, 17 Mar 2021 09:40:38 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:53645) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMWPX-0006ZA-Kn for qemu-commits@nongnu.org; Wed, 17 Mar 2021 09:40:36 -0400 Received: from github.com (hubbernetes-node-8f1f80c.ash1-iad.github.net [10.56.122.38]) by smtp.github.com (Postfix) with ESMTPA id 1B1AE900F84 for ; Wed, 17 Mar 2021 06:40:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615988430; bh=wSeOFW7JHWe0VEdbV7dU/DkGB1Ujiquet4h0MYtIHM0=; h=Date:From:To:Subject:From; b=CYBqxu1ug76csuPa/JunUv0WANcvzo0PKBZdqnAhOTRztYtu+jhx8/39aOyRJh0uy flK16Wm/cdnwcMPMl+f+H0zX1cf66vJuVCLrLHawz31IiWKR+Rx5GvE/Mcf3r6X+28 fLKs3b1HoG/XxzfbotYI+9CbQAay2f/rt6hJSwaI= Date: Wed, 17 Mar 2021 06:40:30 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -46 X-Spam_score: -4.7 X-Spam_bar: ---- X-Spam_report: (-4.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 6c6840: ui: introduce "password-secret" option for VNC ser... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 13:40:38 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 6c6840e9281cf2fd3b29d77f45b18949d4a83944=0D https://github.com/qemu/qemu/commit/6c6840e9281cf2fd3b29d77f45b1894= 9d4a83944=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D ui: introduce "password-secret" option for VNC servers=0D =0D Currently when using VNC the "password" flag turns on password based=0D authentication. The actual password has to be provided separately via=0D the monitor.=0D =0D This introduces a "password-secret" option which lets the password be=0D provided up front.=0D =0D $QEMU --object secret,id=3Dvncsec0,file=3Dpasswd.txt \=0D --vnc localhost:0,password-secret=3Dvncsec0=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210311114343.439820-2-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 99522f69d62216f5d9581f66f2c0edca6bd48f78=0D https://github.com/qemu/qemu/commit/99522f69d62216f5d9581f66f2c0edc= a6bd48f78=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D M ui/spice-core.c=0D =0D Log Message:=0D -----------=0D ui: introduce "password-secret" option for SPICE server=0D =0D Currently when using SPICE the "password" option provides the password=0D= in plain text on the command line. This is insecure as it is visible=0D to all processes on the host. As an alternative, the password can be=0D provided separately via the monitor.=0D =0D This introduces a "password-secret" option which lets the password be=0D provided up front.=0D =0D $QEMU --object secret,id=3Dvncsec0,file=3Dpasswd.txt \=0D --spice port=3D5901,password-secret=3Dvncsec0=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210311114343.439820-3-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: c47c0bcb33e154b82b4f6b90984aba998fcc4f18=0D https://github.com/qemu/qemu/commit/c47c0bcb33e154b82b4f6b90984aba9= 98fcc4f18=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qemu-options.hx=0D M ui/spice-core.c=0D =0D Log Message:=0D -----------=0D ui: deprecate "password" option for SPICE server=0D =0D With the new "password-secret" option, there is no reason to use the old=0D= inecure "password" option with -spice, so it can be deprecated.=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210311114343.439820-4-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 14c235eb40eb82e0d7e89601b1a47028fe24deca=0D https://github.com/qemu/qemu/commit/14c235eb40eb82e0d7e89601b1a4702= 8fe24deca=0D Author: Akihiko Odaki =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M ui/console-gl.c=0D =0D Log Message:=0D -----------=0D opengl: Do not convert format with glTexImage2D on OpenGL ES=0D =0D OpenGL ES does not support conversion from the given data format=0D to the internal format with glTexImage2D.=0D =0D Use the given data format as the internal format, and ignore=0D the given alpha channels with GL_TEXTURE_SWIZZLE_A in case the=0D format contains alpha channels.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210219094803.90860-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 40c0193739eb08f76505f736c259928279d0376a=0D https://github.com/qemu/qemu/commit/40c0193739eb08f76505f736c259928= 279d0376a=0D Author: Akihiko Odaki =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M ui/cocoa.m=0D =0D Log Message:=0D -----------=0D ui/cocoa: Do not exit immediately after shutdown=0D =0D ui/cocoa used to call exit immediately after calling=0D qemu_system_shutdown_request, which prevents QEMU from actually=0D perfoming system shutdown. Just sleep forever, and wait QEMU to call=0D exit and kill the Cocoa thread.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210219111652.20623-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: adc8fce871afd30b4bf13cf5440a96a3ffb486db=0D https://github.com/qemu/qemu/commit/adc8fce871afd30b4bf13cf5440a96a= 3ffb486db=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M ui/trace-events=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D ui: add more trace points for VNC client/server messages=0D =0D This adds trace points for desktop size and audio related messages.=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210311182957.486939-2-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 55b400497cf9c79acbb5c01abc58737bc52c081c=0D https://github.com/qemu/qemu/commit/55b400497cf9c79acbb5c01abc58737= bc52c081c=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M ui/trace-events=0D M ui/vnc-jobs.c=0D =0D Log Message:=0D -----------=0D ui: avoid sending framebuffer updates outside client desktop bounds=0D =0D We plan framebuffer update rects based on the VNC server surface. If the=0D= client doesn't support desktop resize, then the client bounds may differ=0D= from the server surface bounds. VNC clients may become upset if we then=0D= send an update message outside the bounds of the client desktop.=0D =0D This takes the approach of clamping the rectangles from the worker=0D thread immediately before sending them. This may sometimes results in=0D sending a framebuffer update message with zero rectangles.=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210311182957.486939-3-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 3d3a528da4215a55f6557ad0925507680da7ceb8=0D https://github.com/qemu/qemu/commit/3d3a528da4215a55f6557ad09255076= 80da7ceb8=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D ui: use client width/height in WMVi message=0D =0D The WMVi message is supposed to provide the same width/height=0D information as the regular desktop resize and extended desktop=0D resize messages. There can be times where the client width and=0D height are different from the pixman surface dimensions.=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210311182957.486939-4-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 69cc8db44bdf7c9289e1fd1f695e01ec6132bf2b=0D https://github.com/qemu/qemu/commit/69cc8db44bdf7c9289e1fd1f695e01e= c6132bf2b=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M ui/trace-events=0D M ui/vnc.c=0D M ui/vnc.h=0D =0D Log Message:=0D -----------=0D ui: honour the actual guest display dimensions without rounding=0D =0D A long time ago the VNC server code had some memory corruption=0D fixes done in:=0D =0D commit bea60dd7679364493a0d7f5b54316c767cf894ef=0D Author: Peter Lieven =0D Date: Mon Jun 30 10:57:51 2014 +0200=0D =0D ui/vnc: fix potential memory corruption issues=0D =0D One of the implications of the fix was that the VNC server would have a=0D= thin black bad down the right hand side if the guest desktop width was=0D= not a multiple of 16. In practice this was a non-issue since the VNC=0D server was always honouring a guest specified resolution and guests=0D essentially always pick from a small set of sane resolutions likely in=0D= real world hardware.=0D =0D We recently introduced support for the extended desktop resize extension=0D= and as a result the VNC client has ability to specify an arbitrary=0D desktop size and the guest OS may well honour it exactly. As a result we=0D= no longer have any guarantee that the width will be a multiple of 16,=0D and so when resizing the desktop we have a 93% chance of getting the=0D black bar on the right hand size.=0D =0D The VNC server maintains three different desktop dimensions=0D =0D 1. The guest surface=0D 2. The server surface=0D 3. The client desktop=0D =0D The requirement for the width to be a multiple of 16 only applies to=0D item 2, the server surface, for the purpose of doing dirty bitmap=0D tracking.=0D =0D Normally we will set the client desktop size to always match the server=0D= surface size, but that's not a strict requirement. In order to cope with=0D= clients that don't support the desktop size encoding, we already allow=0D= for the client desktop to be a different size that the server surface.=0D= =0D Thus we can trivially eliminate the black bar, but setting the client=0D desktop size to be the un-rounded server surface size - the so called=0D "true width".=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210311182957.486939-5-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: eb69442a06ea3be6af294c9db0e66e277a529a27=0D https://github.com/qemu/qemu/commit/eb69442a06ea3be6af294c9db0e66e2= 77a529a27=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M ui/console.c=0D =0D Log Message:=0D -----------=0D ui: fold qemu_alloc_display in only caller=0D =0D A minor code simplification.=0D =0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210312100108.2706195-2-marcandre.lureau@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: ad7f2f8ee9fbded410fbf77158b0065f8e2f08e3=0D https://github.com/qemu/qemu/commit/ad7f2f8ee9fbded410fbf77158b0065= f8e2f08e3=0D Author: Akihiko Odaki =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M ui/cocoa.m=0D =0D Log Message:=0D -----------=0D ui/cocoa: Comment about modifier key input quirks=0D =0D Based-on: <20210310042348.21931-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210312133212.3131-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 25a77510432813c3ee9b80f56b8470a52f00c884=0D https://github.com/qemu/qemu/commit/25a77510432813c3ee9b80f56b8470a= 52f00c884=0D Author: Peter Maydell =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qemu-options.hx=0D M ui/cocoa.m=0D M ui/console-gl.c=0D M ui/console.c=0D M ui/spice-core.c=0D M ui/trace-events=0D M ui/vnc-jobs.c=0D M ui/vnc.c=0D M ui/vnc.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kraxel/tags/ui-20210316-pull-requ= est' into staging=0D =0D vnc+spice: password-secret option.=0D bugfixes for cocoa, vnc, opengl.=0D =0D # gpg: Signature made Tue 16 Mar 2021 05:37:58 GMT=0D # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87= 138=0D # gpg: Good signature from "Gerd Hoffmann (work) " [fu= ll]=0D # gpg: aka "Gerd Hoffmann " [full]=0D # gpg: aka "Gerd Hoffmann (private) " [= full]=0D # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 = 7138=0D =0D * remotes/kraxel/tags/ui-20210316-pull-request:=0D ui/cocoa: Comment about modifier key input quirks=0D ui: fold qemu_alloc_display in only caller=0D ui: honour the actual guest display dimensions without rounding=0D ui: use client width/height in WMVi message=0D ui: avoid sending framebuffer updates outside client desktop bounds=0D ui: add more trace points for VNC client/server messages=0D ui/cocoa: Do not exit immediately after shutdown=0D opengl: Do not convert format with glTexImage2D on OpenGL ES=0D ui: deprecate "password" option for SPICE server=0D ui: introduce "password-secret" option for SPICE server=0D ui: introduce "password-secret" option for VNC servers=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/ff81439aafac...25a775104328= =0D From MAILER-DAEMON Wed Mar 17 11:00:38 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMXf3-000683-U0 for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 11:00:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39988) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMXf2-00064i-2S for qemu-commits@nongnu.org; Wed, 17 Mar 2021 11:00:36 -0400 Received: from out-24.smtp.github.com ([192.30.252.207]:41947) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMXey-0003ha-AC for qemu-commits@nongnu.org; Wed, 17 Mar 2021 11:00:35 -0400 Received: from github.com (hubbernetes-node-043d724.ac4-iad.github.net [10.52.125.31]) by smtp.github.com (Postfix) with ESMTPA id 022566008E3 for ; Wed, 17 Mar 2021 08:00:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615993231; bh=OA6O5VDPOoEGKtU9w4b55XN9pYsoAYse4UTQpNJZ0rY=; h=Date:From:To:Subject:From; b=P4UjRsgtZqeUlZDT6PQ9Byv8/S0N+bM/Q+QYOJdgv0O9WrjWN6VmZZ1dWA2rTHucb f6/6y2BXkYx5t3Lm5db7ZSEB65BlaE0kvUiEtnbkwaz8v8/9fExRbD9GjexZyp//tq lU7GigtR3kxp+57zisOpZBd8BQywDjFMcqTeosac= Date: Wed, 17 Mar 2021 08:00:30 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 6c6840: ui: introduce "password-secret" option for VNC ser... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 15:00:36 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 6c6840e9281cf2fd3b29d77f45b18949d4a83944=0D https://github.com/qemu/qemu/commit/6c6840e9281cf2fd3b29d77f45b1894= 9d4a83944=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D ui: introduce "password-secret" option for VNC servers=0D =0D Currently when using VNC the "password" flag turns on password based=0D authentication. The actual password has to be provided separately via=0D the monitor.=0D =0D This introduces a "password-secret" option which lets the password be=0D provided up front.=0D =0D $QEMU --object secret,id=3Dvncsec0,file=3Dpasswd.txt \=0D --vnc localhost:0,password-secret=3Dvncsec0=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210311114343.439820-2-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 99522f69d62216f5d9581f66f2c0edca6bd48f78=0D https://github.com/qemu/qemu/commit/99522f69d62216f5d9581f66f2c0edc= a6bd48f78=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M qemu-options.hx=0D M ui/spice-core.c=0D =0D Log Message:=0D -----------=0D ui: introduce "password-secret" option for SPICE server=0D =0D Currently when using SPICE the "password" option provides the password=0D= in plain text on the command line. This is insecure as it is visible=0D to all processes on the host. As an alternative, the password can be=0D provided separately via the monitor.=0D =0D This introduces a "password-secret" option which lets the password be=0D provided up front.=0D =0D $QEMU --object secret,id=3Dvncsec0,file=3Dpasswd.txt \=0D --spice port=3D5901,password-secret=3Dvncsec0=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210311114343.439820-3-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: c47c0bcb33e154b82b4f6b90984aba998fcc4f18=0D https://github.com/qemu/qemu/commit/c47c0bcb33e154b82b4f6b90984aba9= 98fcc4f18=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qemu-options.hx=0D M ui/spice-core.c=0D =0D Log Message:=0D -----------=0D ui: deprecate "password" option for SPICE server=0D =0D With the new "password-secret" option, there is no reason to use the old=0D= inecure "password" option with -spice, so it can be deprecated.=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210311114343.439820-4-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 14c235eb40eb82e0d7e89601b1a47028fe24deca=0D https://github.com/qemu/qemu/commit/14c235eb40eb82e0d7e89601b1a4702= 8fe24deca=0D Author: Akihiko Odaki =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M ui/console-gl.c=0D =0D Log Message:=0D -----------=0D opengl: Do not convert format with glTexImage2D on OpenGL ES=0D =0D OpenGL ES does not support conversion from the given data format=0D to the internal format with glTexImage2D.=0D =0D Use the given data format as the internal format, and ignore=0D the given alpha channels with GL_TEXTURE_SWIZZLE_A in case the=0D format contains alpha channels.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210219094803.90860-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 40c0193739eb08f76505f736c259928279d0376a=0D https://github.com/qemu/qemu/commit/40c0193739eb08f76505f736c259928= 279d0376a=0D Author: Akihiko Odaki =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M ui/cocoa.m=0D =0D Log Message:=0D -----------=0D ui/cocoa: Do not exit immediately after shutdown=0D =0D ui/cocoa used to call exit immediately after calling=0D qemu_system_shutdown_request, which prevents QEMU from actually=0D perfoming system shutdown. Just sleep forever, and wait QEMU to call=0D exit and kill the Cocoa thread.=0D =0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210219111652.20623-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: adc8fce871afd30b4bf13cf5440a96a3ffb486db=0D https://github.com/qemu/qemu/commit/adc8fce871afd30b4bf13cf5440a96a= 3ffb486db=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M ui/trace-events=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D ui: add more trace points for VNC client/server messages=0D =0D This adds trace points for desktop size and audio related messages.=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210311182957.486939-2-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 55b400497cf9c79acbb5c01abc58737bc52c081c=0D https://github.com/qemu/qemu/commit/55b400497cf9c79acbb5c01abc58737= bc52c081c=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M ui/trace-events=0D M ui/vnc-jobs.c=0D =0D Log Message:=0D -----------=0D ui: avoid sending framebuffer updates outside client desktop bounds=0D =0D We plan framebuffer update rects based on the VNC server surface. If the=0D= client doesn't support desktop resize, then the client bounds may differ=0D= from the server surface bounds. VNC clients may become upset if we then=0D= send an update message outside the bounds of the client desktop.=0D =0D This takes the approach of clamping the rectangles from the worker=0D thread immediately before sending them. This may sometimes results in=0D sending a framebuffer update message with zero rectangles.=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210311182957.486939-3-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 3d3a528da4215a55f6557ad0925507680da7ceb8=0D https://github.com/qemu/qemu/commit/3d3a528da4215a55f6557ad09255076= 80da7ceb8=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D ui: use client width/height in WMVi message=0D =0D The WMVi message is supposed to provide the same width/height=0D information as the regular desktop resize and extended desktop=0D resize messages. There can be times where the client width and=0D height are different from the pixman surface dimensions.=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210311182957.486939-4-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 69cc8db44bdf7c9289e1fd1f695e01ec6132bf2b=0D https://github.com/qemu/qemu/commit/69cc8db44bdf7c9289e1fd1f695e01e= c6132bf2b=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M ui/trace-events=0D M ui/vnc.c=0D M ui/vnc.h=0D =0D Log Message:=0D -----------=0D ui: honour the actual guest display dimensions without rounding=0D =0D A long time ago the VNC server code had some memory corruption=0D fixes done in:=0D =0D commit bea60dd7679364493a0d7f5b54316c767cf894ef=0D Author: Peter Lieven =0D Date: Mon Jun 30 10:57:51 2014 +0200=0D =0D ui/vnc: fix potential memory corruption issues=0D =0D One of the implications of the fix was that the VNC server would have a=0D= thin black bad down the right hand side if the guest desktop width was=0D= not a multiple of 16. In practice this was a non-issue since the VNC=0D server was always honouring a guest specified resolution and guests=0D essentially always pick from a small set of sane resolutions likely in=0D= real world hardware.=0D =0D We recently introduced support for the extended desktop resize extension=0D= and as a result the VNC client has ability to specify an arbitrary=0D desktop size and the guest OS may well honour it exactly. As a result we=0D= no longer have any guarantee that the width will be a multiple of 16,=0D and so when resizing the desktop we have a 93% chance of getting the=0D black bar on the right hand size.=0D =0D The VNC server maintains three different desktop dimensions=0D =0D 1. The guest surface=0D 2. The server surface=0D 3. The client desktop=0D =0D The requirement for the width to be a multiple of 16 only applies to=0D item 2, the server surface, for the purpose of doing dirty bitmap=0D tracking.=0D =0D Normally we will set the client desktop size to always match the server=0D= surface size, but that's not a strict requirement. In order to cope with=0D= clients that don't support the desktop size encoding, we already allow=0D= for the client desktop to be a different size that the server surface.=0D= =0D Thus we can trivially eliminate the black bar, but setting the client=0D desktop size to be the un-rounded server surface size - the so called=0D "true width".=0D =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210311182957.486939-5-berrange@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: eb69442a06ea3be6af294c9db0e66e277a529a27=0D https://github.com/qemu/qemu/commit/eb69442a06ea3be6af294c9db0e66e2= 77a529a27=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M ui/console.c=0D =0D Log Message:=0D -----------=0D ui: fold qemu_alloc_display in only caller=0D =0D A minor code simplification.=0D =0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210312100108.2706195-2-marcandre.lureau@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: ad7f2f8ee9fbded410fbf77158b0065f8e2f08e3=0D https://github.com/qemu/qemu/commit/ad7f2f8ee9fbded410fbf77158b0065= f8e2f08e3=0D Author: Akihiko Odaki =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M ui/cocoa.m=0D =0D Log Message:=0D -----------=0D ui/cocoa: Comment about modifier key input quirks=0D =0D Based-on: <20210310042348.21931-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Akihiko Odaki =0D Message-Id: <20210312133212.3131-1-akihiko.odaki@gmail.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 25a77510432813c3ee9b80f56b8470a52f00c884=0D https://github.com/qemu/qemu/commit/25a77510432813c3ee9b80f56b8470a= 52f00c884=0D Author: Peter Maydell =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qemu-options.hx=0D M ui/cocoa.m=0D M ui/console-gl.c=0D M ui/console.c=0D M ui/spice-core.c=0D M ui/trace-events=0D M ui/vnc-jobs.c=0D M ui/vnc.c=0D M ui/vnc.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kraxel/tags/ui-20210316-pull-requ= est' into staging=0D =0D vnc+spice: password-secret option.=0D bugfixes for cocoa, vnc, opengl.=0D =0D # gpg: Signature made Tue 16 Mar 2021 05:37:58 GMT=0D # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87= 138=0D # gpg: Good signature from "Gerd Hoffmann (work) " [fu= ll]=0D # gpg: aka "Gerd Hoffmann " [full]=0D # gpg: aka "Gerd Hoffmann (private) " [= full]=0D # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 = 7138=0D =0D * remotes/kraxel/tags/ui-20210316-pull-request:=0D ui/cocoa: Comment about modifier key input quirks=0D ui: fold qemu_alloc_display in only caller=0D ui: honour the actual guest display dimensions without rounding=0D ui: use client width/height in WMVi message=0D ui: avoid sending framebuffer updates outside client desktop bounds=0D ui: add more trace points for VNC client/server messages=0D ui/cocoa: Do not exit immediately after shutdown=0D opengl: Do not convert format with glTexImage2D on OpenGL ES=0D ui: deprecate "password" option for SPICE server=0D ui: introduce "password-secret" option for SPICE server=0D ui: introduce "password-secret" option for VNC servers=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/ff81439aafac...25a775104328= =0D From MAILER-DAEMON Wed Mar 17 11:07:13 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMXlQ-0004x3-S0 for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 11:07:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41690) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMXlO-0004sf-MT for qemu-commits@nongnu.org; Wed, 17 Mar 2021 11:07:10 -0400 Received: from out-23.smtp.github.com ([192.30.252.206]:49263) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMXlM-0008C7-6f for qemu-commits@nongnu.org; Wed, 17 Mar 2021 11:07:10 -0400 Received: from github.com (hubbernetes-node-65eddc2.ac4-iad.github.net [10.52.208.27]) by smtp.github.com (Postfix) with ESMTPA id 834736001F1 for ; Wed, 17 Mar 2021 08:07:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615993627; bh=TWF18yKhVUJ8IxQYZEXvVqFmRU0vgviVje1SV2tXTeo=; h=Date:From:To:Subject:From; b=nuTFGOCVh31KvGB/hrnSbPMzuvbR+Ev7mVwcfUHvhg2kJ0W9Qzug6H4+zEyZP5vT6 kd3rhoEdaHqpw0xK6n+h5pD7Y/ekYtKT+tlaoUcdJLQQ3/cWccpufFqTPeACAG7bao EgZGND4lDLN2RZ4+G/Re1suXthrn27JWLo2h5juU= Date: Wed, 17 Mar 2021 08:07:07 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.206; envelope-from=noreply@github.com; helo=out-23.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 996e7e: s390x/kvm: Get rid of legacy_s390_alloc() X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 15:07:11 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 996e7e4b72f48c2f878e269bb9252d97129b6f73=0D https://github.com/qemu/qemu/commit/996e7e4b72f48c2f878e269bb9252d9= 7129b6f73=0D Author: David Hildenbrand =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/kvm.c=0D =0D Log Message:=0D -----------=0D s390x/kvm: Get rid of legacy_s390_alloc()=0D =0D legacy_s390_alloc() was required for dealing with the absence of the ESOP= =0D feature -- on old HW (< gen 10) and old z/VM versions (< 6.3).=0D =0D As z/VM v6.2 (and even v6.3) is no longer supported since 2017 [1]=0D and we don't expect to have real users on such old hardware, let's drop=0D= legacy_s390_alloc().=0D =0D Still check+report an error just in case someone still runs on=0D such old z/VM environments, or someone runs under weird nested KVM=0D setups (where we can manually disable ESOP via the CPU model).=0D =0D No need to check for KVM_CAP_GMAP - that should always be around on=0D kernels that also have KVM_CAP_DEVICE_CTRL (>=3D v3.15).=0D =0D [1] https://www.ibm.com/support/lifecycle/search?q=3Dz%2FVM=0D =0D Suggested-by: Cornelia Huck =0D Suggested-by: Thomas Huth =0D Cc: Paolo Bonzini =0D Cc: Richard Henderson =0D Cc: Halil Pasic =0D Cc: Cornelia Huck =0D Cc: Christian Borntraeger =0D Cc: Thomas Huth =0D Cc: Igor Mammedov =0D Cc: Peter Xu =0D Signed-off-by: David Hildenbrand =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Igor Mammedov =0D Message-Id: <20210303130916.22553-2-david@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 25459eb762ebf3e1120f5d310eddf18066e902e5=0D https://github.com/qemu/qemu/commit/25459eb762ebf3e1120f5d310eddf18= 066e902e5=0D Author: David Hildenbrand =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M include/sysemu/kvm.h=0D M softmmu/physmem.c=0D =0D Log Message:=0D -----------=0D exec: Get rid of phys_mem_set_alloc()=0D =0D As the last user is gone, we can get rid of phys_mem_set_alloc() and=0D simplify.=0D =0D Cc: Paolo Bonzini =0D Cc: Richard Henderson =0D Cc: Halil Pasic =0D Cc: Cornelia Huck =0D Cc: Christian Borntraeger =0D Cc: Thomas Huth =0D Cc: Igor Mammedov =0D Cc: Peter Xu =0D Signed-off-by: David Hildenbrand =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Igor Mammedov =0D Message-Id: <20210303130916.22553-3-david@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: d66a52b50f089d69a70beb2e507d3035ffeaf016=0D https://github.com/qemu/qemu/commit/d66a52b50f089d69a70beb2e507d303= 5ffeaf016=0D Author: Cornelia Huck =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/cpu_models.c=0D =0D Log Message:=0D -----------=0D s390x/cpu_model: use official name for 8562=0D =0D The single-frame z15 is called "z15 T02" (and the multi-frame z15=0D "z15 T01").=0D =0D Signed-off-by: Cornelia Huck =0D Reviewed-by: David Hildenbrand =0D Acked-by: Christian Borntraeger =0D Message-Id: <20210311132746.1777754-1-cohuck@redhat.com>=0D =0D =0D Commit: e56552cf0771a7f60ae4c1bc186d43a585022849=0D https://github.com/qemu/qemu/commit/e56552cf0771a7f60ae4c1bc186d43a= 585022849=0D Author: Richard Henderson =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/cpu.h=0D M target/s390x/excp_helper.c=0D M target/s390x/mem_helper.c=0D =0D Log Message:=0D -----------=0D target/s390x: Implement the MVPG condition-code-option bit=0D =0D If the CCO bit is set, MVPG should not generate an exception but=0D report page translation faults via a CC code.=0D =0D Create a new helper, access_prepare_nf, which can use probe_access_flags=0D= in non-faulting mode, and then handle watchpoints.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Richard Henderson =0D [thuth: Added logic to still inject protection exceptions]=0D Signed-off-by: Thomas Huth =0D [david: Look at env->tlb_fill_exc to determine if there was an exception]= =0D Signed-off-by: David Hildenbrand =0D Tested-by: Thomas Huth =0D Message-Id: <20210315085449.34676-2-david@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 1a3c443c43e81e32a05d6995039e0f356b8f60cb=0D https://github.com/qemu/qemu/commit/1a3c443c43e81e32a05d6995039e0f3= 56b8f60cb=0D Author: David Hildenbrand =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/helper.h=0D M target/s390x/insn-data.def=0D M target/s390x/mem_helper.c=0D M target/s390x/translate.c=0D =0D Log Message:=0D -----------=0D target/s390x: Store r1/r2 for page-translation exceptions during MVPG=0D= =0D The PoP states:=0D =0D When EDAT-1 does not apply, and a program interruption due to a=0D page-translation exception is recognized by the MOVE PAGE=0D instruction, the contents of the R1 field of the instruction are=0D stored in bit positions 0-3 of location 162, and the contents of=0D the R2 field are stored in bit positions 4-7.=0D =0D If [...] an ASCE-type, region-first-translation,=0D region-second-translation, region-third-translation, or=0D segment-translation exception was recognized, the contents of=0D location 162 are unpredictable.=0D =0D So we have to write r1/r2 into the lowcore on page-translation=0D exceptions. Simply handle all exceptions inside our mvpg helper now.=0D =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Richard Henderson =0D Signed-off-by: David Hildenbrand =0D Tested-by: Thomas Huth =0D Message-Id: <20210315085449.34676-3-david@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 5793f5aafb05dae30e9dcb57d0d1c8f1a9633f6d=0D https://github.com/qemu/qemu/commit/5793f5aafb05dae30e9dcb57d0d1c8f= 1a9633f6d=0D Author: Miroslav Rezanina =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/s390-pci-vfio.c=0D =0D Log Message:=0D -----------=0D s390x/pci: Add missing initialization for g_autofree variables=0D =0D When declaring g_autofree variable without initialization, compiler=0D will raise "may be used uninitialized in this function" warning due=0D to automatic free handling.=0D =0D This is mentioned in docs/devel/style.rst (quote from section=0D "Automatic memory deallocation"):=0D =0D * Variables declared with g_auto* MUST always be initialized,=0D otherwise the cleanup function will use uninitialized stack memory=0D= =0D Add initialization for these declarations to prevent the warning and=0D comply with coding style.=0D =0D Signed-off-by: Miroslav Rezanina =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Fixes: cd7498d07fbb ("s390x/pci: Add routine to get the vfio dma availabl= e count")=0D Fixes: 1e7552ff5c34 ("s390x/pci: get zPCI function info from host")=0D Reviewed-by: Thomas Huth =0D Tested-by: Matthew Rosato =0D Message-Id: <20210315101352.152888-1-mrezanin@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 569a9481034b43f650dbb82dd7820beb0051508e=0D https://github.com/qemu/qemu/commit/569a9481034b43f650dbb82dd7820be= b0051508e=0D Author: Peter Maydell =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/s390-pci-vfio.c=0D M include/sysemu/kvm.h=0D M softmmu/physmem.c=0D M target/s390x/cpu.h=0D M target/s390x/cpu_models.c=0D M target/s390x/excp_helper.c=0D M target/s390x/helper.h=0D M target/s390x/insn-data.def=0D M target/s390x/kvm.c=0D M target/s390x/mem_helper.c=0D M target/s390x/translate.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210316= ' into staging=0D =0D s390x updates:=0D - get rid of legacy_s390_alloc() and phys_mem_set_alloc()=0D - tcg: implement the MVPG condition-code-option bit=0D - fix g_autofree variable handing in the pci vfio code=0D - use official z15 names in the cpu model definitions=0D =0D # gpg: Signature made Tue 16 Mar 2021 10:04:21 GMT=0D # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02= FAF=0D # gpg: issuer "cohuck@redhat.com"=0D # gpg: Good signature from "Cornelia Huck " [unkn= own]=0D # gpg: aka "Cornelia Huck " [fu= ll]=0D # gpg: aka "Cornelia Huck " [fu= ll]=0D # gpg: aka "Cornelia Huck " [unknown]=0D= # gpg: aka "Cornelia Huck " [unknown]=0D= # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 = 2FAF=0D =0D * remotes/cohuck-gitlab/tags/s390x-20210316:=0D s390x/pci: Add missing initialization for g_autofree variables=0D target/s390x: Store r1/r2 for page-translation exceptions during MVPG=0D= target/s390x: Implement the MVPG condition-code-option bit=0D s390x/cpu_model: use official name for 8562=0D exec: Get rid of phys_mem_set_alloc()=0D s390x/kvm: Get rid of legacy_s390_alloc()=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/25a775104328...569a9481034b= =0D From MAILER-DAEMON Wed Mar 17 12:24:09 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMYxr-0003yk-Hm for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 12:24:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33624) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMYxp-0003wQ-Mb for qemu-commits@nongnu.org; Wed, 17 Mar 2021 12:24:05 -0400 Received: from out-21.smtp.github.com ([192.30.252.204]:58439 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMYxm-0001I1-Le for qemu-commits@nongnu.org; Wed, 17 Mar 2021 12:24:04 -0400 Received: from github.com (hubbernetes-node-65eddc2.ac4-iad.github.net [10.52.208.27]) by smtp.github.com (Postfix) with ESMTPA id 70EE0521EB8 for ; Wed, 17 Mar 2021 09:24:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615998241; bh=ucO0MbWIxyym7wCNFJSmUuI/jxxN5cQrDDRydSYFzB0=; h=Date:From:To:Subject:From; b=xHklRTNgZy9WbPc1DfHh9vKZ0nsJNosGiebZpLdkEjJyBbpuz0Z1Rc/IKaP5jGbJo OVT70XP+RlDl7E7XgD8RYH+lE+yqYHHLVdkc8XNTA+bfIq1Q4FfL/NgKszsjKwg2ca cJvfaBjPg5Scou1fph6N4O6gVqotdAPRU8qn2crs= Date: Wed, 17 Mar 2021 09:24:01 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 996e7e: s390x/kvm: Get rid of legacy_s390_alloc() X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 16:24:05 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 996e7e4b72f48c2f878e269bb9252d97129b6f73=0D https://github.com/qemu/qemu/commit/996e7e4b72f48c2f878e269bb9252d9= 7129b6f73=0D Author: David Hildenbrand =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/kvm.c=0D =0D Log Message:=0D -----------=0D s390x/kvm: Get rid of legacy_s390_alloc()=0D =0D legacy_s390_alloc() was required for dealing with the absence of the ESOP= =0D feature -- on old HW (< gen 10) and old z/VM versions (< 6.3).=0D =0D As z/VM v6.2 (and even v6.3) is no longer supported since 2017 [1]=0D and we don't expect to have real users on such old hardware, let's drop=0D= legacy_s390_alloc().=0D =0D Still check+report an error just in case someone still runs on=0D such old z/VM environments, or someone runs under weird nested KVM=0D setups (where we can manually disable ESOP via the CPU model).=0D =0D No need to check for KVM_CAP_GMAP - that should always be around on=0D kernels that also have KVM_CAP_DEVICE_CTRL (>=3D v3.15).=0D =0D [1] https://www.ibm.com/support/lifecycle/search?q=3Dz%2FVM=0D =0D Suggested-by: Cornelia Huck =0D Suggested-by: Thomas Huth =0D Cc: Paolo Bonzini =0D Cc: Richard Henderson =0D Cc: Halil Pasic =0D Cc: Cornelia Huck =0D Cc: Christian Borntraeger =0D Cc: Thomas Huth =0D Cc: Igor Mammedov =0D Cc: Peter Xu =0D Signed-off-by: David Hildenbrand =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Igor Mammedov =0D Message-Id: <20210303130916.22553-2-david@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 25459eb762ebf3e1120f5d310eddf18066e902e5=0D https://github.com/qemu/qemu/commit/25459eb762ebf3e1120f5d310eddf18= 066e902e5=0D Author: David Hildenbrand =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M include/sysemu/kvm.h=0D M softmmu/physmem.c=0D =0D Log Message:=0D -----------=0D exec: Get rid of phys_mem_set_alloc()=0D =0D As the last user is gone, we can get rid of phys_mem_set_alloc() and=0D simplify.=0D =0D Cc: Paolo Bonzini =0D Cc: Richard Henderson =0D Cc: Halil Pasic =0D Cc: Cornelia Huck =0D Cc: Christian Borntraeger =0D Cc: Thomas Huth =0D Cc: Igor Mammedov =0D Cc: Peter Xu =0D Signed-off-by: David Hildenbrand =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Igor Mammedov =0D Message-Id: <20210303130916.22553-3-david@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: d66a52b50f089d69a70beb2e507d3035ffeaf016=0D https://github.com/qemu/qemu/commit/d66a52b50f089d69a70beb2e507d303= 5ffeaf016=0D Author: Cornelia Huck =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/cpu_models.c=0D =0D Log Message:=0D -----------=0D s390x/cpu_model: use official name for 8562=0D =0D The single-frame z15 is called "z15 T02" (and the multi-frame z15=0D "z15 T01").=0D =0D Signed-off-by: Cornelia Huck =0D Reviewed-by: David Hildenbrand =0D Acked-by: Christian Borntraeger =0D Message-Id: <20210311132746.1777754-1-cohuck@redhat.com>=0D =0D =0D Commit: e56552cf0771a7f60ae4c1bc186d43a585022849=0D https://github.com/qemu/qemu/commit/e56552cf0771a7f60ae4c1bc186d43a= 585022849=0D Author: Richard Henderson =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/cpu.h=0D M target/s390x/excp_helper.c=0D M target/s390x/mem_helper.c=0D =0D Log Message:=0D -----------=0D target/s390x: Implement the MVPG condition-code-option bit=0D =0D If the CCO bit is set, MVPG should not generate an exception but=0D report page translation faults via a CC code.=0D =0D Create a new helper, access_prepare_nf, which can use probe_access_flags=0D= in non-faulting mode, and then handle watchpoints.=0D =0D Reviewed-by: Richard Henderson =0D Signed-off-by: Richard Henderson =0D [thuth: Added logic to still inject protection exceptions]=0D Signed-off-by: Thomas Huth =0D [david: Look at env->tlb_fill_exc to determine if there was an exception]= =0D Signed-off-by: David Hildenbrand =0D Tested-by: Thomas Huth =0D Message-Id: <20210315085449.34676-2-david@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 1a3c443c43e81e32a05d6995039e0f356b8f60cb=0D https://github.com/qemu/qemu/commit/1a3c443c43e81e32a05d6995039e0f3= 56b8f60cb=0D Author: David Hildenbrand =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M target/s390x/helper.h=0D M target/s390x/insn-data.def=0D M target/s390x/mem_helper.c=0D M target/s390x/translate.c=0D =0D Log Message:=0D -----------=0D target/s390x: Store r1/r2 for page-translation exceptions during MVPG=0D= =0D The PoP states:=0D =0D When EDAT-1 does not apply, and a program interruption due to a=0D page-translation exception is recognized by the MOVE PAGE=0D instruction, the contents of the R1 field of the instruction are=0D stored in bit positions 0-3 of location 162, and the contents of=0D the R2 field are stored in bit positions 4-7.=0D =0D If [...] an ASCE-type, region-first-translation,=0D region-second-translation, region-third-translation, or=0D segment-translation exception was recognized, the contents of=0D location 162 are unpredictable.=0D =0D So we have to write r1/r2 into the lowcore on page-translation=0D exceptions. Simply handle all exceptions inside our mvpg helper now.=0D =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Richard Henderson =0D Signed-off-by: David Hildenbrand =0D Tested-by: Thomas Huth =0D Message-Id: <20210315085449.34676-3-david@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 5793f5aafb05dae30e9dcb57d0d1c8f1a9633f6d=0D https://github.com/qemu/qemu/commit/5793f5aafb05dae30e9dcb57d0d1c8f= 1a9633f6d=0D Author: Miroslav Rezanina =0D Date: 2021-03-15 (Mon, 15 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/s390-pci-vfio.c=0D =0D Log Message:=0D -----------=0D s390x/pci: Add missing initialization for g_autofree variables=0D =0D When declaring g_autofree variable without initialization, compiler=0D will raise "may be used uninitialized in this function" warning due=0D to automatic free handling.=0D =0D This is mentioned in docs/devel/style.rst (quote from section=0D "Automatic memory deallocation"):=0D =0D * Variables declared with g_auto* MUST always be initialized,=0D otherwise the cleanup function will use uninitialized stack memory=0D= =0D Add initialization for these declarations to prevent the warning and=0D comply with coding style.=0D =0D Signed-off-by: Miroslav Rezanina =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Fixes: cd7498d07fbb ("s390x/pci: Add routine to get the vfio dma availabl= e count")=0D Fixes: 1e7552ff5c34 ("s390x/pci: get zPCI function info from host")=0D Reviewed-by: Thomas Huth =0D Tested-by: Matthew Rosato =0D Message-Id: <20210315101352.152888-1-mrezanin@redhat.com>=0D Signed-off-by: Cornelia Huck =0D =0D =0D Commit: 569a9481034b43f650dbb82dd7820beb0051508e=0D https://github.com/qemu/qemu/commit/569a9481034b43f650dbb82dd7820be= b0051508e=0D Author: Peter Maydell =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/s390-pci-vfio.c=0D M include/sysemu/kvm.h=0D M softmmu/physmem.c=0D M target/s390x/cpu.h=0D M target/s390x/cpu_models.c=0D M target/s390x/excp_helper.c=0D M target/s390x/helper.h=0D M target/s390x/insn-data.def=0D M target/s390x/kvm.c=0D M target/s390x/mem_helper.c=0D M target/s390x/translate.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210316= ' into staging=0D =0D s390x updates:=0D - get rid of legacy_s390_alloc() and phys_mem_set_alloc()=0D - tcg: implement the MVPG condition-code-option bit=0D - fix g_autofree variable handing in the pci vfio code=0D - use official z15 names in the cpu model definitions=0D =0D # gpg: Signature made Tue 16 Mar 2021 10:04:21 GMT=0D # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02= FAF=0D # gpg: issuer "cohuck@redhat.com"=0D # gpg: Good signature from "Cornelia Huck " [unkn= own]=0D # gpg: aka "Cornelia Huck " [fu= ll]=0D # gpg: aka "Cornelia Huck " [fu= ll]=0D # gpg: aka "Cornelia Huck " [unknown]=0D= # gpg: aka "Cornelia Huck " [unknown]=0D= # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 = 2FAF=0D =0D * remotes/cohuck-gitlab/tags/s390x-20210316:=0D s390x/pci: Add missing initialization for g_autofree variables=0D target/s390x: Store r1/r2 for page-translation exceptions during MVPG=0D= target/s390x: Implement the MVPG condition-code-option bit=0D s390x/cpu_model: use official name for 8562=0D exec: Get rid of phys_mem_set_alloc()=0D s390x/kvm: Get rid of legacy_s390_alloc()=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/25a775104328...569a9481034b= =0D From MAILER-DAEMON Wed Mar 17 12:29:55 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMZ3P-0007GE-Up for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 12:29:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35274) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMZ3O-0007ET-GD for qemu-commits@nongnu.org; Wed, 17 Mar 2021 12:29:50 -0400 Received: from out-22.smtp.github.com ([192.30.252.205]:47227 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMZ3A-0003H9-53 for qemu-commits@nongnu.org; Wed, 17 Mar 2021 12:29:44 -0400 Received: from github.com (hubbernetes-node-55394d9.ac4-iad.github.net [10.52.125.55]) by smtp.github.com (Postfix) with ESMTPA id 1B20B56221A for ; Wed, 17 Mar 2021 09:29:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1615998570; bh=YS3H/bCbYPvLw3hWvK/jWNDOUHs7lVWlWSagIwSMu4Q=; h=Date:From:To:Subject:From; b=lJzh6PorOrOEAuBVCmQvpR3WRNQNm82KISP5O6XZhVxzksE+2+STzYH54Zz6KLSns kHLwgcDJeOBuByTYhGcG0Tjofzw/zhsajpuAHUbyMJLHziR9k/B5J9ksk3iCDjcOmq X6v00n7P6W1XCT5K0rchl1812jCHetcGxpXxcsMA= Date: Wed, 17 Mar 2021 09:29:30 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] c45f8e: qemuutil: remove qemu_set_fd_handler duplicate symbol X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 16:29:50 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: c45f8e08a9a87f96e155ec2363d52c11fcda4bbf https://github.com/qemu/qemu/commit/c45f8e08a9a87f96e155ec2363d52c11fcda4bbf Author: Paolo Bonzini Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M stubs/meson.build R stubs/set-fd-handler.c Log Message: ----------- qemuutil: remove qemu_set_fd_handler duplicate symbol libqemuutil has two definitions of qemu_set_fd_handler. This is not needed since the only users of the function are qemu-io.c and the emulators, both of which already include util/main-loop.c. Signed-off-by: Paolo Bonzini Message-Id: Tested-by: Markus Armbruster Signed-off-by: Markus Armbruster Commit: 7c9e885c3a0892058cb6fe7d9ccc13bf475d04f7 https://github.com/qemu/qemu/commit/7c9e885c3a0892058cb6fe7d9ccc13bf475d04f7 Author: Markus Armbruster Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: A include/qapi/compat-policy.h A qapi/compat.json M qapi/meson.build M qapi/qapi-schema.json M qapi/qmp-dispatch.c M qemu-options.hx M softmmu/vl.c Log Message: ----------- qemu-options: New -compat to set policy for deprecated interfaces New option -compat lets you configure what to do when deprecated interfaces get used. This is intended for testing users of the management interfaces. It is experimental. -compat deprecated-input= configures what to do when deprecated input is received. Input policy can be "accept" (accept silently), or "reject" (reject the request with an error). -compat deprecated-output= configures what to do when deprecated output is sent. Output policy can be "accept" (pass on unchanged), or "hide" (filter out the deprecated parts). Default is "accept". Policies other than "accept" are implemented later in this series. For now, -compat covers only syntactic aspects of QMP, i.e. stuff tagged with feature 'deprecated'. We may want to extend it to cover semantic aspects, CLI, and experimental features. Note that there is no good way for management application to detect presence of -compat: it's not visible output of query-qmp-schema or query-command-line-options. Tolerable, because it's meant for testing. If running with -compat fails, skip the test. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210312153210.2810514-2-armbru@redhat.com> [Since: comments in qapi/compat.json fixed up] Commit: 6f27ccc4b8db881e08280cdcc99513bb73554446 https://github.com/qemu/qemu/commit/6f27ccc4b8db881e08280cdcc99513bb73554446 Author: Markus Armbruster Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M include/qapi/qobject-output-visitor.h M include/qapi/visitor-impl.h M include/qapi/visitor.h M qapi/qapi-visit-core.c M qapi/qobject-output-visitor.c M qapi/trace-events M scripts/qapi/commands.py M scripts/qapi/visit.py M tests/qapi-schema/qapi-schema-test.json M tests/qapi-schema/qapi-schema-test.out M tests/unit/test-qmp-cmds.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP command results This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP command results. Example: when QEMU is run with -compat deprecated-output=hide, then {"execute": "query-cpus-fast"} yields {"return": [{"thread-id": 9805, "props": {"core-id": 0, "thread-id": 0, "socket-id": 0}, "qom-path": "/machine/unattached/device[0]", "cpu-index": 0, "target": "x86_64"}]} instead of {"return": [{"arch": "x86", "thread-id": 22436, "props": {"core-id": 0, "thread-id": 0, "socket-id": 0}, "qom-path": "/machine/unattached/device[0]", "cpu-index": 0, "target": "x86_64"}]} Note the suppression of deprecated member "arch". Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210312153210.2810514-3-armbru@redhat.com> Commit: 804bd6de62d1a2046c2f0d57d6ff0928fbe88984 https://github.com/qemu/qemu/commit/804bd6de62d1a2046c2f0d57d6ff0928fbe88984 Author: Markus Armbruster Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M scripts/qapi/events.py M tests/unit/test-qmp-event.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP events This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP events: suppress deprecated ones. No QMP event is deprecated right now. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210312153210.2810514-4-armbru@redhat.com> Commit: e7055d45a192cd1ea72073bc3b9b5b8a510c9506 https://github.com/qemu/qemu/commit/e7055d45a192cd1ea72073bc3b9b5b8a510c9506 Author: Markus Armbruster Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M scripts/qapi/events.py M tests/qapi-schema/qapi-schema-test.json M tests/qapi-schema/qapi-schema-test.out M tests/unit/test-qmp-event.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP event data This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP event data: suppress deprecated members. No QMP event data is deprecated right now. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210312153210.2810514-5-armbru@redhat.com> Commit: 7bec000fe5503598a667a76d70b2e1d12d9b81ac https://github.com/qemu/qemu/commit/7bec000fe5503598a667a76d70b2e1d12d9b81ac Author: Markus Armbruster Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M monitor/misc.c M monitor/monitor-internal.h M monitor/qmp-cmds-control.c M qapi/introspect.json M storage-daemon/qemu-storage-daemon.c Log Message: ----------- monitor: Drop query-qmp-schema 'gen': false hack QMP commands return their response as a generated QAPI type, which the monitor core converts to JSON via QObject. query-qmp-schema's response is the generated introspection data. This is a QLitObject since commit 7d0f982bfb "qapi: generate a literal qobject for introspection", v2.12). Before, it was a string. Instead of converting QLitObject / string -> QObject -> QAPI type SchemaInfoList -> QObject -> JSON, we take a shortcut: the command is 'gen': false, so it can return the QObject instead of the QAPI type. Slightly simpler and more efficient. The next commit will filter the response for output policy, and this is easier in the SchemaInfoList representation. Drop the shortcut. This replaces the manual command registration by a generated one. The manual registration makes the command available before the machine is built by passing flag QCO_ALLOW_PRECONFIG. To keep it available there, we need need to add 'allow-preconfig': true to its definition in the schema. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210312153210.2810514-6-armbru@redhat.com> [Commit message typo fixed] Commit: 16b45d1332269aea6063930e2ea133e1dd92660a https://github.com/qemu/qemu/commit/16b45d1332269aea6063930e2ea133e1dd92660a Author: Markus Armbruster Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M monitor/qmp-cmds-control.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP introspection This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP command query-qmp-schema: suppress information on deprecated commands, events and object type members, i.e. anything that has the special feature flag "deprecated". Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210312153210.2810514-7-armbru@redhat.com> Commit: ef1bcbc1cf35f72b4f8c9c66369a281912256aff https://github.com/qemu/qemu/commit/ef1bcbc1cf35f72b4f8c9c66369a281912256aff Author: Markus Armbruster Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M tests/unit/test-util-sockets.c Log Message: ----------- test-util-sockets: Add stub for monitor_set_cur() Without this stub, the next commit fails to link. I suspect the real cause is 947e47448d "monitor: Use getter/setter functions for cur_mon". Cc: Kevin Wolf Signed-off-by: Markus Armbruster Message-Id: <20210312153210.2810514-8-armbru@redhat.com> Reviewed-by: Eric Blake Commit: 106a6f38c05694703284da7c8b3dd2f1e2f993a0 https://github.com/qemu/qemu/commit/106a6f38c05694703284da7c8b3dd2f1e2f993a0 Author: Markus Armbruster Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M include/qapi/qmp/dispatch.h M qapi/qmp-dispatch.c M scripts/qapi/commands.py M tests/unit/test-qmp-cmds.c Log Message: ----------- qapi: Implement deprecated-input=reject for QMP commands This policy rejects deprecated input, and thus permits "testing the future". Implement it for QMP commands: make deprecated ones fail. Example: when QEMU is run with -compat deprecated-input=reject, then {"execute": "query-cpus"} fails like this {"error": {"class": "CommandNotFound", "desc": "Deprecated command query-cpus disabled by policy"}} When the deprecated command is removed, the error will change to {"error": {"class": "CommandNotFound", "desc": "The command query-cpus has not been found"}} Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210312153210.2810514-9-armbru@redhat.com> Commit: 82d2609325ae94d8aaf6332249466d5c16f2d28b https://github.com/qemu/qemu/commit/82d2609325ae94d8aaf6332249466d5c16f2d28b Author: Markus Armbruster Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M include/qapi/qobject-input-visitor.h M include/qapi/visitor-impl.h M include/qapi/visitor.h M qapi/qapi-visit-core.c M qapi/qobject-input-visitor.c M qapi/trace-events M scripts/qapi/commands.py M scripts/qapi/visit.py M tests/unit/test-qmp-cmds.c Log Message: ----------- qapi: Implement deprecated-input=reject for QMP command arguments This policy rejects deprecated input, and thus permits "testing the future". Implement it for QMP command arguments: reject commands with deprecated ones. Example: when QEMU is run with -compat deprecated-input=reject, then {"execute": "eject", "arguments": {"device": "cd"}} fails like this {"error": {"class": "GenericError", "desc": "Deprecated parameter 'device' disabled by policy"}} When the deprecated parameter is removed, the error will change to {"error": {"class": "GenericError", "desc": "Parameter 'device' is unexpected"}} Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210312153210.2810514-10-armbru@redhat.com> Commit: 5b728a7754e32ff6dac3501ded3ba820ef2edc7b https://github.com/qemu/qemu/commit/5b728a7754e32ff6dac3501ded3ba820ef2edc7b Author: Markus Armbruster Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M qapi/compat.json M qapi/qmp-dispatch.c M qapi/qobject-input-visitor.c M qemu-options.hx Log Message: ----------- qapi: New -compat deprecated-input=crash Policy "crash" calls abort() when deprecated input is received. Bugs in integration tests may mask the error from policy "reject". Provide a larger hammer: crash outright. Masking that seems unlikely. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210312153210.2810514-11-armbru@redhat.com> Commit: e9a395710edcddecb0554be9e15b6674d2c151ef https://github.com/qemu/qemu/commit/e9a395710edcddecb0554be9e15b6674d2c151ef Author: Peter Maydell Date: 2021-03-17 (Wed, 17 Mar 2021) Changed paths: A include/qapi/compat-policy.h M include/qapi/qmp/dispatch.h M include/qapi/qobject-input-visitor.h M include/qapi/qobject-output-visitor.h M include/qapi/visitor-impl.h M include/qapi/visitor.h M monitor/misc.c M monitor/monitor-internal.h M monitor/qmp-cmds-control.c A qapi/compat.json M qapi/introspect.json M qapi/meson.build M qapi/qapi-schema.json M qapi/qapi-visit-core.c M qapi/qmp-dispatch.c M qapi/qobject-input-visitor.c M qapi/qobject-output-visitor.c M qapi/trace-events M qemu-options.hx M scripts/qapi/commands.py M scripts/qapi/events.py M scripts/qapi/visit.py M softmmu/vl.c M storage-daemon/qemu-storage-daemon.c M stubs/meson.build R stubs/set-fd-handler.c M tests/qapi-schema/qapi-schema-test.json M tests/qapi-schema/qapi-schema-test.out M tests/unit/test-qmp-cmds.c M tests/unit/test-qmp-event.c M tests/unit/test-util-sockets.c Log Message: ----------- Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-03-16' into staging QAPI patches patches for 2021-03-16 # gpg: Signature made Tue 16 Mar 2021 10:15:25 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster " [full] # gpg: aka "Markus Armbruster " [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2021-03-16: qapi: New -compat deprecated-input=crash qapi: Implement deprecated-input=reject for QMP command arguments qapi: Implement deprecated-input=reject for QMP commands test-util-sockets: Add stub for monitor_set_cur() qapi: Implement deprecated-output=hide for QMP introspection monitor: Drop query-qmp-schema 'gen': false hack qapi: Implement deprecated-output=hide for QMP event data qapi: Implement deprecated-output=hide for QMP events qapi: Implement deprecated-output=hide for QMP command results qemu-options: New -compat to set policy for deprecated interfaces qemuutil: remove qemu_set_fd_handler duplicate symbol Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/569a9481034b...e9a395710edc From MAILER-DAEMON Wed Mar 17 13:15:53 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMZlw-0002h5-SW for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 13:15:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46408) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMZlp-0002cL-US for qemu-commits@nongnu.org; Wed, 17 Mar 2021 13:15:46 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:33375 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMZlZ-0006M6-HS for qemu-commits@nongnu.org; Wed, 17 Mar 2021 13:15:43 -0400 Received: from github.com (hubbernetes-node-7247464.va3-iad.github.net [10.48.112.57]) by smtp.github.com (Postfix) with ESMTPA id CEA215C3310 for ; Wed, 17 Mar 2021 10:15:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616001327; bh=dDoNXJqNpJQPu3K5WDDN5hKLQJF41kgs/6TMqb/n5BA=; h=Date:From:To:Subject:From; b=HJmLdg2DqMo+koHDEihOi1T5KAg7rkuV9W5NvKr7cdsVbr/cEnZH9oCkXqZVh98oY eLuRWbMyTnaw5pWYg8Qd0K+tSLf2tqiVPFk1o4RIu93lNhRp/aOTnwtCSX8N4uoxYx wMwd3IT7jTgk11IL1TYeeWnIhURyH/FS3jmjEyC8= Date: Wed, 17 Mar 2021 10:15:27 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] c96007: coreaudio: Drop support for macOS older than 10.6 X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 17:15:47 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: c960070c366c26e0a510474f0444bb460021821f https://github.com/qemu/qemu/commit/c960070c366c26e0a510474f0444bb460021821f Author: Akihiko Odaki Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M audio/coreaudio.c Log Message: ----------- coreaudio: Drop support for macOS older than 10.6 Mac OS X 10.6 was released in 2009. Signed-off-by: Akihiko Odaki Reviewed-by: Peter Maydell Message-Id: <20210311151512.22096-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: 7d6948cd98cf5ad8a3458a4ce7fdbcb79bcd1212 https://github.com/qemu/qemu/commit/7d6948cd98cf5ad8a3458a4ce7fdbcb79bcd1212 Author: Akihiko Odaki Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M audio/coreaudio.c Log Message: ----------- coreaudio: Extract device operations This change prepare to support dynamic device changes, which requires to perform device initialization/deinitialization multiple times. Signed-off-by: Akihiko Odaki Message-Id: <20210311151512.22096-2-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: 3ba6e3f6888d2825709eba2f623f0615069c036c https://github.com/qemu/qemu/commit/3ba6e3f6888d2825709eba2f623f0615069c036c Author: Akihiko Odaki Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M audio/coreaudio.c Log Message: ----------- coreaudio: Handle output device change An output device change can occur when plugging or unplugging an earphone. Signed-off-by: Akihiko Odaki Message-Id: <20210311151512.22096-3-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: ce90fecbeb8312ffc5340e0d53d9a76b2aa8bf6e https://github.com/qemu/qemu/commit/ce90fecbeb8312ffc5340e0d53d9a76b2aa8bf6e Author: Peter Maydell Date: 2021-03-17 (Wed, 17 Mar 2021) Changed paths: M audio/coreaudio.c Log Message: ----------- Merge remote-tracking branch 'remotes/kraxel/tags/audio-20210316-pull-request' into staging coreaudio fixes and cleanups. # gpg: Signature made Tue 16 Mar 2021 10:47:36 GMT # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) " [full] # gpg: aka "Gerd Hoffmann " [full] # gpg: aka "Gerd Hoffmann (private) " [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/audio-20210316-pull-request: coreaudio: Handle output device change coreaudio: Extract device operations coreaudio: Drop support for macOS older than 10.6 Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/e9a395710edc...ce90fecbeb83 From MAILER-DAEMON Wed Mar 17 14:28:12 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMatw-0001f1-5A for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 14:28:12 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38430) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMatu-0001Yu-0M for qemu-commits@nongnu.org; Wed, 17 Mar 2021 14:28:10 -0400 Received: from out-26.smtp.github.com ([192.30.252.209]:49811 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMatq-0006XY-Mt for qemu-commits@nongnu.org; Wed, 17 Mar 2021 14:28:08 -0400 Received: from github.com (hubbernetes-node-d28fa7c.ash1-iad.github.net [10.56.110.49]) by smtp.github.com (Postfix) with ESMTPA id 0E4225E01F6 for ; Wed, 17 Mar 2021 11:28:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616005686; bh=tr0Of5up3b6D/AMAaqczSa7yQYQ88YphUpjUKo3haIw=; h=Date:From:To:Subject:From; b=v5g8h5Bls2YVQSX+DQ1wkOb9NptVa/JHAupLr7GYlQxB+CIsbJQOKVsAglaA6AVhx IJruMjRzqzz9WCNzl2t8TvUidqmSdvo7QPjI/FFEc5rJF0u9Ctpy560L0HuOb52OV5 7NQRxOWKLiuOf9cK0TdK46Psg+w+XcON0QmC896E= Date: Wed, 17 Mar 2021 11:28:06 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] c96007: coreaudio: Drop support for macOS older than 10.6 X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 18:28:10 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: c960070c366c26e0a510474f0444bb460021821f https://github.com/qemu/qemu/commit/c960070c366c26e0a510474f0444bb460021821f Author: Akihiko Odaki Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M audio/coreaudio.c Log Message: ----------- coreaudio: Drop support for macOS older than 10.6 Mac OS X 10.6 was released in 2009. Signed-off-by: Akihiko Odaki Reviewed-by: Peter Maydell Message-Id: <20210311151512.22096-1-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: 7d6948cd98cf5ad8a3458a4ce7fdbcb79bcd1212 https://github.com/qemu/qemu/commit/7d6948cd98cf5ad8a3458a4ce7fdbcb79bcd1212 Author: Akihiko Odaki Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M audio/coreaudio.c Log Message: ----------- coreaudio: Extract device operations This change prepare to support dynamic device changes, which requires to perform device initialization/deinitialization multiple times. Signed-off-by: Akihiko Odaki Message-Id: <20210311151512.22096-2-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: 3ba6e3f6888d2825709eba2f623f0615069c036c https://github.com/qemu/qemu/commit/3ba6e3f6888d2825709eba2f623f0615069c036c Author: Akihiko Odaki Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M audio/coreaudio.c Log Message: ----------- coreaudio: Handle output device change An output device change can occur when plugging or unplugging an earphone. Signed-off-by: Akihiko Odaki Message-Id: <20210311151512.22096-3-akihiko.odaki@gmail.com> Signed-off-by: Gerd Hoffmann Commit: ce90fecbeb8312ffc5340e0d53d9a76b2aa8bf6e https://github.com/qemu/qemu/commit/ce90fecbeb8312ffc5340e0d53d9a76b2aa8bf6e Author: Peter Maydell Date: 2021-03-17 (Wed, 17 Mar 2021) Changed paths: M audio/coreaudio.c Log Message: ----------- Merge remote-tracking branch 'remotes/kraxel/tags/audio-20210316-pull-request' into staging coreaudio fixes and cleanups. # gpg: Signature made Tue 16 Mar 2021 10:47:36 GMT # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) " [full] # gpg: aka "Gerd Hoffmann " [full] # gpg: aka "Gerd Hoffmann (private) " [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/audio-20210316-pull-request: coreaudio: Handle output device change coreaudio: Extract device operations coreaudio: Drop support for macOS older than 10.6 Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/569a9481034b...ce90fecbeb83 From MAILER-DAEMON Wed Mar 17 14:33:47 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMazL-0006qd-Lx for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 14:33:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40442) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMazJ-0006mQ-Ez for qemu-commits@nongnu.org; Wed, 17 Mar 2021 14:33:45 -0400 Received: from out-24.smtp.github.com ([192.30.252.207]:49821) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMazH-0000Xk-PK for qemu-commits@nongnu.org; Wed, 17 Mar 2021 14:33:45 -0400 Received: from github.com (hubbernetes-node-3f3c2be.ac4-iad.github.net [10.52.201.56]) by smtp.github.com (Postfix) with ESMTPA id 2660360050C for ; Wed, 17 Mar 2021 11:33:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616006023; bh=Z0sW+C1JE44REXNbjr4iaabeYV/ilSvXPjBAulwQ+Kk=; h=Date:From:To:Subject:From; b=ULsJcGBIUFnRwCjkBHLQdUwEllDJjCqIB8dTJXJQf8IDq0jZXUeR59ugrrPXtT7i5 BqV2gjlXEGeI7PipS3Tqm0/skDaGS7VIZsi5EQj8VyEP55COqIAMPbV95pijhWwg12 1LQHhHB8mTK8QQy8NrNMuvQiWhsvSTLKUK5CV7/o= Date: Wed, 17 Mar 2021 11:33:43 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] e4fd88: hw/9pfs/9p-synth: Replaced qemu_mutex_lock with QE... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 18:33:45 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: e4fd889f51094a8e76274ca1e9e0ed70375166f0 https://github.com/qemu/qemu/commit/e4fd889f51094a8e76274ca1e9e0ed70375166f0 Author: Mahmoud Mandour Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/9pfs/9p-synth.c Log Message: ----------- hw/9pfs/9p-synth: Replaced qemu_mutex_lock with QEMU_LOCK_GUARD Replaced a call to qemu_mutex_lock and its respective call to qemu_mutex_unlock and used QEMU_LOCK_GUARD macro in their place. This simplifies the code by removing the call required to unlock and also eliminates goto paths. Signed-off-by: Mahmoud Mandour Acked-by: Greg Kurz Reviewed-by: Christian Schoenebeck Message-Id: <20210311031538.5325-9-ma.mandourr@gmail.com> Signed-off-by: Christian Schoenebeck Commit: 69259911f948ad2755bd1f2c999dd60ac322c890 https://github.com/qemu/qemu/commit/69259911f948ad2755bd1f2c999dd60ac322c890 Author: Peter Maydell Date: 2021-03-17 (Wed, 17 Mar 2021) Changed paths: M hw/9pfs/9p-synth.c Log Message: ----------- Merge remote-tracking branch 'remotes/cschoenebeck/tags/pull-9p-20210316' into staging 9pfs: code cleanup * Use lock-guard design pattern instead of manual lock/unlock. # gpg: Signature made Tue 16 Mar 2021 10:49:09 GMT # gpg: using RSA key 96D8D110CF7AF8084F88590134C2B58765A47395 # gpg: issuer "qemu_oss@crudebyte.com" # gpg: Good signature from "Christian Schoenebeck " [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: ECAB 1A45 4014 1413 BA38 4926 30DB 47C3 A012 D5F4 # Subkey fingerprint: 96D8 D110 CF7A F808 4F88 5901 34C2 B587 65A4 7395 * remotes/cschoenebeck/tags/pull-9p-20210316: hw/9pfs/9p-synth: Replaced qemu_mutex_lock with QEMU_LOCK_GUARD Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/ce90fecbeb83...69259911f948 From MAILER-DAEMON Wed Mar 17 15:24:34 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMbmT-0001if-W3 for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 15:24:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52444) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMbmT-0001gu-7m for qemu-commits@nongnu.org; Wed, 17 Mar 2021 15:24:33 -0400 Received: from out-26.smtp.github.com ([192.30.252.209]:59863 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMbmR-00054u-D9 for qemu-commits@nongnu.org; Wed, 17 Mar 2021 15:24:32 -0400 Received: from github.com (hubbernetes-node-818a524.ash1-iad.github.net [10.56.113.62]) by smtp.github.com (Postfix) with ESMTPA id B82145E075D for ; Wed, 17 Mar 2021 12:24:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616009070; bh=cqoKajBOCFuYAzhQ6FKvyUPS6Eom4O5wXywrW+6BVo8=; h=Date:From:To:Subject:From; b=KV8mZu0/8Ldn0Wkhx/a88jsVOlwauKKYhYUaICQbyDOp0pnQEwHnHeLwdIs3AxoqT EE+MmuL4OwPXr1tDPJ7hlQZ8NKQKRSPTPaNFjMmTOy3rPJjBQi51GGs05pE4xDr3Pj cVhyH0SxWFLZnoBtIFuqhErkE0KO/rJoTkxs/QT0= Date: Wed, 17 Mar 2021 12:24:30 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] e4fd88: hw/9pfs/9p-synth: Replaced qemu_mutex_lock with QE... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 19:24:33 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: e4fd889f51094a8e76274ca1e9e0ed70375166f0 https://github.com/qemu/qemu/commit/e4fd889f51094a8e76274ca1e9e0ed70375166f0 Author: Mahmoud Mandour Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/9pfs/9p-synth.c Log Message: ----------- hw/9pfs/9p-synth: Replaced qemu_mutex_lock with QEMU_LOCK_GUARD Replaced a call to qemu_mutex_lock and its respective call to qemu_mutex_unlock and used QEMU_LOCK_GUARD macro in their place. This simplifies the code by removing the call required to unlock and also eliminates goto paths. Signed-off-by: Mahmoud Mandour Acked-by: Greg Kurz Reviewed-by: Christian Schoenebeck Message-Id: <20210311031538.5325-9-ma.mandourr@gmail.com> Signed-off-by: Christian Schoenebeck Commit: 69259911f948ad2755bd1f2c999dd60ac322c890 https://github.com/qemu/qemu/commit/69259911f948ad2755bd1f2c999dd60ac322c890 Author: Peter Maydell Date: 2021-03-17 (Wed, 17 Mar 2021) Changed paths: M hw/9pfs/9p-synth.c Log Message: ----------- Merge remote-tracking branch 'remotes/cschoenebeck/tags/pull-9p-20210316' into staging 9pfs: code cleanup * Use lock-guard design pattern instead of manual lock/unlock. # gpg: Signature made Tue 16 Mar 2021 10:49:09 GMT # gpg: using RSA key 96D8D110CF7AF8084F88590134C2B58765A47395 # gpg: issuer "qemu_oss@crudebyte.com" # gpg: Good signature from "Christian Schoenebeck " [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: ECAB 1A45 4014 1413 BA38 4926 30DB 47C3 A012 D5F4 # Subkey fingerprint: 96D8 D110 CF7A F808 4F88 5901 34C2 B587 65A4 7395 * remotes/cschoenebeck/tags/pull-9p-20210316: hw/9pfs/9p-synth: Replaced qemu_mutex_lock with QEMU_LOCK_GUARD Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/ce90fecbeb83...69259911f948 From MAILER-DAEMON Wed Mar 17 15:31:22 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMbt3-0007Zi-Rd for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 15:31:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54622) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMbt1-0007Wn-Op for qemu-commits@nongnu.org; Wed, 17 Mar 2021 15:31:19 -0400 Received: from out-19.smtp.github.com ([192.30.252.202]:37229) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMbsy-0008QE-Le for qemu-commits@nongnu.org; Wed, 17 Mar 2021 15:31:19 -0400 Received: from github.com (hubbernetes-node-16c1bc0.va3-iad.github.net [10.48.111.39]) by smtp.github.com (Postfix) with ESMTPA id CFB13E07F7 for ; Wed, 17 Mar 2021 12:31:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616009475; bh=NZdSnQSlNdyRHjj+CGfTea2RpVCWBemDm47dyg22IjQ=; h=Date:From:To:Subject:From; b=Kfg6RhdiQJbElZIGaXlCgZeeMlflZvxGe6YfI0UjoGCRe2yf0y2NOMoEOOa3UMzHj tKPl/7O+ecT1438a6grisGjCOER6mm9mVY5/PRoy9opAVVBeDEv9aODhN8QVWaY9t8 esjiqqPA8KtvMtxlrgCUC7d6KmdKsubmFEDuHacQ= Date: Wed, 17 Mar 2021 12:31:15 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.202; envelope-from=noreply@github.com; helo=out-19.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 4292d5: vfio: Fix vfio_listener_log_sync function name typo X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 19:31:20 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 4292d5019345a65f14c85e8207c7059e3791773e=0D https://github.com/qemu/qemu/commit/4292d5019345a65f14c85e8207c7059= e3791773e=0D Author: Zenghui Yu =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/common.c=0D =0D Log Message:=0D -----------=0D vfio: Fix vfio_listener_log_sync function name typo=0D =0D There is an obvious typo in the function name of the .log_sync() callback= .=0D Spell it correctly.=0D =0D Signed-off-by: Zenghui Yu =0D Message-Id: <20201204014240.772-1-yuzenghui@huawei.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 4eda914cacc32c7c069bc57777dac0f338133e31=0D https://github.com/qemu/qemu/commit/4eda914cacc32c7c069bc57777dac0f= 338133e31=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/pci-quirks.c=0D M hw/vfio/pci.c=0D M hw/vfio/pci.h=0D M hw/vfio/trace-events=0D =0D Log Message:=0D -----------=0D hw/vfio/pci-quirks: Replace the word 'blacklist'=0D =0D Follow the inclusive terminology from the "Conscious Language in your=0D Open Source Projects" guidelines [*] and replace the word "blacklist"=0D appropriately.=0D =0D [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.m= d=0D =0D Reviewed-by: Alex Williamson =0D Acked-by: Alex Williamson =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210205171817.2108907-9-philmd@redhat.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 4e779bf1a55e8b951f1640e3ea46fc459066f64f=0D https://github.com/qemu/qemu/commit/4e779bf1a55e8b951f1640e3ea46fc4= 59066f64f=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: Cover docs/igd-assign.txt in VFIO section=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210202155611.998424-1-philmd@redhat.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 8dca037b484fc8caeb6d6689745bc7475ce27174=0D https://github.com/qemu/qemu/commit/8dca037b484fc8caeb6d6689745bc74= 75ce27174=0D Author: Eric Auger =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/common.c=0D =0D Log Message:=0D -----------=0D vfio: Do not register any IOMMU_NOTIFIER_DEVIOTLB_UNMAP notifier=0D =0D In an attempt to fix smmu/virtio-iommu - vhost regression, commit=0D 958ec334bca3 ("vhost: Unbreak SMMU and virtio-iommu on dev-iotlb support"= )=0D broke virtio-iommu integration. This is due to the fact VFIO registers=0D= IOMMU_NOTIFIER_ALL notifiers, which includes IOMMU_NOTIFIER_DEVIOTLB_UNMA= P=0D and this latter now is rejected by the virtio-iommu. As a consequence,=0D= the registration fails. VHOST behaves like a device with an ATC cache. Th= e=0D VFIO device does not support this scheme yet.=0D =0D Let's register only legacy MAP and UNMAP notifiers.=0D =0D Fixes: 958ec334bca3 ("vhost: Unbreak SMMU and virtio-iommu on dev-iotlb s= upport")=0D Signed-off-by: Eric Auger =0D Message-Id: <20210209213233.40985-2-eric.auger@redhat.com>=0D Acked-by: Jason Wang =0D Acked-by: Alex Williamson =0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 1a8e22bd20c2586df0bc0fdce8d5a3b42fffb1ac=0D https://github.com/qemu/qemu/commit/1a8e22bd20c2586df0bc0fdce8d5a3b= 42fffb1ac=0D Author: Eric Auger =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr_iommu.c=0D =0D Log Message:=0D -----------=0D spapr_iommu: Fix vhost integration regression=0D =0D Previous work on dev-iotlb message broke spapr_iommu/vhost integration=0D= as it did for SMMU and virtio-iommu. The spapr_iommu currently=0D only sends IOMMU_NOTIFIER_UNMAP notifications. Since commit=0D 958ec334bca3 ("vhost: Unbreak SMMU and virtio-iommu on dev-iotlb support"= ),=0D VHOST first tries to register IOMMU_NOTIFIER_DEVIOTLB_UNMAP notifier=0D and if it fails, falls back to legacy IOMMU_NOTIFIER_UNMAP. So=0D spapr_iommu must fail on the IOMMU_NOTIFIER_DEVIOTLB_UNMAP=0D registration.=0D =0D Reported-by: Peter Xu =0D Fixes: b68ba1ca5767 ("memory: Add IOMMU_NOTIFIER_DEVIOTLB_UNMAP IOMMUTLBN= otificationType")=0D Signed-off-by: Eric Auger =0D Message-Id: <20210209213233.40985-3-eric.auger@redhat.com>=0D Acked-by: David Gibson =0D Acked-by: Jason Wang =0D Reviewed-by: Michael S. Tsirkin =0D Reviewed-by: Greg Kurz =0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: d329f5032e17f3ecc7f8c2c3c5f130ec671000d2=0D https://github.com/qemu/qemu/commit/d329f5032e17f3ecc7f8c2c3c5f130e= c671000d2=0D Author: Shenming Lu =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/migration.c=0D =0D Log Message:=0D -----------=0D vfio: Move the saving of the config space to the right place in VFIO mi= gration=0D =0D On ARM64 the VFIO SET_IRQS ioctl is dependent on the VM interrupt=0D setup, if the restoring of the VFIO PCI device config space is=0D before the VGIC, an error might occur in the kernel.=0D =0D So we move the saving of the config space to the non-iterable=0D process, thus it will be called after the VGIC according to=0D their priorities.=0D =0D As for the possible dependence of the device specific migration=0D data on it's config space, we can let the vendor driver to=0D include any config info it needs in its own data stream.=0D =0D Signed-off-by: Shenming Lu =0D Reviewed-by: Kirti Wankhede =0D Message-Id: <20210310030233.1133-2-lushenming@huawei.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 8ce1ff990eff6affbdd0492fe4fc95e113235e35=0D https://github.com/qemu/qemu/commit/8ce1ff990eff6affbdd0492fe4fc95e= 113235e35=0D Author: Shenming Lu =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/migration.c=0D =0D Log Message:=0D -----------=0D vfio: Set the priority of the VFIO VM state change handler explicitly=0D= =0D In the VFIO VM state change handler when stopping the VM, the _RUNNING=0D= bit in device_state is cleared which makes the VFIO device stop, includin= g=0D no longer generating interrupts. Then we can save the pending states of=0D= all interrupts in the GIC VM state change handler (on ARM).=0D =0D So we have to set the priority of the VFIO VM state change handler=0D explicitly (like virtio devices) to ensure it is called before the=0D GIC's in saving.=0D =0D Signed-off-by: Shenming Lu =0D Reviewed-by: Kirti Wankhede =0D Reviewed-by: Cornelia Huck =0D Message-Id: <20210310030233.1133-3-lushenming@huawei.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: ecebe53fe99379243695e817450124d69e061e39=0D https://github.com/qemu/qemu/commit/ecebe53fe99379243695e817450124d= 69e061e39=0D Author: Shenming Lu =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/pci.c=0D =0D Log Message:=0D -----------=0D vfio: Avoid disabling and enabling vectors repeatedly in VFIO migration= =0D =0D In VFIO migration resume phase and some guest startups, there are=0D already unmasked vectors in the vector table when calling=0D vfio_msix_enable(). So in order to avoid inefficiently disabling=0D and enabling vectors repeatedly, let's allocate all needed vectors=0D first and then enable these unmasked vectors one by one without=0D disabling.=0D =0D Signed-off-by: Shenming Lu =0D Message-Id: <20210310030233.1133-4-lushenming@huawei.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 1eb7f642750c1a1499423e00f408820c6d37b129=0D https://github.com/qemu/qemu/commit/1eb7f642750c1a1499423e00f408820= c6d37b129=0D Author: Kunkun Jiang =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/common.c=0D =0D Log Message:=0D -----------=0D vfio: Support host translation granule size=0D =0D The cpu_physical_memory_set_dirty_lebitmap() can quickly deal with=0D the dirty pages of memory by bitmap-traveling, regardless of whether=0D the bitmap is aligned correctly or not.=0D =0D cpu_physical_memory_set_dirty_lebitmap() supports pages in bitmap of=0D host page size. So it'd better to set bitmap_pgsize to host page size=0D to support more translation granule sizes.=0D =0D [aw: The Fixes commit below introduced code to restrict migration=0D support to configurations where the target page size intersects the=0D host dirty page support. For example, a 4K guest on a 4K host.=0D Due to the above flexibility in bitmap handling, this restriction=0D unnecessarily prevents mixed target/host pages size that could=0D otherwise be supported. Use host page size for dirty bitmap.]=0D =0D Fixes: 87ea529c502 ("vfio: Get migration capability flags for container")= =0D Signed-off-by: Kunkun Jiang =0D Message-Id: <20210304133446.1521-1-jiangkunkun@huawei.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 758b96b61d5cbc19204f340012d5a325f0a2105b=0D https://github.com/qemu/qemu/commit/758b96b61d5cbc19204f340012d5a32= 5f0a2105b=0D Author: Keqian Zhu =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/common.c=0D M hw/vfio/migration.c=0D =0D Log Message:=0D -----------=0D vfio/migrate: Move switch of dirty tracking into vfio_memory_listener=0D= =0D For now the switch of vfio dirty page tracking is integrated into=0D @vfio_save_handler. The reason is that some PCI vendor driver may=0D start to track dirty base on _SAVING state of device, so if dirty=0D tracking is started before setting device state, vfio will report=0D full-dirty to QEMU.=0D =0D However, the dirty bmap of all ramblocks are fully set when setup=0D ram saving, so it's not matter whether the device is in _SAVING=0D state when start vfio dirty tracking.=0D =0D Moreover, this logic causes some problems [1]. The object of dirty=0D tracking is guest memory, but the object of @vfio_save_handler is=0D device state, which produces unnecessary coupling and conflicts:=0D =0D 1. Coupling: Their saving granule is different (perVM vs perDevice).=0D vfio will enable dirty_page_tracking for each devices, actually=0D once is enough.=0D =0D 2. Conflicts: The ram_save_setup() traverses all memory_listeners=0D to execute their log_start() and log_sync() hooks to get the=0D first round dirty bitmap, which is used by the bulk stage of=0D ram saving. However, as vfio dirty tracking is not yet started,=0D it can't get dirty bitmap from vfio. Then we give up the chance=0D to handle vfio dirty page at bulk stage.=0D =0D Move the switch of vfio dirty_page_tracking into vfio_memory_listener=0D can solve above problems. Besides, Do not require devices in SAVING=0D state for vfio_sync_dirty_bitmap().=0D =0D [1] https://www.spinics.net/lists/kvm/msg229967.html=0D =0D Reported-by: Zenghui Yu =0D Signed-off-by: Keqian Zhu =0D Suggested-by: Paolo Bonzini =0D Message-Id: <20210309031913.11508-1-zhukeqian1@huawei.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 2255564fd21059960966b47212def9069cb56077=0D https://github.com/qemu/qemu/commit/2255564fd21059960966b47212def90= 69cb56077=0D Author: Peter Maydell =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/ppc/spapr_iommu.c=0D M hw/vfio/common.c=0D M hw/vfio/migration.c=0D M hw/vfio/pci-quirks.c=0D M hw/vfio/pci.c=0D M hw/vfio/pci.h=0D M hw/vfio/trace-events=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/awilliam/tags/vfio-update-2021031= 6.0' into staging=0D =0D VFIO update 2021-03-16=0D =0D * Fix "listerner" typo (Zenghui Yu)=0D =0D * Inclusive language and MAINTAINERS update (Philippe Mathieu-Daud=C3=A9= )=0D =0D * vIOMMU unmap notifier fixes (Eric Auger)=0D =0D * Migration fixes and optimizations (Shenming Lu)=0D =0D * Use host page size for dirty bitmap (Kunkun Jiang)=0D =0D * Use log_global_start/stop to switch dirty tracking (Keqian Zhu)=0D =0D # gpg: Signature made Tue 16 Mar 2021 16:59:10 GMT=0D # gpg: using RSA key 239B9B6E3BB08B22=0D # gpg: Good signature from "Alex Williamson "= [full]=0D # gpg: aka "Alex Williamson " [full]=0D= # gpg: aka "Alex Williamson " [full]= =0D # gpg: aka "Alex Williamson = " [full]=0D # Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B 8A90 239B 9B6E 3BB0 = 8B22=0D =0D * remotes/awilliam/tags/vfio-update-20210316.0:=0D vfio/migrate: Move switch of dirty tracking into vfio_memory_listener=0D= vfio: Support host translation granule size=0D vfio: Avoid disabling and enabling vectors repeatedly in VFIO migration= =0D vfio: Set the priority of the VFIO VM state change handler explicitly=0D= vfio: Move the saving of the config space to the right place in VFIO mi= gration=0D spapr_iommu: Fix vhost integration regression=0D vfio: Do not register any IOMMU_NOTIFIER_DEVIOTLB_UNMAP notifier=0D MAINTAINERS: Cover docs/igd-assign.txt in VFIO section=0D hw/vfio/pci-quirks: Replace the word 'blacklist'=0D vfio: Fix vfio_listener_log_sync function name typo=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/69259911f948...2255564fd210= =0D From MAILER-DAEMON Wed Mar 17 17:00:45 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMdHZ-0006U2-84 for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 17:00:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46640) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMdHX-0006Rd-31 for qemu-commits@nongnu.org; Wed, 17 Mar 2021 17:00:43 -0400 Received: from out-24.smtp.github.com ([192.30.252.207]:41771) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMdHT-00078C-Fc for qemu-commits@nongnu.org; Wed, 17 Mar 2021 17:00:41 -0400 Received: from github.com (hubbernetes-node-f040e1d.ac4-iad.github.net [10.52.201.73]) by smtp.github.com (Postfix) with ESMTPA id B2015600DEE for ; Wed, 17 Mar 2021 14:00:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616014838; bh=X/GQkb4zNJTYHfOBmHhO5AfBtuUYL7WhV0kmUwayVl0=; h=Date:From:To:Subject:From; b=jMWzJfuW6lRToXwUJ1XEbPwG0LoVRRIFwIDlr7efMv8tiTHIm0bSklPDZITO7N5RX kOC3LLYJd/O8rFQVbHjZtSTPj8kqDjPtNExO4cE6JR1JvlxTeRajKzb1HvFw5MeDsu swVyJJyh4DpcfgTYKXcuAlYu/peNMffy2rrVr0BQ= Date: Wed, 17 Mar 2021 14:00:38 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 4292d5: vfio: Fix vfio_listener_log_sync function name typo X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 21:00:43 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 4292d5019345a65f14c85e8207c7059e3791773e=0D https://github.com/qemu/qemu/commit/4292d5019345a65f14c85e8207c7059= e3791773e=0D Author: Zenghui Yu =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/common.c=0D =0D Log Message:=0D -----------=0D vfio: Fix vfio_listener_log_sync function name typo=0D =0D There is an obvious typo in the function name of the .log_sync() callback= .=0D Spell it correctly.=0D =0D Signed-off-by: Zenghui Yu =0D Message-Id: <20201204014240.772-1-yuzenghui@huawei.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 4eda914cacc32c7c069bc57777dac0f338133e31=0D https://github.com/qemu/qemu/commit/4eda914cacc32c7c069bc57777dac0f= 338133e31=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/pci-quirks.c=0D M hw/vfio/pci.c=0D M hw/vfio/pci.h=0D M hw/vfio/trace-events=0D =0D Log Message:=0D -----------=0D hw/vfio/pci-quirks: Replace the word 'blacklist'=0D =0D Follow the inclusive terminology from the "Conscious Language in your=0D Open Source Projects" guidelines [*] and replace the word "blacklist"=0D appropriately.=0D =0D [*] https://github.com/conscious-lang/conscious-lang-docs/blob/main/faq.m= d=0D =0D Reviewed-by: Alex Williamson =0D Acked-by: Alex Williamson =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210205171817.2108907-9-philmd@redhat.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 4e779bf1a55e8b951f1640e3ea46fc459066f64f=0D https://github.com/qemu/qemu/commit/4e779bf1a55e8b951f1640e3ea46fc4= 59066f64f=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: Cover docs/igd-assign.txt in VFIO section=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210202155611.998424-1-philmd@redhat.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 8dca037b484fc8caeb6d6689745bc7475ce27174=0D https://github.com/qemu/qemu/commit/8dca037b484fc8caeb6d6689745bc74= 75ce27174=0D Author: Eric Auger =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/common.c=0D =0D Log Message:=0D -----------=0D vfio: Do not register any IOMMU_NOTIFIER_DEVIOTLB_UNMAP notifier=0D =0D In an attempt to fix smmu/virtio-iommu - vhost regression, commit=0D 958ec334bca3 ("vhost: Unbreak SMMU and virtio-iommu on dev-iotlb support"= )=0D broke virtio-iommu integration. This is due to the fact VFIO registers=0D= IOMMU_NOTIFIER_ALL notifiers, which includes IOMMU_NOTIFIER_DEVIOTLB_UNMA= P=0D and this latter now is rejected by the virtio-iommu. As a consequence,=0D= the registration fails. VHOST behaves like a device with an ATC cache. Th= e=0D VFIO device does not support this scheme yet.=0D =0D Let's register only legacy MAP and UNMAP notifiers.=0D =0D Fixes: 958ec334bca3 ("vhost: Unbreak SMMU and virtio-iommu on dev-iotlb s= upport")=0D Signed-off-by: Eric Auger =0D Message-Id: <20210209213233.40985-2-eric.auger@redhat.com>=0D Acked-by: Jason Wang =0D Acked-by: Alex Williamson =0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 1a8e22bd20c2586df0bc0fdce8d5a3b42fffb1ac=0D https://github.com/qemu/qemu/commit/1a8e22bd20c2586df0bc0fdce8d5a3b= 42fffb1ac=0D Author: Eric Auger =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/ppc/spapr_iommu.c=0D =0D Log Message:=0D -----------=0D spapr_iommu: Fix vhost integration regression=0D =0D Previous work on dev-iotlb message broke spapr_iommu/vhost integration=0D= as it did for SMMU and virtio-iommu. The spapr_iommu currently=0D only sends IOMMU_NOTIFIER_UNMAP notifications. Since commit=0D 958ec334bca3 ("vhost: Unbreak SMMU and virtio-iommu on dev-iotlb support"= ),=0D VHOST first tries to register IOMMU_NOTIFIER_DEVIOTLB_UNMAP notifier=0D and if it fails, falls back to legacy IOMMU_NOTIFIER_UNMAP. So=0D spapr_iommu must fail on the IOMMU_NOTIFIER_DEVIOTLB_UNMAP=0D registration.=0D =0D Reported-by: Peter Xu =0D Fixes: b68ba1ca5767 ("memory: Add IOMMU_NOTIFIER_DEVIOTLB_UNMAP IOMMUTLBN= otificationType")=0D Signed-off-by: Eric Auger =0D Message-Id: <20210209213233.40985-3-eric.auger@redhat.com>=0D Acked-by: David Gibson =0D Acked-by: Jason Wang =0D Reviewed-by: Michael S. Tsirkin =0D Reviewed-by: Greg Kurz =0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: d329f5032e17f3ecc7f8c2c3c5f130ec671000d2=0D https://github.com/qemu/qemu/commit/d329f5032e17f3ecc7f8c2c3c5f130e= c671000d2=0D Author: Shenming Lu =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/migration.c=0D =0D Log Message:=0D -----------=0D vfio: Move the saving of the config space to the right place in VFIO mi= gration=0D =0D On ARM64 the VFIO SET_IRQS ioctl is dependent on the VM interrupt=0D setup, if the restoring of the VFIO PCI device config space is=0D before the VGIC, an error might occur in the kernel.=0D =0D So we move the saving of the config space to the non-iterable=0D process, thus it will be called after the VGIC according to=0D their priorities.=0D =0D As for the possible dependence of the device specific migration=0D data on it's config space, we can let the vendor driver to=0D include any config info it needs in its own data stream.=0D =0D Signed-off-by: Shenming Lu =0D Reviewed-by: Kirti Wankhede =0D Message-Id: <20210310030233.1133-2-lushenming@huawei.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 8ce1ff990eff6affbdd0492fe4fc95e113235e35=0D https://github.com/qemu/qemu/commit/8ce1ff990eff6affbdd0492fe4fc95e= 113235e35=0D Author: Shenming Lu =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/migration.c=0D =0D Log Message:=0D -----------=0D vfio: Set the priority of the VFIO VM state change handler explicitly=0D= =0D In the VFIO VM state change handler when stopping the VM, the _RUNNING=0D= bit in device_state is cleared which makes the VFIO device stop, includin= g=0D no longer generating interrupts. Then we can save the pending states of=0D= all interrupts in the GIC VM state change handler (on ARM).=0D =0D So we have to set the priority of the VFIO VM state change handler=0D explicitly (like virtio devices) to ensure it is called before the=0D GIC's in saving.=0D =0D Signed-off-by: Shenming Lu =0D Reviewed-by: Kirti Wankhede =0D Reviewed-by: Cornelia Huck =0D Message-Id: <20210310030233.1133-3-lushenming@huawei.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: ecebe53fe99379243695e817450124d69e061e39=0D https://github.com/qemu/qemu/commit/ecebe53fe99379243695e817450124d= 69e061e39=0D Author: Shenming Lu =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/pci.c=0D =0D Log Message:=0D -----------=0D vfio: Avoid disabling and enabling vectors repeatedly in VFIO migration= =0D =0D In VFIO migration resume phase and some guest startups, there are=0D already unmasked vectors in the vector table when calling=0D vfio_msix_enable(). So in order to avoid inefficiently disabling=0D and enabling vectors repeatedly, let's allocate all needed vectors=0D first and then enable these unmasked vectors one by one without=0D disabling.=0D =0D Signed-off-by: Shenming Lu =0D Message-Id: <20210310030233.1133-4-lushenming@huawei.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 1eb7f642750c1a1499423e00f408820c6d37b129=0D https://github.com/qemu/qemu/commit/1eb7f642750c1a1499423e00f408820= c6d37b129=0D Author: Kunkun Jiang =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/common.c=0D =0D Log Message:=0D -----------=0D vfio: Support host translation granule size=0D =0D The cpu_physical_memory_set_dirty_lebitmap() can quickly deal with=0D the dirty pages of memory by bitmap-traveling, regardless of whether=0D the bitmap is aligned correctly or not.=0D =0D cpu_physical_memory_set_dirty_lebitmap() supports pages in bitmap of=0D host page size. So it'd better to set bitmap_pgsize to host page size=0D to support more translation granule sizes.=0D =0D [aw: The Fixes commit below introduced code to restrict migration=0D support to configurations where the target page size intersects the=0D host dirty page support. For example, a 4K guest on a 4K host.=0D Due to the above flexibility in bitmap handling, this restriction=0D unnecessarily prevents mixed target/host pages size that could=0D otherwise be supported. Use host page size for dirty bitmap.]=0D =0D Fixes: 87ea529c502 ("vfio: Get migration capability flags for container")= =0D Signed-off-by: Kunkun Jiang =0D Message-Id: <20210304133446.1521-1-jiangkunkun@huawei.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 758b96b61d5cbc19204f340012d5a325f0a2105b=0D https://github.com/qemu/qemu/commit/758b96b61d5cbc19204f340012d5a32= 5f0a2105b=0D Author: Keqian Zhu =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/vfio/common.c=0D M hw/vfio/migration.c=0D =0D Log Message:=0D -----------=0D vfio/migrate: Move switch of dirty tracking into vfio_memory_listener=0D= =0D For now the switch of vfio dirty page tracking is integrated into=0D @vfio_save_handler. The reason is that some PCI vendor driver may=0D start to track dirty base on _SAVING state of device, so if dirty=0D tracking is started before setting device state, vfio will report=0D full-dirty to QEMU.=0D =0D However, the dirty bmap of all ramblocks are fully set when setup=0D ram saving, so it's not matter whether the device is in _SAVING=0D state when start vfio dirty tracking.=0D =0D Moreover, this logic causes some problems [1]. The object of dirty=0D tracking is guest memory, but the object of @vfio_save_handler is=0D device state, which produces unnecessary coupling and conflicts:=0D =0D 1. Coupling: Their saving granule is different (perVM vs perDevice).=0D vfio will enable dirty_page_tracking for each devices, actually=0D once is enough.=0D =0D 2. Conflicts: The ram_save_setup() traverses all memory_listeners=0D to execute their log_start() and log_sync() hooks to get the=0D first round dirty bitmap, which is used by the bulk stage of=0D ram saving. However, as vfio dirty tracking is not yet started,=0D it can't get dirty bitmap from vfio. Then we give up the chance=0D to handle vfio dirty page at bulk stage.=0D =0D Move the switch of vfio dirty_page_tracking into vfio_memory_listener=0D can solve above problems. Besides, Do not require devices in SAVING=0D state for vfio_sync_dirty_bitmap().=0D =0D [1] https://www.spinics.net/lists/kvm/msg229967.html=0D =0D Reported-by: Zenghui Yu =0D Signed-off-by: Keqian Zhu =0D Suggested-by: Paolo Bonzini =0D Message-Id: <20210309031913.11508-1-zhukeqian1@huawei.com>=0D Signed-off-by: Alex Williamson =0D =0D =0D Commit: 2255564fd21059960966b47212def9069cb56077=0D https://github.com/qemu/qemu/commit/2255564fd21059960966b47212def90= 69cb56077=0D Author: Peter Maydell =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/ppc/spapr_iommu.c=0D M hw/vfio/common.c=0D M hw/vfio/migration.c=0D M hw/vfio/pci-quirks.c=0D M hw/vfio/pci.c=0D M hw/vfio/pci.h=0D M hw/vfio/trace-events=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/awilliam/tags/vfio-update-2021031= 6.0' into staging=0D =0D VFIO update 2021-03-16=0D =0D * Fix "listerner" typo (Zenghui Yu)=0D =0D * Inclusive language and MAINTAINERS update (Philippe Mathieu-Daud=C3=A9= )=0D =0D * vIOMMU unmap notifier fixes (Eric Auger)=0D =0D * Migration fixes and optimizations (Shenming Lu)=0D =0D * Use host page size for dirty bitmap (Kunkun Jiang)=0D =0D * Use log_global_start/stop to switch dirty tracking (Keqian Zhu)=0D =0D # gpg: Signature made Tue 16 Mar 2021 16:59:10 GMT=0D # gpg: using RSA key 239B9B6E3BB08B22=0D # gpg: Good signature from "Alex Williamson "= [full]=0D # gpg: aka "Alex Williamson " [full]=0D= # gpg: aka "Alex Williamson " [full]= =0D # gpg: aka "Alex Williamson = " [full]=0D # Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B 8A90 239B 9B6E 3BB0 = 8B22=0D =0D * remotes/awilliam/tags/vfio-update-20210316.0:=0D vfio/migrate: Move switch of dirty tracking into vfio_memory_listener=0D= vfio: Support host translation granule size=0D vfio: Avoid disabling and enabling vectors repeatedly in VFIO migration= =0D vfio: Set the priority of the VFIO VM state change handler explicitly=0D= vfio: Move the saving of the config space to the right place in VFIO mi= gration=0D spapr_iommu: Fix vhost integration regression=0D vfio: Do not register any IOMMU_NOTIFIER_DEVIOTLB_UNMAP notifier=0D MAINTAINERS: Cover docs/igd-assign.txt in VFIO section=0D hw/vfio/pci-quirks: Replace the word 'blacklist'=0D vfio: Fix vfio_listener_log_sync function name typo=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/69259911f948...2255564fd210= =0D From MAILER-DAEMON Wed Mar 17 17:08:20 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMdOt-0002w1-W1 for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 17:08:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47946) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMdOs-0002tt-H7 for qemu-commits@nongnu.org; Wed, 17 Mar 2021 17:08:18 -0400 Received: from out-22.smtp.github.com ([192.30.252.205]:60569 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMdOp-00020U-Uw for qemu-commits@nongnu.org; Wed, 17 Mar 2021 17:08:17 -0400 Received: from github.com (hubbernetes-node-037a9b5.ac4-iad.github.net [10.52.200.74]) by smtp.github.com (Postfix) with ESMTPA id 2435B56074A for ; Wed, 17 Mar 2021 14:08:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616015295; bh=GKy4lZW28mE8poFxLlDRw/u4bwDMjtGlGuGU7KUqVWk=; h=Date:From:To:Subject:From; b=uoK1fPFu8t4waBIiTnE66SyJg3fDGtceYVQcA02eb1whXqFe0w3c7L+ZyQLcaWYXs O59+u/VwpuzDz8+Tau9DNlIaiWl/B0tPommH1XkJIYJuOhXk+plHAjSbG6nBJ2mJCQ gHgiNQhOpLQ04l4ifQlxo1IqSKRzvK+y3V86rLLk= Date: Wed, 17 Mar 2021 14:08:15 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] ee2e67: Update OpenBIOS images to 4a004110 built from subm... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 21:08:18 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: ee2e67da8f882fcdef2c49fcc58e9962aa695f5a https://github.com/qemu/qemu/commit/ee2e67da8f882fcdef2c49fcc58e9962aa695f5a Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M pc-bios/openbios-ppc M pc-bios/openbios-sparc32 M pc-bios/openbios-sparc64 M roms/openbios Log Message: ----------- Update OpenBIOS images to 4a004110 built from submodule. Signed-off-by: Mark Cave-Ayland Commit: 571d413b5da6bc6f1c2aaca8484717642255ddb0 https://github.com/qemu/qemu/commit/571d413b5da6bc6f1c2aaca8484717642255ddb0 Author: Peter Maydell Date: 2021-03-17 (Wed, 17 Mar 2021) Changed paths: M pc-bios/openbios-ppc M pc-bios/openbios-sparc32 M pc-bios/openbios-sparc64 M roms/openbios Log Message: ----------- Merge remote-tracking branch 'remotes/mcayland/tags/qemu-openbios-20210316' into staging qemu-openbios queue # gpg: Signature made Tue 16 Mar 2021 20:36:15 GMT # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland " [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-openbios-20210316: Update OpenBIOS images to 4a004110 built from submodule. Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/2255564fd210...571d413b5da6 From MAILER-DAEMON Wed Mar 17 18:19:26 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMeVg-0004g7-AU for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 18:19:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33106) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMeVc-0004dV-Sy for qemu-commits@nongnu.org; Wed, 17 Mar 2021 18:19:21 -0400 Received: from out-25.smtp.github.com ([192.30.252.208]:53729 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMeVa-0000Z5-UF for qemu-commits@nongnu.org; Wed, 17 Mar 2021 18:19:20 -0400 Received: from github.com (hubbernetes-node-3c03362.ash1-iad.github.net [10.56.122.42]) by smtp.github.com (Postfix) with ESMTPA id 450C1840089 for ; Wed, 17 Mar 2021 15:19:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616019558; bh=c9D0D/0fkjUz6loYrQVDStn/bFDjH7rNMBZ6GNFvMO8=; h=Date:From:To:Subject:From; b=BRaff/Src5P4Fk6D3kK65SLckNhQusus/aHSivqRLXqxWLtPZyKEmemyCkGQXZ/kE u+h2m6GJ0crPUu27BVIeb/oKXnjNRCsrRhjlhT8ZlDdHbVUeNq+pX2A0Knda73uztw nRllTFT8gNn6OdXSQuuecwR4V/z30MzHLwXw/DBo= Date: Wed, 17 Mar 2021 15:19:18 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] ee2e67: Update OpenBIOS images to 4a004110 built from subm... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 22:19:22 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: ee2e67da8f882fcdef2c49fcc58e9962aa695f5a https://github.com/qemu/qemu/commit/ee2e67da8f882fcdef2c49fcc58e9962aa695f5a Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M pc-bios/openbios-ppc M pc-bios/openbios-sparc32 M pc-bios/openbios-sparc64 M roms/openbios Log Message: ----------- Update OpenBIOS images to 4a004110 built from submodule. Signed-off-by: Mark Cave-Ayland Commit: 571d413b5da6bc6f1c2aaca8484717642255ddb0 https://github.com/qemu/qemu/commit/571d413b5da6bc6f1c2aaca8484717642255ddb0 Author: Peter Maydell Date: 2021-03-17 (Wed, 17 Mar 2021) Changed paths: M pc-bios/openbios-ppc M pc-bios/openbios-sparc32 M pc-bios/openbios-sparc64 M roms/openbios Log Message: ----------- Merge remote-tracking branch 'remotes/mcayland/tags/qemu-openbios-20210316' into staging qemu-openbios queue # gpg: Signature made Tue 16 Mar 2021 20:36:15 GMT # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland " [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-openbios-20210316: Update OpenBIOS images to 4a004110 built from submodule. Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/2255564fd210...571d413b5da6 From MAILER-DAEMON Wed Mar 17 18:24:34 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMeag-00085c-71 for mharc-qemu-commits@gnu.org; Wed, 17 Mar 2021 18:24:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33842) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMeae-00083P-E9 for qemu-commits@nongnu.org; Wed, 17 Mar 2021 18:24:32 -0400 Received: from out-19.smtp.github.com ([192.30.252.202]:33693) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMeab-0002oZ-Kr for qemu-commits@nongnu.org; Wed, 17 Mar 2021 18:24:31 -0400 Received: from github.com (hubbernetes-node-a196ae0.va3-iad.github.net [10.48.123.79]) by smtp.github.com (Postfix) with ESMTPA id E9DBBE01E7 for ; Wed, 17 Mar 2021 15:24:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616019869; bh=aFuXGi0opRxuVRA82wyCLYbUIn9nZiLTvYdEy2H3EnI=; h=Date:From:To:Subject:From; b=c49bdhRrruS9XHhrlxKX+Xab/tKnHMUxYBfMQyhHnGTNy5BbMCQrzLwqUtQdBSEQu u9aiTQcoxRH6c7dZ5sm7pYp1rVA44sHzXRLb1tsqAEY/d0dJB0zmBerb/C8Ijiqlfm SpwC1hq0kmiSvNbmupRJDlTaQj9v76i+bwensL/A= Date: Wed, 17 Mar 2021 15:24:28 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.202; envelope-from=noreply@github.com; helo=out-19.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] c887d3: tests/qtest: Only run fuzz-megasas-test if megasas... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 17 Mar 2021 22:24:32 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: c887d3339e5dc80ef9cec20a79d385ae36f9a13c=0D https://github.com/qemu/qemu/commit/c887d3339e5dc80ef9cec20a79d385a= e36f9a13c=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A tests/qtest/fuzz-megasas-test.c=0D M tests/qtest/fuzz-test.c=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D tests/qtest: Only run fuzz-megasas-test if megasas device is available=0D= =0D This test fails when QEMU is built without the megasas device,=0D restrict it to its availability.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: b43957dcdda3c6190b94a0d186897f8fc8ecec7a=0D https://github.com/qemu/qemu/commit/b43957dcdda3c6190b94a0d186897f8= fc8ecec7a=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M tests/qtest/fuzz-test.c=0D A tests/qtest/fuzz-virtio-scsi-test.c=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D tests/qtest: Only run fuzz-virtio-scsi when virtio-scsi is available=0D= =0D This test fails when QEMU is built without the virtio-scsi device,=0D restrict it to its availability.=0D =0D Reviewed-by: Michael S. Tsirkin =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: d3d39fc0184fdf2f4b2f5ab9c35f2a5085cfad4d=0D https://github.com/qemu/qemu/commit/d3d39fc0184fdf2f4b2f5ab9c35f2a5= 085cfad4d=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: Cover fuzzer reproducer tests within 'Device Fuzzing'=0D =0D When we started to commit the fuzzer QTest reproducers to=0D fuzz-test.c in commit d8dd1095019 ("qtest: add fuzz test case"),=0D we forgot to add the corresponding MAINTAINERS entry. Do it now.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: e8a2a62106d219016f8372c3888bbf555006243b=0D https://github.com/qemu/qemu/commit/e8a2a62106d219016f8372c3888bbf5= 55006243b=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/fuzz/generic_fuzz_configs.h=0D =0D Log Message:=0D -----------=0D fuzz: fix the pro100 generic-fuzzer config=0D =0D The device-type names for the pro100 network cards, are i8255.. We were=0D= matching "eepro", which catches the PCI PIO/MMIO regions for those=0D devices, however misses the actual PCI device, which we use to map the=0D= BARs, before fuzzing. Fix that=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: d0614b8e7a365e64ebf2ed068754787fae34d501=0D https://github.com/qemu/qemu/commit/d0614b8e7a365e64ebf2ed068754787= fae34d501=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/fuzz/generic_fuzz.c=0D =0D Log Message:=0D -----------=0D fuzz: don't leave orphan llvm-symbolizers around=0D =0D I noticed that with a sufficiently small timeout, the fuzzer fork-server=0D= sometimes locks up. On closer inspection, the issue appeared to be=0D caused by entering our SIGALRM handler, while libfuzzer is in it's crash=0D= handlers. Because libfuzzer relies on pipe communication with an=0D external child process to print out stack-traces, we shouldn't exit=0D early, and leave an orphan child. Check for children in the SIGALRM=0D handler to avoid this issue.=0D =0D Signed-off-by: Alexander Bulekov =0D Acked-by: Thomas Huth =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 97ef5f8862e1442a8d1c6044e19aa19ce9d1e974=0D https://github.com/qemu/qemu/commit/97ef5f8862e1442a8d1c6044e19aa19= ce9d1e974=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D A scripts/oss-fuzz/output_reproducer.py=0D =0D Log Message:=0D -----------=0D fuzz: add a script to build reproducers=0D =0D Currently, bash and C crash reproducers are be built manually. This is a=0D= problem, as we want to integrate reproducers into the tree, for=0D regression testing. This patch adds a script that converts a sequence of=0D= QTest commands into a pasteable Bash reproducer, or a libqtest-based C=0D= program. This will try to wrap pasteable reproducers to 72 chars, but=0D the generated C code will not have nice formatting. Therefore, the C=0D output of this script should be piped through an auto-formatter, such as=0D= clang-format=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 56f8f888ece06907b71a7f6f58e5be56d2d0767b=0D https://github.com/qemu/qemu/commit/56f8f888ece06907b71a7f6f58e5be5= 6d2d0767b=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/fuzzing.rst=0D =0D Log Message:=0D -----------=0D fuzz: add instructions for building reproducers=0D =0D We have several scripts that help build reproducers, but no=0D documentation for how they should be used. Add some documentation=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: d7da0e560128e56f55a2f1f27fa66dd8c5db446c=0D https://github.com/qemu/qemu/commit/d7da0e560128e56f55a2f1f27fa66dd= 8c5db446c=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/fuzz/generic_fuzz_configs.h=0D =0D Log Message:=0D -----------=0D fuzz: add a am53c974 generic-fuzzer config=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 230376d285b38f5b83882ebdd2e0d0570431dd09=0D https://github.com/qemu/qemu/commit/230376d285b38f5b83882ebdd2e0d05= 70431dd09=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/mem/meson.build=0D A hw/mem/sparse-mem.c=0D A include/hw/mem/sparse-mem.h=0D =0D Log Message:=0D -----------=0D memory: add a sparse memory device for fuzzing=0D =0D For testing, it can be useful to simulate an enormous amount of memory=0D= (e.g. 2^64 RAM). This adds an MMIO device that acts as sparse memory.=0D When something writes a nonzero value to a sparse-mem address, we=0D allocate a block of memory. For now, since the only user of this device=0D= is the fuzzer, we do not track and free zeroed blocks. The device has a=0D= very low priority (so it can be mapped beneath actual RAM, and virtual=0D= device MMIO regions).=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 25d309fb0d6c07e49c3d9250cdbacc16941d988e=0D https://github.com/qemu/qemu/commit/25d309fb0d6c07e49c3d9250cdbacc1= 6941d988e=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/fuzz/generic_fuzz.c=0D =0D Log Message:=0D -----------=0D fuzz: configure a sparse-mem device, by default=0D =0D The generic-fuzzer often provides randomized DMA addresses to=0D virtual-devices. For a 64-bit address-space, the chance of these=0D randomized addresses coinciding with RAM regions, is fairly small. Even=0D= though the fuzzer's instrumentation eventually finds valid addresses,=0D this can take some-time, and slows-down fuzzing progress (especially,=0D when multiple DMA buffers are involved). To work around this, create=0D "fake" sparse-memory that spans all of the 64-bit address-space. Adjust=0D= the DMA call-back to populate this sparse memory, correspondingly=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 7cac7fea708a1ca46f16c4e816d88b40da755de1=0D https://github.com/qemu/qemu/commit/7cac7fea708a1ca46f16c4e816d88b4= 0da755de1=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M softmmu/memory.c=0D M softmmu/physmem.c=0D =0D Log Message:=0D -----------=0D fuzz: move some DMA hooks=0D =0D For the sparse-mem device, we want the fuzzer to populate entire DMA=0D reads from sparse-mem, rather than hooking into the individual MMIO=0D memory_region_dispatch_read operations. Otherwise, the fuzzer will treat=0D= each sequential read separately (and populate it with a separate=0D pattern). Work around this by rearranging some DMA hooks. Since the=0D fuzzer has it's own logic to skip accidentally writing to MMIO regions,=0D= we can call the DMA cb, outside the flatview_translate loop.=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 20cf7b8e13670b66939e92a211dc48edddb0ec53=0D https://github.com/qemu/qemu/commit/20cf7b8e13670b66939e92a211dc48e= dddb0ec53=0D Author: Denis Plotnikov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M configure=0D =0D Log Message:=0D -----------=0D configure: add option to explicitly enable/disable libgio=0D =0D Now, compilation of util/dbus is implicit and depends=0D on libgio presence on the building host.=0D The patch adds options to manage libgio dependencies explicitly.=0D =0D Signed-off-by: Denis Plotnikov =0D Message-Id: <20210312151440.405776-1-den-plotnikov@yandex-team.ru>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 26dbec410e9f5194767d17fd19cb64fc1f487e1b=0D https://github.com/qemu/qemu/commit/26dbec410e9f5194767d17fd19cb64f= c1f487e1b=0D Author: Paolo Bonzini =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M accel/kvm/kvm-all.c=0D =0D Log Message:=0D -----------=0D Revert "accel: kvm: Add aligment assert for kvm_log_clear_one_slot"=0D =0D This reverts commit 3920552846e881bafa9f9aad0bb1a6eef874d7fb.=0D Thomas Huth reported a failure with CentOS 6 guests:=0D =0D ../../devel/qemu/accel/kvm/kvm-all.c:690: kvm_log_clear_one_slot: Asserti= on `QEMU_IS_ALIGNED(start | size, psize)' failed.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: dc293f60b02ff9a4d51ccae153b1685cc8a34d79=0D https://github.com/qemu/qemu/commit/dc293f60b02ff9a4d51ccae153b1685= cc8a34d79=0D Author: Paolo Bonzini =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M scsi/utils.c=0D =0D Log Message:=0D -----------=0D scsi: fix sense code for EREMOTEIO=0D =0D SENSE_CODE(LUN_COMM_FAILURE) has an ABORTED COMMAND sense key,=0D so it results in a retry in Linux. To ensure that EREMOTEIO=0D is forwarded to the guest, use a HARDWARE ERROR sense key=0D instead. Note that the code before commit d7a84021d was incorrect=0D because it used HARDWARE_ERROR as a SCSI status, not as a sense=0D key.=0D =0D Reported-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: c963fee4b0a98e48c12ed5b063fc4aba6d018ffb=0D https://github.com/qemu/qemu/commit/c963fee4b0a98e48c12ed5b063fc4ab= a6d018ffb=0D Author: Pavel Dovgalyuk =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/i8254.c=0D =0D Log Message:=0D -----------=0D hw/i8254: fix vmstate load=0D =0D QEMU timer of channel 0 in i8254 is used to raise irq=0D at the specified moment of time. This irq can be disabled=0D with irq_disabled flag. But when vmstate of the pit is=0D loaded, timer may be rearmed despite the disabled interrupts.=0D This patch adds irq_disabled flag check to fix that.=0D =0D Signed-off-by: Pavel Dovgalyuk =0D Message-Id: <161537170060.6654.9430112746749476215.stgit@pasha-ThinkPad-X= 280>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 8b858f9998a9d59a9a7188f2c5c6ffb99eff6115=0D https://github.com/qemu/qemu/commit/8b858f9998a9d59a9a7188f2c5c6ffb= 99eff6115=0D Author: Paolo Bonzini =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/timer.h=0D =0D Log Message:=0D -----------=0D qemu-timer: allow freeing a NULL timer=0D =0D Since 5f8e93c3e2 ("util/qemu-timer: Make timer_free() imply timer_del()",= 2021-01-08)=0D it is not possible anymore to pass a NULL pointer to timer_free(). Previ= ously=0D it would do nothing as it would simply pass NULL down to g_free().=0D =0D Rectify this, which also fixes "-chardev braille" when there is no device= .=0D =0D Reported-by: Markus Armbruster =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 56b89f455894e4628ad7994fe5dd348145d1a9c5=0D https://github.com/qemu/qemu/commit/56b89f455894e4628ad7994fe5dd348= 145d1a9c5=0D Author: Peter Maydell =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M accel/kvm/kvm-all.c=0D M configure=0D M docs/devel/fuzzing.rst=0D M hw/mem/meson.build=0D A hw/mem/sparse-mem.c=0D M hw/timer/i8254.c=0D A include/hw/mem/sparse-mem.h=0D M include/qemu/timer.h=0D A scripts/oss-fuzz/output_reproducer.py=0D M scsi/utils.c=0D M softmmu/memory.c=0D M softmmu/physmem.c=0D A tests/qtest/fuzz-megasas-test.c=0D M tests/qtest/fuzz-test.c=0D A tests/qtest/fuzz-virtio-scsi-test.c=0D M tests/qtest/fuzz/generic_fuzz.c=0D M tests/qtest/fuzz/generic_fuzz_configs.h=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream'= into staging=0D =0D * add --enable/--disable-libgio to configure (Denis)=0D * small fixes (Pavel, myself)=0D * fuzzing update (Alexander)=0D =0D # gpg: Signature made Tue 16 Mar 2021 18:30:38 GMT=0D # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7A= E83=0D # gpg: issuer "pbonzini@redhat.com"=0D # gpg: Good signature from "Paolo Bonzini " [full]=0D # gpg: aka "Paolo Bonzini " [full]=0D= # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 = 69B1=0D # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 = AE83=0D =0D * remotes/bonzini-gitlab/tags/for-upstream:=0D qemu-timer: allow freeing a NULL timer=0D hw/i8254: fix vmstate load=0D scsi: fix sense code for EREMOTEIO=0D Revert "accel: kvm: Add aligment assert for kvm_log_clear_one_slot"=0D configure: add option to explicitly enable/disable libgio=0D fuzz: move some DMA hooks=0D fuzz: configure a sparse-mem device, by default=0D memory: add a sparse memory device for fuzzing=0D fuzz: add a am53c974 generic-fuzzer config=0D fuzz: add instructions for building reproducers=0D fuzz: add a script to build reproducers=0D fuzz: don't leave orphan llvm-symbolizers around=0D fuzz: fix the pro100 generic-fuzzer config=0D MAINTAINERS: Cover fuzzer reproducer tests within 'Device Fuzzing'=0D tests/qtest: Only run fuzz-virtio-scsi when virtio-scsi is available=0D= tests/qtest: Only run fuzz-megasas-test if megasas device is available=0D= =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/571d413b5da6...56b89f455894= =0D From MAILER-DAEMON Thu Mar 18 06:05:59 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMpXT-0001V9-IS for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 06:05:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49198) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMpXQ-0001Ty-Fh for qemu-commits@nongnu.org; Thu, 18 Mar 2021 06:05:57 -0400 Received: from out-21.smtp.github.com ([192.30.252.204]:33341 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMpXK-0007Ig-I6 for qemu-commits@nongnu.org; Thu, 18 Mar 2021 06:05:55 -0400 Received: from github.com (hubbernetes-node-299757b.ac4-iad.github.net [10.52.207.77]) by smtp.github.com (Postfix) with ESMTPA id E4989520AE8 for ; Thu, 18 Mar 2021 03:05:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616061949; bh=0yzRcFRa7SMJUNCvuKhcDr/wtc3l4ZLGgUpq3J3FNU8=; h=Date:From:To:Subject:From; b=lTgwp04afJMA+xPR1mnCI87aLlI6/Aw8GBDHlqA8yz9PKtZCzyOtOyW3GZkepA3g+ EYfi9zXZFMykFE9e3KbzzES3jhcCreTUQDo3ElDLkEineBh0Wfi4BRVUJ+GyvRTfZD 830Ve6xiGJ6jZIHIFQ9FPAZ+pVlAs1pBjVKDWm3o= Date: Thu, 18 Mar 2021 03:05:49 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] c887d3: tests/qtest: Only run fuzz-megasas-test if megasas... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 10:05:57 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: c887d3339e5dc80ef9cec20a79d385ae36f9a13c=0D https://github.com/qemu/qemu/commit/c887d3339e5dc80ef9cec20a79d385a= e36f9a13c=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D A tests/qtest/fuzz-megasas-test.c=0D M tests/qtest/fuzz-test.c=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D tests/qtest: Only run fuzz-megasas-test if megasas device is available=0D= =0D This test fails when QEMU is built without the megasas device,=0D restrict it to its availability.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: b43957dcdda3c6190b94a0d186897f8fc8ecec7a=0D https://github.com/qemu/qemu/commit/b43957dcdda3c6190b94a0d186897f8= fc8ecec7a=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M tests/qtest/fuzz-test.c=0D A tests/qtest/fuzz-virtio-scsi-test.c=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D tests/qtest: Only run fuzz-virtio-scsi when virtio-scsi is available=0D= =0D This test fails when QEMU is built without the virtio-scsi device,=0D restrict it to its availability.=0D =0D Reviewed-by: Michael S. Tsirkin =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: d3d39fc0184fdf2f4b2f5ab9c35f2a5085cfad4d=0D https://github.com/qemu/qemu/commit/d3d39fc0184fdf2f4b2f5ab9c35f2a5= 085cfad4d=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D =0D Log Message:=0D -----------=0D MAINTAINERS: Cover fuzzer reproducer tests within 'Device Fuzzing'=0D =0D When we started to commit the fuzzer QTest reproducers to=0D fuzz-test.c in commit d8dd1095019 ("qtest: add fuzz test case"),=0D we forgot to add the corresponding MAINTAINERS entry. Do it now.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: e8a2a62106d219016f8372c3888bbf555006243b=0D https://github.com/qemu/qemu/commit/e8a2a62106d219016f8372c3888bbf5= 55006243b=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/fuzz/generic_fuzz_configs.h=0D =0D Log Message:=0D -----------=0D fuzz: fix the pro100 generic-fuzzer config=0D =0D The device-type names for the pro100 network cards, are i8255.. We were=0D= matching "eepro", which catches the PCI PIO/MMIO regions for those=0D devices, however misses the actual PCI device, which we use to map the=0D= BARs, before fuzzing. Fix that=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: d0614b8e7a365e64ebf2ed068754787fae34d501=0D https://github.com/qemu/qemu/commit/d0614b8e7a365e64ebf2ed068754787= fae34d501=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/fuzz/generic_fuzz.c=0D =0D Log Message:=0D -----------=0D fuzz: don't leave orphan llvm-symbolizers around=0D =0D I noticed that with a sufficiently small timeout, the fuzzer fork-server=0D= sometimes locks up. On closer inspection, the issue appeared to be=0D caused by entering our SIGALRM handler, while libfuzzer is in it's crash=0D= handlers. Because libfuzzer relies on pipe communication with an=0D external child process to print out stack-traces, we shouldn't exit=0D early, and leave an orphan child. Check for children in the SIGALRM=0D handler to avoid this issue.=0D =0D Signed-off-by: Alexander Bulekov =0D Acked-by: Thomas Huth =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 97ef5f8862e1442a8d1c6044e19aa19ce9d1e974=0D https://github.com/qemu/qemu/commit/97ef5f8862e1442a8d1c6044e19aa19= ce9d1e974=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D A scripts/oss-fuzz/output_reproducer.py=0D =0D Log Message:=0D -----------=0D fuzz: add a script to build reproducers=0D =0D Currently, bash and C crash reproducers are be built manually. This is a=0D= problem, as we want to integrate reproducers into the tree, for=0D regression testing. This patch adds a script that converts a sequence of=0D= QTest commands into a pasteable Bash reproducer, or a libqtest-based C=0D= program. This will try to wrap pasteable reproducers to 72 chars, but=0D the generated C code will not have nice formatting. Therefore, the C=0D output of this script should be piped through an auto-formatter, such as=0D= clang-format=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 56f8f888ece06907b71a7f6f58e5be56d2d0767b=0D https://github.com/qemu/qemu/commit/56f8f888ece06907b71a7f6f58e5be5= 6d2d0767b=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/fuzzing.rst=0D =0D Log Message:=0D -----------=0D fuzz: add instructions for building reproducers=0D =0D We have several scripts that help build reproducers, but no=0D documentation for how they should be used. Add some documentation=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: d7da0e560128e56f55a2f1f27fa66dd8c5db446c=0D https://github.com/qemu/qemu/commit/d7da0e560128e56f55a2f1f27fa66dd= 8c5db446c=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/fuzz/generic_fuzz_configs.h=0D =0D Log Message:=0D -----------=0D fuzz: add a am53c974 generic-fuzzer config=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 230376d285b38f5b83882ebdd2e0d0570431dd09=0D https://github.com/qemu/qemu/commit/230376d285b38f5b83882ebdd2e0d05= 70431dd09=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/mem/meson.build=0D A hw/mem/sparse-mem.c=0D A include/hw/mem/sparse-mem.h=0D =0D Log Message:=0D -----------=0D memory: add a sparse memory device for fuzzing=0D =0D For testing, it can be useful to simulate an enormous amount of memory=0D= (e.g. 2^64 RAM). This adds an MMIO device that acts as sparse memory.=0D When something writes a nonzero value to a sparse-mem address, we=0D allocate a block of memory. For now, since the only user of this device=0D= is the fuzzer, we do not track and free zeroed blocks. The device has a=0D= very low priority (so it can be mapped beneath actual RAM, and virtual=0D= device MMIO regions).=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 25d309fb0d6c07e49c3d9250cdbacc16941d988e=0D https://github.com/qemu/qemu/commit/25d309fb0d6c07e49c3d9250cdbacc1= 6941d988e=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/fuzz/generic_fuzz.c=0D =0D Log Message:=0D -----------=0D fuzz: configure a sparse-mem device, by default=0D =0D The generic-fuzzer often provides randomized DMA addresses to=0D virtual-devices. For a 64-bit address-space, the chance of these=0D randomized addresses coinciding with RAM regions, is fairly small. Even=0D= though the fuzzer's instrumentation eventually finds valid addresses,=0D this can take some-time, and slows-down fuzzing progress (especially,=0D when multiple DMA buffers are involved). To work around this, create=0D "fake" sparse-memory that spans all of the 64-bit address-space. Adjust=0D= the DMA call-back to populate this sparse memory, correspondingly=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 7cac7fea708a1ca46f16c4e816d88b40da755de1=0D https://github.com/qemu/qemu/commit/7cac7fea708a1ca46f16c4e816d88b4= 0da755de1=0D Author: Alexander Bulekov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M softmmu/memory.c=0D M softmmu/physmem.c=0D =0D Log Message:=0D -----------=0D fuzz: move some DMA hooks=0D =0D For the sparse-mem device, we want the fuzzer to populate entire DMA=0D reads from sparse-mem, rather than hooking into the individual MMIO=0D memory_region_dispatch_read operations. Otherwise, the fuzzer will treat=0D= each sequential read separately (and populate it with a separate=0D pattern). Work around this by rearranging some DMA hooks. Since the=0D fuzzer has it's own logic to skip accidentally writing to MMIO regions,=0D= we can call the DMA cb, outside the flatview_translate loop.=0D =0D Signed-off-by: Alexander Bulekov =0D Reviewed-by: Darren Kenny =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 20cf7b8e13670b66939e92a211dc48edddb0ec53=0D https://github.com/qemu/qemu/commit/20cf7b8e13670b66939e92a211dc48e= dddb0ec53=0D Author: Denis Plotnikov =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M configure=0D =0D Log Message:=0D -----------=0D configure: add option to explicitly enable/disable libgio=0D =0D Now, compilation of util/dbus is implicit and depends=0D on libgio presence on the building host.=0D The patch adds options to manage libgio dependencies explicitly.=0D =0D Signed-off-by: Denis Plotnikov =0D Message-Id: <20210312151440.405776-1-den-plotnikov@yandex-team.ru>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 26dbec410e9f5194767d17fd19cb64fc1f487e1b=0D https://github.com/qemu/qemu/commit/26dbec410e9f5194767d17fd19cb64f= c1f487e1b=0D Author: Paolo Bonzini =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M accel/kvm/kvm-all.c=0D =0D Log Message:=0D -----------=0D Revert "accel: kvm: Add aligment assert for kvm_log_clear_one_slot"=0D =0D This reverts commit 3920552846e881bafa9f9aad0bb1a6eef874d7fb.=0D Thomas Huth reported a failure with CentOS 6 guests:=0D =0D ../../devel/qemu/accel/kvm/kvm-all.c:690: kvm_log_clear_one_slot: Asserti= on `QEMU_IS_ALIGNED(start | size, psize)' failed.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: dc293f60b02ff9a4d51ccae153b1685cc8a34d79=0D https://github.com/qemu/qemu/commit/dc293f60b02ff9a4d51ccae153b1685= cc8a34d79=0D Author: Paolo Bonzini =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M scsi/utils.c=0D =0D Log Message:=0D -----------=0D scsi: fix sense code for EREMOTEIO=0D =0D SENSE_CODE(LUN_COMM_FAILURE) has an ABORTED COMMAND sense key,=0D so it results in a retry in Linux. To ensure that EREMOTEIO=0D is forwarded to the guest, use a HARDWARE ERROR sense key=0D instead. Note that the code before commit d7a84021d was incorrect=0D because it used HARDWARE_ERROR as a SCSI status, not as a sense=0D key.=0D =0D Reported-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: c963fee4b0a98e48c12ed5b063fc4aba6d018ffb=0D https://github.com/qemu/qemu/commit/c963fee4b0a98e48c12ed5b063fc4ab= a6d018ffb=0D Author: Pavel Dovgalyuk =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/i8254.c=0D =0D Log Message:=0D -----------=0D hw/i8254: fix vmstate load=0D =0D QEMU timer of channel 0 in i8254 is used to raise irq=0D at the specified moment of time. This irq can be disabled=0D with irq_disabled flag. But when vmstate of the pit is=0D loaded, timer may be rearmed despite the disabled interrupts.=0D This patch adds irq_disabled flag check to fix that.=0D =0D Signed-off-by: Pavel Dovgalyuk =0D Message-Id: <161537170060.6654.9430112746749476215.stgit@pasha-ThinkPad-X= 280>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 8b858f9998a9d59a9a7188f2c5c6ffb99eff6115=0D https://github.com/qemu/qemu/commit/8b858f9998a9d59a9a7188f2c5c6ffb= 99eff6115=0D Author: Paolo Bonzini =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/timer.h=0D =0D Log Message:=0D -----------=0D qemu-timer: allow freeing a NULL timer=0D =0D Since 5f8e93c3e2 ("util/qemu-timer: Make timer_free() imply timer_del()",= 2021-01-08)=0D it is not possible anymore to pass a NULL pointer to timer_free(). Previ= ously=0D it would do nothing as it would simply pass NULL down to g_free().=0D =0D Rectify this, which also fixes "-chardev braille" when there is no device= .=0D =0D Reported-by: Markus Armbruster =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 56b89f455894e4628ad7994fe5dd348145d1a9c5=0D https://github.com/qemu/qemu/commit/56b89f455894e4628ad7994fe5dd348= 145d1a9c5=0D Author: Peter Maydell =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M accel/kvm/kvm-all.c=0D M configure=0D M docs/devel/fuzzing.rst=0D M hw/mem/meson.build=0D A hw/mem/sparse-mem.c=0D M hw/timer/i8254.c=0D A include/hw/mem/sparse-mem.h=0D M include/qemu/timer.h=0D A scripts/oss-fuzz/output_reproducer.py=0D M scsi/utils.c=0D M softmmu/memory.c=0D M softmmu/physmem.c=0D A tests/qtest/fuzz-megasas-test.c=0D M tests/qtest/fuzz-test.c=0D A tests/qtest/fuzz-virtio-scsi-test.c=0D M tests/qtest/fuzz/generic_fuzz.c=0D M tests/qtest/fuzz/generic_fuzz_configs.h=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream'= into staging=0D =0D * add --enable/--disable-libgio to configure (Denis)=0D * small fixes (Pavel, myself)=0D * fuzzing update (Alexander)=0D =0D # gpg: Signature made Tue 16 Mar 2021 18:30:38 GMT=0D # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7A= E83=0D # gpg: issuer "pbonzini@redhat.com"=0D # gpg: Good signature from "Paolo Bonzini " [full]=0D # gpg: aka "Paolo Bonzini " [full]=0D= # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 = 69B1=0D # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 = AE83=0D =0D * remotes/bonzini-gitlab/tags/for-upstream:=0D qemu-timer: allow freeing a NULL timer=0D hw/i8254: fix vmstate load=0D scsi: fix sense code for EREMOTEIO=0D Revert "accel: kvm: Add aligment assert for kvm_log_clear_one_slot"=0D configure: add option to explicitly enable/disable libgio=0D fuzz: move some DMA hooks=0D fuzz: configure a sparse-mem device, by default=0D memory: add a sparse memory device for fuzzing=0D fuzz: add a am53c974 generic-fuzzer config=0D fuzz: add instructions for building reproducers=0D fuzz: add a script to build reproducers=0D fuzz: don't leave orphan llvm-symbolizers around=0D fuzz: fix the pro100 generic-fuzzer config=0D MAINTAINERS: Cover fuzzer reproducer tests within 'Device Fuzzing'=0D tests/qtest: Only run fuzz-virtio-scsi when virtio-scsi is available=0D= tests/qtest: Only run fuzz-megasas-test if megasas device is available=0D= =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/571d413b5da6...56b89f455894= =0D From MAILER-DAEMON Thu Mar 18 06:11:47 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMpd5-0005Uy-HX for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 06:11:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51190) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMpco-0005Sy-LB for qemu-commits@nongnu.org; Thu, 18 Mar 2021 06:11:30 -0400 Received: from out-24.smtp.github.com ([192.30.252.207]:44807) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMpck-0002Eq-N5 for qemu-commits@nongnu.org; Thu, 18 Mar 2021 06:11:30 -0400 Received: from github.com (hubbernetes-node-0e39672.ac4-iad.github.net [10.52.210.21]) by smtp.github.com (Postfix) with ESMTPA id 07CE8600C07 for ; Thu, 18 Mar 2021 03:11:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616062286; bh=2bCdJItlZF6uluAJVsp7wqS8AvstHg4lZXJDdT1+wWU=; h=Date:From:To:Subject:From; b=OPiMPvUplUfiKK+lJeMKlKD1GJPkbwf66UkBreiD0yJb/a6Ds9SHq9U/Z7rnYDHBE Uf1kOqXb4L3B+GtYSA7OOMRNVeee+XCyXqrn6uP7VsVpplK9lY2Y2k56yIICIqbwME eorJ8JMqXDO7UoqVuWzysxcW7ggfR0jOwxS6tN5Q= Date: Thu, 18 Mar 2021 03:11:26 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 935cac: mac_via: switch rtc pram trace-events to use hex r... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 10:11:37 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 935cac9c80cdbf2654d5aaa37524941967e44c98 https://github.com/qemu/qemu/commit/935cac9c80cdbf2654d5aaa37524941967e44c98 Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/trace-events Log Message: ----------- mac_via: switch rtc pram trace-events to use hex rather than decimal for addresses Since all the documentation uses the hex offsets, this makes it much easier to see what is going on. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20210311100505.22596-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: 9d39ec70f41450766cf1c41ad992706fd6507307 https://github.com/qemu/qemu/commit/9d39ec70f41450766cf1c41ad992706fd6507307 Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/mac_via.c Log Message: ----------- mac_via: fix up adb_via_receive() trace events The use of the post-increment operator on adb_data_in_index meant that the trace-event was accidentally displaying the next byte in the incoming ADB data buffer rather than the current byte. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20210311100505.22596-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: add4dbfbfc426719d16bdfdc4e5be1a5138ceccd https://github.com/qemu/qemu/commit/add4dbfbfc426719d16bdfdc4e5be1a5138ceccd Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/mac_via.c Log Message: ----------- mac_via: allow long accesses to VIA registers The MacOS SCSI driver uses a long access to read the VIA registers rather than just a single byte during the message out phase. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20210311100505.22596-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: a67ffaf0ec0b38f62fa27e09c69b00518e5945f3 https://github.com/qemu/qemu/commit/a67ffaf0ec0b38f62fa27e09c69b00518e5945f3 Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/mac_via.c Log Message: ----------- mac_via: don't re-inject ADB response when switching to IDLE state The current workaround for the Linux ADB state machine in kernels < 5.6 switching the VIA back to IDLE state between send and receive modes is to re-inject the first byte of the response in the IDLE state, and then force the state machine into generating an autopoll reply. In fact what is happening is much simpler: analysis of traces from a real Quadra suggest that the existing data is returned as the first autopoll response rather than generating an immediate response starting whilst still in IDLE state. Update the ADB receive code to work in the same way, which allows the re-injection code to be completely removed from adb_via_receive() and for adb_via_poll() to be simplified accordingly. Signed-off-by: Mark Cave-Ayland Message-Id: <20210311100505.22596-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: 4c8f4ab41c3a057430c789cc7bf3f6dfaa00dc18 https://github.com/qemu/qemu/commit/4c8f4ab41c3a057430c789cc7bf3f6dfaa00dc18 Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/mac_via.c M include/hw/misc/mac_via.h Log Message: ----------- mac_via: rename VBL timer to 60Hz timer According to the "Guide To The Macintosh Family Hardware", the 60Hz VIA1 timer on newer Macs such as the Quadra only exists for compatibility with old software and is no longer synced to the VBL interval. Rename the VBL timer to 60Hz timer to emphasise this and to prevent confusion when the real VBL interrupt (now handled as a NuBus slot interrupt) is added in future. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: BALATON Zoltan Message-Id: <20210311100505.22596-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: 82ff856fe7f6bc6dfba2c60ba6ec24e045696562 https://github.com/qemu/qemu/commit/82ff856fe7f6bc6dfba2c60ba6ec24e045696562 Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/mac_via.c Log Message: ----------- mac_via: fix 60Hz VIA1 timer interval The 60Hz timer is initialised using timer_new_ns() meaning that the timer interval should be measured in ns, and therefore its period is a thousand times too short. Use a define for the 60Hz timer period taking the more precise value as documented in the Guide To The Macintosh Family Hardware. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: BALATON Zoltan Message-Id: <20210311100505.22596-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: 30ca7eddc486646fa19c9619fcf233ceaa65e28c https://github.com/qemu/qemu/commit/30ca7eddc486646fa19c9619fcf233ceaa65e28c Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/mac_via.c Log Message: ----------- mac_via: remove VIA1 timer optimisations The original implementation of the Macintosh VIA devices in commit 6dca62a000 "hw/m68k: add VIA support" used timer optimisations to reduce high CPU usage on the host when booting Linux. These optimisations worked by waiting until VIA1 port B was accessed before re-arming the timers. The MacOS toolbox ROM constantly writes to VIA1 port B which calls via1_one_second_update() and via1_sixty_hz_update() to calculate the new expiry time, causing the timers to constantly reset and never fire. The effect of this is that the Ticks (0x16a) global variable holding the number of 60Hz timer ticks since reset is never incremented by the interrupt causing time to stand still. Whilst the code was introduced as a performance optimisation, it is likely that the high CPU usage was actually caused by the incorrect 60Hz timer interval fixed in the previous patch. Remove the optimisation to keep everything simple and enable the MacOS toolbox ROM to start keeping time. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20210311100505.22596-8-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: b12498fc575f2ad30f09fe78badc7fef526e2d76 https://github.com/qemu/qemu/commit/b12498fc575f2ad30f09fe78badc7fef526e2d76 Author: Peter Maydell Date: 2021-03-18 (Thu, 18 Mar 2021) Changed paths: M hw/misc/mac_via.c M hw/misc/trace-events M include/hw/misc/mac_via.h Log Message: ----------- Merge remote-tracking branch 'remotes/vivier/tags/q800-for-6.0-pull-request' into staging q800 pull request 20210316 Several fixes for mac_via needed for future support of MacOS ROM # gpg: Signature made Tue 16 Mar 2021 21:14:42 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier " [full] # gpg: aka "Laurent Vivier " [full] # gpg: aka "Laurent Vivier (Red Hat) " [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/q800-for-6.0-pull-request: mac_via: remove VIA1 timer optimisations mac_via: fix 60Hz VIA1 timer interval mac_via: rename VBL timer to 60Hz timer mac_via: don't re-inject ADB response when switching to IDLE state mac_via: allow long accesses to VIA registers mac_via: fix up adb_via_receive() trace events mac_via: switch rtc pram trace-events to use hex rather than decimal for addresses Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/56b89f455894...b12498fc575f From MAILER-DAEMON Thu Mar 18 07:16:11 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMqdP-0000wy-GM for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 07:16:11 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40194) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMqdN-0000wC-Fs for qemu-commits@nongnu.org; Thu, 18 Mar 2021 07:16:10 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:42553 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMqbQ-0001sn-E5 for qemu-commits@nongnu.org; Thu, 18 Mar 2021 07:16:08 -0400 Received: from github.com (hubbernetes-node-6ff4093.va3-iad.github.net [10.48.119.52]) by smtp.github.com (Postfix) with ESMTPA id 8AB735C0CEB for ; Thu, 18 Mar 2021 04:14:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616066047; bh=W4AYWf3D0ldq/wVgTFKhbxJLk8DrJExtSbnYS2kIJPs=; h=Date:From:To:Subject:From; b=pjv1DoQk9533aok6tnK+VFuhVEtSivOjGPvcVyQsx5HYjmNJ5DXKkCde/8JwdIFgO ONNhzCFI2vWmooIKFVjGjXLzM9PKffFjifO0PcowQ1E1bB+Id841hfCn7tsRinaH/J zk2BKjbl03P+5Pvebp5rZ4iIbS90FlRyhrNGe+Uc= Date: Thu, 18 Mar 2021 04:14:07 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com Subject: [Qemu-commits] [qemu/qemu] 935cac: mac_via: switch rtc pram trace-events to use hex r... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 11:16:10 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 935cac9c80cdbf2654d5aaa37524941967e44c98 https://github.com/qemu/qemu/commit/935cac9c80cdbf2654d5aaa37524941967e44c98 Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/trace-events Log Message: ----------- mac_via: switch rtc pram trace-events to use hex rather than decimal for addresses Since all the documentation uses the hex offsets, this makes it much easier to see what is going on. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20210311100505.22596-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: 9d39ec70f41450766cf1c41ad992706fd6507307 https://github.com/qemu/qemu/commit/9d39ec70f41450766cf1c41ad992706fd6507307 Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/mac_via.c Log Message: ----------- mac_via: fix up adb_via_receive() trace events The use of the post-increment operator on adb_data_in_index meant that the trace-event was accidentally displaying the next byte in the incoming ADB data buffer rather than the current byte. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20210311100505.22596-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: add4dbfbfc426719d16bdfdc4e5be1a5138ceccd https://github.com/qemu/qemu/commit/add4dbfbfc426719d16bdfdc4e5be1a5138ceccd Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/mac_via.c Log Message: ----------- mac_via: allow long accesses to VIA registers The MacOS SCSI driver uses a long access to read the VIA registers rather than just a single byte during the message out phase. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20210311100505.22596-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: a67ffaf0ec0b38f62fa27e09c69b00518e5945f3 https://github.com/qemu/qemu/commit/a67ffaf0ec0b38f62fa27e09c69b00518e5945f3 Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/mac_via.c Log Message: ----------- mac_via: don't re-inject ADB response when switching to IDLE state The current workaround for the Linux ADB state machine in kernels < 5.6 switching the VIA back to IDLE state between send and receive modes is to re-inject the first byte of the response in the IDLE state, and then force the state machine into generating an autopoll reply. In fact what is happening is much simpler: analysis of traces from a real Quadra suggest that the existing data is returned as the first autopoll response rather than generating an immediate response starting whilst still in IDLE state. Update the ADB receive code to work in the same way, which allows the re-injection code to be completely removed from adb_via_receive() and for adb_via_poll() to be simplified accordingly. Signed-off-by: Mark Cave-Ayland Message-Id: <20210311100505.22596-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: 4c8f4ab41c3a057430c789cc7bf3f6dfaa00dc18 https://github.com/qemu/qemu/commit/4c8f4ab41c3a057430c789cc7bf3f6dfaa00dc18 Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/mac_via.c M include/hw/misc/mac_via.h Log Message: ----------- mac_via: rename VBL timer to 60Hz timer According to the "Guide To The Macintosh Family Hardware", the 60Hz VIA1 timer on newer Macs such as the Quadra only exists for compatibility with old software and is no longer synced to the VBL interval. Rename the VBL timer to 60Hz timer to emphasise this and to prevent confusion when the real VBL interrupt (now handled as a NuBus slot interrupt) is added in future. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: BALATON Zoltan Message-Id: <20210311100505.22596-6-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: 82ff856fe7f6bc6dfba2c60ba6ec24e045696562 https://github.com/qemu/qemu/commit/82ff856fe7f6bc6dfba2c60ba6ec24e045696562 Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/mac_via.c Log Message: ----------- mac_via: fix 60Hz VIA1 timer interval The 60Hz timer is initialised using timer_new_ns() meaning that the timer interval should be measured in ns, and therefore its period is a thousand times too short. Use a define for the 60Hz timer period taking the more precise value as documented in the Guide To The Macintosh Family Hardware. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Reviewed-by: BALATON Zoltan Message-Id: <20210311100505.22596-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: 30ca7eddc486646fa19c9619fcf233ceaa65e28c https://github.com/qemu/qemu/commit/30ca7eddc486646fa19c9619fcf233ceaa65e28c Author: Mark Cave-Ayland Date: 2021-03-16 (Tue, 16 Mar 2021) Changed paths: M hw/misc/mac_via.c Log Message: ----------- mac_via: remove VIA1 timer optimisations The original implementation of the Macintosh VIA devices in commit 6dca62a000 "hw/m68k: add VIA support" used timer optimisations to reduce high CPU usage on the host when booting Linux. These optimisations worked by waiting until VIA1 port B was accessed before re-arming the timers. The MacOS toolbox ROM constantly writes to VIA1 port B which calls via1_one_second_update() and via1_sixty_hz_update() to calculate the new expiry time, causing the timers to constantly reset and never fire. The effect of this is that the Ticks (0x16a) global variable holding the number of 60Hz timer ticks since reset is never incremented by the interrupt causing time to stand still. Whilst the code was introduced as a performance optimisation, it is likely that the high CPU usage was actually caused by the incorrect 60Hz timer interval fixed in the previous patch. Remove the optimisation to keep everything simple and enable the MacOS toolbox ROM to start keeping time. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laurent Vivier Message-Id: <20210311100505.22596-8-mark.cave-ayland@ilande.co.uk> Signed-off-by: Laurent Vivier Commit: b12498fc575f2ad30f09fe78badc7fef526e2d76 https://github.com/qemu/qemu/commit/b12498fc575f2ad30f09fe78badc7fef526e2d76 Author: Peter Maydell Date: 2021-03-18 (Thu, 18 Mar 2021) Changed paths: M hw/misc/mac_via.c M hw/misc/trace-events M include/hw/misc/mac_via.h Log Message: ----------- Merge remote-tracking branch 'remotes/vivier/tags/q800-for-6.0-pull-request' into staging q800 pull request 20210316 Several fixes for mac_via needed for future support of MacOS ROM # gpg: Signature made Tue 16 Mar 2021 21:14:42 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier " [full] # gpg: aka "Laurent Vivier " [full] # gpg: aka "Laurent Vivier (Red Hat) " [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/q800-for-6.0-pull-request: mac_via: remove VIA1 timer optimisations mac_via: fix 60Hz VIA1 timer interval mac_via: rename VBL timer to 60Hz timer mac_via: don't re-inject ADB response when switching to IDLE state mac_via: allow long accesses to VIA registers mac_via: fix up adb_via_receive() trace events mac_via: switch rtc pram trace-events to use hex rather than decimal for addresses Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/56b89f455894...b12498fc575f From MAILER-DAEMON Thu Mar 18 07:28:05 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMqov-0000Jg-2i for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 07:28:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43632) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMqop-0000Hf-TL for qemu-commits@nongnu.org; Thu, 18 Mar 2021 07:28:00 -0400 Received: from out-20.smtp.github.com ([192.30.252.203]:58045) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMqok-0000ly-NS for qemu-commits@nongnu.org; Thu, 18 Mar 2021 07:27:59 -0400 Received: from github.com (hubbernetes-node-a0ec7a8.va3-iad.github.net [10.48.18.66]) by smtp.github.com (Postfix) with ESMTPA id ED30CE0854 for ; Thu, 18 Mar 2021 04:27:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616066873; bh=gUlLqfbrixUGvRf1WR0YwKrrlIS4KYPzs46uA1SE3TY=; h=Date:From:To:Subject:From; b=XTlMIYWavDbh/U7qoLBPLmBFlZuHSPKLdXzRIBIXUY67e31p/s2AJUJJe/H7QZm9P IwwRjm7gu54Z7gatzVwMr/LeicutB6lVxfOH5IsW8tI+w948wfdhHHslkpvMZ0vzhs sFB8xQQABJAl+RQAxx1C0mkDevbYP9F2efAu+ApU= Date: Thu, 18 Mar 2021 04:27:52 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.203; envelope-from=noreply@github.com; helo=out-20.smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 27e7de: qga: Correct loop count in qmp_guest_get_vcpus() X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 11:28:01 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 27e7de3ca740cffbdfc06e9cb138f3339d14dda7=0D https://github.com/qemu/qemu/commit/27e7de3ca740cffbdfc06e9cb138f33= 39d14dda7=0D Author: Lin Ma =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M qga/commands-posix.c=0D =0D Log Message:=0D -----------=0D qga: Correct loop count in qmp_guest_get_vcpus()=0D =0D The guest-get-vcpus returns incorrect vcpu info in case we hotunplug vcpu= s(not=0D the last one).=0D e.g.:=0D A VM has 4 VCPUs: cpu0 + 3 hotunpluggable online vcpus(cpu1, cpu2 and cpu= 3).=0D Hotunplug cpu2, Now only cpu0, cpu1 and cpu3 are present & online.=0D =0D ./qmp-shell /tmp/qmp-monitor.sock=0D (QEMU) query-hotpluggable-cpus=0D {"return": [=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 3}, "vcpus-count": = 1,=0D "qom-path": "/machine/peripheral/cpu3", "type": "host-x86_64-cpu"},=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 2}, "vcpus-count": = 1,=0D "qom-path": "/machine/peripheral/cpu2", "type": "host-x86_64-cpu"},=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 1}, "vcpus-count": = 1,=0D "qom-path": "/machine/peripheral/cpu1", "type": "host-x86_64-cpu"},=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 0}, "vcpus-count": = 1,=0D "qom-path": "/machine/unattached/device[0]", "type": "host-x86_64-cpu"}=0D= ]}=0D =0D (QEMU) device_del id=3Dcpu2=0D {"return": {}}=0D =0D (QEMU) query-hotpluggable-cpus=0D {"return": [=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 3}, "vcpus-count": = 1,=0D "qom-path": "/machine/peripheral/cpu3", "type": "host-x86_64-cpu"},=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 2}, "vcpus-count": = 1,=0D "type": "host-x86_64-cpu"},=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 1}, "vcpus-count": = 1,=0D "qom-path": "/machine/peripheral/cpu1", "type": "host-x86_64-cpu"},=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 0}, "vcpus-count": = 1,=0D "qom-path": "/machine/unattached/device[0]", "type": "host-x86_64-cpu"}=0D= ]}=0D =0D Before:=0D ./qmp-shell -N /tmp/qmp-ga.sock=0D Welcome to the QMP low-level shell!=0D Connected=0D (QEMU) guest-get-vcpus=0D {"return": [=0D {"online": true, "can-offline": false, "logical-id": 0},=0D {"online": true, "can-offline": true, "logical-id": 1}]}=0D =0D After:=0D ./qmp-shell -N /tmp/qmp-ga.sock=0D Welcome to the QMP low-level shell!=0D Connected=0D (QEMU) guest-get-vcpus=0D {"return": [=0D {"online": true, "can-offline": false, "logical-id": 0},=0D {"online": true, "can-offline": true, "logical-id": 1},=0D {"online": true, "can-offline": true, "logical-id": 3}]}=0D =0D Signed-off-by: Lin Ma =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D *fix build breakage by using PRId64 for sscanf=0D Signed-off-by: Michael Roth =0D =0D =0D Commit: 0697e9ed291c67f7f65f7006f4917cc6177ac180=0D https://github.com/qemu/qemu/commit/0697e9ed291c67f7f65f7006f4917cc= 6177ac180=0D Author: AlexChen =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M qga/channel-win32.c=0D M qga/commands-posix.c=0D M qga/commands-win32.c=0D M qga/commands.c=0D M qga/main.c=0D =0D Log Message:=0D -----------=0D qga: Add spaces around operator=0D =0D Reported-by: Euler Robot =0D Signed-off-by: AlexChen =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D *fix 80+ char violation while we're here=0D *fix w32 build breakage from changing INVALID_SET_FILE_POINTER=0D definition from a cast to a subtraction=0D Signed-off-by: Michael Roth =0D =0D =0D Commit: 55b53dabb5b40a797a0c6ec60965da188382d64c=0D https://github.com/qemu/qemu/commit/55b53dabb5b40a797a0c6ec60965da1= 88382d64c=0D Author: AlexChen =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M qga/commands-win32.c=0D =0D Log Message:=0D -----------=0D qga: Delete redundant spaces=0D =0D Reported-by: Euler Robot =0D Signed-off-by: AlexChen =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Michael Roth =0D =0D =0D Commit: aaaed19972e6cd9ca4d3618d3bdf9ddae780d7b8=0D https://github.com/qemu/qemu/commit/aaaed19972e6cd9ca4d3618d3bdf9dd= ae780d7b8=0D Author: AlexChen =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M qga/main.c=0D =0D Log Message:=0D -----------=0D qga: Open brace '{' following struct go on the same=0D =0D Reported-by: Euler Robot =0D Signed-off-by: AlexChen =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Michael Roth =0D =0D =0D Commit: 86dc17d4d01eb836ee56eb9435c6d63a72d3c7d4=0D https://github.com/qemu/qemu/commit/86dc17d4d01eb836ee56eb9435c6d63= a72d3c7d4=0D Author: AlexChen =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M qga/main.c=0D =0D Log Message:=0D -----------=0D qga: Switch and case should be at the same indent=0D =0D Reported-by: Euler Robot =0D Signed-off-by: AlexChen =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Michael Roth =0D =0D =0D Commit: c98939daeca3beb21c85560acede8d3529e363d9=0D https://github.com/qemu/qemu/commit/c98939daeca3beb21c85560acede8d3= 529e363d9=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M include/qapi/qmp/dispatch.h=0D M qapi/qmp-dispatch.c=0D M qapi/qmp-registry.c=0D M qga/main.c=0D =0D Log Message:=0D -----------=0D qga: return a more explicit error on why a command is disabled=0D =0D qmp_disable_command() now takes an optional error string to return a=0D more explicit error message.=0D =0D Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=3D1928806=0D =0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D *fix up 80+ char line=0D Signed-off-by: Michael Roth =0D =0D =0D Commit: 7286d62d4e259be8cecf3dc2deea80ecc14489a5=0D https://github.com/qemu/qemu/commit/7286d62d4e259be8cecf3dc2deea80e= cc14489a5=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M include/qapi/qmp/dispatch.h=0D M qapi/qmp-dispatch.c=0D M qapi/qmp-registry.c=0D M qga/channel-win32.c=0D M qga/commands-posix.c=0D M qga/commands-win32.c=0D M qga/commands.c=0D M qga/main.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2021-03-16-t= ag' into staging=0D =0D qemu-ga patch queue for soft-freeze=0D =0D * fix guest-get-vcpus reporting after vcpu unplug=0D * coding style fix-ups=0D * report a reason for disabled commands=0D =0D # gpg: Signature made Wed 17 Mar 2021 03:12:41 GMT=0D # gpg: using RSA key CEACC9E15534EBABB82D3FA03353C9CEF108B= 584=0D # gpg: Good signature from "Michael Roth " [full]=0D # gpg: aka "Michael Roth " [full]=0D # gpg: aka "Michael Roth " [fu= ll]=0D # Primary key fingerprint: CEAC C9E1 5534 EBAB B82D 3FA0 3353 C9CE F108 = B584=0D =0D * remotes/mdroth/tags/qga-pull-2021-03-16-tag:=0D qga: return a more explicit error on why a command is disabled=0D qga: Switch and case should be at the same indent=0D qga: Open brace '{' following struct go on the same=0D qga: Delete redundant spaces=0D qga: Add spaces around operator=0D qga: Correct loop count in qmp_guest_get_vcpus()=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/b12498fc575f...7286d62d4e25= =0D From MAILER-DAEMON Thu Mar 18 10:17:00 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMtSN-00041N-Kl for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 10:17:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54136) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMtSH-00040z-8M for qemu-commits@nongnu.org; Thu, 18 Mar 2021 10:16:53 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:58253 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMtSA-0005cC-AL for qemu-commits@nongnu.org; Thu, 18 Mar 2021 10:16:50 -0400 Received: from github.com (hubbernetes-node-3fca6d7.va3-iad.github.net [10.48.118.75]) by smtp.github.com (Postfix) with ESMTPA id A41575C05A6 for ; Thu, 18 Mar 2021 07:16:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616077005; bh=ooZaLzn3QMIxoGidBPNXDF4Rrkq/eIj975GeF0j53pY=; h=Date:From:To:Subject:From; b=dHKm9mJ/oaxYy8pytC5FueMwiy5NkVDUMKt9VHNKiGQF0xxzPseG4YVLHjGOCwDa9 8CW+7KuE1jErlnBQYI3ntpl+rSHTlj5RM4fafDq+0veYTgXp1Etbz+C868PMkzjnXo W3MSCe3cxdHi97NhmzrA7m5ZdLNgkV7NY7g2PDMQ= Date: Thu, 18 Mar 2021 07:16:45 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 27e7de: qga: Correct loop count in qmp_guest_get_vcpus() X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 14:16:53 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 27e7de3ca740cffbdfc06e9cb138f3339d14dda7=0D https://github.com/qemu/qemu/commit/27e7de3ca740cffbdfc06e9cb138f33= 39d14dda7=0D Author: Lin Ma =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M qga/commands-posix.c=0D =0D Log Message:=0D -----------=0D qga: Correct loop count in qmp_guest_get_vcpus()=0D =0D The guest-get-vcpus returns incorrect vcpu info in case we hotunplug vcpu= s(not=0D the last one).=0D e.g.:=0D A VM has 4 VCPUs: cpu0 + 3 hotunpluggable online vcpus(cpu1, cpu2 and cpu= 3).=0D Hotunplug cpu2, Now only cpu0, cpu1 and cpu3 are present & online.=0D =0D ./qmp-shell /tmp/qmp-monitor.sock=0D (QEMU) query-hotpluggable-cpus=0D {"return": [=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 3}, "vcpus-count": = 1,=0D "qom-path": "/machine/peripheral/cpu3", "type": "host-x86_64-cpu"},=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 2}, "vcpus-count": = 1,=0D "qom-path": "/machine/peripheral/cpu2", "type": "host-x86_64-cpu"},=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 1}, "vcpus-count": = 1,=0D "qom-path": "/machine/peripheral/cpu1", "type": "host-x86_64-cpu"},=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 0}, "vcpus-count": = 1,=0D "qom-path": "/machine/unattached/device[0]", "type": "host-x86_64-cpu"}=0D= ]}=0D =0D (QEMU) device_del id=3Dcpu2=0D {"return": {}}=0D =0D (QEMU) query-hotpluggable-cpus=0D {"return": [=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 3}, "vcpus-count": = 1,=0D "qom-path": "/machine/peripheral/cpu3", "type": "host-x86_64-cpu"},=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 2}, "vcpus-count": = 1,=0D "type": "host-x86_64-cpu"},=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 1}, "vcpus-count": = 1,=0D "qom-path": "/machine/peripheral/cpu1", "type": "host-x86_64-cpu"},=0D {"props": {"core-id": 0, "thread-id": 0, "socket-id": 0}, "vcpus-count": = 1,=0D "qom-path": "/machine/unattached/device[0]", "type": "host-x86_64-cpu"}=0D= ]}=0D =0D Before:=0D ./qmp-shell -N /tmp/qmp-ga.sock=0D Welcome to the QMP low-level shell!=0D Connected=0D (QEMU) guest-get-vcpus=0D {"return": [=0D {"online": true, "can-offline": false, "logical-id": 0},=0D {"online": true, "can-offline": true, "logical-id": 1}]}=0D =0D After:=0D ./qmp-shell -N /tmp/qmp-ga.sock=0D Welcome to the QMP low-level shell!=0D Connected=0D (QEMU) guest-get-vcpus=0D {"return": [=0D {"online": true, "can-offline": false, "logical-id": 0},=0D {"online": true, "can-offline": true, "logical-id": 1},=0D {"online": true, "can-offline": true, "logical-id": 3}]}=0D =0D Signed-off-by: Lin Ma =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D *fix build breakage by using PRId64 for sscanf=0D Signed-off-by: Michael Roth =0D =0D =0D Commit: 0697e9ed291c67f7f65f7006f4917cc6177ac180=0D https://github.com/qemu/qemu/commit/0697e9ed291c67f7f65f7006f4917cc= 6177ac180=0D Author: AlexChen =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M qga/channel-win32.c=0D M qga/commands-posix.c=0D M qga/commands-win32.c=0D M qga/commands.c=0D M qga/main.c=0D =0D Log Message:=0D -----------=0D qga: Add spaces around operator=0D =0D Reported-by: Euler Robot =0D Signed-off-by: AlexChen =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D *fix 80+ char violation while we're here=0D *fix w32 build breakage from changing INVALID_SET_FILE_POINTER=0D definition from a cast to a subtraction=0D Signed-off-by: Michael Roth =0D =0D =0D Commit: 55b53dabb5b40a797a0c6ec60965da188382d64c=0D https://github.com/qemu/qemu/commit/55b53dabb5b40a797a0c6ec60965da1= 88382d64c=0D Author: AlexChen =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M qga/commands-win32.c=0D =0D Log Message:=0D -----------=0D qga: Delete redundant spaces=0D =0D Reported-by: Euler Robot =0D Signed-off-by: AlexChen =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Michael Roth =0D =0D =0D Commit: aaaed19972e6cd9ca4d3618d3bdf9ddae780d7b8=0D https://github.com/qemu/qemu/commit/aaaed19972e6cd9ca4d3618d3bdf9dd= ae780d7b8=0D Author: AlexChen =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M qga/main.c=0D =0D Log Message:=0D -----------=0D qga: Open brace '{' following struct go on the same=0D =0D Reported-by: Euler Robot =0D Signed-off-by: AlexChen =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Michael Roth =0D =0D =0D Commit: 86dc17d4d01eb836ee56eb9435c6d63a72d3c7d4=0D https://github.com/qemu/qemu/commit/86dc17d4d01eb836ee56eb9435c6d63= a72d3c7d4=0D Author: AlexChen =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M qga/main.c=0D =0D Log Message:=0D -----------=0D qga: Switch and case should be at the same indent=0D =0D Reported-by: Euler Robot =0D Signed-off-by: AlexChen =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Michael Roth =0D =0D =0D Commit: c98939daeca3beb21c85560acede8d3529e363d9=0D https://github.com/qemu/qemu/commit/c98939daeca3beb21c85560acede8d3= 529e363d9=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M include/qapi/qmp/dispatch.h=0D M qapi/qmp-dispatch.c=0D M qapi/qmp-registry.c=0D M qga/main.c=0D =0D Log Message:=0D -----------=0D qga: return a more explicit error on why a command is disabled=0D =0D qmp_disable_command() now takes an optional error string to return a=0D more explicit error message.=0D =0D Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=3D1928806=0D =0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D *fix up 80+ char line=0D Signed-off-by: Michael Roth =0D =0D =0D Commit: 7286d62d4e259be8cecf3dc2deea80ecc14489a5=0D https://github.com/qemu/qemu/commit/7286d62d4e259be8cecf3dc2deea80e= cc14489a5=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M include/qapi/qmp/dispatch.h=0D M qapi/qmp-dispatch.c=0D M qapi/qmp-registry.c=0D M qga/channel-win32.c=0D M qga/commands-posix.c=0D M qga/commands-win32.c=0D M qga/commands.c=0D M qga/main.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/mdroth/tags/qga-pull-2021-03-16-t= ag' into staging=0D =0D qemu-ga patch queue for soft-freeze=0D =0D * fix guest-get-vcpus reporting after vcpu unplug=0D * coding style fix-ups=0D * report a reason for disabled commands=0D =0D # gpg: Signature made Wed 17 Mar 2021 03:12:41 GMT=0D # gpg: using RSA key CEACC9E15534EBABB82D3FA03353C9CEF108B= 584=0D # gpg: Good signature from "Michael Roth " [full]=0D # gpg: aka "Michael Roth " [full]=0D # gpg: aka "Michael Roth " [fu= ll]=0D # Primary key fingerprint: CEAC C9E1 5534 EBAB B82D 3FA0 3353 C9CE F108 = B584=0D =0D * remotes/mdroth/tags/qga-pull-2021-03-16-tag:=0D qga: return a more explicit error on why a command is disabled=0D qga: Switch and case should be at the same indent=0D qga: Open brace '{' following struct go on the same=0D qga: Delete redundant spaces=0D qga: Add spaces around operator=0D qga: Correct loop count in qmp_guest_get_vcpus()=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/b12498fc575f...7286d62d4e25= =0D From MAILER-DAEMON Thu Mar 18 10:17:03 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMtSQ-00042j-Ti for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 10:17:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54146) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMtSN-00041G-0V for qemu-commits@nongnu.org; Thu, 18 Mar 2021 10:16:59 -0400 Received: from out-27.smtp.github.com ([192.30.252.210]:51073) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMtSD-0005dI-9H for qemu-commits@nongnu.org; Thu, 18 Mar 2021 10:16:58 -0400 Received: from github.com (hubbernetes-node-f76f347.ash1-iad.github.net [10.56.116.30]) by smtp.github.com (Postfix) with ESMTPA id C9D96900F7F for ; Thu, 18 Mar 2021 07:16:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616077006; bh=STf78sWWPRyOV2pWFjTQ36otsxOcb7ftTsLQClXKjUE=; h=Date:From:To:Subject:From; b=CPB8kfgBhz2VW/aUHrPrdRcbqo4+yPaPGoS6nFN4s3568wFT7MqzRqQ5hujr/+gnx SOHNOWeGQ10tSHR4H+lV1dRn8yL0F56yNTTOovS4qGaGffmmZIym8fDn6yRgdf9fSD TpByyleUFuEVczZ0XB3wC+2S/lrga6e6pvP//fRs= Date: Thu, 18 Mar 2021 07:16:46 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.210; envelope-from=noreply@github.com; helo=out-27.smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 1cf544: tests/acceptance: Print expected message on wait_f... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 14:16:59 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 1cf54443d9c5d6e8ce28dc299f2a22c7e3458bb4=0D https://github.com/qemu/qemu/commit/1cf54443d9c5d6e8ce28dc299f2a22c= 7e3458bb4=0D Author: Wainer dos Santos Moschetta =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/avocado_qemu/__init__.py=0D =0D Log Message:=0D -----------=0D tests/acceptance: Print expected message on wait_for_console_pattern=0D= =0D For the sake of improve debuggability of tests which use the=0D wait_for_console_pattern(), this changed the _console_interaction() so th= at=0D the expected message is printed if the test fail.=0D =0D Signed-off-by: Wainer dos Santos Moschetta =0D Message-Id: <20210309153507.1905682-1-wainersm@redhat.com>=0D Reviewed-by: Joel Stanley =0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Cleber Rosa =0D Tested-by: Cleber Rosa =0D Signed-off-by: Cleber Rosa =0D =0D =0D Commit: f9cc00346d3e572ac128bc9b932b02c512490271=0D https://github.com/qemu/qemu/commit/f9cc00346d3e572ac128bc9b932b02c= 512490271=0D Author: Hyman =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/migration/guestperf/engine.py=0D =0D Log Message:=0D -----------=0D tests/migration: fix unix socket batch migration=0D =0D when execute the following test command:=0D "guestperf-batch.py --dst-host localhost --transport unix ..."=0D test aborts and error message as the following be throwed:=0D "launching VM Failed: [Errno 98] Address already in use".=0D =0D The reason is that batch script use the same monitor socket=0D in all test cases and do not remove the socket file. The second=0D migration test will launch vm use the same socket file as=0D the first, so we get the error message. To fix it, just remove=0D the socket file each time we have done the migration test.=0D =0D Signed-off-by: Hyman =0D Message-Id: =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Cleber Rosa =0D =0D =0D Commit: cd093d5a2c92c34657c328affcb6ce5413cd205e=0D https://github.com/qemu/qemu/commit/cd093d5a2c92c34657c328affcb6ce5= 413cd205e=0D Author: Willian Rampazzo =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/avocado_qemu/__init__.py=0D =0D Log Message:=0D -----------=0D avocado_qemu: add exec_command function=0D =0D Sometimes a test needs to send a command to a console without waiting=0D for a pattern as a result, or the command issued do not produce any kind=0D= of output, like, for example, a `mount` command.=0D =0D This introduces the `exec_command` function to the avocado_qemu,=0D allowing the test to send a command to the console without the need to=0D= match a pattern produced as a result.=0D =0D Signed-off-by: Willian Rampazzo =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Wainer dos Santos Moschetta =0D Reviewed-by: Cleber Rosa =0D Tested-by: Cleber Rosa =0D Message-Id: <20210303205320.146047-2-willianr@redhat.com>=0D Signed-off-by: Cleber Rosa =0D =0D =0D Commit: 9afa1766dd48203d7fe27c88b16ef755361b5b78=0D https://github.com/qemu/qemu/commit/9afa1766dd48203d7fe27c88b16ef75= 5361b5b78=0D Author: Jagannathan Raman =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D A tests/acceptance/multiprocess.py=0D =0D Log Message:=0D -----------=0D tests: Add functional test for out-of-process device emulation=0D =0D Runs the Avocado acceptance test to check if a=0D remote lsi53c895a device gets identified by the guest.=0D =0D Signed-off-by: Elena Ufimtseva =0D Signed-off-by: John G Johnson =0D Signed-off-by: Jagannathan Raman =0D Reviewed-by: Wainer dos Santos Moschetta =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D [WR: Refactored code]=0D Signed-off-by: Willian Rampazzo =0D Tested-by: Wainer dos Santos Moschetta =0D Reviewed-by: Stefan Hajnoczi =0D Reviewed-by: Cleber Rosa =0D Tested-by: Cleber Rosa =0D Message-Id: <20210303205320.146047-3-willianr@redhat.com>=0D Signed-off-by: Cleber Rosa =0D =0D =0D Commit: affc55e761ea4c96b9b2de582d813787a317aeda=0D https://github.com/qemu/qemu/commit/affc55e761ea4c96b9b2de582d81378= 7a317aeda=0D Author: Pavel Dovgalyuk =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/avocado_qemu/__init__.py=0D =0D Log Message:=0D -----------=0D tests/acceptance: linux-related tests fix=0D =0D This patch allows cloudinit images download when ssh=0D key is not specified.=0D =0D Signed-off-by: Pavel Dovgalyuk =0D Message-Id: <161373266228.1608713.7614311331725780044.stgit@pasha-ThinkPa= d-X280>=0D Reviewed-by: Willian Rampazzo =0D Signed-off-by: Cleber Rosa =0D =0D =0D Commit: 1db136a29ce8594b693938ab8e788d8bcef54770=0D https://github.com/qemu/qemu/commit/1db136a29ce8594b693938ab8e788d8= bcef54770=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/avocado_qemu/__init__.py=0D A tests/acceptance/multiprocess.py=0D M tests/migration/guestperf/engine.py=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/cleber-gitlab/tags/python-next-pu= ll-request' into staging=0D =0D Acceptance and Python Test Improvements=0D =0D Small collection of Acceptance and Python tests/improvements.=0D =0D # gpg: Signature made Wed 17 Mar 2021 03:22:47 GMT=0D # gpg: using RSA key 7ABB96EB8B46B94D5E0FE9BB657E8D33A5F20= 9F3=0D # gpg: Good signature from "Cleber Rosa " [marginal]=0D= # gpg: WARNING: This key is not certified with sufficiently trusted signa= tures!=0D # gpg: It is not certain that the signature belongs to the owner= .=0D # Primary key fingerprint: 7ABB 96EB 8B46 B94D 5E0F E9BB 657E 8D33 A5F2 = 09F3=0D =0D * remotes/cleber-gitlab/tags/python-next-pull-request:=0D tests/acceptance: linux-related tests fix=0D tests: Add functional test for out-of-process device emulation=0D avocado_qemu: add exec_command function=0D tests/migration: fix unix socket batch migration=0D tests/acceptance: Print expected message on wait_for_console_pattern=0D= =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/7286d62d4e25...1db136a29ce8= =0D From MAILER-DAEMON Thu Mar 18 10:58:10 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMu6E-00047x-0T for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 10:58:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35830) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMu6C-00044n-Dd for qemu-commits@nongnu.org; Thu, 18 Mar 2021 10:58:08 -0400 Received: from out-18.smtp.github.com ([192.30.252.201]:48293 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMu69-0003tu-PM for qemu-commits@nongnu.org; Thu, 18 Mar 2021 10:58:07 -0400 Received: from github.com (hubbernetes-node-1dae5e1.va3-iad.github.net [10.48.19.12]) by smtp.github.com (Postfix) with ESMTPA id 35AE2340AD5 for ; Thu, 18 Mar 2021 07:58:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616079485; bh=WwjaPFM42KyEs3IMW+RKvmHgdowuEZ6G0/QmaB992sQ=; h=Date:From:To:Subject:From; b=pl8oUOotcIea7CFlA6Pi7aGJu3oMcJvGV7WGkmjsACwjoDOvB7T84/FGf5AX424VN NGuBVlkeGE+0rO5M70AJXOKYxdzpeh3xCyLxe7/YPp5b7CeUdjuRMUMDEh2b2mnaPa Nr2qx/p17Qv3iSYqGgQIo4+9otsyYSj5n/UVFf/s= Date: Thu, 18 Mar 2021 07:58:05 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 1cf544: tests/acceptance: Print expected message on wait_f... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 14:58:08 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 1cf54443d9c5d6e8ce28dc299f2a22c7e3458bb4=0D https://github.com/qemu/qemu/commit/1cf54443d9c5d6e8ce28dc299f2a22c= 7e3458bb4=0D Author: Wainer dos Santos Moschetta =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/avocado_qemu/__init__.py=0D =0D Log Message:=0D -----------=0D tests/acceptance: Print expected message on wait_for_console_pattern=0D= =0D For the sake of improve debuggability of tests which use the=0D wait_for_console_pattern(), this changed the _console_interaction() so th= at=0D the expected message is printed if the test fail.=0D =0D Signed-off-by: Wainer dos Santos Moschetta =0D Message-Id: <20210309153507.1905682-1-wainersm@redhat.com>=0D Reviewed-by: Joel Stanley =0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Cleber Rosa =0D Tested-by: Cleber Rosa =0D Signed-off-by: Cleber Rosa =0D =0D =0D Commit: f9cc00346d3e572ac128bc9b932b02c512490271=0D https://github.com/qemu/qemu/commit/f9cc00346d3e572ac128bc9b932b02c= 512490271=0D Author: Hyman =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/migration/guestperf/engine.py=0D =0D Log Message:=0D -----------=0D tests/migration: fix unix socket batch migration=0D =0D when execute the following test command:=0D "guestperf-batch.py --dst-host localhost --transport unix ..."=0D test aborts and error message as the following be throwed:=0D "launching VM Failed: [Errno 98] Address already in use".=0D =0D The reason is that batch script use the same monitor socket=0D in all test cases and do not remove the socket file. The second=0D migration test will launch vm use the same socket file as=0D the first, so we get the error message. To fix it, just remove=0D the socket file each time we have done the migration test.=0D =0D Signed-off-by: Hyman =0D Message-Id: =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Cleber Rosa =0D =0D =0D Commit: cd093d5a2c92c34657c328affcb6ce5413cd205e=0D https://github.com/qemu/qemu/commit/cd093d5a2c92c34657c328affcb6ce5= 413cd205e=0D Author: Willian Rampazzo =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/avocado_qemu/__init__.py=0D =0D Log Message:=0D -----------=0D avocado_qemu: add exec_command function=0D =0D Sometimes a test needs to send a command to a console without waiting=0D for a pattern as a result, or the command issued do not produce any kind=0D= of output, like, for example, a `mount` command.=0D =0D This introduces the `exec_command` function to the avocado_qemu,=0D allowing the test to send a command to the console without the need to=0D= match a pattern produced as a result.=0D =0D Signed-off-by: Willian Rampazzo =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Wainer dos Santos Moschetta =0D Reviewed-by: Cleber Rosa =0D Tested-by: Cleber Rosa =0D Message-Id: <20210303205320.146047-2-willianr@redhat.com>=0D Signed-off-by: Cleber Rosa =0D =0D =0D Commit: 9afa1766dd48203d7fe27c88b16ef755361b5b78=0D https://github.com/qemu/qemu/commit/9afa1766dd48203d7fe27c88b16ef75= 5361b5b78=0D Author: Jagannathan Raman =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D A tests/acceptance/multiprocess.py=0D =0D Log Message:=0D -----------=0D tests: Add functional test for out-of-process device emulation=0D =0D Runs the Avocado acceptance test to check if a=0D remote lsi53c895a device gets identified by the guest.=0D =0D Signed-off-by: Elena Ufimtseva =0D Signed-off-by: John G Johnson =0D Signed-off-by: Jagannathan Raman =0D Reviewed-by: Wainer dos Santos Moschetta =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D [WR: Refactored code]=0D Signed-off-by: Willian Rampazzo =0D Tested-by: Wainer dos Santos Moschetta =0D Reviewed-by: Stefan Hajnoczi =0D Reviewed-by: Cleber Rosa =0D Tested-by: Cleber Rosa =0D Message-Id: <20210303205320.146047-3-willianr@redhat.com>=0D Signed-off-by: Cleber Rosa =0D =0D =0D Commit: affc55e761ea4c96b9b2de582d813787a317aeda=0D https://github.com/qemu/qemu/commit/affc55e761ea4c96b9b2de582d81378= 7a317aeda=0D Author: Pavel Dovgalyuk =0D Date: 2021-03-16 (Tue, 16 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/avocado_qemu/__init__.py=0D =0D Log Message:=0D -----------=0D tests/acceptance: linux-related tests fix=0D =0D This patch allows cloudinit images download when ssh=0D key is not specified.=0D =0D Signed-off-by: Pavel Dovgalyuk =0D Message-Id: <161373266228.1608713.7614311331725780044.stgit@pasha-ThinkPa= d-X280>=0D Reviewed-by: Willian Rampazzo =0D Signed-off-by: Cleber Rosa =0D =0D =0D Commit: 1db136a29ce8594b693938ab8e788d8bcef54770=0D https://github.com/qemu/qemu/commit/1db136a29ce8594b693938ab8e788d8= bcef54770=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M tests/acceptance/avocado_qemu/__init__.py=0D A tests/acceptance/multiprocess.py=0D M tests/migration/guestperf/engine.py=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/cleber-gitlab/tags/python-next-pu= ll-request' into staging=0D =0D Acceptance and Python Test Improvements=0D =0D Small collection of Acceptance and Python tests/improvements.=0D =0D # gpg: Signature made Wed 17 Mar 2021 03:22:47 GMT=0D # gpg: using RSA key 7ABB96EB8B46B94D5E0FE9BB657E8D33A5F20= 9F3=0D # gpg: Good signature from "Cleber Rosa " [marginal]=0D= # gpg: WARNING: This key is not certified with sufficiently trusted signa= tures!=0D # gpg: It is not certain that the signature belongs to the owner= .=0D # Primary key fingerprint: 7ABB 96EB 8B46 B94D 5E0F E9BB 657E 8D33 A5F2 = 09F3=0D =0D * remotes/cleber-gitlab/tags/python-next-pull-request:=0D tests/acceptance: linux-related tests fix=0D tests: Add functional test for out-of-process device emulation=0D avocado_qemu: add exec_command function=0D tests/migration: fix unix socket batch migration=0D tests/acceptance: Print expected message on wait_for_console_pattern=0D= =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/7286d62d4e25...1db136a29ce8= =0D From MAILER-DAEMON Thu Mar 18 11:03:50 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMuBh-0007YR-Sd for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 11:03:49 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37534) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMuBg-0007VL-61 for qemu-commits@nongnu.org; Thu, 18 Mar 2021 11:03:48 -0400 Received: from out-26.smtp.github.com ([192.30.252.209]:33249 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMuBd-0007EF-9P for qemu-commits@nongnu.org; Thu, 18 Mar 2021 11:03:47 -0400 Received: from github.com (hubbernetes-node-ad70431.ash1-iad.github.net [10.56.105.61]) by smtp.github.com (Postfix) with ESMTPA id 7850B5E08FB for ; Thu, 18 Mar 2021 08:03:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616079824; bh=NQZc668rHqPujklv+a+1bABYuTgxPLUPiOibXkqIYNY=; h=Date:From:To:Subject:From; b=jOBcydZclbclno9Wt1G4yrT4fRcymwfDC41eEaZ4ljqQvk9Eg0ITBShKW1OL0NR8k fIGAz5qAJ0lGwI3OvBxQHDdLnI4Pjn2KJTJn+xDVVDx1zyEwzCkL+J1tp06qWMfa3r CF8UKBtDE8LxHBiRSl3w3bbbHOC+RyWUGhcrct18= Date: Thu, 18 Mar 2021 08:03:44 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 6567ba: utils: Use fixed-point arithmetic in qemu_strtosz X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 15:03:48 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 6567ba0c60d6e1366f7ac6e77665730e657e8eca=0D https://github.com/qemu/qemu/commit/6567ba0c60d6e1366f7ac6e77665730= e657e8eca=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/test-cutils.c=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D utils: Use fixed-point arithmetic in qemu_strtosz=0D =0D Once we've parsed the fractional value, extract it into an integral=0D 64-bit fraction. Perform the scaling with integer arithmetic, and=0D simplify the overflow detection.=0D =0D Reviewed-by: Eric Blake =0D Signed-off-by: Richard Henderson =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210315185117.1986240-2-richard.henderson@linaro.org>=0D =0D =0D Commit: 279d0a5b1e6b81f88f95b889de8356a331ea8380=0D https://github.com/qemu/qemu/commit/279d0a5b1e6b81f88f95b889de8356a= 331ea8380=0D Author: Matthias Weckbecker =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tests/plugin/meson.build=0D A tests/plugin/syscall.c=0D =0D Log Message:=0D -----------=0D plugins: new syscalls plugin=0D =0D This commit adds a new syscalls plugin that displays the syscalls=0D as they are executed and returned. This plugin outputs the number=0D of the syscall as well as the syscall return value.=0D =0D Works in *-user only.=0D =0D Essentially, this commit restores:=0D =0D https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg00846.html=0D =0D by using the new QEMU plugin API.=0D =0D Signed-off-by: Matthias Weckbecker =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20200812115816.4454-1-matthias@weckbecker.name>=0D Message-Id: <20210312172821.31647-2-alex.bennee@linaro.org>=0D =0D =0D Commit: 787148bf928a54b5cc86f5b434f9399e9737679c=0D https://github.com/qemu/qemu/commit/787148bf928a54b5cc86f5b434f9399= e9737679c=0D Author: Aaron Lindsay =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M contrib/plugins/hotpages.c=0D M contrib/plugins/hwprofile.c=0D M include/qemu/qemu-plugin.h=0D M plugins/api.c=0D =0D Log Message:=0D -----------=0D plugins: Expose physical addresses instead of device offsets=0D =0D This allows plugins to query for full virtual-to-physical address=0D translation for a given `qemu_plugin_hwaddr` and stops exposing the=0D offset within the device itself. As this change breaks the API,=0D QEMU_PLUGIN_VERSION is incremented.=0D =0D Signed-off-by: Aaron Lindsay =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210309202802.211756-1-aaron@os.amperecomputing.com>=0D Message-Id: <20210312172821.31647-3-alex.bennee@linaro.org>=0D =0D =0D Commit: 841dcc0813155087f11ef02790f9650a1e199c5b=0D https://github.com/qemu/qemu/commit/841dcc0813155087f11ef02790f9650= a1e199c5b=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: expand kernel-doc for qemu_info_t=0D =0D It seems kernel-doc struggles a bit with typedef structs but with=0D enough encouragement we can get something out of it.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-5-alex.bennee@linaro.org>=0D =0D =0D Commit: 1caa8d9f2c38464242f9cf366cdc25b78d8308b4=0D https://github.com/qemu/qemu/commit/1caa8d9f2c38464242f9cf366cdc25b= 78d8308b4=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: cleanup kernel-doc for qemu_plugin_install=0D =0D kernel-doc doesn't like multiple Note sections. Also add an explicit=0D Return.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-6-alex.bennee@linaro.org>=0D =0D =0D Commit: c4f19122d998c875363ab42adf491a416ae79ed0=0D https://github.com/qemu/qemu/commit/c4f19122d998c875363ab42adf491a4= 16ae79ed0=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: expand the callback typedef kernel-docs=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-7-alex.bennee@linaro.org>=0D =0D =0D Commit: 83b9c2bfa426fcb20bc826f6940ad00d2307e4d2=0D https://github.com/qemu/qemu/commit/83b9c2bfa426fcb20bc826f6940ad00= d2307e4d2=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: expand the typedef kernel-docs for translation=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-8-alex.bennee@linaro.org>=0D =0D =0D Commit: a40d3819e6917454311f06c0b00e7210e3025825=0D https://github.com/qemu/qemu/commit/a40d3819e6917454311f06c0b00e721= 0e3025825=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: add qemu_plugin_cb_flags to kernel-doc=0D =0D Also add a note to explain currently they are unused.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-9-alex.bennee@linaro.org>=0D =0D =0D Commit: fd6744a49527ed18dc6cef15d801c7964f652e3c=0D https://github.com/qemu/qemu/commit/fd6744a49527ed18dc6cef15d801c79= 64f652e3c=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: add qemu_plugin_id_t to kernel-doc=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-10-alex.bennee@linaro.org>=0D =0D =0D Commit: 8bc9a4d46db6a6ec88a35c44a0efbd5eae222124=0D https://github.com/qemu/qemu/commit/8bc9a4d46db6a6ec88a35c44a0efbd5= eae222124=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: expand inline exec kernel-doc documentation.=0D =0D Remove the extraneous @cb parameter and document the non-atomic nature=0D= of the INLINE_ADD_U64 operation.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-11-alex.bennee@linaro.org>=0D =0D =0D Commit: 8affbacb06cc06c70fa2a3a2e585b93e6b113bb7=0D https://github.com/qemu/qemu/commit/8affbacb06cc06c70fa2a3a2e585b93= e6b113bb7=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: expand kernel-doc for instruction query and instrumentation=0D= =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-12-alex.bennee@linaro.org>=0D =0D =0D Commit: fc292a7e7c455e89d775f631d0e00ccd1231600b=0D https://github.com/qemu/qemu/commit/fc292a7e7c455e89d775f631d0e00cc= d1231600b=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: expand kernel-doc for memory query and instrumentation=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-13-alex.bennee@linaro.org>=0D =0D =0D Commit: a2b88169777f8651427757e3407f0c10f2ef336f=0D https://github.com/qemu/qemu/commit/a2b88169777f8651427757e3407f0c1= 0f2ef336f=0D Author: Yonggang Luo =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M plugins/api.c=0D =0D Log Message:=0D -----------=0D plugins: getting qemu_plugin_get_hwaddr only expose one function protot= ype=0D =0D This is used for counting how much function are export to qemu plugin.=0D= =0D Signed-off-by: Yonggang Luo =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alex Benn=C3=A9e =0D Message-Id: <20201013002806.1447-2-luoyonggang@gmail.com>=0D Message-Id: <20210312172821.31647-14-alex.bennee@linaro.org>=0D =0D =0D Commit: 38c4101deba795214b5b4d6ce2826fd050ce1a9d=0D https://github.com/qemu/qemu/commit/38c4101deba795214b5b4d6ce2826fd= 050ce1a9d=0D Author: Yonggang Luo =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: Fixes typo in qemu-plugin.h=0D =0D Getting the comment consistence with the function name=0D =0D Signed-off-by: Yonggang Luo =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20201013002806.1447-3-luoyonggang@gmail.com>=0D Message-Id: <20210312172821.31647-15-alex.bennee@linaro.org>=0D =0D =0D Commit: 9e7118023fda7c29016038e2292d4d14129b63da=0D https://github.com/qemu/qemu/commit/9e7118023fda7c29016038e2292d4d1= 4129b63da=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M hw/core/Kconfig=0D M hw/core/meson.build=0D =0D Log Message:=0D -----------=0D hw/core: Only build guest-loader if libfdt is available=0D =0D Add a Kconfig entry for guest-loader so we can optionally deselect=0D it (default is built in), and add a Meson dependency on libfdt.=0D =0D This fixes when building with --disable-fdt:=0D =0D /usr/bin/ld: libcommon.fa.p/hw_core_guest-loader.c.o: in function `load= er_insert_platform_data':=0D hw/core/guest-loader.c:56: undefined reference to `qemu_fdt_add_subnode= '=0D /usr/bin/ld: hw/core/guest-loader.c:57: undefined reference to `qemu_fd= t_setprop'=0D /usr/bin/ld: hw/core/guest-loader.c:61: undefined reference to `qemu_fd= t_setprop_string_array'=0D /usr/bin/ld: hw/core/guest-loader.c:68: undefined reference to `qemu_fd= t_setprop_string'=0D /usr/bin/ld: hw/core/guest-loader.c:74: undefined reference to `qemu_fd= t_setprop_string_array'=0D collect2: error: ld returned 1 exit status=0D =0D Fixes: a33ff6d2c6b ("hw/core: implement a guest-loader to support static = hypervisor guests")=0D Reported-by: Christian Borntraeger =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Christian Borntraeger =0D Reviewed-by: Alistair Francis =0D Message-Id: <20210315170439.2868903-1-philmd@redhat.com>=0D Signed-off-by: Alex Benn=C3=A9e =0D =0D =0D Commit: 6e71c36557ed41017e634ae392fa80f03ced7fa1=0D https://github.com/qemu/qemu/commit/6e71c36557ed41017e634ae392fa80f= 03ced7fa1=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M contrib/plugins/hotpages.c=0D M contrib/plugins/hwprofile.c=0D M hw/core/Kconfig=0D M hw/core/meson.build=0D M include/qemu/qemu-plugin.h=0D M plugins/api.c=0D M tests/plugin/meson.build=0D A tests/plugin/syscall.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/stsquad/tags/pull-misc-6.0-update= s-170321-2' into staging=0D =0D Final fixes for 6.0=0D =0D - plugins physical address changes=0D - syscall tracking plugin=0D - plugin kernel-doc comments (without integration)=0D - libfdt build fix for guest-loader=0D =0D # gpg: Signature made Wed 17 Mar 2021 07:19:23 GMT=0D # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2= A44=0D # gpg: Good signature from "Alex Benn=C3=A9e (Master Work Key) " [full]=0D # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E = 2A44=0D =0D * remotes/stsquad/tags/pull-misc-6.0-updates-170321-2:=0D hw/core: Only build guest-loader if libfdt is available=0D plugins: Fixes typo in qemu-plugin.h=0D plugins: getting qemu_plugin_get_hwaddr only expose one function protot= ype=0D plugins: expand kernel-doc for memory query and instrumentation=0D plugins: expand kernel-doc for instruction query and instrumentation=0D= plugins: expand inline exec kernel-doc documentation.=0D plugins: add qemu_plugin_id_t to kernel-doc=0D plugins: add qemu_plugin_cb_flags to kernel-doc=0D plugins: expand the typedef kernel-docs for translation=0D plugins: expand the callback typedef kernel-docs=0D plugins: cleanup kernel-doc for qemu_plugin_install=0D plugins: expand kernel-doc for qemu_info_t=0D plugins: Expose physical addresses instead of device offsets=0D plugins: new syscalls plugin=0D utils: Use fixed-point arithmetic in qemu_strtosz=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/1db136a29ce8...6e71c36557ed= =0D From MAILER-DAEMON Thu Mar 18 13:11:25 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMwBB-00023o-KI for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 13:11:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42650) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMwB9-00022D-JO for qemu-commits@nongnu.org; Thu, 18 Mar 2021 13:11:23 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:33259) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMwB5-0000VP-Bs for qemu-commits@nongnu.org; Thu, 18 Mar 2021 13:11:22 -0400 Received: from github.com (hubbernetes-node-d903bc2.ash1-iad.github.net [10.56.122.56]) by smtp.github.com (Postfix) with ESMTPA id 970A9900768 for ; Thu, 18 Mar 2021 10:11:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616087478; bh=f4KCpXKgI/Vugfrn85hDODB2KP0q9owVbWQpuyY60Ug=; h=Date:From:To:Subject:From; b=LWDrdf4gNOVwvnGhHUboxzPFTxEQupBjcLelcHGbtWThcUqw1VBKv1rO4q91SxMpM jtKCLH1XD0jjLrLjFulCAsD1mMtUqM6I+Dutu/OnJPShuYTnfAnEoj1HttkAcUnd4k Tn9nVrot/D8wPWkrxRvpakRY5xwWTz4mOLX9KAQk= Date: Thu, 18 Mar 2021 10:11:18 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -46 X-Spam_score: -4.7 X-Spam_bar: ---- X-Spam_report: (-4.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 6567ba: utils: Use fixed-point arithmetic in qemu_strtosz X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 17:11:23 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 6567ba0c60d6e1366f7ac6e77665730e657e8eca=0D https://github.com/qemu/qemu/commit/6567ba0c60d6e1366f7ac6e77665730= e657e8eca=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/test-cutils.c=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D utils: Use fixed-point arithmetic in qemu_strtosz=0D =0D Once we've parsed the fractional value, extract it into an integral=0D 64-bit fraction. Perform the scaling with integer arithmetic, and=0D simplify the overflow detection.=0D =0D Reviewed-by: Eric Blake =0D Signed-off-by: Richard Henderson =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210315185117.1986240-2-richard.henderson@linaro.org>=0D =0D =0D Commit: 279d0a5b1e6b81f88f95b889de8356a331ea8380=0D https://github.com/qemu/qemu/commit/279d0a5b1e6b81f88f95b889de8356a= 331ea8380=0D Author: Matthias Weckbecker =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tests/plugin/meson.build=0D A tests/plugin/syscall.c=0D =0D Log Message:=0D -----------=0D plugins: new syscalls plugin=0D =0D This commit adds a new syscalls plugin that displays the syscalls=0D as they are executed and returned. This plugin outputs the number=0D of the syscall as well as the syscall return value.=0D =0D Works in *-user only.=0D =0D Essentially, this commit restores:=0D =0D https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg00846.html=0D =0D by using the new QEMU plugin API.=0D =0D Signed-off-by: Matthias Weckbecker =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20200812115816.4454-1-matthias@weckbecker.name>=0D Message-Id: <20210312172821.31647-2-alex.bennee@linaro.org>=0D =0D =0D Commit: 787148bf928a54b5cc86f5b434f9399e9737679c=0D https://github.com/qemu/qemu/commit/787148bf928a54b5cc86f5b434f9399= e9737679c=0D Author: Aaron Lindsay =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M contrib/plugins/hotpages.c=0D M contrib/plugins/hwprofile.c=0D M include/qemu/qemu-plugin.h=0D M plugins/api.c=0D =0D Log Message:=0D -----------=0D plugins: Expose physical addresses instead of device offsets=0D =0D This allows plugins to query for full virtual-to-physical address=0D translation for a given `qemu_plugin_hwaddr` and stops exposing the=0D offset within the device itself. As this change breaks the API,=0D QEMU_PLUGIN_VERSION is incremented.=0D =0D Signed-off-by: Aaron Lindsay =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210309202802.211756-1-aaron@os.amperecomputing.com>=0D Message-Id: <20210312172821.31647-3-alex.bennee@linaro.org>=0D =0D =0D Commit: 841dcc0813155087f11ef02790f9650a1e199c5b=0D https://github.com/qemu/qemu/commit/841dcc0813155087f11ef02790f9650= a1e199c5b=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: expand kernel-doc for qemu_info_t=0D =0D It seems kernel-doc struggles a bit with typedef structs but with=0D enough encouragement we can get something out of it.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-5-alex.bennee@linaro.org>=0D =0D =0D Commit: 1caa8d9f2c38464242f9cf366cdc25b78d8308b4=0D https://github.com/qemu/qemu/commit/1caa8d9f2c38464242f9cf366cdc25b= 78d8308b4=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: cleanup kernel-doc for qemu_plugin_install=0D =0D kernel-doc doesn't like multiple Note sections. Also add an explicit=0D Return.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-6-alex.bennee@linaro.org>=0D =0D =0D Commit: c4f19122d998c875363ab42adf491a416ae79ed0=0D https://github.com/qemu/qemu/commit/c4f19122d998c875363ab42adf491a4= 16ae79ed0=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: expand the callback typedef kernel-docs=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-7-alex.bennee@linaro.org>=0D =0D =0D Commit: 83b9c2bfa426fcb20bc826f6940ad00d2307e4d2=0D https://github.com/qemu/qemu/commit/83b9c2bfa426fcb20bc826f6940ad00= d2307e4d2=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: expand the typedef kernel-docs for translation=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-8-alex.bennee@linaro.org>=0D =0D =0D Commit: a40d3819e6917454311f06c0b00e7210e3025825=0D https://github.com/qemu/qemu/commit/a40d3819e6917454311f06c0b00e721= 0e3025825=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: add qemu_plugin_cb_flags to kernel-doc=0D =0D Also add a note to explain currently they are unused.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-9-alex.bennee@linaro.org>=0D =0D =0D Commit: fd6744a49527ed18dc6cef15d801c7964f652e3c=0D https://github.com/qemu/qemu/commit/fd6744a49527ed18dc6cef15d801c79= 64f652e3c=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: add qemu_plugin_id_t to kernel-doc=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-10-alex.bennee@linaro.org>=0D =0D =0D Commit: 8bc9a4d46db6a6ec88a35c44a0efbd5eae222124=0D https://github.com/qemu/qemu/commit/8bc9a4d46db6a6ec88a35c44a0efbd5= eae222124=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: expand inline exec kernel-doc documentation.=0D =0D Remove the extraneous @cb parameter and document the non-atomic nature=0D= of the INLINE_ADD_U64 operation.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-11-alex.bennee@linaro.org>=0D =0D =0D Commit: 8affbacb06cc06c70fa2a3a2e585b93e6b113bb7=0D https://github.com/qemu/qemu/commit/8affbacb06cc06c70fa2a3a2e585b93= e6b113bb7=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: expand kernel-doc for instruction query and instrumentation=0D= =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-12-alex.bennee@linaro.org>=0D =0D =0D Commit: fc292a7e7c455e89d775f631d0e00ccd1231600b=0D https://github.com/qemu/qemu/commit/fc292a7e7c455e89d775f631d0e00cc= d1231600b=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: expand kernel-doc for memory query and instrumentation=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210312172821.31647-13-alex.bennee@linaro.org>=0D =0D =0D Commit: a2b88169777f8651427757e3407f0c10f2ef336f=0D https://github.com/qemu/qemu/commit/a2b88169777f8651427757e3407f0c1= 0f2ef336f=0D Author: Yonggang Luo =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M plugins/api.c=0D =0D Log Message:=0D -----------=0D plugins: getting qemu_plugin_get_hwaddr only expose one function protot= ype=0D =0D This is used for counting how much function are export to qemu plugin.=0D= =0D Signed-off-by: Yonggang Luo =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Alex Benn=C3=A9e =0D Message-Id: <20201013002806.1447-2-luoyonggang@gmail.com>=0D Message-Id: <20210312172821.31647-14-alex.bennee@linaro.org>=0D =0D =0D Commit: 38c4101deba795214b5b4d6ce2826fd050ce1a9d=0D https://github.com/qemu/qemu/commit/38c4101deba795214b5b4d6ce2826fd= 050ce1a9d=0D Author: Yonggang Luo =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/qemu-plugin.h=0D =0D Log Message:=0D -----------=0D plugins: Fixes typo in qemu-plugin.h=0D =0D Getting the comment consistence with the function name=0D =0D Signed-off-by: Yonggang Luo =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20201013002806.1447-3-luoyonggang@gmail.com>=0D Message-Id: <20210312172821.31647-15-alex.bennee@linaro.org>=0D =0D =0D Commit: 9e7118023fda7c29016038e2292d4d14129b63da=0D https://github.com/qemu/qemu/commit/9e7118023fda7c29016038e2292d4d1= 4129b63da=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M hw/core/Kconfig=0D M hw/core/meson.build=0D =0D Log Message:=0D -----------=0D hw/core: Only build guest-loader if libfdt is available=0D =0D Add a Kconfig entry for guest-loader so we can optionally deselect=0D it (default is built in), and add a Meson dependency on libfdt.=0D =0D This fixes when building with --disable-fdt:=0D =0D /usr/bin/ld: libcommon.fa.p/hw_core_guest-loader.c.o: in function `load= er_insert_platform_data':=0D hw/core/guest-loader.c:56: undefined reference to `qemu_fdt_add_subnode= '=0D /usr/bin/ld: hw/core/guest-loader.c:57: undefined reference to `qemu_fd= t_setprop'=0D /usr/bin/ld: hw/core/guest-loader.c:61: undefined reference to `qemu_fd= t_setprop_string_array'=0D /usr/bin/ld: hw/core/guest-loader.c:68: undefined reference to `qemu_fd= t_setprop_string'=0D /usr/bin/ld: hw/core/guest-loader.c:74: undefined reference to `qemu_fd= t_setprop_string_array'=0D collect2: error: ld returned 1 exit status=0D =0D Fixes: a33ff6d2c6b ("hw/core: implement a guest-loader to support static = hypervisor guests")=0D Reported-by: Christian Borntraeger =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Christian Borntraeger =0D Reviewed-by: Alistair Francis =0D Message-Id: <20210315170439.2868903-1-philmd@redhat.com>=0D Signed-off-by: Alex Benn=C3=A9e =0D =0D =0D Commit: 6e71c36557ed41017e634ae392fa80f03ced7fa1=0D https://github.com/qemu/qemu/commit/6e71c36557ed41017e634ae392fa80f= 03ced7fa1=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M contrib/plugins/hotpages.c=0D M contrib/plugins/hwprofile.c=0D M hw/core/Kconfig=0D M hw/core/meson.build=0D M include/qemu/qemu-plugin.h=0D M plugins/api.c=0D M tests/plugin/meson.build=0D A tests/plugin/syscall.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/stsquad/tags/pull-misc-6.0-update= s-170321-2' into staging=0D =0D Final fixes for 6.0=0D =0D - plugins physical address changes=0D - syscall tracking plugin=0D - plugin kernel-doc comments (without integration)=0D - libfdt build fix for guest-loader=0D =0D # gpg: Signature made Wed 17 Mar 2021 07:19:23 GMT=0D # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2= A44=0D # gpg: Good signature from "Alex Benn=C3=A9e (Master Work Key) " [full]=0D # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E = 2A44=0D =0D * remotes/stsquad/tags/pull-misc-6.0-updates-170321-2:=0D hw/core: Only build guest-loader if libfdt is available=0D plugins: Fixes typo in qemu-plugin.h=0D plugins: getting qemu_plugin_get_hwaddr only expose one function protot= ype=0D plugins: expand kernel-doc for memory query and instrumentation=0D plugins: expand kernel-doc for instruction query and instrumentation=0D= plugins: expand inline exec kernel-doc documentation.=0D plugins: add qemu_plugin_id_t to kernel-doc=0D plugins: add qemu_plugin_cb_flags to kernel-doc=0D plugins: expand the typedef kernel-docs for translation=0D plugins: expand the callback typedef kernel-docs=0D plugins: cleanup kernel-doc for qemu_plugin_install=0D plugins: expand kernel-doc for qemu_info_t=0D plugins: Expose physical addresses instead of device offsets=0D plugins: new syscalls plugin=0D utils: Use fixed-point arithmetic in qemu_strtosz=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/1db136a29ce8...6e71c36557ed= =0D From MAILER-DAEMON Thu Mar 18 13:17:02 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMwGb-0007OT-NJ for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 13:17:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:43894) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMwGa-0007Mk-3U for qemu-commits@nongnu.org; Thu, 18 Mar 2021 13:17:00 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:59477 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMwGX-0003AI-1E for qemu-commits@nongnu.org; Thu, 18 Mar 2021 13:16:59 -0400 Received: from github.com (hubbernetes-node-9a9ac37.va3-iad.github.net [10.48.123.13]) by smtp.github.com (Postfix) with ESMTPA id 751345C0401 for ; Thu, 18 Mar 2021 10:16:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616087816; bh=viDFdGaFyixuC5/dZPowYgkv71jZtxzx0QcaerTVifU=; h=Date:From:To:Subject:From; b=pZBkpj5Z9aQQd2HQRKAuEmpMNJxuZeKoW3Z6KjL0hSLCuJ4Ln04BWijCWaBoIL9R3 JEHvRuDkUtrbAJDuaUK8o12WYK1A8PC7u7mFq9HL8b4evIDVqRi+s0Ol2EbZ/zUcmG 1HaprdSFF1Vg0dlSv5hilTzfW0h1hr8pol1vWB2w= Date: Thu, 18 Mar 2021 10:16:56 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] dbcbda: tcg/tci: Remove ifdefs for TCG_TARGET_HAS_ext32[us... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 17:17:00 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: dbcbda2cd846ab70bb25418f246604d0b546505f=0D https://github.com/qemu/qemu/commit/dbcbda2cd846ab70bb25418f246604d= 0b546505f=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove ifdefs for TCG_TARGET_HAS_ext32[us]_i64=0D =0D These operations are always available under different names:=0D INDEX_op_ext_i32_i64 and INDEX_op_extu_i32_i64, so we remove=0D no code with the ifdef.=0D =0D Reviewed-by: Stefan Weil =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: adaa9a2f9a05211a432e521b0b6a9a7b10190cfd=0D https://github.com/qemu/qemu/commit/adaa9a2f9a05211a432e521b0b6a9a7= b10190cfd=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Rename tci_read_r to tci_read_rval=0D =0D In the next patches, we want to use tci_read_r to return=0D the raw register number. So rename the existing function,=0D which returns the register value, to tci_read_rval.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: cdd9799b2549e7482e81d1076bd41490e299c966=0D https://github.com/qemu/qemu/commit/cdd9799b2549e7482e81d1076bd4149= 0e299c966=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrs=0D =0D Begin splitting out functions that do pure argument decode,=0D without actually loading values from the register set.=0D =0D This means that decoding need not concern itself between=0D input and output registers. We can assert that the register=0D number is in range during decode, so that it is safe to=0D simply dereference from regs[] later.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: fc4a62f65cbd2d5d2c247ed4fbf64a05e6485859=0D https://github.com/qemu/qemu/commit/fc4a62f65cbd2d5d2c247ed4fbf64a0= 5e6485859=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: e85e4b8f959f6d03087dbc973a1201b894a1c62b=0D https://github.com/qemu/qemu/commit/e85e4b8f959f6d03087dbc973a1201b= 894a1c62b=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 963e9fa2bdde449ef9fe6b6f345d764d0d5901c2=0D https://github.com/qemu/qemu/commit/963e9fa2bdde449ef9fe6b6f345d764= d0d5901c2=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrrc=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: f28ca03ed5c452a5f81b1f4c84360a8bbdee617f=0D https://github.com/qemu/qemu/commit/f28ca03ed5c452a5f81b1f4c84360a8= bbdee617f=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_l=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 817cadd6ee952908aa46196ddb64522b2d6f58f2=0D https://github.com/qemu/qemu/commit/817cadd6ee952908aa46196ddb64522= b2d6f58f2=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrrrrc=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 5a0adf3490090250938031640faa0f571bdc898c=0D https://github.com/qemu/qemu/commit/5a0adf3490090250938031640faa0f5= 71bdc898c=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrcl and tci_args_rrrrcl=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: b95aa12ed2f4ed7405dade6af9d4fa6cc5128384=0D https://github.com/qemu/qemu/commit/b95aa12ed2f4ed7405dade6af9d4fa6= cc5128384=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_ri and tci_args_rI=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 2ed8a3819219d3e0d57ec3990760b9d9fcece00b=0D https://github.com/qemu/qemu/commit/2ed8a3819219d3e0d57ec3990760b9d= 9fcece00b=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Reuse tci_args_l for calls.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 158d38737bb4f23ef66b149e0897270dcaacfd12=0D https://github.com/qemu/qemu/commit/158d38737bb4f23ef66b149e0897270= dcaacfd12=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Reuse tci_args_l for exit_tb=0D =0D Do not emit a uint64_t, but a tcg_target_ulong, aka uintptr_t.=0D This reduces the size of the constant on 32-bit hosts.=0D The assert for label !=3D NULL has to be removed because that=0D is a valid value for exit_tb.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 1670a2b9bb3f109e87485385f05a641e3ada6c1c=0D https://github.com/qemu/qemu/commit/1670a2b9bb3f109e87485385f05a641= e3ada6c1c=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D M tcg/tci/tcg-target.c.inc=0D M tcg/tci/tcg-target.h=0D =0D Log Message:=0D -----------=0D tcg/tci: Reuse tci_args_l for goto_tb=0D =0D Convert to indirect jumps, as it's less complicated.=0D Then we just have a pointer to the tb address at which=0D the chain is stored, from which we read.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 120402b5cba8f305470102167956d50ed1e6608b=0D https://github.com/qemu/qemu/commit/120402b5cba8f305470102167956d50= ed1e6608b=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrrrrr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: cbe871313e7e65b4e65ac5616634337ec4d9f45c=0D https://github.com/qemu/qemu/commit/cbe871313e7e65b4e65ac5616634337= ec4d9f45c=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrrr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 79dd3a4f59e88129e6887ac970f2ed794504e5d7=0D https://github.com/qemu/qemu/commit/79dd3a4f59e88129e6887ac970f2ed7= 94504e5d7=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D M tcg/tci/tcg-target-con-set.h=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Clean up deposit operations=0D =0D Use the correct set of asserts during code generation.=0D We do not require the first input to overlap the output;=0D the existing interpreter already supported that.=0D =0D Split out tci_args_rrrbb in the translator.=0D Use the deposit32/64 functions rather than inline expansion.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 00e338faa0cc26c861e2d7b1b5116f2c76574045=0D https://github.com/qemu/qemu/commit/00e338faa0cc26c861e2d7b1b5116f2= c76574045=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Reduce qemu_ld/st TCGMemOpIdx operand to 32-bits=0D =0D We are currently using the "natural" size routine, which=0D uses 64-bits on a 64-bit host. The TCGMemOpIdx operand=0D has 11 bits, so we can safely reduce to 32-bits.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 63041ed25fac24b9b0271c6cbf5062f37a0e8c74=0D https://github.com/qemu/qemu/commit/63041ed25fac24b9b0271c6cbf5062f= 37a0e8c74=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_{rrm,rrrm,rrrrm}=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 92bc4fad82c1fa2d19b0e6f592a47511f256e15a=0D https://github.com/qemu/qemu/commit/92bc4fad82c1fa2d19b0e6f592a4751= 1f256e15a=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Hoist op_size checking into tci_args_*=0D =0D This performs the size check while reading the arguments,=0D which means that we don't have to arrange for it to be=0D done after the operation. Which tidies all of the branches.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 65f1b6cc9a902560e5fcd9688fe8ffe44004ad33=0D https://github.com/qemu/qemu/commit/65f1b6cc9a902560e5fcd9688fe8ffe= 44004ad33=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D M tcg/tci/tcg-target.h=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_disas=0D =0D This function is unused. It's not even the disassembler,=0D which is print_insn_tci, located in disas/tci.c.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 59964b4f98c74921d184d0d1119efcd055ce2881=0D https://github.com/qemu/qemu/commit/59964b4f98c74921d184d0d1119efcd= 055ce2881=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D R disas/tci.c=0D M include/tcg/tcg-opc.h=0D M meson.build=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Implement the disassembler properly=0D =0D Actually print arguments as opposed to simply the opcodes=0D and, uselessly, the argument counts. Reuse all of the helpers=0D developed as part of the interpreter.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: ae216c9747840f6365b97286e04fa3bc54e7ccd4=0D https://github.com/qemu/qemu/commit/ae216c9747840f6365b97286e04fa3b= c54e7ccd4=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Push opcode emit into each case=0D =0D We're about to split out bytecode output into helpers, but=0D we can't do that one at a time if tcg_out_op_t is being done=0D outside of the switch.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: fe8c47cbf6227bdae80fc644e6ae82285f775756=0D https://github.com/qemu/qemu/commit/fe8c47cbf6227bdae80fc644e6ae822= 85f775756=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrs=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: b9dcd21a25a4b9a317246a8b7206f3c50b0de8c4=0D https://github.com/qemu/qemu/commit/b9dcd21a25a4b9a317246a8b7206f3c= 50b0de8c4=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_l=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 7aa295c5d215e5a4774b683764a631b2c75b93e2=0D https://github.com/qemu/qemu/commit/7aa295c5d215e5a4774b683764a631b= 2c75b93e2=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_p=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: ffe86eb043551109af82eb458f7a51044d877024=0D https://github.com/qemu/qemu/commit/ffe86eb043551109af82eb458f7a510= 44d877024=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rr=0D =0D At the same time, validate the type argument in tcg_out_mov.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 549d039667b92f6ff86fac1948d61ac558026996=0D https://github.com/qemu/qemu/commit/549d039667b92f6ff86fac1948d61ac= 558026996=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: bd42124bee912ef82eb24c5c172526b6a911cf48=0D https://github.com/qemu/qemu/commit/bd42124bee912ef82eb24c5c172526b= 6a911cf48=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrrc=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 223abacdd91d8d6f31f2ae38ddfeae34baa44b35=0D https://github.com/qemu/qemu/commit/223abacdd91d8d6f31f2ae38ddfeae3= 4baa44b35=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrrrrc=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 37e112e82ab398f69af499c768c0329a6c4c2b03=0D https://github.com/qemu/qemu/commit/37e112e82ab398f69af499c768c0329= a6c4c2b03=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrrbb=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 723c2b5bc5ba973800a812fe030e656a9cee1a52=0D https://github.com/qemu/qemu/commit/723c2b5bc5ba973800a812fe030e656= a9cee1a52=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrcl=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: ab5b8a3fb41d035ea320ce85593ba505ea5305bc=0D https://github.com/qemu/qemu/commit/ab5b8a3fb41d035ea320ce85593ba50= 5ea5305bc=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrrrrr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: db492ebb91059b818d5b5ea5975d227e5c3c9bcc=0D https://github.com/qemu/qemu/commit/db492ebb91059b818d5b5ea5975d227= e5c3c9bcc=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrrr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 6dbf78c17a4fed12f97148e71d3700eb073dc08c=0D https://github.com/qemu/qemu/commit/6dbf78c17a4fed12f97148e71d3700e= b073dc08c=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrrrcl=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 6f00d7af75e66134ab7c5513016b8f9455518347=0D https://github.com/qemu/qemu/commit/6f00d7af75e66134ab7c5513016b8f9= 455518347=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm}=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 87713c04d19fc1e331e063b1f2d501091456c82e=0D https://github.com/qemu/qemu/commit/87713c04d19fc1e331e063b1f2d5010= 91456c82e=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_v=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 98f9b467b025f58e0cb1c8b0ae91b9b0d51ca85f=0D https://github.com/qemu/qemu/commit/98f9b467b025f58e0cb1c8b0ae91b9b= 0d51ca85f=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_r[iI]=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 5e8892db93f3fb6a7221f2d47f3c952a7e489737=0D https://github.com/qemu/qemu/commit/5e8892db93f3fb6a7221f2d47f3c952= a7e489737=0D Author: Miroslav Rezanina =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/aarch64/tcg-target.c.inc=0D M tcg/i386/tcg-target.c.inc=0D M tcg/mips/tcg-target.c.inc=0D M tcg/ppc/tcg-target.c.inc=0D M tcg/riscv/tcg-target.c.inc=0D M tcg/s390/tcg-target.c.inc=0D M tcg/tcg.c=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg: Fix prototypes for tcg_out_vec_op and tcg_out_op=0D =0D There are two different versions of prototype for tcg_out_op and=0D tcg_out_vec_op functions:=0D =0D 1) using const TCGArg *args and const int *const_args arguments=0D 2) using const TCGArg args[TCG_MAX_OP_ARGS] and const int=0D const_args[TCG_MAX_OP_ARGS] aguments.=0D =0D This duality causes warnings on GCC 11 and prevents build using=0D --enable-werror. As second version provides more information,=0D unify functions prototypes to this variant.=0D =0D Signed-off-by: Miroslav Rezanina =0D Message-Id: <20210312121418.139093-1-mrezanin@redhat.com>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 4083904bc9fe5da580f7ca397b1e828fbc322732=0D https://github.com/qemu/qemu/commit/4083904bc9fe5da580f7ca397b1e828= fbc322732=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D R disas/tci.c=0D M include/tcg/tcg-opc.h=0D M meson.build=0D M tcg/aarch64/tcg-target.c.inc=0D M tcg/i386/tcg-target.c.inc=0D M tcg/mips/tcg-target.c.inc=0D M tcg/ppc/tcg-target.c.inc=0D M tcg/riscv/tcg-target.c.inc=0D M tcg/s390/tcg-target.c.inc=0D M tcg/tcg.c=0D M tcg/tci.c=0D M tcg/tci/tcg-target-con-set.h=0D M tcg/tci/tcg-target.c.inc=0D M tcg/tci/tcg-target.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210317= ' into staging=0D =0D TCI argument extraction helpers and disassembler=0D TCG build fix for gcc 11=0D =0D # gpg: Signature made Wed 17 Mar 2021 15:29:47 GMT=0D # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E2= 15F=0D # gpg: issuer "richard.henderson@linaro.org"=0D # gpg: Good signature from "Richard Henderson " [full]=0D # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E = 215F=0D =0D * remotes/rth-gitlab/tags/pull-tcg-20210317: (38 commits)=0D tcg: Fix prototypes for tcg_out_vec_op and tcg_out_op=0D tcg/tci: Split out tcg_out_op_r[iI]=0D tcg/tci: Split out tcg_out_op_v=0D tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm}=0D tcg/tci: Split out tcg_out_op_rrrrcl=0D tcg/tci: Split out tcg_out_op_rrrr=0D tcg/tci: Split out tcg_out_op_rrrrrr=0D tcg/tci: Split out tcg_out_op_rrcl=0D tcg/tci: Split out tcg_out_op_rrrbb=0D tcg/tci: Split out tcg_out_op_rrrrrc=0D tcg/tci: Split out tcg_out_op_rrrc=0D tcg/tci: Split out tcg_out_op_rrr=0D tcg/tci: Split out tcg_out_op_rr=0D tcg/tci: Split out tcg_out_op_p=0D tcg/tci: Split out tcg_out_op_l=0D tcg/tci: Split out tcg_out_op_rrs=0D tcg/tci: Push opcode emit into each case=0D tcg/tci: Implement the disassembler properly=0D tcg/tci: Remove tci_disas=0D tcg/tci: Hoist op_size checking into tci_args_*=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/6e71c36557ed...4083904bc9fe= =0D From MAILER-DAEMON Thu Mar 18 15:01:16 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMxtU-0002z3-F5 for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 15:01:16 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:60386) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMxtS-0002vs-AA for qemu-commits@nongnu.org; Thu, 18 Mar 2021 15:01:14 -0400 Received: from out-22.smtp.github.com ([192.30.252.205]:59117 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMxtJ-0004WJ-Dn for qemu-commits@nongnu.org; Thu, 18 Mar 2021 15:01:13 -0400 Received: from github.com (hubbernetes-node-c9b2c67.ac4-iad.github.net [10.52.201.31]) by smtp.github.com (Postfix) with ESMTPA id 40A3A560401 for ; Thu, 18 Mar 2021 12:01:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616094064; bh=DG47Fm9/lipH42ey5MFnMag4KMrdFs50gdtm1AJeMyY=; h=Date:From:To:Subject:From; b=svkZKK4h1BocZuDPiyYc/wxOiJv/ej1tbXXngaYspg3w0cJxttIXXuYud16UqKOGv W8C6nCrGZvbNGM2kqGBbfDZW8iqMVcaIFw+NSpBjOa3YZw9OXPsoYrzCurce8F4zuc FIpx2r8G0wpgPd1i2nTzZhWCRt5X5bQHBPqezJnE= Date: Thu, 18 Mar 2021 12:01:04 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] dbcbda: tcg/tci: Remove ifdefs for TCG_TARGET_HAS_ext32[us... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 19:01:15 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: dbcbda2cd846ab70bb25418f246604d0b546505f=0D https://github.com/qemu/qemu/commit/dbcbda2cd846ab70bb25418f246604d= 0b546505f=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove ifdefs for TCG_TARGET_HAS_ext32[us]_i64=0D =0D These operations are always available under different names:=0D INDEX_op_ext_i32_i64 and INDEX_op_extu_i32_i64, so we remove=0D no code with the ifdef.=0D =0D Reviewed-by: Stefan Weil =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: adaa9a2f9a05211a432e521b0b6a9a7b10190cfd=0D https://github.com/qemu/qemu/commit/adaa9a2f9a05211a432e521b0b6a9a7= b10190cfd=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Rename tci_read_r to tci_read_rval=0D =0D In the next patches, we want to use tci_read_r to return=0D the raw register number. So rename the existing function,=0D which returns the register value, to tci_read_rval.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: cdd9799b2549e7482e81d1076bd41490e299c966=0D https://github.com/qemu/qemu/commit/cdd9799b2549e7482e81d1076bd4149= 0e299c966=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrs=0D =0D Begin splitting out functions that do pure argument decode,=0D without actually loading values from the register set.=0D =0D This means that decoding need not concern itself between=0D input and output registers. We can assert that the register=0D number is in range during decode, so that it is safe to=0D simply dereference from regs[] later.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: fc4a62f65cbd2d5d2c247ed4fbf64a05e6485859=0D https://github.com/qemu/qemu/commit/fc4a62f65cbd2d5d2c247ed4fbf64a0= 5e6485859=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: e85e4b8f959f6d03087dbc973a1201b894a1c62b=0D https://github.com/qemu/qemu/commit/e85e4b8f959f6d03087dbc973a1201b= 894a1c62b=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 963e9fa2bdde449ef9fe6b6f345d764d0d5901c2=0D https://github.com/qemu/qemu/commit/963e9fa2bdde449ef9fe6b6f345d764= d0d5901c2=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrrc=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: f28ca03ed5c452a5f81b1f4c84360a8bbdee617f=0D https://github.com/qemu/qemu/commit/f28ca03ed5c452a5f81b1f4c84360a8= bbdee617f=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_l=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 817cadd6ee952908aa46196ddb64522b2d6f58f2=0D https://github.com/qemu/qemu/commit/817cadd6ee952908aa46196ddb64522= b2d6f58f2=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrrrrc=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 5a0adf3490090250938031640faa0f571bdc898c=0D https://github.com/qemu/qemu/commit/5a0adf3490090250938031640faa0f5= 71bdc898c=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrcl and tci_args_rrrrcl=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: b95aa12ed2f4ed7405dade6af9d4fa6cc5128384=0D https://github.com/qemu/qemu/commit/b95aa12ed2f4ed7405dade6af9d4fa6= cc5128384=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_ri and tci_args_rI=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 2ed8a3819219d3e0d57ec3990760b9d9fcece00b=0D https://github.com/qemu/qemu/commit/2ed8a3819219d3e0d57ec3990760b9d= 9fcece00b=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Reuse tci_args_l for calls.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 158d38737bb4f23ef66b149e0897270dcaacfd12=0D https://github.com/qemu/qemu/commit/158d38737bb4f23ef66b149e0897270= dcaacfd12=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Reuse tci_args_l for exit_tb=0D =0D Do not emit a uint64_t, but a tcg_target_ulong, aka uintptr_t.=0D This reduces the size of the constant on 32-bit hosts.=0D The assert for label !=3D NULL has to be removed because that=0D is a valid value for exit_tb.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 1670a2b9bb3f109e87485385f05a641e3ada6c1c=0D https://github.com/qemu/qemu/commit/1670a2b9bb3f109e87485385f05a641= e3ada6c1c=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D M tcg/tci/tcg-target.c.inc=0D M tcg/tci/tcg-target.h=0D =0D Log Message:=0D -----------=0D tcg/tci: Reuse tci_args_l for goto_tb=0D =0D Convert to indirect jumps, as it's less complicated.=0D Then we just have a pointer to the tb address at which=0D the chain is stored, from which we read.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 120402b5cba8f305470102167956d50ed1e6608b=0D https://github.com/qemu/qemu/commit/120402b5cba8f305470102167956d50= ed1e6608b=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrrrrr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: cbe871313e7e65b4e65ac5616634337ec4d9f45c=0D https://github.com/qemu/qemu/commit/cbe871313e7e65b4e65ac5616634337= ec4d9f45c=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_rrrr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 79dd3a4f59e88129e6887ac970f2ed794504e5d7=0D https://github.com/qemu/qemu/commit/79dd3a4f59e88129e6887ac970f2ed7= 94504e5d7=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D M tcg/tci/tcg-target-con-set.h=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Clean up deposit operations=0D =0D Use the correct set of asserts during code generation.=0D We do not require the first input to overlap the output;=0D the existing interpreter already supported that.=0D =0D Split out tci_args_rrrbb in the translator.=0D Use the deposit32/64 functions rather than inline expansion.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 00e338faa0cc26c861e2d7b1b5116f2c76574045=0D https://github.com/qemu/qemu/commit/00e338faa0cc26c861e2d7b1b5116f2= c76574045=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Reduce qemu_ld/st TCGMemOpIdx operand to 32-bits=0D =0D We are currently using the "natural" size routine, which=0D uses 64-bits on a 64-bit host. The TCGMemOpIdx operand=0D has 11 bits, so we can safely reduce to 32-bits.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 63041ed25fac24b9b0271c6cbf5062f37a0e8c74=0D https://github.com/qemu/qemu/commit/63041ed25fac24b9b0271c6cbf5062f= 37a0e8c74=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tci_args_{rrm,rrrm,rrrrm}=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 92bc4fad82c1fa2d19b0e6f592a47511f256e15a=0D https://github.com/qemu/qemu/commit/92bc4fad82c1fa2d19b0e6f592a4751= 1f256e15a=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Hoist op_size checking into tci_args_*=0D =0D This performs the size check while reading the arguments,=0D which means that we don't have to arrange for it to be=0D done after the operation. Which tidies all of the branches.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 65f1b6cc9a902560e5fcd9688fe8ffe44004ad33=0D https://github.com/qemu/qemu/commit/65f1b6cc9a902560e5fcd9688fe8ffe= 44004ad33=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D M tcg/tci/tcg-target.h=0D =0D Log Message:=0D -----------=0D tcg/tci: Remove tci_disas=0D =0D This function is unused. It's not even the disassembler,=0D which is print_insn_tci, located in disas/tci.c.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 59964b4f98c74921d184d0d1119efcd055ce2881=0D https://github.com/qemu/qemu/commit/59964b4f98c74921d184d0d1119efcd= 055ce2881=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D R disas/tci.c=0D M include/tcg/tcg-opc.h=0D M meson.build=0D M tcg/tci.c=0D =0D Log Message:=0D -----------=0D tcg/tci: Implement the disassembler properly=0D =0D Actually print arguments as opposed to simply the opcodes=0D and, uselessly, the argument counts. Reuse all of the helpers=0D developed as part of the interpreter.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: ae216c9747840f6365b97286e04fa3bc54e7ccd4=0D https://github.com/qemu/qemu/commit/ae216c9747840f6365b97286e04fa3b= c54e7ccd4=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Push opcode emit into each case=0D =0D We're about to split out bytecode output into helpers, but=0D we can't do that one at a time if tcg_out_op_t is being done=0D outside of the switch.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: fe8c47cbf6227bdae80fc644e6ae82285f775756=0D https://github.com/qemu/qemu/commit/fe8c47cbf6227bdae80fc644e6ae822= 85f775756=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrs=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: b9dcd21a25a4b9a317246a8b7206f3c50b0de8c4=0D https://github.com/qemu/qemu/commit/b9dcd21a25a4b9a317246a8b7206f3c= 50b0de8c4=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_l=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 7aa295c5d215e5a4774b683764a631b2c75b93e2=0D https://github.com/qemu/qemu/commit/7aa295c5d215e5a4774b683764a631b= 2c75b93e2=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_p=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: ffe86eb043551109af82eb458f7a51044d877024=0D https://github.com/qemu/qemu/commit/ffe86eb043551109af82eb458f7a510= 44d877024=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rr=0D =0D At the same time, validate the type argument in tcg_out_mov.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 549d039667b92f6ff86fac1948d61ac558026996=0D https://github.com/qemu/qemu/commit/549d039667b92f6ff86fac1948d61ac= 558026996=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: bd42124bee912ef82eb24c5c172526b6a911cf48=0D https://github.com/qemu/qemu/commit/bd42124bee912ef82eb24c5c172526b= 6a911cf48=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrrc=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 223abacdd91d8d6f31f2ae38ddfeae34baa44b35=0D https://github.com/qemu/qemu/commit/223abacdd91d8d6f31f2ae38ddfeae3= 4baa44b35=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrrrrc=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 37e112e82ab398f69af499c768c0329a6c4c2b03=0D https://github.com/qemu/qemu/commit/37e112e82ab398f69af499c768c0329= a6c4c2b03=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrrbb=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 723c2b5bc5ba973800a812fe030e656a9cee1a52=0D https://github.com/qemu/qemu/commit/723c2b5bc5ba973800a812fe030e656= a9cee1a52=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrcl=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: ab5b8a3fb41d035ea320ce85593ba505ea5305bc=0D https://github.com/qemu/qemu/commit/ab5b8a3fb41d035ea320ce85593ba50= 5ea5305bc=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrrrrr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: db492ebb91059b818d5b5ea5975d227e5c3c9bcc=0D https://github.com/qemu/qemu/commit/db492ebb91059b818d5b5ea5975d227= e5c3c9bcc=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrrr=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 6dbf78c17a4fed12f97148e71d3700eb073dc08c=0D https://github.com/qemu/qemu/commit/6dbf78c17a4fed12f97148e71d3700e= b073dc08c=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_rrrrcl=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 6f00d7af75e66134ab7c5513016b8f9455518347=0D https://github.com/qemu/qemu/commit/6f00d7af75e66134ab7c5513016b8f9= 455518347=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm}=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 87713c04d19fc1e331e063b1f2d501091456c82e=0D https://github.com/qemu/qemu/commit/87713c04d19fc1e331e063b1f2d5010= 91456c82e=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_v=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 98f9b467b025f58e0cb1c8b0ae91b9b0d51ca85f=0D https://github.com/qemu/qemu/commit/98f9b467b025f58e0cb1c8b0ae91b9b= 0d51ca85f=0D Author: Richard Henderson =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg/tci: Split out tcg_out_op_r[iI]=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 5e8892db93f3fb6a7221f2d47f3c952a7e489737=0D https://github.com/qemu/qemu/commit/5e8892db93f3fb6a7221f2d47f3c952= a7e489737=0D Author: Miroslav Rezanina =0D Date: 2021-03-17 (Wed, 17 Mar 2021)=0D =0D Changed paths:=0D M tcg/aarch64/tcg-target.c.inc=0D M tcg/i386/tcg-target.c.inc=0D M tcg/mips/tcg-target.c.inc=0D M tcg/ppc/tcg-target.c.inc=0D M tcg/riscv/tcg-target.c.inc=0D M tcg/s390/tcg-target.c.inc=0D M tcg/tcg.c=0D M tcg/tci/tcg-target.c.inc=0D =0D Log Message:=0D -----------=0D tcg: Fix prototypes for tcg_out_vec_op and tcg_out_op=0D =0D There are two different versions of prototype for tcg_out_op and=0D tcg_out_vec_op functions:=0D =0D 1) using const TCGArg *args and const int *const_args arguments=0D 2) using const TCGArg args[TCG_MAX_OP_ARGS] and const int=0D const_args[TCG_MAX_OP_ARGS] aguments.=0D =0D This duality causes warnings on GCC 11 and prevents build using=0D --enable-werror. As second version provides more information,=0D unify functions prototypes to this variant.=0D =0D Signed-off-by: Miroslav Rezanina =0D Message-Id: <20210312121418.139093-1-mrezanin@redhat.com>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 4083904bc9fe5da580f7ca397b1e828fbc322732=0D https://github.com/qemu/qemu/commit/4083904bc9fe5da580f7ca397b1e828= fbc322732=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D R disas/tci.c=0D M include/tcg/tcg-opc.h=0D M meson.build=0D M tcg/aarch64/tcg-target.c.inc=0D M tcg/i386/tcg-target.c.inc=0D M tcg/mips/tcg-target.c.inc=0D M tcg/ppc/tcg-target.c.inc=0D M tcg/riscv/tcg-target.c.inc=0D M tcg/s390/tcg-target.c.inc=0D M tcg/tcg.c=0D M tcg/tci.c=0D M tcg/tci/tcg-target-con-set.h=0D M tcg/tci/tcg-target.c.inc=0D M tcg/tci/tcg-target.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210317= ' into staging=0D =0D TCI argument extraction helpers and disassembler=0D TCG build fix for gcc 11=0D =0D # gpg: Signature made Wed 17 Mar 2021 15:29:47 GMT=0D # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E2= 15F=0D # gpg: issuer "richard.henderson@linaro.org"=0D # gpg: Good signature from "Richard Henderson " [full]=0D # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E = 215F=0D =0D * remotes/rth-gitlab/tags/pull-tcg-20210317: (38 commits)=0D tcg: Fix prototypes for tcg_out_vec_op and tcg_out_op=0D tcg/tci: Split out tcg_out_op_r[iI]=0D tcg/tci: Split out tcg_out_op_v=0D tcg/tci: Split out tcg_out_op_{rrm,rrrm,rrrrm}=0D tcg/tci: Split out tcg_out_op_rrrrcl=0D tcg/tci: Split out tcg_out_op_rrrr=0D tcg/tci: Split out tcg_out_op_rrrrrr=0D tcg/tci: Split out tcg_out_op_rrcl=0D tcg/tci: Split out tcg_out_op_rrrbb=0D tcg/tci: Split out tcg_out_op_rrrrrc=0D tcg/tci: Split out tcg_out_op_rrrc=0D tcg/tci: Split out tcg_out_op_rrr=0D tcg/tci: Split out tcg_out_op_rr=0D tcg/tci: Split out tcg_out_op_p=0D tcg/tci: Split out tcg_out_op_l=0D tcg/tci: Split out tcg_out_op_rrs=0D tcg/tci: Push opcode emit into each case=0D tcg/tci: Implement the disassembler properly=0D tcg/tci: Remove tci_disas=0D tcg/tci: Hoist op_size checking into tci_args_*=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/6e71c36557ed...4083904bc9fe= =0D From MAILER-DAEMON Thu Mar 18 15:06:46 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMxyo-00066i-Jg for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 15:06:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34308) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMxyg-00065C-4w for qemu-commits@nongnu.org; Thu, 18 Mar 2021 15:06:39 -0400 Received: from out-24.smtp.github.com ([192.30.252.207]:33187) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMxya-0006xV-0r for qemu-commits@nongnu.org; Thu, 18 Mar 2021 15:06:37 -0400 Received: from github.com (hubbernetes-node-9e54e6b.ac4-iad.github.net [10.52.205.63]) by smtp.github.com (Postfix) with ESMTPA id DCABD600432 for ; Thu, 18 Mar 2021 12:06:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616094390; bh=43a0Tx4a9f7uKJO9ZneIHrqR+Wq9uM/x8JRcaC8iLQw=; h=Date:From:To:Subject:From; b=OOQB7aBiL/uyhRyz5R7R2LCkVTgsHo6FhXoazvkGDqImS9Beo1Z3F5dT21I9tj+0T 2e1GYRnKd3CzzP3UTt0rikzMEHlE29Noi7+IBObu5eqEnpm/rs3E3xCYCLK2+Jxpi/ gHIJmbIV7GmhIb6d8yTU5PBuV7ZnmQIvTo1Rl1og= Date: Thu, 18 Mar 2021 12:06:30 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 5994dc: ui, monitor: remove deprecated VNC ACL option and ... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 19:06:40 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 5994dcb8d8525ac044a31913c6bceeee788ec700=0D https://github.com/qemu/qemu/commit/5994dcb8d8525ac044a31913c6bceee= e788ec700=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hmp-commands.hx=0D M monitor/misc.c=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D ui, monitor: remove deprecated VNC ACL option and HMP commands=0D =0D The VNC ACL concept has been replaced by the pluggable "authz" framework=0D= which does not use monitor commands.=0D =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Dr. David Alan Gilbert =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 283d845c9164f57f5dba020a4783bb290493802f=0D https://github.com/qemu/qemu/commit/283d845c9164f57f5dba020a4783bb2= 90493802f=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M monitor/monitor.c=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D monitor: raise error when 'pretty' option is used with HMP=0D =0D This is only semantically useful for QMP.=0D =0D Reviewed-by: Dr. David Alan Gilbert =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 8becb36063fb14df1e3ae4916215667e2cb65fa2=0D https://github.com/qemu/qemu/commit/8becb36063fb14df1e3ae4916215667= e2cb65fa2=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M monitor/qmp-cmds-control.c=0D M qapi/control.json=0D =0D Log Message:=0D -----------=0D monitor: remove 'query-events' QMP command=0D =0D The code comment suggests removing QAPIEvent_(str|lookup) symbols too,=0D= however, these are both auto-generated as standard for any enum in=0D QAPI. As such it they'll exist whether we use them or not.=0D =0D Reviewed-by: Eric Blake =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: cbde7be900d2a2279cbc4becb91d1ddd6a014def=0D https://github.com/qemu/qemu/commit/cbde7be900d2a2279cbc4becb91d1dd= d6a014def=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/migration.rst=0D M docs/rdma.txt=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M docs/xbzrle.txt=0D M hmp-commands-info.hx=0D M hmp-commands.hx=0D M include/monitor/hmp.h=0D M migration/migration.c=0D M migration/ram.c=0D M monitor/hmp-cmds.c=0D M qapi/migration.json=0D M tests/migration/guestperf/engine.py=0D M tests/qemu-iotests/181=0D M tests/qtest/migration-test.c=0D M tests/qtest/test-hmp.c=0D M tests/qtest/vhost-user-test.c=0D =0D Log Message:=0D -----------=0D migrate: remove QMP/HMP commands for speed, downtime and cache size=0D =0D The generic 'migrate_set_parameters' command handle all types of param.=0D= =0D Only the QMP commands were documented in the deprecations page, but the=0D= rationale for deprecating applies equally to HMP, and the replacements=0D= exist. Furthermore the HMP commands are just shims to the QMP commands,=0D= so removing the latter breaks the former unless they get re-implemented.=0D= =0D Reviewed-by: Dr. David Alan Gilbert =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 8af54b9172ff3b9bbdbb3191ed84994d275a0d81=0D https://github.com/qemu/qemu/commit/8af54b9172ff3b9bbdbb3191ed84994= d275a0d81=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/core/machine-hmp-cmds.c=0D M hw/core/machine-qmp-cmds.c=0D M qapi/machine.json=0D M tests/acceptance/pc_cpu_hotplug_props.py=0D M tests/acceptance/x86_cpu_model_versions.py=0D M tests/migration/guestperf/engine.py=0D M tests/qtest/numa-test.c=0D M tests/qtest/qmp-test.c=0D M tests/qtest/test-x86-cpuid-compat.c=0D =0D Log Message:=0D -----------=0D machine: remove 'query-cpus' QMP command=0D =0D The newer 'query-cpus-fast' command avoids side effects on the guest=0D execution. Note that some of the field names are different in the=0D 'query-cpus-fast' command.=0D =0D Reviewed-by: Wainer dos Santos Moschetta =0D Tested-by: Wainer dos Santos Moschetta =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 445a5b4087567bf4d4ce76d394adf78d9d5c88a5=0D https://github.com/qemu/qemu/commit/445a5b4087567bf4d4ce76d394adf78= d9d5c88a5=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/core/machine-qmp-cmds.c=0D M qapi/machine.json=0D =0D Log Message:=0D -----------=0D machine: remove 'arch' field from 'query-cpus-fast' QMP command=0D =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 24e13a4dc1eb1630eceffc7ab334145d902e763d=0D https://github.com/qemu/qemu/commit/24e13a4dc1eb1630eceffc7ab334145= d902e763d=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M chardev/char-socket.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D =0D Log Message:=0D -----------=0D chardev: reject use of 'wait' flag for socket client chardevs=0D =0D This only makes sense conceptually when used with listener chardevs.=0D =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: b50101833987b47e0740f1621de48637c468c3d1=0D https://github.com/qemu/qemu/commit/b50101833987b47e0740f1621de4863= 7c468c3d1=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/qdev-device-use.txt=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/i386/pc.c=0D M hw/ide/qdev.c=0D M hw/ppc/mac_newworld.c=0D M hw/ppc/mac_oldworld.c=0D M hw/sparc64/sun4u.c=0D M scripts/device-crash-test=0D M softmmu/vl.c=0D M tests/qemu-iotests/051=0D M tests/qemu-iotests/051.pc.out=0D =0D Log Message:=0D -----------=0D hw/ide: remove 'ide-drive' device=0D =0D The 'ide-hd' and 'ide-cd' devices provide suitable alternatives.=0D =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 879be3af49132d232602e0ca783ec9b4112530fa=0D https://github.com/qemu/qemu/commit/879be3af49132d232602e0ca783ec9b= 4112530fa=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/i386/pc.c=0D M hw/scsi/scsi-disk.c=0D M scripts/device-crash-test=0D M tests/qemu-iotests/051=0D M tests/qemu-iotests/051.pc.out=0D =0D Log Message:=0D -----------=0D hw/scsi: remove 'scsi-disk' device=0D =0D The 'scsi-hd' and 'scsi-cd' devices provide suitable alternatives.=0D =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: ad1324e044240ae9fcf67e4c215481b7a35591b9=0D https://github.com/qemu/qemu/commit/ad1324e044240ae9fcf67e4c215481b= 7a35591b9=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M block/qapi.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M qapi/block-core.json=0D M tests/qemu-iotests/184.out=0D M tests/qemu-iotests/191.out=0D M tests/qemu-iotests/273.out=0D =0D Log Message:=0D -----------=0D block: remove 'encryption_key_missing' flag from QAPI=0D =0D This has been hardcoded to "false" since 2.10.0, since secrets required=0D= to unlock block devices are now always provided up front instead of using= =0D interactive prompts.=0D =0D Reviewed-by: Eric Blake =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 81cbfd5088690c53541ffd0d74851c8ab055a829=0D https://github.com/qemu/qemu/commit/81cbfd5088690c53541ffd0d74851c8= ab055a829=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M block/dirty-bitmap.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M include/block/dirty-bitmap.h=0D M qapi/block-core.json=0D M tests/qemu-iotests/124=0D M tests/qemu-iotests/194.out=0D M tests/qemu-iotests/236.out=0D M tests/qemu-iotests/246.out=0D M tests/qemu-iotests/254.out=0D M tests/qemu-iotests/257.out=0D =0D Log Message:=0D -----------=0D block: remove dirty bitmaps 'status' field=0D =0D The same information is available via the 'recording' and 'busy' fields.=0D= =0D Reviewed-by: Vladimir Sementsov-Ogievskiy =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: e67d8e2928200e24ecb47c7be3ea8270077f2996=0D https://github.com/qemu/qemu/commit/e67d8e2928200e24ecb47c7be3ea827= 0077f2996=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M block/qapi.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M qapi/block-core.json=0D M tests/qemu-iotests/194=0D M tests/qemu-iotests/236=0D M tests/qemu-iotests/246=0D M tests/qemu-iotests/254=0D M tests/qemu-iotests/260=0D M tests/qemu-iotests/tests/migrate-bitmaps-postcopy-test=0D =0D Log Message:=0D -----------=0D block: remove 'dirty-bitmaps' field from 'BlockInfo' struct=0D =0D The same data is available in the 'BlockDeviceInfo' struct.=0D =0D Reviewed-by: Vladimir Sementsov-Ogievskiy =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 8d17adf34f501ded65a106572740760f0a75577c=0D https://github.com/qemu/qemu/commit/8d17adf34f501ded65a106572740760= f0a75577c=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M block/file-posix.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M tests/qemu-iotests/226.out=0D =0D Log Message:=0D -----------=0D block: remove support for using "file" driver with block/char devices=0D= =0D The 'host_device' and 'host_cdrom' drivers must be used instead.=0D =0D Reviewed-by: Eric Blake =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 1b507e55f8199eaad99744613823f6929e4d57c6=0D https://github.com/qemu/qemu/commit/1b507e55f8199eaad99744613823f69= 29e4d57c6=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M block/dirty-bitmap.c=0D M block/file-posix.c=0D M block/qapi.c=0D M chardev/char-socket.c=0D M docs/devel/migration.rst=0D M docs/qdev-device-use.txt=0D M docs/rdma.txt=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M docs/xbzrle.txt=0D M hmp-commands-info.hx=0D M hmp-commands.hx=0D M hw/core/machine-hmp-cmds.c=0D M hw/core/machine-qmp-cmds.c=0D M hw/i386/pc.c=0D M hw/ide/qdev.c=0D M hw/ppc/mac_newworld.c=0D M hw/ppc/mac_oldworld.c=0D M hw/scsi/scsi-disk.c=0D M hw/sparc64/sun4u.c=0D M include/block/dirty-bitmap.h=0D M include/monitor/hmp.h=0D M migration/migration.c=0D M migration/ram.c=0D M monitor/hmp-cmds.c=0D M monitor/misc.c=0D M monitor/monitor.c=0D M monitor/qmp-cmds-control.c=0D M qapi/block-core.json=0D M qapi/control.json=0D M qapi/machine.json=0D M qapi/migration.json=0D M qemu-options.hx=0D M scripts/device-crash-test=0D M softmmu/vl.c=0D M tests/acceptance/pc_cpu_hotplug_props.py=0D M tests/acceptance/x86_cpu_model_versions.py=0D M tests/migration/guestperf/engine.py=0D M tests/qemu-iotests/051=0D M tests/qemu-iotests/051.pc.out=0D M tests/qemu-iotests/124=0D M tests/qemu-iotests/181=0D M tests/qemu-iotests/184.out=0D M tests/qemu-iotests/191.out=0D M tests/qemu-iotests/194=0D M tests/qemu-iotests/194.out=0D M tests/qemu-iotests/226.out=0D M tests/qemu-iotests/236=0D M tests/qemu-iotests/236.out=0D M tests/qemu-iotests/246=0D M tests/qemu-iotests/246.out=0D M tests/qemu-iotests/254=0D M tests/qemu-iotests/254.out=0D M tests/qemu-iotests/257.out=0D M tests/qemu-iotests/260=0D M tests/qemu-iotests/273.out=0D M tests/qemu-iotests/tests/migrate-bitmaps-postcopy-test=0D M tests/qtest/migration-test.c=0D M tests/qtest/numa-test.c=0D M tests/qtest/qmp-test.c=0D M tests/qtest/test-hmp.c=0D M tests/qtest/test-x86-cpuid-compat.c=0D M tests/qtest/vhost-user-test.c=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/berrange-gitlab/tags/dep-many-pul= l-request' into staging=0D =0D Remove many old deprecated features=0D =0D The following features have been deprecated for well over the 2=0D release cycle we promise=0D =0D ``-drive file=3Djson:{...{'driver':'file'}}`` (since 3.0)=0D ``-vnc acl`` (since 4.0.0)=0D ``-mon ...,control=3Dreadline,pretty=3Don|off`` (since 4.1)=0D ``migrate_set_downtime`` and ``migrate_set_speed`` (since 2.8.0)=0D ``query-named-block-nodes`` result ``encryption_key_missing`` (since 2.= 10.0)=0D ``query-block`` result ``inserted.encryption_key_missing`` (since 2.10.= 0)=0D ``migrate-set-cache-size`` and ``query-migrate-cache-size`` (since 2.11= .0)=0D ``query-named-block-nodes`` and ``query-block`` result dirty-bitmaps[i]= .status (since 4.0)=0D ``query-cpus`` (since 2.12.0)=0D ``query-cpus-fast`` ``arch`` output member (since 3.0.0)=0D ``query-events`` (since 4.0)=0D chardev client socket with ``wait`` option (since 4.0)=0D ``acl_show``, ``acl_reset``, ``acl_policy``, ``acl_add``, ``acl_remove`= ` (since 4.0.0)=0D ``ide-drive`` (since 4.2)=0D ``scsi-disk`` (since 4.2)=0D =0D # gpg: Signature made Thu 18 Mar 2021 09:23:39 GMT=0D # gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104= FDF=0D # gpg: Good signature from "Daniel P. Berrange " [full]= =0D # gpg: aka "Daniel P. Berrange " [fu= ll]=0D # Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 = 4FDF=0D =0D * remotes/berrange-gitlab/tags/dep-many-pull-request:=0D block: remove support for using "file" driver with block/char devices=0D= block: remove 'dirty-bitmaps' field from 'BlockInfo' struct=0D block: remove dirty bitmaps 'status' field=0D block: remove 'encryption_key_missing' flag from QAPI=0D hw/scsi: remove 'scsi-disk' device=0D hw/ide: remove 'ide-drive' device=0D chardev: reject use of 'wait' flag for socket client chardevs=0D machine: remove 'arch' field from 'query-cpus-fast' QMP command=0D machine: remove 'query-cpus' QMP command=0D migrate: remove QMP/HMP commands for speed, downtime and cache size=0D monitor: remove 'query-events' QMP command=0D monitor: raise error when 'pretty' option is used with HMP=0D ui, monitor: remove deprecated VNC ACL option and HMP commands=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/4083904bc9fe...1b507e55f819= =0D From MAILER-DAEMON Thu Mar 18 15:54:30 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMyiw-0002DR-Jq for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 15:54:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46476) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMyiu-00029d-OC for qemu-commits@nongnu.org; Thu, 18 Mar 2021 15:54:24 -0400 Received: from out-25.smtp.github.com ([192.30.252.208]:34729 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMyir-0003Dj-JP for qemu-commits@nongnu.org; Thu, 18 Mar 2021 15:54:24 -0400 Received: from github.com (hubbernetes-node-528451d.ash1-iad.github.net [10.56.119.16]) by smtp.github.com (Postfix) with ESMTPA id 57ACB840ACF for ; Thu, 18 Mar 2021 12:54:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616097260; bh=ddDg4OF/ABoeG8CXvUtgJBHU8nKtrUdoklpMdbvPzFY=; h=Date:From:To:Subject:From; b=YCJ2LBqgikzUgKrFHH88Fpfq8GZbJ9pgrO8rC6mR1h304Jkwd5429+x/QiPUt1TAj c5bVrXptlWRY97ZhLXX7W5mnUb31DvMXv0WgWyd17DntwY9TzQmHrLXj534W0tOfRG FNR37+1EfuFZwd0uA0yJH6MxcBkN/LPiT2BSj+zI= Date: Thu, 18 Mar 2021 12:54:20 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 5994dc: ui, monitor: remove deprecated VNC ACL option and ... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 19:54:25 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 5994dcb8d8525ac044a31913c6bceeee788ec700=0D https://github.com/qemu/qemu/commit/5994dcb8d8525ac044a31913c6bceee= e788ec700=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hmp-commands.hx=0D M monitor/misc.c=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D ui, monitor: remove deprecated VNC ACL option and HMP commands=0D =0D The VNC ACL concept has been replaced by the pluggable "authz" framework=0D= which does not use monitor commands.=0D =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Dr. David Alan Gilbert =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 283d845c9164f57f5dba020a4783bb290493802f=0D https://github.com/qemu/qemu/commit/283d845c9164f57f5dba020a4783bb2= 90493802f=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M monitor/monitor.c=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D monitor: raise error when 'pretty' option is used with HMP=0D =0D This is only semantically useful for QMP.=0D =0D Reviewed-by: Dr. David Alan Gilbert =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 8becb36063fb14df1e3ae4916215667e2cb65fa2=0D https://github.com/qemu/qemu/commit/8becb36063fb14df1e3ae4916215667= e2cb65fa2=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M monitor/qmp-cmds-control.c=0D M qapi/control.json=0D =0D Log Message:=0D -----------=0D monitor: remove 'query-events' QMP command=0D =0D The code comment suggests removing QAPIEvent_(str|lookup) symbols too,=0D= however, these are both auto-generated as standard for any enum in=0D QAPI. As such it they'll exist whether we use them or not.=0D =0D Reviewed-by: Eric Blake =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: cbde7be900d2a2279cbc4becb91d1ddd6a014def=0D https://github.com/qemu/qemu/commit/cbde7be900d2a2279cbc4becb91d1dd= d6a014def=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/migration.rst=0D M docs/rdma.txt=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M docs/xbzrle.txt=0D M hmp-commands-info.hx=0D M hmp-commands.hx=0D M include/monitor/hmp.h=0D M migration/migration.c=0D M migration/ram.c=0D M monitor/hmp-cmds.c=0D M qapi/migration.json=0D M tests/migration/guestperf/engine.py=0D M tests/qemu-iotests/181=0D M tests/qtest/migration-test.c=0D M tests/qtest/test-hmp.c=0D M tests/qtest/vhost-user-test.c=0D =0D Log Message:=0D -----------=0D migrate: remove QMP/HMP commands for speed, downtime and cache size=0D =0D The generic 'migrate_set_parameters' command handle all types of param.=0D= =0D Only the QMP commands were documented in the deprecations page, but the=0D= rationale for deprecating applies equally to HMP, and the replacements=0D= exist. Furthermore the HMP commands are just shims to the QMP commands,=0D= so removing the latter breaks the former unless they get re-implemented.=0D= =0D Reviewed-by: Dr. David Alan Gilbert =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 8af54b9172ff3b9bbdbb3191ed84994d275a0d81=0D https://github.com/qemu/qemu/commit/8af54b9172ff3b9bbdbb3191ed84994= d275a0d81=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/core/machine-hmp-cmds.c=0D M hw/core/machine-qmp-cmds.c=0D M qapi/machine.json=0D M tests/acceptance/pc_cpu_hotplug_props.py=0D M tests/acceptance/x86_cpu_model_versions.py=0D M tests/migration/guestperf/engine.py=0D M tests/qtest/numa-test.c=0D M tests/qtest/qmp-test.c=0D M tests/qtest/test-x86-cpuid-compat.c=0D =0D Log Message:=0D -----------=0D machine: remove 'query-cpus' QMP command=0D =0D The newer 'query-cpus-fast' command avoids side effects on the guest=0D execution. Note that some of the field names are different in the=0D 'query-cpus-fast' command.=0D =0D Reviewed-by: Wainer dos Santos Moschetta =0D Tested-by: Wainer dos Santos Moschetta =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 445a5b4087567bf4d4ce76d394adf78d9d5c88a5=0D https://github.com/qemu/qemu/commit/445a5b4087567bf4d4ce76d394adf78= d9d5c88a5=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/core/machine-qmp-cmds.c=0D M qapi/machine.json=0D =0D Log Message:=0D -----------=0D machine: remove 'arch' field from 'query-cpus-fast' QMP command=0D =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 24e13a4dc1eb1630eceffc7ab334145d902e763d=0D https://github.com/qemu/qemu/commit/24e13a4dc1eb1630eceffc7ab334145= d902e763d=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M chardev/char-socket.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D =0D Log Message:=0D -----------=0D chardev: reject use of 'wait' flag for socket client chardevs=0D =0D This only makes sense conceptually when used with listener chardevs.=0D =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: b50101833987b47e0740f1621de48637c468c3d1=0D https://github.com/qemu/qemu/commit/b50101833987b47e0740f1621de4863= 7c468c3d1=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/qdev-device-use.txt=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/i386/pc.c=0D M hw/ide/qdev.c=0D M hw/ppc/mac_newworld.c=0D M hw/ppc/mac_oldworld.c=0D M hw/sparc64/sun4u.c=0D M scripts/device-crash-test=0D M softmmu/vl.c=0D M tests/qemu-iotests/051=0D M tests/qemu-iotests/051.pc.out=0D =0D Log Message:=0D -----------=0D hw/ide: remove 'ide-drive' device=0D =0D The 'ide-hd' and 'ide-cd' devices provide suitable alternatives.=0D =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 879be3af49132d232602e0ca783ec9b4112530fa=0D https://github.com/qemu/qemu/commit/879be3af49132d232602e0ca783ec9b= 4112530fa=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/i386/pc.c=0D M hw/scsi/scsi-disk.c=0D M scripts/device-crash-test=0D M tests/qemu-iotests/051=0D M tests/qemu-iotests/051.pc.out=0D =0D Log Message:=0D -----------=0D hw/scsi: remove 'scsi-disk' device=0D =0D The 'scsi-hd' and 'scsi-cd' devices provide suitable alternatives.=0D =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: ad1324e044240ae9fcf67e4c215481b7a35591b9=0D https://github.com/qemu/qemu/commit/ad1324e044240ae9fcf67e4c215481b= 7a35591b9=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M block/qapi.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M qapi/block-core.json=0D M tests/qemu-iotests/184.out=0D M tests/qemu-iotests/191.out=0D M tests/qemu-iotests/273.out=0D =0D Log Message:=0D -----------=0D block: remove 'encryption_key_missing' flag from QAPI=0D =0D This has been hardcoded to "false" since 2.10.0, since secrets required=0D= to unlock block devices are now always provided up front instead of using= =0D interactive prompts.=0D =0D Reviewed-by: Eric Blake =0D Reviewed-by: Thomas Huth =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 81cbfd5088690c53541ffd0d74851c8ab055a829=0D https://github.com/qemu/qemu/commit/81cbfd5088690c53541ffd0d74851c8= ab055a829=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M block/dirty-bitmap.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M include/block/dirty-bitmap.h=0D M qapi/block-core.json=0D M tests/qemu-iotests/124=0D M tests/qemu-iotests/194.out=0D M tests/qemu-iotests/236.out=0D M tests/qemu-iotests/246.out=0D M tests/qemu-iotests/254.out=0D M tests/qemu-iotests/257.out=0D =0D Log Message:=0D -----------=0D block: remove dirty bitmaps 'status' field=0D =0D The same information is available via the 'recording' and 'busy' fields.=0D= =0D Reviewed-by: Vladimir Sementsov-Ogievskiy =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: e67d8e2928200e24ecb47c7be3ea8270077f2996=0D https://github.com/qemu/qemu/commit/e67d8e2928200e24ecb47c7be3ea827= 0077f2996=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M block/qapi.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M qapi/block-core.json=0D M tests/qemu-iotests/194=0D M tests/qemu-iotests/236=0D M tests/qemu-iotests/246=0D M tests/qemu-iotests/254=0D M tests/qemu-iotests/260=0D M tests/qemu-iotests/tests/migrate-bitmaps-postcopy-test=0D =0D Log Message:=0D -----------=0D block: remove 'dirty-bitmaps' field from 'BlockInfo' struct=0D =0D The same data is available in the 'BlockDeviceInfo' struct.=0D =0D Reviewed-by: Vladimir Sementsov-Ogievskiy =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 8d17adf34f501ded65a106572740760f0a75577c=0D https://github.com/qemu/qemu/commit/8d17adf34f501ded65a106572740760= f0a75577c=0D Author: Daniel P. Berrang=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M block/file-posix.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M tests/qemu-iotests/226.out=0D =0D Log Message:=0D -----------=0D block: remove support for using "file" driver with block/char devices=0D= =0D The 'host_device' and 'host_cdrom' drivers must be used instead.=0D =0D Reviewed-by: Eric Blake =0D Signed-off-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 1b507e55f8199eaad99744613823f6929e4d57c6=0D https://github.com/qemu/qemu/commit/1b507e55f8199eaad99744613823f69= 29e4d57c6=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M block/dirty-bitmap.c=0D M block/file-posix.c=0D M block/qapi.c=0D M chardev/char-socket.c=0D M docs/devel/migration.rst=0D M docs/qdev-device-use.txt=0D M docs/rdma.txt=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M docs/xbzrle.txt=0D M hmp-commands-info.hx=0D M hmp-commands.hx=0D M hw/core/machine-hmp-cmds.c=0D M hw/core/machine-qmp-cmds.c=0D M hw/i386/pc.c=0D M hw/ide/qdev.c=0D M hw/ppc/mac_newworld.c=0D M hw/ppc/mac_oldworld.c=0D M hw/scsi/scsi-disk.c=0D M hw/sparc64/sun4u.c=0D M include/block/dirty-bitmap.h=0D M include/monitor/hmp.h=0D M migration/migration.c=0D M migration/ram.c=0D M monitor/hmp-cmds.c=0D M monitor/misc.c=0D M monitor/monitor.c=0D M monitor/qmp-cmds-control.c=0D M qapi/block-core.json=0D M qapi/control.json=0D M qapi/machine.json=0D M qapi/migration.json=0D M qemu-options.hx=0D M scripts/device-crash-test=0D M softmmu/vl.c=0D M tests/acceptance/pc_cpu_hotplug_props.py=0D M tests/acceptance/x86_cpu_model_versions.py=0D M tests/migration/guestperf/engine.py=0D M tests/qemu-iotests/051=0D M tests/qemu-iotests/051.pc.out=0D M tests/qemu-iotests/124=0D M tests/qemu-iotests/181=0D M tests/qemu-iotests/184.out=0D M tests/qemu-iotests/191.out=0D M tests/qemu-iotests/194=0D M tests/qemu-iotests/194.out=0D M tests/qemu-iotests/226.out=0D M tests/qemu-iotests/236=0D M tests/qemu-iotests/236.out=0D M tests/qemu-iotests/246=0D M tests/qemu-iotests/246.out=0D M tests/qemu-iotests/254=0D M tests/qemu-iotests/254.out=0D M tests/qemu-iotests/257.out=0D M tests/qemu-iotests/260=0D M tests/qemu-iotests/273.out=0D M tests/qemu-iotests/tests/migrate-bitmaps-postcopy-test=0D M tests/qtest/migration-test.c=0D M tests/qtest/numa-test.c=0D M tests/qtest/qmp-test.c=0D M tests/qtest/test-hmp.c=0D M tests/qtest/test-x86-cpuid-compat.c=0D M tests/qtest/vhost-user-test.c=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/berrange-gitlab/tags/dep-many-pul= l-request' into staging=0D =0D Remove many old deprecated features=0D =0D The following features have been deprecated for well over the 2=0D release cycle we promise=0D =0D ``-drive file=3Djson:{...{'driver':'file'}}`` (since 3.0)=0D ``-vnc acl`` (since 4.0.0)=0D ``-mon ...,control=3Dreadline,pretty=3Don|off`` (since 4.1)=0D ``migrate_set_downtime`` and ``migrate_set_speed`` (since 2.8.0)=0D ``query-named-block-nodes`` result ``encryption_key_missing`` (since 2.= 10.0)=0D ``query-block`` result ``inserted.encryption_key_missing`` (since 2.10.= 0)=0D ``migrate-set-cache-size`` and ``query-migrate-cache-size`` (since 2.11= .0)=0D ``query-named-block-nodes`` and ``query-block`` result dirty-bitmaps[i]= .status (since 4.0)=0D ``query-cpus`` (since 2.12.0)=0D ``query-cpus-fast`` ``arch`` output member (since 3.0.0)=0D ``query-events`` (since 4.0)=0D chardev client socket with ``wait`` option (since 4.0)=0D ``acl_show``, ``acl_reset``, ``acl_policy``, ``acl_add``, ``acl_remove`= ` (since 4.0.0)=0D ``ide-drive`` (since 4.2)=0D ``scsi-disk`` (since 4.2)=0D =0D # gpg: Signature made Thu 18 Mar 2021 09:23:39 GMT=0D # gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104= FDF=0D # gpg: Good signature from "Daniel P. Berrange " [full]= =0D # gpg: aka "Daniel P. Berrange " [fu= ll]=0D # Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 = 4FDF=0D =0D * remotes/berrange-gitlab/tags/dep-many-pull-request:=0D block: remove support for using "file" driver with block/char devices=0D= block: remove 'dirty-bitmaps' field from 'BlockInfo' struct=0D block: remove dirty bitmaps 'status' field=0D block: remove 'encryption_key_missing' flag from QAPI=0D hw/scsi: remove 'scsi-disk' device=0D hw/ide: remove 'ide-drive' device=0D chardev: reject use of 'wait' flag for socket client chardevs=0D machine: remove 'arch' field from 'query-cpus-fast' QMP command=0D machine: remove 'query-cpus' QMP command=0D migrate: remove QMP/HMP commands for speed, downtime and cache size=0D monitor: remove 'query-events' QMP command=0D monitor: raise error when 'pretty' option is used with HMP=0D ui, monitor: remove deprecated VNC ACL option and HMP commands=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/4083904bc9fe...1b507e55f819= =0D From MAILER-DAEMON Thu Mar 18 16:01:25 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lMyph-0005GG-9u for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 16:01:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47872) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMypf-0005G2-3t for qemu-commits@nongnu.org; Thu, 18 Mar 2021 16:01:23 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:47999 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lMypc-0006Op-Kk for qemu-commits@nongnu.org; Thu, 18 Mar 2021 16:01:22 -0400 Received: from github.com (hubbernetes-node-c191835.va3-iad.github.net [10.48.103.46]) by smtp.github.com (Postfix) with ESMTPA id E77205C01F1 for ; Thu, 18 Mar 2021 13:01:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616097679; bh=aqZJ5OmKUrJuE+OzdKth4dSszCZ/C78Lf6vORjBceTg=; h=Date:From:To:Subject:From; b=Pnmw/nA1bbjAvErGUIm1IUZL1Pq6YxUbWILCSco1DAMI+xrRt5K/cvkyBLWbYglWM RnQ+hcsM9wYt1BT7pnkpkrXjX8+5dLFfXBi1eXlptyPhYUlnZsHhHsR8KrWO3YmHI+ zlSY8bj8DPuw7gu9Vd8ZVh3BmqSVqysweHLA43ys= Date: Thu, 18 Mar 2021 13:01:19 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 9c62f1: hw/block/nvme: fix potential overflow X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 20:01:23 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 9c62f1efa854e66ebb0650d85918e4fecd3ec648=0D https://github.com/qemu/qemu/commit/9c62f1efa854e66ebb0650d85918e4f= ecd3ec648=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix potential overflow=0D =0D page_size is a uint32_t, and zasl is a uint8_t, so the expression=0D `page_size << zasl` is done using 32-bit arithmetic and might overflow.=0D= Since we then compare this against a 64 bit data_size value, Coverity=0D complains that we might overflow unintentionally. An MDTS/ZASL value in=0D= excess of 4GiB is probably impractical, but it is not entirely=0D unrealistic, so add a cast such that we handle that case properly.=0D =0D Fixes: 578d914b263c ("hw/block/nvme: align zoned.zasl with mdts")=0D Fixes: CID 1450756=0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 3921756dee6dd7beb7b60167f368e8b981c77365=0D https://github.com/qemu/qemu/commit/3921756dee6dd7beb7b60167f368e8b= 981c77365=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-subsys.c=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: assert namespaces array indices=0D =0D Coverity complains about a possible memory corruption in the=0D nvme_ns_attach and _detach functions. While we should not (famous last=0D= words) be able to reach this function without nsid having previously=0D been validated, this is still an open door for future misuse.=0D =0D Make Coverity and maintainers happy by asserting that the index into the=0D= array is valid. Also, while not detected by Coverity (yet), add an=0D assert in nvme_subsys_ns and nvme_subsys_register_ns as well since a=0D similar issue is exists there.=0D =0D Fixes: 037953b5b299 ("hw/block/nvme: support namespace detach")=0D Fixes: CID 1450757=0D Fixes: CID 1450758=0D Cc: Minwoo Im =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 3754df04ec291b933c18285210793d02c9d9787a=0D https://github.com/qemu/qemu/commit/3754df04ec291b933c18285210793d0= 2c9d9787a=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix zone management receive reporting too many zones=0D =0D nvme_zone_mgmt_recv uses nvme_ns_nlbas() to get the number of LBAs in=0D the namespace and then calculates the number of zones to report by=0D incrementing slba with ZSZE until exceeding the number of LBAs as=0D returned by nvme_ns_nlbas().=0D =0D This is bad because the namespace might be of such as size that some=0D LBAs are valid, but are not part of any zone, causing zone management=0D receive to report one additional (but non-existing) zone.=0D =0D Fix this with a conventional loop on i < ns->num_zones instead.=0D =0D Fixes: a479335bfaf3 ("hw/block/nvme: Support Zoned Namespace Command Set"= )=0D Cc: Dmitry Fomichev =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: bc3a65e99254cfe001bd16a569a5aa7d20f930e8=0D https://github.com/qemu/qemu/commit/bc3a65e99254cfe001bd16a569a5aa7= d20f930e8=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add metadata support=0D =0D Add support for metadata in the form of extended logical blocks as well=0D= as a separate buffer of data. The new `ms` nvme-ns device parameter=0D specifies the size of metadata per logical block in bytes. The `mset`=0D nvme-ns device parameter controls whether metadata is transfered as part=0D= of an extended lba (set to '1') or in a separate buffer (set to '0',=0D the default).=0D =0D Regardsless of the scheme chosen with `mset`, metadata is stored at the=0D= end of the namespace backing block device. This requires the user=0D provided PRP/SGLs to be walked and "split" into data and metadata=0D scatter/gather lists if the extended logical block scheme is used, but=0D= has the advantage of not breaking the deallocated blocks support.=0D =0D Co-authored-by: Gollu Appalanaidu =0D Signed-off-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 146f720c55637410062041f68dc908645cd18aaa=0D https://github.com/qemu/qemu/commit/146f720c55637410062041f68dc9086= 45cd18aaa=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/meson.build=0D A hw/block/nvme-dif.c=0D A hw/block/nvme-dif.h=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: end-to-end data protection=0D =0D Add support for namespaces formatted with protection information. The=0D type of end-to-end data protection (i.e. Type 1, Type 2 or Type 3) is=0D selected with the `pi` nvme-ns device parameter. If the number of=0D metadata bytes is larger than 8, the `pil` nvme-ns device parameter may=0D= be used to control the location of the 8-byte DIF tuple. The default=0D `pil` value of '0', causes the DIF tuple to be transferred as the last=0D= 8 bytes of the metadata. Set to 1 to store this in the first eight bytes=0D= instead.=0D =0D Co-authored-by: Gollu Appalanaidu =0D Signed-off-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 3e1da158c47f3a6f5d48794f99fe01096531ec2e=0D https://github.com/qemu/qemu/commit/3e1da158c47f3a6f5d48794f99fe010= 96531ec2e=0D Author: Gollu Appalanaidu =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-dif.c=0D M hw/block/nvme-dif.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add verify command=0D =0D See NVM Express 1.4, section 6.14 ("Verify Command").=0D =0D Signed-off-by: Gollu Appalanaidu =0D [k.jensen: rebased, refactored for e2e]=0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: f7dcd31885cbe801cac95536a279bbc7e55af4f6=0D https://github.com/qemu/qemu/commit/f7dcd31885cbe801cac95536a279bbc= 7e55af4f6=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add non-mdts command size limit for verify=0D =0D Verify is not subject to MDTS, so a single Verify command may result in=0D= excessive amounts of allocated memory. Impose a limit on the data size=0D= by adding support for TP 4040 ("Non-MDTS Command Size Limits").=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 6a674bc295527c9acb1404b85be8d225b5bbac9d=0D https://github.com/qemu/qemu/commit/6a674bc295527c9acb1404b85be8d22= 5b5bbac9d=0D Author: Minwoo Im =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support multiple lba formats=0D =0D This patch introduces multiple LBA formats supported with the typical=0D logical block sizes of 512 bytes and 4096 bytes as well as metadata=0D sizes of 0, 8, 16 and 64 bytes. The format will be chosed based on the=0D= lbads and ms parameters of the nvme-ns device.=0D =0D Signed-off-by: Minwoo Im =0D [k.jensen: resurrected and rebased]=0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 397fbb5b32558dd2b5cd35cb4d25126879384079=0D https://github.com/qemu/qemu/commit/397fbb5b32558dd2b5cd35cb4d25126= 879384079=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: prefer runtime helpers instead of device parameters=0D =0D In preparation for Format NVM support, use runtime helpers instead of=0D the constant device parameters when getting lba size information etc.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D =0D =0D Commit: 516990f4df4f7bf9f86d38af71ead7175df15c19=0D https://github.com/qemu/qemu/commit/516990f4df4f7bf9f86d38af71ead71= 75df15c19=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: pull lba format initialization=0D =0D Pull lba format initialization code into separate function in=0D preparation for Format NVM support.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D =0D =0D Commit: dc04d25e2f3f7e26f7f97b860992076b5f04afdb=0D https://github.com/qemu/qemu/commit/dc04d25e2f3f7e26f7f97b860992076= b5f04afdb=0D Author: Minwoo Im =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add support for the format nvm command=0D =0D Format NVM admin command can make a namespace or namespaces to be=0D with different LBA size and metadata size with protection information=0D types.=0D =0D This patch introduces Format NVM command with LBA format, Metadata, and=0D= Protection Information for the device. The secure erase operation things=0D= and support for formatting zoned namespaces are yet to be added.=0D =0D The parameter checks inside of this patch has been referred from=0D Keith's old branch.=0D =0D Signed-off-by: Minwoo Im =0D [anaidu.gollu: rebased on e2e]=0D Signed-off-by: Gollu Appalanaidu =0D [k.jensen: rebased for reworked aio tracking]=0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 8a40754bca14df63c6d2ffe473b68a270dc50679=0D https://github.com/qemu/qemu/commit/8a40754bca14df63c6d2ffe473b68a2= 70dc50679=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/meson.build=0D A hw/block/nvme-dif.c=0D A hw/block/nvme-dif.h=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme-subsys.c=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request'= into staging=0D =0D emulated nvme updates and fixes=0D =0D * fixes for Coverity CID 1450756, 1450757 and 1450758 (me)=0D * fix for a bug in zone management receive (me)=0D * metadata and end-to-end data protection support (me & Gollu Appalanaidu= )=0D * verify support (Gollu Appalanaidu)=0D * multiple lba formats and format nvm support (Minwoo Im)=0D =0D and a couple of misc refactorings from me.=0D =0D v2:=0D - remove an unintended submodule update. Argh.=0D =0D # gpg: Signature made Thu 18 Mar 2021 11:53:48 GMT=0D # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0= DE9=0D # gpg: Good signature from "Klaus Jensen " [unknown]=0D= # gpg: aka "Klaus Jensen " [unknown= ]=0D # gpg: WARNING: This key is not certified with a trusted signature!=0D # gpg: There is no indication that the signature belongs to the = owner.=0D # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D = A838=0D # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F = 0DE9=0D =0D * remotes/nvme/tags/nvme-next-pull-request:=0D hw/block/nvme: add support for the format nvm command=0D hw/block/nvme: pull lba format initialization=0D hw/block/nvme: prefer runtime helpers instead of device parameters=0D hw/block/nvme: support multiple lba formats=0D hw/block/nvme: add non-mdts command size limit for verify=0D hw/block/nvme: add verify command=0D hw/block/nvme: end-to-end data protection=0D hw/block/nvme: add metadata support=0D hw/block/nvme: fix zone management receive reporting too many zones=0D hw/block/nvme: assert namespaces array indices=0D hw/block/nvme: fix potential overflow=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/1b507e55f819...8a40754bca14= =0D From MAILER-DAEMON Thu Mar 18 19:04:13 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lN1gb-0007Cl-5T for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 19:04:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50928) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lN1gZ-000784-AB for qemu-commits@nongnu.org; Thu, 18 Mar 2021 19:04:11 -0400 Received: from out-24.smtp.github.com ([192.30.252.207]:53117) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lN1gW-0006N6-6H for qemu-commits@nongnu.org; Thu, 18 Mar 2021 19:04:10 -0400 Received: from github.com (hubbernetes-node-9ca860d.ac4-iad.github.net [10.52.125.44]) by smtp.github.com (Postfix) with ESMTPA id 6E0A9600203 for ; Thu, 18 Mar 2021 16:04:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616108647; bh=Qr0hNNDMLg3pj17mO48FzLB2QXCtsMwRYUGoccSvcS4=; h=Date:From:To:Subject:From; b=03ZYmBdZ9UQaelv8RCnZgCMXWy7yW/vmnkP9OXUtGVRbXRu2VCbVyvLnMban5YW0D QtrfZN3kXBdQE2wvMWT5+uuLjzfhBEeoI9+ApuLrpeChcFz+5H6hhzr62lsWBaDeVs OSM2YMnxZo9lcL4hvFOwC/CwF9SUyo221wBa/3Wg= Date: Thu, 18 Mar 2021 16:04:07 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 9c62f1: hw/block/nvme: fix potential overflow X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 23:04:11 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 9c62f1efa854e66ebb0650d85918e4fecd3ec648=0D https://github.com/qemu/qemu/commit/9c62f1efa854e66ebb0650d85918e4f= ecd3ec648=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix potential overflow=0D =0D page_size is a uint32_t, and zasl is a uint8_t, so the expression=0D `page_size << zasl` is done using 32-bit arithmetic and might overflow.=0D= Since we then compare this against a 64 bit data_size value, Coverity=0D complains that we might overflow unintentionally. An MDTS/ZASL value in=0D= excess of 4GiB is probably impractical, but it is not entirely=0D unrealistic, so add a cast such that we handle that case properly.=0D =0D Fixes: 578d914b263c ("hw/block/nvme: align zoned.zasl with mdts")=0D Fixes: CID 1450756=0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: 3921756dee6dd7beb7b60167f368e8b981c77365=0D https://github.com/qemu/qemu/commit/3921756dee6dd7beb7b60167f368e8b= 981c77365=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-subsys.c=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: assert namespaces array indices=0D =0D Coverity complains about a possible memory corruption in the=0D nvme_ns_attach and _detach functions. While we should not (famous last=0D= words) be able to reach this function without nsid having previously=0D been validated, this is still an open door for future misuse.=0D =0D Make Coverity and maintainers happy by asserting that the index into the=0D= array is valid. Also, while not detected by Coverity (yet), add an=0D assert in nvme_subsys_ns and nvme_subsys_register_ns as well since a=0D similar issue is exists there.=0D =0D Fixes: 037953b5b299 ("hw/block/nvme: support namespace detach")=0D Fixes: CID 1450757=0D Fixes: CID 1450758=0D Cc: Minwoo Im =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 3754df04ec291b933c18285210793d02c9d9787a=0D https://github.com/qemu/qemu/commit/3754df04ec291b933c18285210793d0= 2c9d9787a=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: fix zone management receive reporting too many zones=0D =0D nvme_zone_mgmt_recv uses nvme_ns_nlbas() to get the number of LBAs in=0D the namespace and then calculates the number of zones to report by=0D incrementing slba with ZSZE until exceeding the number of LBAs as=0D returned by nvme_ns_nlbas().=0D =0D This is bad because the namespace might be of such as size that some=0D LBAs are valid, but are not part of any zone, causing zone management=0D receive to report one additional (but non-existing) zone.=0D =0D Fix this with a conventional loop on i < ns->num_zones instead.=0D =0D Fixes: a479335bfaf3 ("hw/block/nvme: Support Zoned Namespace Command Set"= )=0D Cc: Dmitry Fomichev =0D Signed-off-by: Klaus Jensen =0D =0D =0D Commit: bc3a65e99254cfe001bd16a569a5aa7d20f930e8=0D https://github.com/qemu/qemu/commit/bc3a65e99254cfe001bd16a569a5aa7= d20f930e8=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add metadata support=0D =0D Add support for metadata in the form of extended logical blocks as well=0D= as a separate buffer of data. The new `ms` nvme-ns device parameter=0D specifies the size of metadata per logical block in bytes. The `mset`=0D nvme-ns device parameter controls whether metadata is transfered as part=0D= of an extended lba (set to '1') or in a separate buffer (set to '0',=0D the default).=0D =0D Regardsless of the scheme chosen with `mset`, metadata is stored at the=0D= end of the namespace backing block device. This requires the user=0D provided PRP/SGLs to be walked and "split" into data and metadata=0D scatter/gather lists if the extended logical block scheme is used, but=0D= has the advantage of not breaking the deallocated blocks support.=0D =0D Co-authored-by: Gollu Appalanaidu =0D Signed-off-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 146f720c55637410062041f68dc908645cd18aaa=0D https://github.com/qemu/qemu/commit/146f720c55637410062041f68dc9086= 45cd18aaa=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/meson.build=0D A hw/block/nvme-dif.c=0D A hw/block/nvme-dif.h=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: end-to-end data protection=0D =0D Add support for namespaces formatted with protection information. The=0D type of end-to-end data protection (i.e. Type 1, Type 2 or Type 3) is=0D selected with the `pi` nvme-ns device parameter. If the number of=0D metadata bytes is larger than 8, the `pil` nvme-ns device parameter may=0D= be used to control the location of the 8-byte DIF tuple. The default=0D `pil` value of '0', causes the DIF tuple to be transferred as the last=0D= 8 bytes of the metadata. Set to 1 to store this in the first eight bytes=0D= instead.=0D =0D Co-authored-by: Gollu Appalanaidu =0D Signed-off-by: Gollu Appalanaidu =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 3e1da158c47f3a6f5d48794f99fe01096531ec2e=0D https://github.com/qemu/qemu/commit/3e1da158c47f3a6f5d48794f99fe010= 96531ec2e=0D Author: Gollu Appalanaidu =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-dif.c=0D M hw/block/nvme-dif.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add verify command=0D =0D See NVM Express 1.4, section 6.14 ("Verify Command").=0D =0D Signed-off-by: Gollu Appalanaidu =0D [k.jensen: rebased, refactored for e2e]=0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: f7dcd31885cbe801cac95536a279bbc7e55af4f6=0D https://github.com/qemu/qemu/commit/f7dcd31885cbe801cac95536a279bbc= 7e55af4f6=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add non-mdts command size limit for verify=0D =0D Verify is not subject to MDTS, so a single Verify command may result in=0D= excessive amounts of allocated memory. Impose a limit on the data size=0D= by adding support for TP 4040 ("Non-MDTS Command Size Limits").=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 6a674bc295527c9acb1404b85be8d225b5bbac9d=0D https://github.com/qemu/qemu/commit/6a674bc295527c9acb1404b85be8d22= 5b5bbac9d=0D Author: Minwoo Im =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: support multiple lba formats=0D =0D This patch introduces multiple LBA formats supported with the typical=0D logical block sizes of 512 bytes and 4096 bytes as well as metadata=0D sizes of 0, 8, 16 and 64 bytes. The format will be chosed based on the=0D= lbads and ms parameters of the nvme-ns device.=0D =0D Signed-off-by: Minwoo Im =0D [k.jensen: resurrected and rebased]=0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 397fbb5b32558dd2b5cd35cb4d25126879384079=0D https://github.com/qemu/qemu/commit/397fbb5b32558dd2b5cd35cb4d25126= 879384079=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: prefer runtime helpers instead of device parameters=0D =0D In preparation for Format NVM support, use runtime helpers instead of=0D the constant device parameters when getting lba size information etc.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D =0D =0D Commit: 516990f4df4f7bf9f86d38af71ead7175df15c19=0D https://github.com/qemu/qemu/commit/516990f4df4f7bf9f86d38af71ead71= 75df15c19=0D Author: Klaus Jensen =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D =0D Log Message:=0D -----------=0D hw/block/nvme: pull lba format initialization=0D =0D Pull lba format initialization code into separate function in=0D preparation for Format NVM support.=0D =0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Minwoo Im =0D =0D =0D Commit: dc04d25e2f3f7e26f7f97b860992076b5f04afdb=0D https://github.com/qemu/qemu/commit/dc04d25e2f3f7e26f7f97b860992076= b5f04afdb=0D Author: Minwoo Im =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D hw/block/nvme: add support for the format nvm command=0D =0D Format NVM admin command can make a namespace or namespaces to be=0D with different LBA size and metadata size with protection information=0D types.=0D =0D This patch introduces Format NVM command with LBA format, Metadata, and=0D= Protection Information for the device. The secure erase operation things=0D= and support for formatting zoned namespaces are yet to be added.=0D =0D The parameter checks inside of this patch has been referred from=0D Keith's old branch.=0D =0D Signed-off-by: Minwoo Im =0D [anaidu.gollu: rebased on e2e]=0D Signed-off-by: Gollu Appalanaidu =0D [k.jensen: rebased for reworked aio tracking]=0D Signed-off-by: Klaus Jensen =0D Reviewed-by: Keith Busch =0D =0D =0D Commit: 8a40754bca14df63c6d2ffe473b68a270dc50679=0D https://github.com/qemu/qemu/commit/8a40754bca14df63c6d2ffe473b68a2= 70dc50679=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/meson.build=0D A hw/block/nvme-dif.c=0D A hw/block/nvme-dif.h=0D M hw/block/nvme-ns.c=0D M hw/block/nvme-ns.h=0D M hw/block/nvme-subsys.c=0D M hw/block/nvme-subsys.h=0D M hw/block/nvme.c=0D M hw/block/nvme.h=0D M hw/block/trace-events=0D M include/block/nvme.h=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request'= into staging=0D =0D emulated nvme updates and fixes=0D =0D * fixes for Coverity CID 1450756, 1450757 and 1450758 (me)=0D * fix for a bug in zone management receive (me)=0D * metadata and end-to-end data protection support (me & Gollu Appalanaidu= )=0D * verify support (Gollu Appalanaidu)=0D * multiple lba formats and format nvm support (Minwoo Im)=0D =0D and a couple of misc refactorings from me.=0D =0D v2:=0D - remove an unintended submodule update. Argh.=0D =0D # gpg: Signature made Thu 18 Mar 2021 11:53:48 GMT=0D # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0= DE9=0D # gpg: Good signature from "Klaus Jensen " [unknown]=0D= # gpg: aka "Klaus Jensen " [unknown= ]=0D # gpg: WARNING: This key is not certified with a trusted signature!=0D # gpg: There is no indication that the signature belongs to the = owner.=0D # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D = A838=0D # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F = 0DE9=0D =0D * remotes/nvme/tags/nvme-next-pull-request:=0D hw/block/nvme: add support for the format nvm command=0D hw/block/nvme: pull lba format initialization=0D hw/block/nvme: prefer runtime helpers instead of device parameters=0D hw/block/nvme: support multiple lba formats=0D hw/block/nvme: add non-mdts command size limit for verify=0D hw/block/nvme: add verify command=0D hw/block/nvme: end-to-end data protection=0D hw/block/nvme: add metadata support=0D hw/block/nvme: fix zone management receive reporting too many zones=0D hw/block/nvme: assert namespaces array indices=0D hw/block/nvme: fix potential overflow=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/1b507e55f819...8a40754bca14= =0D From MAILER-DAEMON Thu Mar 18 19:10:36 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lN1ml-0001fX-QN for mharc-qemu-commits@gnu.org; Thu, 18 Mar 2021 19:10:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51956) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lN1mi-0001fJ-Jy for qemu-commits@nongnu.org; Thu, 18 Mar 2021 19:10:33 -0400 Received: from out-27.smtp.github.com ([192.30.252.210]:51937) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lN1me-0000fw-Ts for qemu-commits@nongnu.org; Thu, 18 Mar 2021 19:10:31 -0400 Received: from github.com (hubbernetes-node-609cd7e.ash1-iad.github.net [10.56.105.63]) by smtp.github.com (Postfix) with ESMTPA id 8735A9005B6 for ; Thu, 18 Mar 2021 16:10:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616109026; bh=SWaBUQKvJ6Qx3a37jhUpuS2WI/prHL7wOKEQX7oqFtA=; h=Date:From:To:Subject:From; b=xTRFPcSfx/+Wz+IBmBeylQ2fyhMXhwp5XJEgxOMc1YbbmTW99/6AQeCMAwl6Kfwu8 pQOKPabj2omUKnMuLZIQlieTOfMHU7eUl9rwMn8KCxiNfWZbP7HEfA7lwuLqJf+qtt SikAIH/Hdm/TEnhseXNXkMJaUT81M6tofyGD7FTY= Date: Thu, 18 Mar 2021 16:10:26 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.210; envelope-from=noreply@github.com; helo=out-27.smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] ccd801: hw/block/pflash_cfi: Fix code style for checkpatch.pl X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Mar 2021 23:10:34 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: ccd8014b813897886eae4ed5c725eb9dc5eedbd3=0D https://github.com/qemu/qemu/commit/ccd8014b813897886eae4ed5c725eb9= dc5eedbd3=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi01.c=0D M hw/block/pflash_cfi02.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi: Fix code style for checkpatch.pl=0D =0D We are going to move this code, fix its style first.=0D =0D Reviewed-by: Bin Meng =0D Reviewed-by: David Edmondson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210310170528.1184868-2-philmd@redhat.com>=0D =0D =0D Commit: a42cd11bd34939edd92b312093c8b56487587ff6=0D https://github.com/qemu/qemu/commit/a42cd11bd34939edd92b312093c8b56= 487587ff6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi01.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi01: Extract pflash_cfi01_fill_cfi_table()=0D =0D Fill the CFI table in out of DeviceRealize() in a new function:=0D pflash_cfi01_fill_cfi_table().=0D =0D Reviewed-by: Bin Meng =0D Reviewed-by: David Edmondson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210310170528.1184868-3-philmd@redhat.com>=0D =0D =0D Commit: 4586c2e5d5cd625b36052d5bd9ef0dee69a5c5c6=0D https://github.com/qemu/qemu/commit/4586c2e5d5cd625b36052d5bd9ef0de= e69a5c5c6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi02.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi02: Extract pflash_cfi02_fill_cfi_table()=0D =0D Fill the CFI table in out of DeviceRealize() in a new function:=0D pflash_cfi02_fill_cfi_table().=0D =0D Reviewed-by: Bin Meng =0D Reviewed-by: David Edmondson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210310170528.1184868-4-philmd@redhat.com>=0D =0D =0D Commit: 326d02c34a92f6e30fa3231be83efda43bac36f8=0D https://github.com/qemu/qemu/commit/326d02c34a92f6e30fa3231be83efda= 43bac36f8=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi02.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi02: Set rom_mode to true in pflash_setup_mappings()=0D= =0D There is only one call to pflash_setup_mappings(). Convert 'rom_mode'=0D to boolean and set it to true directly within pflash_setup_mappings().=0D= =0D Reviewed-by: Bin Meng =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: David Edmondson =0D Message-Id: <20210310170528.1184868-5-philmd@redhat.com>=0D =0D =0D Commit: cadf25cfaa8d495c8e642cda49eda074352a8fc8=0D https://github.com/qemu/qemu/commit/cadf25cfaa8d495c8e642cda49eda07= 4352a8fc8=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi02.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi02: Open-code pflash_register_memory(rom=3Dfalse)=0D= =0D There is only one call to pflash_register_memory() with=0D rom_mode =3D=3D false. As we want to modify pflash_register_memory()=0D in the next patch, open-code this trivial function in place for=0D the 'rom_mode =3D=3D false' case.=0D =0D Reviewed-by: Bin Meng =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: David Edmondson =0D Message-Id: <20210310170528.1184868-6-philmd@redhat.com>=0D =0D =0D Commit: 7cb1096021fa749f9dc50a3ff074c2101680741c=0D https://github.com/qemu/qemu/commit/7cb1096021fa749f9dc50a3ff074c21= 01680741c=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi02.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi02: Rename register_memory(true) as mode_read_array=0D= =0D The same pattern is used when setting the flash in READ_ARRAY mode:=0D - Set the state machine command to READ_ARRAY=0D - Reset the write_cycle counter=0D - Reset the memory region in ROMD=0D =0D Refactor the current code by extracting this pattern.=0D It is used three times:=0D =0D - When the timer expires and not in bypass mode=0D =0D - On a read access (on invalid command).=0D =0D - When the device is initialized. Here the ROMD mode is hidden=0D by the memory_region_init_rom_device() call.=0D =0D pflash_register_memory(rom_mode=3Dtrue) already sets the ROM device=0D in "read array" mode (from I/O device to ROM one). Explicit that=0D by renaming the function as pflash_mode_read_array(), adding=0D a trace event and resetting wcycle.=0D =0D Reviewed-by: Bin Meng =0D Reviewed-by: David Edmondson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210310170528.1184868-7-philmd@redhat.com>=0D =0D =0D Commit: 7d1df53f14a26fa95ebee9767d3a4fac281fd70f=0D https://github.com/qemu/qemu/commit/7d1df53f14a26fa95ebee9767d3a4fa= c281fd70f=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi02.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi02: Factor out pflash_reset_state_machine()=0D =0D There is multiple places resetting the internal state machine.=0D Factor the code out in a new pflash_reset_state_machine() method.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: David Edmondson =0D Reviewed-by: Bin Meng =0D Message-Id: <20210310170528.1184868-8-philmd@redhat.com>=0D =0D =0D Commit: d9106341657198096fed7e7c116cd9af606b59c5=0D https://github.com/qemu/qemu/commit/d9106341657198096fed7e7c116cd9a= f606b59c5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi02.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi02: Add DeviceReset method=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: David Edmondson =0D Reviewed-by: Bin Meng =0D Message-Id: <20210310170528.1184868-9-philmd@redhat.com>=0D =0D =0D Commit: 2b49cd652a1df7e0120d75e3e13665410672682e=0D https://github.com/qemu/qemu/commit/2b49cd652a1df7e0120d75e3e136654= 10672682e=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi01.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi01: Clarify trace events=0D =0D Use the 'mode_read_array' event when we set the device in such=0D mode, and use the 'reset' event in DeviceReset handler.=0D =0D Reviewed-by: Bin Meng =0D Reviewed-by: David Edmondson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210310170528.1184868-10-philmd@redhat.com>=0D =0D =0D Commit: 2231bee28c03a60836fc75bc737448042e33272b=0D https://github.com/qemu/qemu/commit/2231bee28c03a60836fc75bc7374480= 42e33272b=0D Author: David Edmondson =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi01.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi01: Correct the type of PFlashCFI01.ro=0D =0D PFlashCFI01.ro is a bool, declare it as such.=0D =0D Signed-off-by: David Edmondson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210216142721.1985543-3-david.edmondson@oracle.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Bin Meng =0D =0D =0D Commit: 91316cbb3830bb845c42da2d6eab06de56b889b0=0D https://github.com/qemu/qemu/commit/91316cbb3830bb845c42da2d6eab06d= e56b889b0=0D Author: David Edmondson =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi01.c=0D M hw/block/pflash_cfi02.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi: Replace DPRINTF with trace events=0D =0D Rather than having a device specific debug implementation in=0D pflash_cfi01.c and pflash_cfi02.c, use the standard tracing facility.=0D =0D Signed-off-by: David Edmondson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210216142721.1985543-2-david.edmondson@oracle.com>=0D [PMD: Rebased, fixed pflash_write_block_erase trace event format]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Bin Meng =0D =0D =0D Commit: cf6b56d4f2107259f52413f979a1d474dad0c1e1=0D https://github.com/qemu/qemu/commit/cf6b56d4f2107259f52413f979a1d47= 4dad0c1e1=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi01.c=0D M hw/block/pflash_cfi02.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/philmd/tags/pflash-20210318' into= staging=0D =0D Parallel NOR Flash patches queue=0D =0D - Code movement to ease maintainability=0D - Tracing improvements=0D =0D # gpg: Signature made Thu 18 Mar 2021 15:44:12 GMT=0D # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC= 0DE=0D # gpg: Good signature from "Philippe Mathieu-Daud=C3=A9 (F4BUG) " [full]=0D # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD = C0DE=0D =0D * remotes/philmd/tags/pflash-20210318:=0D hw/block/pflash_cfi: Replace DPRINTF with trace events=0D hw/block/pflash_cfi01: Correct the type of PFlashCFI01.ro=0D hw/block/pflash_cfi01: Clarify trace events=0D hw/block/pflash_cfi02: Add DeviceReset method=0D hw/block/pflash_cfi02: Factor out pflash_reset_state_machine()=0D hw/block/pflash_cfi02: Rename register_memory(true) as mode_read_array=0D= hw/block/pflash_cfi02: Open-code pflash_register_memory(rom=3Dfalse)=0D= hw/block/pflash_cfi02: Set rom_mode to true in pflash_setup_mappings()=0D= hw/block/pflash_cfi02: Extract pflash_cfi02_fill_cfi_table()=0D hw/block/pflash_cfi01: Extract pflash_cfi01_fill_cfi_table()=0D hw/block/pflash_cfi: Fix code style for checkpatch.pl=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/8a40754bca14...cf6b56d4f210= =0D From MAILER-DAEMON Fri Mar 19 06:03:15 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lNByN-0002oX-D4 for mharc-qemu-commits@gnu.org; Fri, 19 Mar 2021 06:03:15 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45222) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNByM-0002n6-0M for qemu-commits@nongnu.org; Fri, 19 Mar 2021 06:03:14 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:36423 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNByH-0002KA-My for qemu-commits@nongnu.org; Fri, 19 Mar 2021 06:03:13 -0400 Received: from github.com (hubbernetes-node-654780c.va3-iad.github.net [10.48.114.68]) by smtp.github.com (Postfix) with ESMTPA id EFDF85C0474 for ; Fri, 19 Mar 2021 03:03:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616148188; bh=EZvYDmHfNU1tf1oQ6A6fWaJJ2zDOGaeWn3gaR4q6XpU=; h=Date:From:To:Subject:From; b=RmeSICYoEZa5mqfjr07GBSUFvaZ8LQumtZzN4pABEvD/cFNVV0GoVGRRUsHYd13+E nKjmbHGrShDt5efx4obuM1oj7pQymBi5YVL+vXYDTF4QV8htME4H4EF0ZUJjaLCOWh /F2teqrxfSbhvGsBxdatQsuti9CyLK4yT4fbpX+o= Date: Fri, 19 Mar 2021 03:03:08 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] ccd801: hw/block/pflash_cfi: Fix code style for checkpatch.pl X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Mar 2021 10:03:14 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: ccd8014b813897886eae4ed5c725eb9dc5eedbd3=0D https://github.com/qemu/qemu/commit/ccd8014b813897886eae4ed5c725eb9= dc5eedbd3=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi01.c=0D M hw/block/pflash_cfi02.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi: Fix code style for checkpatch.pl=0D =0D We are going to move this code, fix its style first.=0D =0D Reviewed-by: Bin Meng =0D Reviewed-by: David Edmondson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210310170528.1184868-2-philmd@redhat.com>=0D =0D =0D Commit: a42cd11bd34939edd92b312093c8b56487587ff6=0D https://github.com/qemu/qemu/commit/a42cd11bd34939edd92b312093c8b56= 487587ff6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi01.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi01: Extract pflash_cfi01_fill_cfi_table()=0D =0D Fill the CFI table in out of DeviceRealize() in a new function:=0D pflash_cfi01_fill_cfi_table().=0D =0D Reviewed-by: Bin Meng =0D Reviewed-by: David Edmondson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210310170528.1184868-3-philmd@redhat.com>=0D =0D =0D Commit: 4586c2e5d5cd625b36052d5bd9ef0dee69a5c5c6=0D https://github.com/qemu/qemu/commit/4586c2e5d5cd625b36052d5bd9ef0de= e69a5c5c6=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi02.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi02: Extract pflash_cfi02_fill_cfi_table()=0D =0D Fill the CFI table in out of DeviceRealize() in a new function:=0D pflash_cfi02_fill_cfi_table().=0D =0D Reviewed-by: Bin Meng =0D Reviewed-by: David Edmondson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210310170528.1184868-4-philmd@redhat.com>=0D =0D =0D Commit: 326d02c34a92f6e30fa3231be83efda43bac36f8=0D https://github.com/qemu/qemu/commit/326d02c34a92f6e30fa3231be83efda= 43bac36f8=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi02.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi02: Set rom_mode to true in pflash_setup_mappings()=0D= =0D There is only one call to pflash_setup_mappings(). Convert 'rom_mode'=0D to boolean and set it to true directly within pflash_setup_mappings().=0D= =0D Reviewed-by: Bin Meng =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: David Edmondson =0D Message-Id: <20210310170528.1184868-5-philmd@redhat.com>=0D =0D =0D Commit: cadf25cfaa8d495c8e642cda49eda074352a8fc8=0D https://github.com/qemu/qemu/commit/cadf25cfaa8d495c8e642cda49eda07= 4352a8fc8=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi02.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi02: Open-code pflash_register_memory(rom=3Dfalse)=0D= =0D There is only one call to pflash_register_memory() with=0D rom_mode =3D=3D false. As we want to modify pflash_register_memory()=0D in the next patch, open-code this trivial function in place for=0D the 'rom_mode =3D=3D false' case.=0D =0D Reviewed-by: Bin Meng =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: David Edmondson =0D Message-Id: <20210310170528.1184868-6-philmd@redhat.com>=0D =0D =0D Commit: 7cb1096021fa749f9dc50a3ff074c2101680741c=0D https://github.com/qemu/qemu/commit/7cb1096021fa749f9dc50a3ff074c21= 01680741c=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi02.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi02: Rename register_memory(true) as mode_read_array=0D= =0D The same pattern is used when setting the flash in READ_ARRAY mode:=0D - Set the state machine command to READ_ARRAY=0D - Reset the write_cycle counter=0D - Reset the memory region in ROMD=0D =0D Refactor the current code by extracting this pattern.=0D It is used three times:=0D =0D - When the timer expires and not in bypass mode=0D =0D - On a read access (on invalid command).=0D =0D - When the device is initialized. Here the ROMD mode is hidden=0D by the memory_region_init_rom_device() call.=0D =0D pflash_register_memory(rom_mode=3Dtrue) already sets the ROM device=0D in "read array" mode (from I/O device to ROM one). Explicit that=0D by renaming the function as pflash_mode_read_array(), adding=0D a trace event and resetting wcycle.=0D =0D Reviewed-by: Bin Meng =0D Reviewed-by: David Edmondson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210310170528.1184868-7-philmd@redhat.com>=0D =0D =0D Commit: 7d1df53f14a26fa95ebee9767d3a4fac281fd70f=0D https://github.com/qemu/qemu/commit/7d1df53f14a26fa95ebee9767d3a4fa= c281fd70f=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi02.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi02: Factor out pflash_reset_state_machine()=0D =0D There is multiple places resetting the internal state machine.=0D Factor the code out in a new pflash_reset_state_machine() method.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: David Edmondson =0D Reviewed-by: Bin Meng =0D Message-Id: <20210310170528.1184868-8-philmd@redhat.com>=0D =0D =0D Commit: d9106341657198096fed7e7c116cd9af606b59c5=0D https://github.com/qemu/qemu/commit/d9106341657198096fed7e7c116cd9a= f606b59c5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi02.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi02: Add DeviceReset method=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: David Edmondson =0D Reviewed-by: Bin Meng =0D Message-Id: <20210310170528.1184868-9-philmd@redhat.com>=0D =0D =0D Commit: 2b49cd652a1df7e0120d75e3e13665410672682e=0D https://github.com/qemu/qemu/commit/2b49cd652a1df7e0120d75e3e136654= 10672682e=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi01.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi01: Clarify trace events=0D =0D Use the 'mode_read_array' event when we set the device in such=0D mode, and use the 'reset' event in DeviceReset handler.=0D =0D Reviewed-by: Bin Meng =0D Reviewed-by: David Edmondson =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210310170528.1184868-10-philmd@redhat.com>=0D =0D =0D Commit: 2231bee28c03a60836fc75bc737448042e33272b=0D https://github.com/qemu/qemu/commit/2231bee28c03a60836fc75bc7374480= 42e33272b=0D Author: David Edmondson =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi01.c=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi01: Correct the type of PFlashCFI01.ro=0D =0D PFlashCFI01.ro is a bool, declare it as such.=0D =0D Signed-off-by: David Edmondson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210216142721.1985543-3-david.edmondson@oracle.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Bin Meng =0D =0D =0D Commit: 91316cbb3830bb845c42da2d6eab06de56b889b0=0D https://github.com/qemu/qemu/commit/91316cbb3830bb845c42da2d6eab06d= e56b889b0=0D Author: David Edmondson =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi01.c=0D M hw/block/pflash_cfi02.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D hw/block/pflash_cfi: Replace DPRINTF with trace events=0D =0D Rather than having a device specific debug implementation in=0D pflash_cfi01.c and pflash_cfi02.c, use the standard tracing facility.=0D =0D Signed-off-by: David Edmondson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210216142721.1985543-2-david.edmondson@oracle.com>=0D [PMD: Rebased, fixed pflash_write_block_erase trace event format]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Bin Meng =0D =0D =0D Commit: cf6b56d4f2107259f52413f979a1d474dad0c1e1=0D https://github.com/qemu/qemu/commit/cf6b56d4f2107259f52413f979a1d47= 4dad0c1e1=0D Author: Peter Maydell =0D Date: 2021-03-18 (Thu, 18 Mar 2021)=0D =0D Changed paths:=0D M hw/block/pflash_cfi01.c=0D M hw/block/pflash_cfi02.c=0D M hw/block/trace-events=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/philmd/tags/pflash-20210318' into= staging=0D =0D Parallel NOR Flash patches queue=0D =0D - Code movement to ease maintainability=0D - Tracing improvements=0D =0D # gpg: Signature made Thu 18 Mar 2021 15:44:12 GMT=0D # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC= 0DE=0D # gpg: Good signature from "Philippe Mathieu-Daud=C3=A9 (F4BUG) " [full]=0D # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD = C0DE=0D =0D * remotes/philmd/tags/pflash-20210318:=0D hw/block/pflash_cfi: Replace DPRINTF with trace events=0D hw/block/pflash_cfi01: Correct the type of PFlashCFI01.ro=0D hw/block/pflash_cfi01: Clarify trace events=0D hw/block/pflash_cfi02: Add DeviceReset method=0D hw/block/pflash_cfi02: Factor out pflash_reset_state_machine()=0D hw/block/pflash_cfi02: Rename register_memory(true) as mode_read_array=0D= hw/block/pflash_cfi02: Open-code pflash_register_memory(rom=3Dfalse)=0D= hw/block/pflash_cfi02: Set rom_mode to true in pflash_setup_mappings()=0D= hw/block/pflash_cfi02: Extract pflash_cfi02_fill_cfi_table()=0D hw/block/pflash_cfi01: Extract pflash_cfi01_fill_cfi_table()=0D hw/block/pflash_cfi: Fix code style for checkpatch.pl=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/8a40754bca14...cf6b56d4f210= =0D From MAILER-DAEMON Fri Mar 19 06:12:56 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lNC7j-0000DC-TQ for mharc-qemu-commits@gnu.org; Fri, 19 Mar 2021 06:12:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47656) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNC7i-0000Bb-FN for qemu-commits@nongnu.org; Fri, 19 Mar 2021 06:12:54 -0400 Received: from out-18.smtp.github.com ([192.30.252.201]:56251 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNC7d-0008CX-Pl for qemu-commits@nongnu.org; Fri, 19 Mar 2021 06:12:54 -0400 Received: from github.com (hubbernetes-node-167c2a8.va3-iad.github.net [10.48.111.56]) by smtp.github.com (Postfix) with ESMTPA id 1A072340105 for ; Fri, 19 Mar 2021 03:12:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616148769; bh=305LDJdthd6XvJBJMuUGFk4nchN1tnunNKM7aUQiJ/4=; h=Date:From:To:Subject:From; b=eBk6IlbA3mhxIeJ2aMoGrmh1lP3oHCsW/tI/aqCzb6UJD5XwNLP6PykYuM7iP5abi gfaN6qh1oqYoYjpFPVtHm4FHkBOlY4dZ7+cVCPtfIn4CksORxDquFr81Y6IcIdi41e a+7+Zu5V6mZnA5iGrqPJqRN3LM3eet8WGOHSDTtc= Date: Fri, 19 Mar 2021 03:12:49 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.249, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] f81ca6: docs/system/deprecated: Fix note on fdc drive prop... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Mar 2021 10:12:54 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: f81ca6b8c50d0393dc37c30de14f65066fe6a25c=0D https://github.com/qemu/qemu/commit/f81ca6b8c50d0393dc37c30de14f650= 66fe6a25c=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D =0D Log Message:=0D -----------=0D docs/system/deprecated: Fix note on fdc drive properties=0D =0D Commit 4a27a638e7 "fdc: Deprecate configuring floppies with -global=0D isa-fdc" actually deprecated any use of floppy controller driver=0D properties, not just with -global. Correct the deprecation note=0D accordingly.=0D =0D Fixes: 4a27a638e718b445648de6b27c709353551d9b44=0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D Message-id: 20210309161214.1402527-2-armbru@redhat.com=0D Signed-off-by: John Snow =0D =0D =0D Commit: 2c6660b7a46f436beb3a237b682491c27745cd34=0D https://github.com/qemu/qemu/commit/2c6660b7a46f436beb3a237b682491c= 27745cd34=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/block/fdc.c=0D M tests/qemu-iotests/172=0D M tests/qemu-iotests/172.out=0D =0D Log Message:=0D -----------=0D fdc: Drop deprecated floppy configuration=0D =0D Drop the crap deprecated in commit 4a27a638e7 "fdc: Deprecate=0D configuring floppies with -global isa-fdc" (v5.1.0).=0D =0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D Message-id: 20210309161214.1402527-3-armbru@redhat.com=0D Signed-off-by: John Snow =0D =0D =0D Commit: a3aff40e4f46267f5e0cf236f1a04d81fcde3bae=0D https://github.com/qemu/qemu/commit/a3aff40e4f46267f5e0cf236f1a04d8= 1fcde3bae=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M hw/block/fdc.c=0D =0D Log Message:=0D -----------=0D fdc: Inline fdctrl_connect_drives() into fdctrl_realize_common()=0D =0D The previous commit rendered the name fdctrl_connect_drives() somewhat=0D= misleading. Get rid of it by inlining the (now pretty simple)=0D function into its only caller.=0D =0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D Message-id: 20210309161214.1402527-4-armbru@redhat.com=0D Signed-off-by: John Snow =0D =0D =0D Commit: 4edda4a366a375b9e0be8a17c32dce7e5c5efa67=0D https://github.com/qemu/qemu/commit/4edda4a366a375b9e0be8a17c32dce7= e5c5efa67=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M blockdev.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M include/sysemu/blockdev.h=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D blockdev: Drop deprecated bogus -drive interface type=0D =0D Drop the crap deprecated in commit a1b40bda08 "blockdev: Deprecate=0D -drive with bogus interface type" (v5.1.0).=0D =0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D Message-id: 20210309161214.1402527-5-armbru@redhat.com=0D Signed-off-by: John Snow =0D =0D =0D Commit: 84d406e0a047d83eb27f6345d5ed18e22a80b32a=0D https://github.com/qemu/qemu/commit/84d406e0a047d83eb27f6345d5ed18e= 22a80b32a=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/xilinx_zynq.c=0D M hw/audio/cs4231.c=0D M hw/block/fdc.c=0D M hw/char/etraxfs_ser.c=0D M hw/cris/axis_dev88.c=0D M hw/display/tcx.c=0D M hw/intc/etraxfs_pic.c=0D M hw/microblaze/xlnx-zynqmp-pmu.c=0D M hw/misc/zynq_slcr.c=0D M hw/sparc/sun4m.c=0D M hw/timer/etraxfs_timer.c=0D M include/hw/arm/armv7m.h=0D M include/hw/arm/fsl-imx25.h=0D M include/hw/arm/fsl-imx31.h=0D M include/hw/arm/fsl-imx6.h=0D M include/hw/arm/fsl-imx6ul.h=0D M include/hw/arm/fsl-imx7.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/cris/etraxfs.h=0D M include/hw/i386/ich9.h=0D M include/hw/misc/grlib_ahb_apb_pnp.h=0D M include/hw/misc/zynq-xadc.h=0D M include/hw/register.h=0D M include/hw/sparc/grlib.h=0D M softmmu/vl.c=0D M tests/vmstate-static-checker-data/dump1.json=0D M tests/vmstate-static-checker-data/dump2.json=0D =0D Log Message:=0D -----------=0D hw: Replace anti-social QOM type names=0D =0D Several QOM type names contain ',':=0D =0D ARM,bitband-memory=0D etraxfs,pic=0D etraxfs,serial=0D etraxfs,timer=0D fsl,imx25=0D fsl,imx31=0D fsl,imx6=0D fsl,imx6ul=0D fsl,imx7=0D grlib,ahbpnp=0D grlib,apbpnp=0D grlib,apbuart=0D grlib,gptimer=0D grlib,irqmp=0D qemu,register=0D SUNW,bpp=0D SUNW,CS4231=0D SUNW,DBRI=0D SUNW,DBRI.prom=0D SUNW,fdtwo=0D SUNW,sx=0D SUNW,tcx=0D xilinx,zynq_slcr=0D xlnx,zynqmp=0D xlnx,zynqmp-pmu-soc=0D xlnx,zynq-xadc=0D =0D These are all device types. They can't be plugged with -device /=0D device_add, except for xlnx,zynqmp-pmu-soc, and I doubt that one=0D actually works.=0D =0D They *can* be used with -device / device_add to request help.=0D Usability is poor, though: you have to double the comma, like this:=0D =0D $ qemu-system-x86_64 -device SUNW,,fdtwo,help=0D =0D Trap for the unwary. The fact that this was broken in=0D device-introspect-test for more than six years until commit e27bd49876=0D= fixed it demonstrates that "the unwary" includes seasoned developers.=0D =0D One QOM type name contains ' ': "ICH9 SMB". Because having to=0D remember just one way to quote would be too easy.=0D =0D Rename the "SUNW,FOO types to "sun-FOO". Summarily replace ',' and '=0D ' by '-' in the other type names.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210304140229.575481-2-armbru@redhat.com>=0D Reviewed-by: Mark Cave-Ayland =0D Acked-by: Paolo Bonzini =0D =0D =0D Commit: 0c727a621a646504ccec2b08e55fd48030448466=0D https://github.com/qemu/qemu/commit/0c727a621a646504ccec2b08e55fd48= 030448466=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/exec/memory.h=0D =0D Log Message:=0D -----------=0D memory: Drop "qemu:" prefix from QOM memory region type names=0D =0D Almost all QOM type names consist only of letters, digits, '-', '_',=0D and '.'. Just two contain ':': "qemu:memory-region" and=0D "qemu:iommu-memory-region". Neither can be plugged with -object.=0D Rename them to "memory-region" and "iommu-memory-region".=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210304140229.575481-3-armbru@redhat.com>=0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Acked-by: Paolo Bonzini =0D =0D =0D Commit: b8796be5c06c6c3a1b07da1109f0042817e46d54=0D https://github.com/qemu/qemu/commit/b8796be5c06c6c3a1b07da1109f0042= 817e46d54=0D Author: Peter Maydell =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M blockdev.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/arm/xilinx_zynq.c=0D M hw/audio/cs4231.c=0D M hw/block/fdc.c=0D M hw/char/etraxfs_ser.c=0D M hw/cris/axis_dev88.c=0D M hw/display/tcx.c=0D M hw/intc/etraxfs_pic.c=0D M hw/microblaze/xlnx-zynqmp-pmu.c=0D M hw/misc/zynq_slcr.c=0D M hw/sparc/sun4m.c=0D M hw/timer/etraxfs_timer.c=0D M include/exec/memory.h=0D M include/hw/arm/armv7m.h=0D M include/hw/arm/fsl-imx25.h=0D M include/hw/arm/fsl-imx31.h=0D M include/hw/arm/fsl-imx6.h=0D M include/hw/arm/fsl-imx6ul.h=0D M include/hw/arm/fsl-imx7.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/cris/etraxfs.h=0D M include/hw/i386/ich9.h=0D M include/hw/misc/grlib_ahb_apb_pnp.h=0D M include/hw/misc/zynq-xadc.h=0D M include/hw/register.h=0D M include/hw/sparc/grlib.h=0D M include/sysemu/blockdev.h=0D M softmmu/vl.c=0D M tests/qemu-iotests/172=0D M tests/qemu-iotests/172.out=0D M tests/vmstate-static-checker-data/dump1.json=0D M tests/vmstate-static-checker-data/dump2.json=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/armbru/tags/pull-qom-fdc-2021-03-= 16-v4' into staging=0D =0D QOM and fdc patches patches for 2021-03-16=0D =0D # gpg: Signature made Fri 19 Mar 2021 05:56:36 GMT=0D # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918= 653=0D # gpg: issuer "armbru@redhat.com"=0D # gpg: Good signature from "Markus Armbruster " [full]= =0D # gpg: aka "Markus Armbruster " [ful= l]=0D # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 = 8653=0D =0D * remotes/armbru/tags/pull-qom-fdc-2021-03-16-v4:=0D memory: Drop "qemu:" prefix from QOM memory region type names=0D hw: Replace anti-social QOM type names=0D blockdev: Drop deprecated bogus -drive interface type=0D fdc: Inline fdctrl_connect_drives() into fdctrl_realize_common()=0D fdc: Drop deprecated floppy configuration=0D docs/system/deprecated: Fix note on fdc drive properties=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/cf6b56d4f210...b8796be5c06c= =0D From MAILER-DAEMON Fri Mar 19 07:28:28 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lNDIq-0000df-7w for mharc-qemu-commits@gnu.org; Fri, 19 Mar 2021 07:28:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35508) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNDIo-0000ZE-Be for qemu-commits@nongnu.org; Fri, 19 Mar 2021 07:28:26 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:55041) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNDIg-000349-0K for qemu-commits@nongnu.org; Fri, 19 Mar 2021 07:28:23 -0400 Received: from github.com (hubbernetes-node-0d9ed48.ash1-iad.github.net [10.56.25.74]) by smtp.github.com (Postfix) with ESMTPA id 3B637900F3B for ; Fri, 19 Mar 2021 04:28:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616153296; bh=32adSlxFv7ueTtcRnH3ww1YFd799krfzCPGZt0FaK1k=; h=Date:From:To:Subject:From; b=YJynxxzZsJ0d+WDOqiPpaaT5uSX1XDet1jPYEdyWAhAtE7/RoFQDD4H8P9/6AXwyg rwgsAxmvfUDmdsrYGfDMaod1rlSR/5Ey08902ThQWEQMm4+g/LPcFzWtH75GhZIL7z ZjEN/KQ40aFOMDweavWdtduNhlgtNpq6XE5U7fWA= Date: Fri, 19 Mar 2021 04:28:16 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -45 X-Spam_score: -4.6 X-Spam_bar: ---- X-Spam_report: (-4.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 729222: block: remove format defaults from QemuOpts in bdr... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Mar 2021 11:28:26 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 729222af149db3cfaaa5ef1c0773b5c632b7dbee=0D https://github.com/qemu/qemu/commit/729222af149db3cfaaa5ef1c0773b5c= 632b7dbee=0D Author: Stefano Garzarella =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M block.c=0D =0D Log Message:=0D -----------=0D block: remove format defaults from QemuOpts in bdrv_create_file()=0D =0D QemuOpts is usually created merging the QemuOptsList of format=0D and protocol. So, when the format calls bdr_create_file(), the 'opts'=0D parameter contains a QemuOptsList with a combination of format and=0D protocol default values.=0D =0D The format properly removes its options before calling=0D bdr_create_file(), but the default values remain in 'opts->list'.=0D So if the protocol has options with the same name (e.g. rbd has=0D 'cluster_size' as qcow2), it will see the default values of the format,=0D= since for overlapping options, the format wins.=0D =0D To avoid this issue, lets convert QemuOpts to QDict, in this way we take=0D= only the set options, and then convert it back to QemuOpts, using the=0D 'create_opts' of the protocol. So the new QemuOpts, will contain only the= =0D protocol defaults.=0D =0D Suggested-by: Kevin Wolf =0D Signed-off-by: Stefano Garzarella =0D Message-Id: <20210308161232.248833-1-sgarzare@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e21577707152c10017dcf4d3340e83b100057355=0D https://github.com/qemu/qemu/commit/e21577707152c10017dcf4d3340e83b= 100057355=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D A tests/qemu-iotests/tests/qsd-jobs=0D A tests/qemu-iotests/tests/qsd-jobs.out=0D =0D Log Message:=0D -----------=0D storage-daemon: Call job_cancel_sync_all() on shutdown=0D =0D bdrv_close_all() asserts that no jobs are running any more, so we need=0D= to cancel all jobs first to avoid failing the assertion.=0D =0D Fixes: b55a3c8860b763b62b2cc2f4a6f55379977bbde5=0D Reported-by: Nini Gu =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210309121814.31078-1-kwolf@redhat.com>=0D Reviewed-by: Eric Blake =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 1bf26076d677f693dd99a6e8ef2eca69b842d873=0D https://github.com/qemu/qemu/commit/1bf26076d677f693dd99a6e8ef2eca6= 9b842d873=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M block/stream.c=0D M tests/qemu-iotests/tests/qsd-jobs=0D M tests/qemu-iotests/tests/qsd-jobs.out=0D =0D Log Message:=0D -----------=0D stream: Don't crash when node permission is denied=0D =0D The image streaming block job restricts shared permissions of the nodes=0D= it accesses. This can obviously fail when other users already got these=0D= permissions. &error_abort is therefore wrong and can crash. Handle these=0D= errors gracefully and just fail starting the block job.=0D =0D Reported-by: Nini Gu =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210309173451.45152-1-kwolf@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: Alberto Garcia =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 3663dca461131f7c8e58737feba8638e064bb5d4=0D https://github.com/qemu/qemu/commit/3663dca461131f7c8e58737feba8638= e064bb5d4=0D Author: Max Reitz =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M block/curl.c=0D =0D Log Message:=0D -----------=0D curl: Store BDRVCURLState pointer in CURLSocket=0D =0D A socket does not really belong to any specific state. We do not need=0D= to store a pointer to "its" state in it, a pointer to the common=0D BDRVCURLState is sufficient.=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210309130541.37540-2-mreitz@redhat.com>=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 0f418a207696b37f05d38f978c8873ee0a4f9815=0D https://github.com/qemu/qemu/commit/0f418a207696b37f05d38f978c8873e= e0a4f9815=0D Author: Max Reitz =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M block/curl.c=0D =0D Log Message:=0D -----------=0D curl: Disconnect sockets from CURLState=0D =0D When a curl transfer is finished, that does not mean that CURL lets go=0D= of all the sockets it used for it. We therefore must not free a=0D CURLSocket object before CURL has invoked curl_sock_cb() to tell us to=0D= remove it. Otherwise, we may get a use-after-free, as described in this=0D= bug report: https://bugs.launchpad.net/qemu/+bug/1916501=0D =0D (Reproducer from that report:=0D $ qemu-img convert -f qcow2 -O raw \=0D https://download.cirros-cloud.net/0.4.0/cirros-0.4.0-x86_64-disk.img \=0D= out.img=0D )=0D =0D (Alternatively, it might seem logical to force-drop all sockets that=0D have been used for a state when the respective transfer is done, kind of=0D= like it is done now, but including unsetting the AIO handlers.=0D Unfortunately, doing so makes the driver just hang instead of crashing,=0D= which seems to evidence that CURL still uses those sockets.)=0D =0D Make the CURLSocket object independent of "its" CURLState by putting all=0D= sockets into a hash table belonging to the BDRVCURLState instead of a=0D list that belongs to a CURLState. Do not touch any sockets in=0D curl_clean_state().=0D =0D Testing, it seems like all sockets are indeed gone by the time the curl=0D= BDS is closed, so it seems like there really was no point in freeing any=0D= socket just because a transfer is done. libcurl does invoke=0D curl_sock_cb() with CURL_POLL_REMOVE for every socket it has.=0D =0D Buglink: https://bugs.launchpad.net/qemu/+bug/1916501=0D Signed-off-by: Max Reitz =0D Message-Id: <20210309130541.37540-3-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 6f4b1996b4cdc6b745bebae737c250f08c1ad965=0D https://github.com/qemu/qemu/commit/6f4b1996b4cdc6b745bebae737c250f= 08c1ad965=0D Author: Stefan Hajnoczi =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: disable VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD for now=0D =0D The vhost-user in-flight shmfd feature has not been tested with=0D qemu-storage-daemon's vhost-user-blk server. Disable this optional=0D feature for now because it requires MFD_ALLOW_SEALING, which is not=0D available in some CI environments.=0D =0D If we need this feature in the future it can be re-enabled after=0D testing.=0D =0D Reported-by: Peter Maydell =0D Cc: Kevin Wolf =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210309094106.196911-2-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 9695c3af3a1e21c3489622083f2c588eb2f426fd=0D https://github.com/qemu/qemu/commit/9695c3af3a1e21c3489622083f2c588= eb2f426fd=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/qmp-cmd-test.c=0D M tests/qtest/test-netfilter.c=0D =0D Log Message:=0D -----------=0D tests: Drop 'props' from object-add calls=0D =0D The 'props' option has been deprecated in 5.0 in favour of a flattened=0D= object-add command. Time to change our test cases to drop the deprecated=0D= option.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 50243407457a9fb0ed17b9a9ba9fc9aee09495b1=0D https://github.com/qemu/qemu/commit/50243407457a9fb0ed17b9a9ba9fc9a= ee09495b1=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M qapi/qom.json=0D M qom/qom-qmp-cmds.c=0D =0D Log Message:=0D -----------=0D qapi/qom: Drop deprecated 'props' from object-add=0D =0D The option has been deprecated in QEMU 5.0, remove it.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 2273b2410f876111ed97b5d2cd93d7f04b045432=0D https://github.com/qemu/qemu/commit/2273b2410f876111ed97b5d2cd93d7f= 04b045432=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for iothread=0D =0D Add an ObjectOptions union that will eventually describe the options of=0D= all user creatable object types. As unions can't exist without any=0D branches, also add the first object type.=0D =0D This adds a QAPI schema for the properties of the iothread object.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 8825587b53c62f40375a2f63dfefd3adc6988eb1=0D https://github.com/qemu/qemu/commit/8825587b53c62f40375a2f63dfefd3a= dc6988eb1=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/authz.json=0D M qapi/qom.json=0D M storage-daemon/qapi/qapi-schema.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for authz-*=0D =0D This adds a QAPI schema for the properties of the authz-* objects.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: a68d909ef943cc47b512cbd8890e0d90055bec05=0D https://github.com/qemu/qemu/commit/a68d909ef943cc47b512cbd8890e0d9= 0055bec05=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for cryptodev-*=0D =0D This adds a QAPI schema for the properties of the cryptodev-* objects.=0D= =0D These interfaces have some questionable aspects (cryptodev-backend is=0D really an abstract base class without function, and the queues option=0D only makes sense for cryptodev-vhost-user), but as the goal is to=0D represent the existing interface in QAPI, leave these things in place.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: d7ef29c4ed0b09cb175b457851c1cf5f6b1d7513=0D https://github.com/qemu/qemu/commit/d7ef29c4ed0b09cb175b457851c1cf5= f6b1d7513=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for dbus-vmstate=0D =0D This adds a QAPI schema for the properties of the dbus-vmstate object.=0D= =0D A list represented as a comma separated string is clearly not very=0D QAPI-like, but for now just describe the existing interface.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 913d9063e1447a71c948edef3534a8e9965297e3=0D https://github.com/qemu/qemu/commit/913d9063e1447a71c948edef3534a8e= 9965297e3=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/common.json=0D M qapi/machine.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for memory-backend-*=0D =0D This adds a QAPI schema for the properties of the memory-backend-*=0D objects.=0D =0D HostMemPolicy has to be moved to an include file that can be used by the=0D= storage daemon, too, because ObjectOptions must be the same in all=0D binaries if we don't want to compile the whole code multiple times.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 6815bc1d03c1f883183b5a8b31861b15d951f2a4=0D https://github.com/qemu/qemu/commit/6815bc1d03c1f883183b5a8b31861b1= 5d951f2a4=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for rng-*, deprecate 'opened'=0D =0D This adds a QAPI schema for the properties of the rng-* objects.=0D =0D The 'opened' property doesn't seem to make sense as an external=0D interface: It is automatically set to true in ucc->complete, and=0D explicitly setting it to true earlier just means that trying to set=0D additional options will result in an error. After the property has once=0D= been set to true (i.e. when the object construction has completed), it=0D= can never be reset to false. In other words, the 'opened' property is=0D useless. Mark it as deprecated in the schema from the start.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 381bd7440d8178c9e56bac7086c9e3b0cad066ec=0D https://github.com/qemu/qemu/commit/381bd7440d8178c9e56bac7086c9e3b= 0cad066ec=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/block-core.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for throttle-group=0D =0D This adds a QAPI schema for the properties of the throttle-group object.=0D= =0D The only purpose of the x-* properties is to make the nested options in=0D= 'limits' available for a command line parser that doesn't support=0D structs. Any parser that will use the QAPI schema will supports structs,=0D= though, so they will not be needed in the schema in the future.=0D =0D To keep the conversion straightforward, add them to the schema anyway.=0D= We can then remove the options and adjust documentation, test cases etc.=0D= in a separate patch.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 39c4c27d378af56059628a5cd803d390849f32e8=0D https://github.com/qemu/qemu/commit/39c4c27d378af56059628a5cd803d39= 0849f32e8=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qapi/crypto.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for secret*, deprecate 'loaded'=0D =0D This adds a QAPI schema for the properties of the secret* objects.=0D =0D The 'loaded' property doesn't seem to make sense as an external=0D interface: It is automatically set to true in ucc->complete, and=0D explicitly setting it to true earlier just means that additional options=0D= will be silently ignored.=0D =0D In other words, the 'loaded' property is useless. Mark it as deprecated=0D= in the schema from the start.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: d09e49374b336d36a4223e8a411582128d3a3796=0D https://github.com/qemu/qemu/commit/d09e49374b336d36a4223e8a4115821= 28d3a3796=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/crypto.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for tls-*, deprecate 'loaded'=0D =0D This adds a QAPI schema for the properties of the tls-* objects.=0D =0D The 'loaded' property doesn't seem to make sense as an external=0D interface: It is automatically set to true in ucc->complete, and=0D explicitly setting it to true earlier just means that additional options=0D= will be silently ignored.=0D =0D In other words, the 'loaded' property is useless. Mark it as deprecated=0D= in the schema from the start.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: f3189b9135ae9bbc922ac56528784ca9cd04ef4a=0D https://github.com/qemu/qemu/commit/f3189b9135ae9bbc922ac56528784ca= 9cd04ef4a=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for can-*=0D =0D This adds a QAPI schema for the properties of the can-* objects.=0D =0D can-bus doesn't have any properties, so it only needs to be added to the=0D= ObjectType enum without adding a new branch to ObjectOptions.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 3d0d3c30ae3a259bff176f85a3efa2d0816695af=0D https://github.com/qemu/qemu/commit/3d0d3c30ae3a259bff176f85a3efa2d= 0816695af=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for colo-compare=0D =0D This adds a QAPI schema for the properties of the colo-compare object.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 1156a67531d23f01c1d86ee12deb1c4e290b5044=0D https://github.com/qemu/qemu/commit/1156a67531d23f01c1d86ee12deb1c4= e290b5044=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/common.json=0D M qapi/net.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for filter-*=0D =0D This adds a QAPI schema for the properties of the filter-* objects.=0D =0D Some parts of the interface (in particular NetfilterProperties.position)=0D= are very unusual for QAPI, but for now just describe the existing=0D interface.=0D =0D net.json can't be included in qom.json because the storage daemon=0D doesn't have it. NetFilterDirection is still required in the new object=0D= property definitions in qom.json, so move this enum to common.json.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: b9e479d008dd2e8fd826656563138eabd5af0c64=0D https://github.com/qemu/qemu/commit/b9e479d008dd2e8fd826656563138ea= bd5af0c64=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for pr-manager-helper=0D =0D This adds a QAPI schema for the properties of the pr-manager-helper=0D object.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 590466f056c4f2a7ff87ed751cece4f4ff02fd57=0D https://github.com/qemu/qemu/commit/590466f056c4f2a7ff87ed751cece4f= 4ff02fd57=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for confidential-guest-support=0D =0D This adds a QAPI schema for the properties of the objects implementing=0D= the confidential-guest-support interface.=0D =0D pef-guest and s390x-pv-guest don't have any properties, so they only=0D need to be added to the ObjectType enum without adding a new branch to=0D= ObjectOptions.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 30e863e5a7a35fc5b2cfa933ddbc30f84b0415a0=0D https://github.com/qemu/qemu/commit/30e863e5a7a35fc5b2cfa933ddbc30f= 84b0415a0=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/common.json=0D M qapi/qom.json=0D M qapi/ui.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for input-*=0D =0D This adds a QAPI schema for the properties of the input-* objects.=0D =0D ui.json cannot be included in qom.json because the storage daemon can't=0D= use it, so move GrabToggleKeys to common.json.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 17422da082ffcecb38bd1f2e2de6d56a61e8cd9c=0D https://github.com/qemu/qemu/commit/17422da082ffcecb38bd1f2e2de6d56= a61e8cd9c=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for x-remote-object=0D =0D This adds a QAPI schema for the properties of the x-remote-object=0D object.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 9151e59a8b6e854eb733553c6772351049ca6ab6=0D https://github.com/qemu/qemu/commit/9151e59a8b6e854eb733553c6772351= 049ca6ab6=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M hw/block/xen-block.c=0D M include/qom/object_interfaces.h=0D M monitor/misc.c=0D M qapi/qom.json=0D M qom/qom-qmp-cmds.c=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qapi/qom: QAPIfy object-add=0D =0D This converts object-add from 'gen': false to the ObjectOptions QAPI=0D type. As an immediate benefit, clients can now use QAPI schema=0D introspection for user creatable QOM objects.=0D =0D It is also the first step towards making the QAPI schema the only=0D external interface for the creation of user creatable objects. Once all=0D= other places (HMP and command lines of the system emulator and all=0D tools) go through QAPI, too, some object implementations can be=0D simplified because some checks (e.g. that mandatory options are set) are=0D= already performed by QAPI, and in another step, QOM boilerplate code=0D could be generated from the schema.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 98c43b7b8b7504099760383fc802d18bc8b18f48=0D https://github.com/qemu/qemu/commit/98c43b7b8b7504099760383fc802d18= bc8b18f48=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Make "object" QemuOptsList optional=0D =0D This code is going away anyway, but for a few more commits, we'll be in=0D= a state where some binaries still use QemuOpts and others don't. If the=0D= "object" QemuOptsList doesn't even exist, we don't have to remove (or=0D fail to remove, and therefore abort) a user creatable object from it.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 2daf28557e43cc0724b9a8b36e77db10b455e286=0D https://github.com/qemu/qemu/commit/2daf28557e43cc0724b9a8b36e77db1= 0b455e286=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qemu-storage-daemon: Implement --object with qmp_object_add()=0D =0D This QAPIfies --object and ensures that QMP and the command line option=0D= behave the same.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: c9231123907415d7737263b9ca6f125a8181463b=0D https://github.com/qemu/qemu/commit/c9231123907415d7737263b9ca6f125= a8181463b=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Remove user_creatable_add_dict()=0D =0D This function is now unused and can be removed.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: f375026606f4ae1486189cb758cd0dfa60b3c18f=0D https://github.com/qemu/qemu/commit/f375026606f4ae1486189cb758cd0df= a60b3c18f=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D M qom/qom-qmp-cmds.c=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qom: Factor out user_creatable_process_cmdline()=0D =0D The implementation for --object can be shared between=0D qemu-storage-daemon and other binaries, so move it into a function in=0D qom/object_interfaces.c that is accessible from everywhere.=0D =0D This also requires moving the implementation of qmp_object_add() into a=0D= new user_creatable_add_qapi(), because qom/qom-qmp-cmds.c is not linked=0D= for tools.=0D =0D user_creatable_print_help_from_qdict() can become static now.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: b3e79bc6f0f53c83ad8a4f90713508894c9cdcde=0D https://github.com/qemu/qemu/commit/b3e79bc6f0f53c83ad8a4f907135088= 94c9cdcde=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qemu-io.c=0D =0D Log Message:=0D -----------=0D qemu-io: Use user_creatable_process_cmdline() for --object=0D =0D This switches qemu-io from a QemuOpts-based parser for --object to=0D user_creatable_process_cmdline() which uses a keyval parser and enforces=0D= the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties accessible.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: fa40e43ca01b8ddd174daf6863282d987e57a235=0D https://github.com/qemu/qemu/commit/fa40e43ca01b8ddd174daf6863282d9= 87e57a235=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qemu-nbd.c=0D =0D Log Message:=0D -----------=0D qemu-nbd: Use user_creatable_process_cmdline() for --object=0D =0D This switches qemu-nbd from a QemuOpts-based parser for --object to=0D user_creatable_process_cmdline() which uses a keyval parser and enforces=0D= the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties accessible.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: ffd58ef88c73700113e0808e8222ef4d22224f33=0D https://github.com/qemu/qemu/commit/ffd58ef88c73700113e0808e8222ef4= d22224f33=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Add user_creatable_add_from_str()=0D =0D This is a version of user_creatable_process_cmdline() with an Error=0D parameter that never calls exit() and is therefore usable in HMP.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 99b1e64688893d0b772074b5a2972a0bad85c19f=0D https://github.com/qemu/qemu/commit/99b1e64688893d0b772074b5a2972a0= bad85c19f=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-img.rst=0D M qemu-img.c=0D =0D Log Message:=0D -----------=0D qemu-img: Use user_creatable_process_cmdline() for --object=0D =0D This switches qemu-img from a QemuOpts-based parser for --object to=0D user_creatable_process_cmdline() which uses a keyval parser and enforces=0D= the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties accessible.=0D= =0D As a side effect, fix wrong exit codes in the object parsing error path=0D= of 'qemu-img compare'. This was broken in commit 334c43e2c3 because=0D &error_fatal exits with an exit code of 1, while it should have been 2.=0D= =0D Document that exit code 0 is also returned when just requested help was=0D= printed instead of comparing images. This is preexisting behaviour that=0D= isn't changed by this patch, though another instance of it is added with=0D= '--object help'.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: da0a932bbf06a71210300893eeb4d51217238b11=0D https://github.com/qemu/qemu/commit/da0a932bbf06a71210300893eeb4d51= 217238b11=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M hmp-commands.hx=0D M monitor/hmp-cmds.c=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D hmp: QAPIfy object_add=0D =0D This switches the HMP command object_add from a QemuOpts-based parser to=0D= user_creatable_add_from_str() which uses a keyval parser and enforces=0D the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties and help=0D accessible. In order for help to be printed to the monitor instead of=0D stdout, the printf() calls in the help functions are changed to=0D qemu_printf().=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D Reviewed-by: Dr. David Alan Gilbert =0D =0D =0D Commit: ddf6dae7e34271332fbc04921d0c91ab6a009b5a=0D https://github.com/qemu/qemu/commit/ddf6dae7e34271332fbc04921d0c91a= b6a009b5a=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Add user_creatable_parse_str()=0D =0D The system emulator has a more complicated way of handling command line=0D= options in that it reorders options before it processes them. This means=0D= that parsing object options and creating the object happen at two=0D different points. Split the parsing part into a separate function that=0D= can be reused by the system emulator command line.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 1254bd3977b30b3af74bb1f6641fe02d0bf5caf8=0D https://github.com/qemu/qemu/commit/1254bd3977b30b3af74bb1f6641fe02= d0bf5caf8=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D =0D Log Message:=0D -----------=0D char: Skip CLI aliases in query-chardev-backends=0D =0D The aliases "tty" and "parport" are only valid on the command line, QMP=0D= commands like chardev-add don't know them. query-chardev-backends should=0D= describe QMP and therefore not include them in the list of available=0D backends.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210311164253.338723-2-kwolf@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 5965243641d797b2270082c5a4eab49cb81fc8f0=0D https://github.com/qemu/qemu/commit/5965243641d797b2270082c5a4eab49= cb81fc8f0=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D M docs/system/deprecated.rst=0D M tests/unit/test-char.c=0D =0D Log Message:=0D -----------=0D char: Deprecate backend aliases 'tty' and 'parport'=0D =0D QAPI doesn't know the aliases 'tty' and 'parport' and there is no=0D reason to prefer them to the real names of the backends 'serial' and=0D 'parallel'.=0D =0D Since warnings are not allowed in 'make check' output, we can't test=0D the deprecated alias any more. Remove it from test-char.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210311164253.338723-3-kwolf@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: f3b70e0779c84a5c220ca67610b27cbe672d986a=0D https://github.com/qemu/qemu/commit/f3b70e0779c84a5c220ca67610b27cb= e672d986a=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D =0D Log Message:=0D -----------=0D char: Simplify chardev_name_foreach()=0D =0D Both callers use callbacks that don't do anything when they are called=0D= for CLI aliases. Instead of passing the cli_alias parameter, just don't=0D= call the callbacks for aliases in the first place.=0D =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210311164253.338723-4-kwolf@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 155b5f8b8d3d5dedd7c57e5223e822dc1b5295c8=0D https://github.com/qemu/qemu/commit/155b5f8b8d3d5dedd7c57e5223e822d= c1b5295c8=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Support JSON in HMP object_add and tools --object=0D =0D Support JSON for --object in all tools and in HMP object_add in the same=0D= way as it is supported in qobject_input_visitor_new_str().=0D =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210312131921.421023-1-kwolf@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 53c9956d8b3f5eb621fb15c6e6ea67e12f9677e7=0D https://github.com/qemu/qemu/commit/53c9956d8b3f5eb621fb15c6e6ea67e= 12f9677e7=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/check-qom-proplist.c=0D =0D Log Message:=0D -----------=0D tests: convert check-qom-proplist to keyval=0D =0D The command-line creation test is using QemuOpts. Switch it to keyval,=0D= since the emulator has some special needs and thus the last user of=0D user_creatable_add_opts will go away with the next patch.=0D =0D Reviewed-by: Kevin Wolf =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210312173547.1283477-2-pbonzini@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: bc2f4fcb1dd1a66ede126593fa091c23a94e3ab8=0D https://github.com/qemu/qemu/commit/bc2f4fcb1dd1a66ede126593fa091c2= 3a94e3ab8=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D qom: move user_creatable_add_opts logic to vl.c and QAPIfy it=0D =0D Emulators are currently using OptsVisitor (via user_creatable_add_opts)=0D= to parse the -object command line option. This has one extra feature,=0D= compared to keyval, which is automatic conversion of integers to lists=0D= as well as support for lists as repeated options:=0D =0D -object memory-backend-ram,id=3Dpc.ram,size=3D1048576000,host-nodes=3D0= ,policy=3Dbind=0D =0D So we cannot replace OptsVisitor with keyval right now. Still, this=0D patch moves the user_creatable_add_opts logic to vl.c since it is=0D not needed anywhere else, and makes it go through user_creatable_add_qapi= .=0D =0D In order to minimize code changes, the predicate still takes a string.=0D= This can be changed later to use the ObjectType QAPI enum directly.=0D =0D Reviewed-by: Eric Blake =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210312173547.1283477-3-pbonzini@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 009ff89328b1da3ea8ba316bf2be2125bc9937c5=0D https://github.com/qemu/qemu/commit/009ff89328b1da3ea8ba316bf2be212= 5bc9937c5=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D vl: allow passing JSON to -object=0D =0D Extend the ObjectOption code that was added in the previous patch to=0D enable passing JSON to -object. Even though we cannot yet add=0D non-scalar properties with the human-friendly comma-separated syntax,=0D they can now be added as JSON.=0D =0D Reviewed-by: Eric Blake =0D Reviewed-by: Kevin Wolf =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210312173547.1283477-4-pbonzini@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 92566947b3ac5ca75f91a34acb188219c455fc71=0D https://github.com/qemu/qemu/commit/92566947b3ac5ca75f91a34acb18821= 9c455fc71=0D Author: Peter Maydell =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M block.c=0D M block/curl.c=0D M block/export/vhost-user-blk-server.c=0D M block/stream.c=0D M chardev/char.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M docs/tools/qemu-img.rst=0D M hmp-commands.hx=0D M hw/block/xen-block.c=0D M include/qom/object_interfaces.h=0D M monitor/hmp-cmds.c=0D M monitor/misc.c=0D M qapi/authz.json=0D M qapi/block-core.json=0D M qapi/common.json=0D M qapi/crypto.json=0D M qapi/machine.json=0D M qapi/net.json=0D M qapi/qom.json=0D M qapi/ui.json=0D M qemu-img.c=0D M qemu-io.c=0D M qemu-nbd.c=0D M qom/object_interfaces.c=0D M qom/qom-qmp-cmds.c=0D M softmmu/vl.c=0D M storage-daemon/qapi/qapi-schema.json=0D M storage-daemon/qemu-storage-daemon.c=0D A tests/qemu-iotests/tests/qsd-jobs=0D A tests/qemu-iotests/tests/qsd-jobs.out=0D M tests/qtest/qmp-cmd-test.c=0D M tests/qtest/test-netfilter.c=0D M tests/unit/check-qom-proplist.c=0D M tests/unit/test-char.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into sta= ging=0D =0D Block layer patches and object-add QAPIfication=0D =0D - QAPIfy object-add and --object=0D - stream: Fail gracefully if permission is denied=0D - storage-daemon: Fix crash on quit when job is still running=0D - curl: Fix use after free=0D - char: Deprecate backend aliases, fix QMP query-chardev-backends=0D - Fix image creation option defaults that exist in both the format and=0D= the protocol layer (e.g. 'cluster_size' in qcow2 and rbd; the qcow2=0D default was incorrectly applied to the rbd layer)=0D =0D # gpg: Signature made Fri 19 Mar 2021 09:18:22 GMT=0D # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2= FD6=0D # gpg: issuer "kwolf@redhat.com"=0D # gpg: Good signature from "Kevin Wolf " [full]=0D # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F = 2FD6=0D =0D * remotes/kevin/tags/for-upstream: (42 commits)=0D vl: allow passing JSON to -object=0D qom: move user_creatable_add_opts logic to vl.c and QAPIfy it=0D tests: convert check-qom-proplist to keyval=0D qom: Support JSON in HMP object_add and tools --object=0D char: Simplify chardev_name_foreach()=0D char: Deprecate backend aliases 'tty' and 'parport'=0D char: Skip CLI aliases in query-chardev-backends=0D qom: Add user_creatable_parse_str()=0D hmp: QAPIfy object_add=0D qemu-img: Use user_creatable_process_cmdline() for --object=0D qom: Add user_creatable_add_from_str()=0D qemu-nbd: Use user_creatable_process_cmdline() for --object=0D qemu-io: Use user_creatable_process_cmdline() for --object=0D qom: Factor out user_creatable_process_cmdline()=0D qom: Remove user_creatable_add_dict()=0D qemu-storage-daemon: Implement --object with qmp_object_add()=0D qom: Make "object" QemuOptsList optional=0D qapi/qom: QAPIfy object-add=0D qapi/qom: Add ObjectOptions for x-remote-object=0D qapi/qom: Add ObjectOptions for input-*=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/b8796be5c06c...92566947b3ac= =0D From MAILER-DAEMON Fri Mar 19 09:35:37 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lNFHs-0004Rt-Tz for mharc-qemu-commits@gnu.org; Fri, 19 Mar 2021 09:35:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35034) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNFHq-0004Mc-9f for qemu-commits@nongnu.org; Fri, 19 Mar 2021 09:35:34 -0400 Received: from out-26.smtp.github.com ([192.30.252.209]:46833 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNFHf-0000Ki-RO for qemu-commits@nongnu.org; Fri, 19 Mar 2021 09:35:33 -0400 Received: from github.com (hubbernetes-node-338fd2c.ash1-iad.github.net [10.56.121.25]) by smtp.github.com (Postfix) with ESMTPA id C1A335E040B for ; Fri, 19 Mar 2021 06:35:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616160921; bh=e0d72KW8DXkGxwJtssS87llXE9Yjcmp0tU95hsbNXlU=; h=Date:From:To:Subject:From; b=ZPErWuDDfPag7YJU+1N2RB+Q4zKKmtA7LTn9ZC8QL8il9OEDGyoVXPi9i9wDhuMXT 2eAZLMS0BZW7uyB55qroAfcWZtF/Y+NXCxjVqHbQM2a0U/IV1q+wIIQC4ahyCydBFO KzaUeZeW/rhpHLcth7V4I1DAXMK6QyBObkKNR6SI= Date: Fri, 19 Mar 2021 06:35:21 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 729222: block: remove format defaults from QemuOpts in bdr... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Mar 2021 13:35:34 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 729222af149db3cfaaa5ef1c0773b5c632b7dbee=0D https://github.com/qemu/qemu/commit/729222af149db3cfaaa5ef1c0773b5c= 632b7dbee=0D Author: Stefano Garzarella =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M block.c=0D =0D Log Message:=0D -----------=0D block: remove format defaults from QemuOpts in bdrv_create_file()=0D =0D QemuOpts is usually created merging the QemuOptsList of format=0D and protocol. So, when the format calls bdr_create_file(), the 'opts'=0D parameter contains a QemuOptsList with a combination of format and=0D protocol default values.=0D =0D The format properly removes its options before calling=0D bdr_create_file(), but the default values remain in 'opts->list'.=0D So if the protocol has options with the same name (e.g. rbd has=0D 'cluster_size' as qcow2), it will see the default values of the format,=0D= since for overlapping options, the format wins.=0D =0D To avoid this issue, lets convert QemuOpts to QDict, in this way we take=0D= only the set options, and then convert it back to QemuOpts, using the=0D 'create_opts' of the protocol. So the new QemuOpts, will contain only the= =0D protocol defaults.=0D =0D Suggested-by: Kevin Wolf =0D Signed-off-by: Stefano Garzarella =0D Message-Id: <20210308161232.248833-1-sgarzare@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: e21577707152c10017dcf4d3340e83b100057355=0D https://github.com/qemu/qemu/commit/e21577707152c10017dcf4d3340e83b= 100057355=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D A tests/qemu-iotests/tests/qsd-jobs=0D A tests/qemu-iotests/tests/qsd-jobs.out=0D =0D Log Message:=0D -----------=0D storage-daemon: Call job_cancel_sync_all() on shutdown=0D =0D bdrv_close_all() asserts that no jobs are running any more, so we need=0D= to cancel all jobs first to avoid failing the assertion.=0D =0D Fixes: b55a3c8860b763b62b2cc2f4a6f55379977bbde5=0D Reported-by: Nini Gu =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210309121814.31078-1-kwolf@redhat.com>=0D Reviewed-by: Eric Blake =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 1bf26076d677f693dd99a6e8ef2eca69b842d873=0D https://github.com/qemu/qemu/commit/1bf26076d677f693dd99a6e8ef2eca6= 9b842d873=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M block/stream.c=0D M tests/qemu-iotests/tests/qsd-jobs=0D M tests/qemu-iotests/tests/qsd-jobs.out=0D =0D Log Message:=0D -----------=0D stream: Don't crash when node permission is denied=0D =0D The image streaming block job restricts shared permissions of the nodes=0D= it accesses. This can obviously fail when other users already got these=0D= permissions. &error_abort is therefore wrong and can crash. Handle these=0D= errors gracefully and just fail starting the block job.=0D =0D Reported-by: Nini Gu =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210309173451.45152-1-kwolf@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: Alberto Garcia =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 3663dca461131f7c8e58737feba8638e064bb5d4=0D https://github.com/qemu/qemu/commit/3663dca461131f7c8e58737feba8638= e064bb5d4=0D Author: Max Reitz =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M block/curl.c=0D =0D Log Message:=0D -----------=0D curl: Store BDRVCURLState pointer in CURLSocket=0D =0D A socket does not really belong to any specific state. We do not need=0D= to store a pointer to "its" state in it, a pointer to the common=0D BDRVCURLState is sufficient.=0D =0D Signed-off-by: Max Reitz =0D Message-Id: <20210309130541.37540-2-mreitz@redhat.com>=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 0f418a207696b37f05d38f978c8873ee0a4f9815=0D https://github.com/qemu/qemu/commit/0f418a207696b37f05d38f978c8873e= e0a4f9815=0D Author: Max Reitz =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M block/curl.c=0D =0D Log Message:=0D -----------=0D curl: Disconnect sockets from CURLState=0D =0D When a curl transfer is finished, that does not mean that CURL lets go=0D= of all the sockets it used for it. We therefore must not free a=0D CURLSocket object before CURL has invoked curl_sock_cb() to tell us to=0D= remove it. Otherwise, we may get a use-after-free, as described in this=0D= bug report: https://bugs.launchpad.net/qemu/+bug/1916501=0D =0D (Reproducer from that report:=0D $ qemu-img convert -f qcow2 -O raw \=0D https://download.cirros-cloud.net/0.4.0/cirros-0.4.0-x86_64-disk.img \=0D= out.img=0D )=0D =0D (Alternatively, it might seem logical to force-drop all sockets that=0D have been used for a state when the respective transfer is done, kind of=0D= like it is done now, but including unsetting the AIO handlers.=0D Unfortunately, doing so makes the driver just hang instead of crashing,=0D= which seems to evidence that CURL still uses those sockets.)=0D =0D Make the CURLSocket object independent of "its" CURLState by putting all=0D= sockets into a hash table belonging to the BDRVCURLState instead of a=0D list that belongs to a CURLState. Do not touch any sockets in=0D curl_clean_state().=0D =0D Testing, it seems like all sockets are indeed gone by the time the curl=0D= BDS is closed, so it seems like there really was no point in freeing any=0D= socket just because a transfer is done. libcurl does invoke=0D curl_sock_cb() with CURL_POLL_REMOVE for every socket it has.=0D =0D Buglink: https://bugs.launchpad.net/qemu/+bug/1916501=0D Signed-off-by: Max Reitz =0D Message-Id: <20210309130541.37540-3-mreitz@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 6f4b1996b4cdc6b745bebae737c250f08c1ad965=0D https://github.com/qemu/qemu/commit/6f4b1996b4cdc6b745bebae737c250f= 08c1ad965=0D Author: Stefan Hajnoczi =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M block/export/vhost-user-blk-server.c=0D =0D Log Message:=0D -----------=0D block/export: disable VHOST_USER_PROTOCOL_F_INFLIGHT_SHMFD for now=0D =0D The vhost-user in-flight shmfd feature has not been tested with=0D qemu-storage-daemon's vhost-user-blk server. Disable this optional=0D feature for now because it requires MFD_ALLOW_SEALING, which is not=0D available in some CI environments.=0D =0D If we need this feature in the future it can be re-enabled after=0D testing.=0D =0D Reported-by: Peter Maydell =0D Cc: Kevin Wolf =0D Signed-off-by: Stefan Hajnoczi =0D Message-Id: <20210309094106.196911-2-stefanha@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 9695c3af3a1e21c3489622083f2c588eb2f426fd=0D https://github.com/qemu/qemu/commit/9695c3af3a1e21c3489622083f2c588= eb2f426fd=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/qmp-cmd-test.c=0D M tests/qtest/test-netfilter.c=0D =0D Log Message:=0D -----------=0D tests: Drop 'props' from object-add calls=0D =0D The 'props' option has been deprecated in 5.0 in favour of a flattened=0D= object-add command. Time to change our test cases to drop the deprecated=0D= option.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 50243407457a9fb0ed17b9a9ba9fc9aee09495b1=0D https://github.com/qemu/qemu/commit/50243407457a9fb0ed17b9a9ba9fc9a= ee09495b1=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M qapi/qom.json=0D M qom/qom-qmp-cmds.c=0D =0D Log Message:=0D -----------=0D qapi/qom: Drop deprecated 'props' from object-add=0D =0D The option has been deprecated in QEMU 5.0, remove it.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 2273b2410f876111ed97b5d2cd93d7f04b045432=0D https://github.com/qemu/qemu/commit/2273b2410f876111ed97b5d2cd93d7f= 04b045432=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for iothread=0D =0D Add an ObjectOptions union that will eventually describe the options of=0D= all user creatable object types. As unions can't exist without any=0D branches, also add the first object type.=0D =0D This adds a QAPI schema for the properties of the iothread object.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 8825587b53c62f40375a2f63dfefd3adc6988eb1=0D https://github.com/qemu/qemu/commit/8825587b53c62f40375a2f63dfefd3a= dc6988eb1=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/authz.json=0D M qapi/qom.json=0D M storage-daemon/qapi/qapi-schema.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for authz-*=0D =0D This adds a QAPI schema for the properties of the authz-* objects.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: a68d909ef943cc47b512cbd8890e0d90055bec05=0D https://github.com/qemu/qemu/commit/a68d909ef943cc47b512cbd8890e0d9= 0055bec05=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for cryptodev-*=0D =0D This adds a QAPI schema for the properties of the cryptodev-* objects.=0D= =0D These interfaces have some questionable aspects (cryptodev-backend is=0D really an abstract base class without function, and the queues option=0D only makes sense for cryptodev-vhost-user), but as the goal is to=0D represent the existing interface in QAPI, leave these things in place.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: d7ef29c4ed0b09cb175b457851c1cf5f6b1d7513=0D https://github.com/qemu/qemu/commit/d7ef29c4ed0b09cb175b457851c1cf5= f6b1d7513=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for dbus-vmstate=0D =0D This adds a QAPI schema for the properties of the dbus-vmstate object.=0D= =0D A list represented as a comma separated string is clearly not very=0D QAPI-like, but for now just describe the existing interface.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 913d9063e1447a71c948edef3534a8e9965297e3=0D https://github.com/qemu/qemu/commit/913d9063e1447a71c948edef3534a8e= 9965297e3=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/common.json=0D M qapi/machine.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for memory-backend-*=0D =0D This adds a QAPI schema for the properties of the memory-backend-*=0D objects.=0D =0D HostMemPolicy has to be moved to an include file that can be used by the=0D= storage daemon, too, because ObjectOptions must be the same in all=0D binaries if we don't want to compile the whole code multiple times.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 6815bc1d03c1f883183b5a8b31861b15d951f2a4=0D https://github.com/qemu/qemu/commit/6815bc1d03c1f883183b5a8b31861b1= 5d951f2a4=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for rng-*, deprecate 'opened'=0D =0D This adds a QAPI schema for the properties of the rng-* objects.=0D =0D The 'opened' property doesn't seem to make sense as an external=0D interface: It is automatically set to true in ucc->complete, and=0D explicitly setting it to true earlier just means that trying to set=0D additional options will result in an error. After the property has once=0D= been set to true (i.e. when the object construction has completed), it=0D= can never be reset to false. In other words, the 'opened' property is=0D useless. Mark it as deprecated in the schema from the start.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 381bd7440d8178c9e56bac7086c9e3b0cad066ec=0D https://github.com/qemu/qemu/commit/381bd7440d8178c9e56bac7086c9e3b= 0cad066ec=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/block-core.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for throttle-group=0D =0D This adds a QAPI schema for the properties of the throttle-group object.=0D= =0D The only purpose of the x-* properties is to make the nested options in=0D= 'limits' available for a command line parser that doesn't support=0D structs. Any parser that will use the QAPI schema will supports structs,=0D= though, so they will not be needed in the schema in the future.=0D =0D To keep the conversion straightforward, add them to the schema anyway.=0D= We can then remove the options and adjust documentation, test cases etc.=0D= in a separate patch.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 39c4c27d378af56059628a5cd803d390849f32e8=0D https://github.com/qemu/qemu/commit/39c4c27d378af56059628a5cd803d39= 0849f32e8=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M qapi/crypto.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for secret*, deprecate 'loaded'=0D =0D This adds a QAPI schema for the properties of the secret* objects.=0D =0D The 'loaded' property doesn't seem to make sense as an external=0D interface: It is automatically set to true in ucc->complete, and=0D explicitly setting it to true earlier just means that additional options=0D= will be silently ignored.=0D =0D In other words, the 'loaded' property is useless. Mark it as deprecated=0D= in the schema from the start.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: d09e49374b336d36a4223e8a411582128d3a3796=0D https://github.com/qemu/qemu/commit/d09e49374b336d36a4223e8a4115821= 28d3a3796=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/crypto.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for tls-*, deprecate 'loaded'=0D =0D This adds a QAPI schema for the properties of the tls-* objects.=0D =0D The 'loaded' property doesn't seem to make sense as an external=0D interface: It is automatically set to true in ucc->complete, and=0D explicitly setting it to true earlier just means that additional options=0D= will be silently ignored.=0D =0D In other words, the 'loaded' property is useless. Mark it as deprecated=0D= in the schema from the start.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: f3189b9135ae9bbc922ac56528784ca9cd04ef4a=0D https://github.com/qemu/qemu/commit/f3189b9135ae9bbc922ac56528784ca= 9cd04ef4a=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for can-*=0D =0D This adds a QAPI schema for the properties of the can-* objects.=0D =0D can-bus doesn't have any properties, so it only needs to be added to the=0D= ObjectType enum without adding a new branch to ObjectOptions.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 3d0d3c30ae3a259bff176f85a3efa2d0816695af=0D https://github.com/qemu/qemu/commit/3d0d3c30ae3a259bff176f85a3efa2d= 0816695af=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for colo-compare=0D =0D This adds a QAPI schema for the properties of the colo-compare object.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 1156a67531d23f01c1d86ee12deb1c4e290b5044=0D https://github.com/qemu/qemu/commit/1156a67531d23f01c1d86ee12deb1c4= e290b5044=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/common.json=0D M qapi/net.json=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for filter-*=0D =0D This adds a QAPI schema for the properties of the filter-* objects.=0D =0D Some parts of the interface (in particular NetfilterProperties.position)=0D= are very unusual for QAPI, but for now just describe the existing=0D interface.=0D =0D net.json can't be included in qom.json because the storage daemon=0D doesn't have it. NetFilterDirection is still required in the new object=0D= property definitions in qom.json, so move this enum to common.json.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: b9e479d008dd2e8fd826656563138eabd5af0c64=0D https://github.com/qemu/qemu/commit/b9e479d008dd2e8fd826656563138ea= bd5af0c64=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for pr-manager-helper=0D =0D This adds a QAPI schema for the properties of the pr-manager-helper=0D object.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 590466f056c4f2a7ff87ed751cece4f4ff02fd57=0D https://github.com/qemu/qemu/commit/590466f056c4f2a7ff87ed751cece4f= 4ff02fd57=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for confidential-guest-support=0D =0D This adds a QAPI schema for the properties of the objects implementing=0D= the confidential-guest-support interface.=0D =0D pef-guest and s390x-pv-guest don't have any properties, so they only=0D need to be added to the ObjectType enum without adding a new branch to=0D= ObjectOptions.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 30e863e5a7a35fc5b2cfa933ddbc30f84b0415a0=0D https://github.com/qemu/qemu/commit/30e863e5a7a35fc5b2cfa933ddbc30f= 84b0415a0=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/common.json=0D M qapi/qom.json=0D M qapi/ui.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for input-*=0D =0D This adds a QAPI schema for the properties of the input-* objects.=0D =0D ui.json cannot be included in qom.json because the storage daemon can't=0D= use it, so move GrabToggleKeys to common.json.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 17422da082ffcecb38bd1f2e2de6d56a61e8cd9c=0D https://github.com/qemu/qemu/commit/17422da082ffcecb38bd1f2e2de6d56= a61e8cd9c=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qapi/qom.json=0D =0D Log Message:=0D -----------=0D qapi/qom: Add ObjectOptions for x-remote-object=0D =0D This adds a QAPI schema for the properties of the x-remote-object=0D object.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 9151e59a8b6e854eb733553c6772351049ca6ab6=0D https://github.com/qemu/qemu/commit/9151e59a8b6e854eb733553c6772351= 049ca6ab6=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M hw/block/xen-block.c=0D M include/qom/object_interfaces.h=0D M monitor/misc.c=0D M qapi/qom.json=0D M qom/qom-qmp-cmds.c=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qapi/qom: QAPIfy object-add=0D =0D This converts object-add from 'gen': false to the ObjectOptions QAPI=0D type. As an immediate benefit, clients can now use QAPI schema=0D introspection for user creatable QOM objects.=0D =0D It is also the first step towards making the QAPI schema the only=0D external interface for the creation of user creatable objects. Once all=0D= other places (HMP and command lines of the system emulator and all=0D tools) go through QAPI, too, some object implementations can be=0D simplified because some checks (e.g. that mandatory options are set) are=0D= already performed by QAPI, and in another step, QOM boilerplate code=0D could be generated from the schema.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 98c43b7b8b7504099760383fc802d18bc8b18f48=0D https://github.com/qemu/qemu/commit/98c43b7b8b7504099760383fc802d18= bc8b18f48=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Make "object" QemuOptsList optional=0D =0D This code is going away anyway, but for a few more commits, we'll be in=0D= a state where some binaries still use QemuOpts and others don't. If the=0D= "object" QemuOptsList doesn't even exist, we don't have to remove (or=0D fail to remove, and therefore abort) a user creatable object from it.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 2daf28557e43cc0724b9a8b36e77db10b455e286=0D https://github.com/qemu/qemu/commit/2daf28557e43cc0724b9a8b36e77db1= 0b455e286=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qemu-storage-daemon: Implement --object with qmp_object_add()=0D =0D This QAPIfies --object and ensures that QMP and the command line option=0D= behave the same.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: c9231123907415d7737263b9ca6f125a8181463b=0D https://github.com/qemu/qemu/commit/c9231123907415d7737263b9ca6f125= a8181463b=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Remove user_creatable_add_dict()=0D =0D This function is now unused and can be removed.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: f375026606f4ae1486189cb758cd0dfa60b3c18f=0D https://github.com/qemu/qemu/commit/f375026606f4ae1486189cb758cd0df= a60b3c18f=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D M qom/qom-qmp-cmds.c=0D M storage-daemon/qemu-storage-daemon.c=0D =0D Log Message:=0D -----------=0D qom: Factor out user_creatable_process_cmdline()=0D =0D The implementation for --object can be shared between=0D qemu-storage-daemon and other binaries, so move it into a function in=0D qom/object_interfaces.c that is accessible from everywhere.=0D =0D This also requires moving the implementation of qmp_object_add() into a=0D= new user_creatable_add_qapi(), because qom/qom-qmp-cmds.c is not linked=0D= for tools.=0D =0D user_creatable_print_help_from_qdict() can become static now.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: b3e79bc6f0f53c83ad8a4f90713508894c9cdcde=0D https://github.com/qemu/qemu/commit/b3e79bc6f0f53c83ad8a4f907135088= 94c9cdcde=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qemu-io.c=0D =0D Log Message:=0D -----------=0D qemu-io: Use user_creatable_process_cmdline() for --object=0D =0D This switches qemu-io from a QemuOpts-based parser for --object to=0D user_creatable_process_cmdline() which uses a keyval parser and enforces=0D= the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties accessible.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: fa40e43ca01b8ddd174daf6863282d987e57a235=0D https://github.com/qemu/qemu/commit/fa40e43ca01b8ddd174daf6863282d9= 87e57a235=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qemu-nbd.c=0D =0D Log Message:=0D -----------=0D qemu-nbd: Use user_creatable_process_cmdline() for --object=0D =0D This switches qemu-nbd from a QemuOpts-based parser for --object to=0D user_creatable_process_cmdline() which uses a keyval parser and enforces=0D= the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties accessible.=0D= =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: ffd58ef88c73700113e0808e8222ef4d22224f33=0D https://github.com/qemu/qemu/commit/ffd58ef88c73700113e0808e8222ef4= d22224f33=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Add user_creatable_add_from_str()=0D =0D This is a version of user_creatable_process_cmdline() with an Error=0D parameter that never calls exit() and is therefore usable in HMP.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 99b1e64688893d0b772074b5a2972a0bad85c19f=0D https://github.com/qemu/qemu/commit/99b1e64688893d0b772074b5a2972a0= bad85c19f=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/tools/qemu-img.rst=0D M qemu-img.c=0D =0D Log Message:=0D -----------=0D qemu-img: Use user_creatable_process_cmdline() for --object=0D =0D This switches qemu-img from a QemuOpts-based parser for --object to=0D user_creatable_process_cmdline() which uses a keyval parser and enforces=0D= the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties accessible.=0D= =0D As a side effect, fix wrong exit codes in the object parsing error path=0D= of 'qemu-img compare'. This was broken in commit 334c43e2c3 because=0D &error_fatal exits with an exit code of 1, while it should have been 2.=0D= =0D Document that exit code 0 is also returned when just requested help was=0D= printed instead of comparing images. This is preexisting behaviour that=0D= isn't changed by this patch, though another instance of it is added with=0D= '--object help'.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: da0a932bbf06a71210300893eeb4d51217238b11=0D https://github.com/qemu/qemu/commit/da0a932bbf06a71210300893eeb4d51= 217238b11=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M hmp-commands.hx=0D M monitor/hmp-cmds.c=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D hmp: QAPIfy object_add=0D =0D This switches the HMP command object_add from a QemuOpts-based parser to=0D= user_creatable_add_from_str() which uses a keyval parser and enforces=0D the QAPI schema.=0D =0D Apart from being a cleanup, this makes non-scalar properties and help=0D accessible. In order for help to be printed to the monitor instead of=0D stdout, the printf() calls in the help functions are changed to=0D qemu_printf().=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D Reviewed-by: Dr. David Alan Gilbert =0D =0D =0D Commit: ddf6dae7e34271332fbc04921d0c91ab6a009b5a=0D https://github.com/qemu/qemu/commit/ddf6dae7e34271332fbc04921d0c91a= b6a009b5a=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Add user_creatable_parse_str()=0D =0D The system emulator has a more complicated way of handling command line=0D= options in that it reorders options before it processes them. This means=0D= that parsing object options and creating the object happen at two=0D different points. Split the parsing part into a separate function that=0D= can be reused by the system emulator command line.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Acked-by: Peter Krempa =0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 1254bd3977b30b3af74bb1f6641fe02d0bf5caf8=0D https://github.com/qemu/qemu/commit/1254bd3977b30b3af74bb1f6641fe02= d0bf5caf8=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D =0D Log Message:=0D -----------=0D char: Skip CLI aliases in query-chardev-backends=0D =0D The aliases "tty" and "parport" are only valid on the command line, QMP=0D= commands like chardev-add don't know them. query-chardev-backends should=0D= describe QMP and therefore not include them in the list of available=0D backends.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210311164253.338723-2-kwolf@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 5965243641d797b2270082c5a4eab49cb81fc8f0=0D https://github.com/qemu/qemu/commit/5965243641d797b2270082c5a4eab49= cb81fc8f0=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D M docs/system/deprecated.rst=0D M tests/unit/test-char.c=0D =0D Log Message:=0D -----------=0D char: Deprecate backend aliases 'tty' and 'parport'=0D =0D QAPI doesn't know the aliases 'tty' and 'parport' and there is no=0D reason to prefer them to the real names of the backends 'serial' and=0D 'parallel'.=0D =0D Since warnings are not allowed in 'make check' output, we can't test=0D the deprecated alias any more. Remove it from test-char.=0D =0D Signed-off-by: Kevin Wolf =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210311164253.338723-3-kwolf@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: f3b70e0779c84a5c220ca67610b27cbe672d986a=0D https://github.com/qemu/qemu/commit/f3b70e0779c84a5c220ca67610b27cb= e672d986a=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D =0D Log Message:=0D -----------=0D char: Simplify chardev_name_foreach()=0D =0D Both callers use callbacks that don't do anything when they are called=0D= for CLI aliases. Instead of passing the cli_alias parameter, just don't=0D= call the callbacks for aliases in the first place.=0D =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210311164253.338723-4-kwolf@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 155b5f8b8d3d5dedd7c57e5223e822dc1b5295c8=0D https://github.com/qemu/qemu/commit/155b5f8b8d3d5dedd7c57e5223e822d= c1b5295c8=0D Author: Kevin Wolf =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: Support JSON in HMP object_add and tools --object=0D =0D Support JSON for --object in all tools and in HMP object_add in the same=0D= way as it is supported in qobject_input_visitor_new_str().=0D =0D Signed-off-by: Kevin Wolf =0D Message-Id: <20210312131921.421023-1-kwolf@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 53c9956d8b3f5eb621fb15c6e6ea67e12f9677e7=0D https://github.com/qemu/qemu/commit/53c9956d8b3f5eb621fb15c6e6ea67e= 12f9677e7=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/check-qom-proplist.c=0D =0D Log Message:=0D -----------=0D tests: convert check-qom-proplist to keyval=0D =0D The command-line creation test is using QemuOpts. Switch it to keyval,=0D= since the emulator has some special needs and thus the last user of=0D user_creatable_add_opts will go away with the next patch.=0D =0D Reviewed-by: Kevin Wolf =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210312173547.1283477-2-pbonzini@redhat.com>=0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: bc2f4fcb1dd1a66ede126593fa091c23a94e3ab8=0D https://github.com/qemu/qemu/commit/bc2f4fcb1dd1a66ede126593fa091c2= 3a94e3ab8=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/qom/object_interfaces.h=0D M qom/object_interfaces.c=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D qom: move user_creatable_add_opts logic to vl.c and QAPIfy it=0D =0D Emulators are currently using OptsVisitor (via user_creatable_add_opts)=0D= to parse the -object command line option. This has one extra feature,=0D= compared to keyval, which is automatic conversion of integers to lists=0D= as well as support for lists as repeated options:=0D =0D -object memory-backend-ram,id=3Dpc.ram,size=3D1048576000,host-nodes=3D0= ,policy=3Dbind=0D =0D So we cannot replace OptsVisitor with keyval right now. Still, this=0D patch moves the user_creatable_add_opts logic to vl.c since it is=0D not needed anywhere else, and makes it go through user_creatable_add_qapi= .=0D =0D In order to minimize code changes, the predicate still takes a string.=0D= This can be changed later to use the ObjectType QAPI enum directly.=0D =0D Reviewed-by: Eric Blake =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210312173547.1283477-3-pbonzini@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 009ff89328b1da3ea8ba316bf2be2125bc9937c5=0D https://github.com/qemu/qemu/commit/009ff89328b1da3ea8ba316bf2be212= 5bc9937c5=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D vl: allow passing JSON to -object=0D =0D Extend the ObjectOption code that was added in the previous patch to=0D enable passing JSON to -object. Even though we cannot yet add=0D non-scalar properties with the human-friendly comma-separated syntax,=0D they can now be added as JSON.=0D =0D Reviewed-by: Eric Blake =0D Reviewed-by: Kevin Wolf =0D Signed-off-by: Paolo Bonzini =0D Message-Id: <20210312173547.1283477-4-pbonzini@redhat.com>=0D Reviewed-by: Markus Armbruster =0D Signed-off-by: Kevin Wolf =0D =0D =0D Commit: 92566947b3ac5ca75f91a34acb188219c455fc71=0D https://github.com/qemu/qemu/commit/92566947b3ac5ca75f91a34acb18821= 9c455fc71=0D Author: Peter Maydell =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M block.c=0D M block/curl.c=0D M block/export/vhost-user-blk-server.c=0D M block/stream.c=0D M chardev/char.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M docs/tools/qemu-img.rst=0D M hmp-commands.hx=0D M hw/block/xen-block.c=0D M include/qom/object_interfaces.h=0D M monitor/hmp-cmds.c=0D M monitor/misc.c=0D M qapi/authz.json=0D M qapi/block-core.json=0D M qapi/common.json=0D M qapi/crypto.json=0D M qapi/machine.json=0D M qapi/net.json=0D M qapi/qom.json=0D M qapi/ui.json=0D M qemu-img.c=0D M qemu-io.c=0D M qemu-nbd.c=0D M qom/object_interfaces.c=0D M qom/qom-qmp-cmds.c=0D M softmmu/vl.c=0D M storage-daemon/qapi/qapi-schema.json=0D M storage-daemon/qemu-storage-daemon.c=0D A tests/qemu-iotests/tests/qsd-jobs=0D A tests/qemu-iotests/tests/qsd-jobs.out=0D M tests/qtest/qmp-cmd-test.c=0D M tests/qtest/test-netfilter.c=0D M tests/unit/check-qom-proplist.c=0D M tests/unit/test-char.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into sta= ging=0D =0D Block layer patches and object-add QAPIfication=0D =0D - QAPIfy object-add and --object=0D - stream: Fail gracefully if permission is denied=0D - storage-daemon: Fix crash on quit when job is still running=0D - curl: Fix use after free=0D - char: Deprecate backend aliases, fix QMP query-chardev-backends=0D - Fix image creation option defaults that exist in both the format and=0D= the protocol layer (e.g. 'cluster_size' in qcow2 and rbd; the qcow2=0D default was incorrectly applied to the rbd layer)=0D =0D # gpg: Signature made Fri 19 Mar 2021 09:18:22 GMT=0D # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2= FD6=0D # gpg: issuer "kwolf@redhat.com"=0D # gpg: Good signature from "Kevin Wolf " [full]=0D # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F = 2FD6=0D =0D * remotes/kevin/tags/for-upstream: (42 commits)=0D vl: allow passing JSON to -object=0D qom: move user_creatable_add_opts logic to vl.c and QAPIfy it=0D tests: convert check-qom-proplist to keyval=0D qom: Support JSON in HMP object_add and tools --object=0D char: Simplify chardev_name_foreach()=0D char: Deprecate backend aliases 'tty' and 'parport'=0D char: Skip CLI aliases in query-chardev-backends=0D qom: Add user_creatable_parse_str()=0D hmp: QAPIfy object_add=0D qemu-img: Use user_creatable_process_cmdline() for --object=0D qom: Add user_creatable_add_from_str()=0D qemu-nbd: Use user_creatable_process_cmdline() for --object=0D qemu-io: Use user_creatable_process_cmdline() for --object=0D qom: Factor out user_creatable_process_cmdline()=0D qom: Remove user_creatable_add_dict()=0D qemu-storage-daemon: Implement --object with qmp_object_add()=0D qom: Make "object" QemuOptsList optional=0D qapi/qom: QAPIfy object-add=0D qapi/qom: Add ObjectOptions for x-remote-object=0D qapi/qom: Add ObjectOptions for input-*=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/cf6b56d4f210...92566947b3ac= =0D From MAILER-DAEMON Fri Mar 19 09:43:35 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lNFPb-0005zc-2a for mharc-qemu-commits@gnu.org; Fri, 19 Mar 2021 09:43:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37174) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNFPZ-0005vm-Mk for qemu-commits@nongnu.org; Fri, 19 Mar 2021 09:43:33 -0400 Received: from out-22.smtp.github.com ([192.30.252.205]:41493 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNFPV-0004tX-V5 for qemu-commits@nongnu.org; Fri, 19 Mar 2021 09:43:33 -0400 Received: from github.com (hubbernetes-node-a26a49b.ac4-iad.github.net [10.52.201.49]) by smtp.github.com (Postfix) with ESMTPA id A68C35607F3 for ; Fri, 19 Mar 2021 06:43:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616161408; bh=KKDXASxQNfMMFhGM2nQpRZZeMwgwrdWz4X5hdQECHI0=; h=Date:From:To:Subject:From; b=l5y29xlO2hjNIREqeX1LHiyepASf9P/XI2wrAy1yquLziozbrI/4NmD/XlMLbAxyM SEzzSjsUAEF7z7jDyqJKAn3PBddoyqmHZ060LUOKO9jXDP/vkxiGVPRALoqxESWgrj BV7JVTax3b79oEU1kLNJJg3Tv3Ry9UsZ1UqOVmQo= Date: Fri, 19 Mar 2021 06:43:28 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 7fbe79: qemuutil: remove qemu_set_fd_handler duplicate symbol X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Mar 2021 13:43:34 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 7fbe791e693bf96f765d6ff88aa7636bac919368 https://github.com/qemu/qemu/commit/7fbe791e693bf96f765d6ff88aa7636bac919368 Author: Paolo Bonzini Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M stubs/meson.build R stubs/set-fd-handler.c Log Message: ----------- qemuutil: remove qemu_set_fd_handler duplicate symbol libqemuutil has two definitions of qemu_set_fd_handler. This is not needed since the only users of the function are qemu-io.c and the emulators, both of which already include util/main-loop.c. Signed-off-by: Paolo Bonzini Message-Id: Tested-by: Markus Armbruster Signed-off-by: Markus Armbruster Message-Id: <20210318155519.1224118-2-armbru@redhat.com> Commit: 4298bd1b5f127b4afbfccabdbcd9d6f7c171d7fc https://github.com/qemu/qemu/commit/4298bd1b5f127b4afbfccabdbcd9d6f7c171d7fc Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: A include/qapi/compat-policy.h A qapi/compat.json M qapi/meson.build M qapi/qapi-schema.json M qapi/qmp-dispatch.c M qemu-options.hx M softmmu/vl.c Log Message: ----------- qemu-options: New -compat to set policy for deprecated interfaces New option -compat lets you configure what to do when deprecated interfaces get used. This is intended for testing users of the management interfaces. It is experimental. -compat deprecated-input= configures what to do when deprecated input is received. Input policy can be "accept" (accept silently), or "reject" (reject the request with an error). -compat deprecated-output= configures what to do when deprecated output is sent. Output policy can be "accept" (pass on unchanged), or "hide" (filter out the deprecated parts). Default is "accept". Policies other than "accept" are implemented later in this series. For now, -compat covers only syntactic aspects of QMP, i.e. stuff tagged with feature 'deprecated'. We may want to extend it to cover semantic aspects, CLI, and experimental features. Note that there is no good way for management application to detect presence of -compat: it's not visible output of query-qmp-schema or query-command-line-options. Tolerable, because it's meant for testing. If running with -compat fails, skip the test. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-3-armbru@redhat.com> Commit: a0af8bc6aa1d9ed79e7fcf09c41b2efff09c0f2d https://github.com/qemu/qemu/commit/a0af8bc6aa1d9ed79e7fcf09c41b2efff09c0f2d Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M include/qapi/compat-policy.h M include/qapi/qobject-output-visitor.h M include/qapi/visitor-impl.h M include/qapi/visitor.h M qapi/qapi-visit-core.c M qapi/qmp-dispatch.c M qapi/qobject-output-visitor.c M qapi/trace-events M scripts/qapi/commands.py M scripts/qapi/visit.py M tests/qapi-schema/qapi-schema-test.json M tests/qapi-schema/qapi-schema-test.out M tests/unit/test-qmp-cmds.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP command results This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP command results. Example: when QEMU is run with -compat deprecated-output=hide, then {"execute": "query-cpus-fast"} yields {"return": [{"thread-id": 9805, "props": {"core-id": 0, "thread-id": 0, "socket-id": 0}, "qom-path": "/machine/unattached/device[0]", "cpu-index": 0, "target": "x86_64"}]} instead of {"return": [{"arch": "x86", "thread-id": 22436, "props": {"core-id": 0, "thread-id": 0, "socket-id": 0}, "qom-path": "/machine/unattached/device[0]", "cpu-index": 0, "target": "x86_64"}]} Note the suppression of deprecated member "arch". Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-4-armbru@redhat.com> Commit: e63b14feb8c5a051574a828a4757e6c75e97188c https://github.com/qemu/qemu/commit/e63b14feb8c5a051574a828a4757e6c75e97188c Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M scripts/qapi/events.py M tests/unit/test-qmp-event.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP events This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP events: suppress deprecated ones. No QMP event is deprecated right now. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-5-armbru@redhat.com> Commit: ada89710e64d4bfa91c9977a27251cae01c8aa6b https://github.com/qemu/qemu/commit/ada89710e64d4bfa91c9977a27251cae01c8aa6b Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M scripts/qapi/events.py M tests/qapi-schema/qapi-schema-test.json M tests/qapi-schema/qapi-schema-test.out M tests/unit/test-qmp-event.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP event data This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP event data: suppress deprecated members. No QMP event data is deprecated right now. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-6-armbru@redhat.com> Commit: 81befb2e716eb7387e73da870b32b2533a943123 https://github.com/qemu/qemu/commit/81befb2e716eb7387e73da870b32b2533a943123 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M monitor/misc.c M monitor/monitor-internal.h M monitor/qmp-cmds-control.c M qapi/introspect.json M storage-daemon/qemu-storage-daemon.c Log Message: ----------- monitor: Drop query-qmp-schema 'gen': false hack QMP commands return their response as a generated QAPI type, which the monitor core converts to JSON via QObject. query-qmp-schema's response is the generated introspection data. This is a QLitObject since commit 7d0f982bfb "qapi: generate a literal qobject for introspection", v2.12). Before, it was a string. Instead of converting QLitObject / string -> QObject -> QAPI type SchemaInfoList -> QObject -> JSON, we take a shortcut: the command is 'gen': false, so it can return the QObject instead of the QAPI type. Slightly simpler and more efficient. The next commit will filter the response for output policy, and this is easier in the SchemaInfoList representation. Drop the shortcut. This replaces the manual command registration by a generated one. The manual registration makes the command available before the machine is built by passing flag QCO_ALLOW_PRECONFIG. To keep it available there, we need need to add 'allow-preconfig': true to its definition in the schema. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-7-armbru@redhat.com> Commit: 7087fddf768f5ebd2a99187cf8221d4449e60361 https://github.com/qemu/qemu/commit/7087fddf768f5ebd2a99187cf8221d4449e60361 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M monitor/qmp-cmds-control.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP introspection This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP command query-qmp-schema: suppress information on deprecated commands, events and object type members, i.e. anything that has the special feature flag "deprecated". Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-8-armbru@redhat.com> Commit: a698e66023e3e5094a85aabeb94053bf805f7835 https://github.com/qemu/qemu/commit/a698e66023e3e5094a85aabeb94053bf805f7835 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M tests/unit/test-util-sockets.c Log Message: ----------- test-util-sockets: Add stub for monitor_set_cur() Without this stub, the next commit fails to link. I suspect the real cause is 947e47448d "monitor: Use getter/setter functions for cur_mon". Cc: Kevin Wolf Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-9-armbru@redhat.com> Commit: 6aa45e0f14f46cc080035a39e6aa2d6311ebd128 https://github.com/qemu/qemu/commit/6aa45e0f14f46cc080035a39e6aa2d6311ebd128 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M include/qapi/qmp/dispatch.h M qapi/qmp-dispatch.c M scripts/qapi/commands.py M tests/unit/test-qmp-cmds.c Log Message: ----------- qapi: Implement deprecated-input=reject for QMP commands This policy rejects deprecated input, and thus permits "testing the future". Implement it for QMP commands: make deprecated ones fail. Example: when QEMU is run with -compat deprecated-input=reject, then {"execute": "query-cpus"} fails like this {"error": {"class": "CommandNotFound", "desc": "Deprecated command query-cpus disabled by policy"}} When the deprecated command is removed, the error will change to {"error": {"class": "CommandNotFound", "desc": "The command query-cpus has not been found"}} Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-10-armbru@redhat.com> Commit: 59f0e1a898755dab4ba41b3911269e331f21e178 https://github.com/qemu/qemu/commit/59f0e1a898755dab4ba41b3911269e331f21e178 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M include/qapi/compat-policy.h M include/qapi/qobject-input-visitor.h M include/qapi/visitor-impl.h M include/qapi/visitor.h M qapi/qapi-visit-core.c M qapi/qmp-dispatch.c M qapi/qobject-input-visitor.c M qapi/trace-events M scripts/qapi/commands.py M scripts/qapi/visit.py M tests/unit/test-qmp-cmds.c Log Message: ----------- qapi: Implement deprecated-input=reject for QMP command arguments This policy rejects deprecated input, and thus permits "testing the future". Implement it for QMP command arguments: reject commands with deprecated ones. Example: when QEMU is run with -compat deprecated-input=reject, then {"execute": "eject", "arguments": {"device": "cd"}} fails like this {"error": {"class": "GenericError", "desc": "Deprecated parameter 'device' disabled by policy"}} When the deprecated parameter is removed, the error will change to {"error": {"class": "GenericError", "desc": "Parameter 'device' is unexpected"}} Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-11-armbru@redhat.com> Commit: 64e9c1e5bc73192bbf740db40c5b2c3764dcaf05 https://github.com/qemu/qemu/commit/64e9c1e5bc73192bbf740db40c5b2c3764dcaf05 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M qapi/compat.json M qapi/qmp-dispatch.c M qapi/qobject-input-visitor.c M qemu-options.hx Log Message: ----------- qapi: New -compat deprecated-input=crash Policy "crash" calls abort() when deprecated input is received. Bugs in integration tests may mask the error from policy "reject". Provide a larger hammer: crash outright. Masking that seems unlikely. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-12-armbru@redhat.com> Commit: ccf1d4553ac4a97151abb010ec85e8997a2f2d74 https://github.com/qemu/qemu/commit/ccf1d4553ac4a97151abb010ec85e8997a2f2d74 Author: Peter Maydell Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: A include/qapi/compat-policy.h M include/qapi/qmp/dispatch.h M include/qapi/qobject-input-visitor.h M include/qapi/qobject-output-visitor.h M include/qapi/visitor-impl.h M include/qapi/visitor.h M monitor/misc.c M monitor/monitor-internal.h M monitor/qmp-cmds-control.c A qapi/compat.json M qapi/introspect.json M qapi/meson.build M qapi/qapi-schema.json M qapi/qapi-visit-core.c M qapi/qmp-dispatch.c M qapi/qobject-input-visitor.c M qapi/qobject-output-visitor.c M qapi/trace-events M qemu-options.hx M scripts/qapi/commands.py M scripts/qapi/events.py M scripts/qapi/visit.py M softmmu/vl.c M storage-daemon/qemu-storage-daemon.c M stubs/meson.build R stubs/set-fd-handler.c M tests/qapi-schema/qapi-schema-test.json M tests/qapi-schema/qapi-schema-test.out M tests/unit/test-qmp-cmds.c M tests/unit/test-qmp-event.c M tests/unit/test-util-sockets.c Log Message: ----------- Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-03-16-v3' into staging QAPI patches patches for 2021-03-16 # gpg: Signature made Fri 19 Mar 2021 11:55:26 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster " [full] # gpg: aka "Markus Armbruster " [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2021-03-16-v3: qapi: New -compat deprecated-input=crash qapi: Implement deprecated-input=reject for QMP command arguments qapi: Implement deprecated-input=reject for QMP commands test-util-sockets: Add stub for monitor_set_cur() qapi: Implement deprecated-output=hide for QMP introspection monitor: Drop query-qmp-schema 'gen': false hack qapi: Implement deprecated-output=hide for QMP event data qapi: Implement deprecated-output=hide for QMP events qapi: Implement deprecated-output=hide for QMP command results qemu-options: New -compat to set policy for deprecated interfaces qemuutil: remove qemu_set_fd_handler duplicate symbol Signed-off-by: Peter Maydell # Conflicts: # storage-daemon/qemu-storage-daemon.c Compare: https://github.com/qemu/qemu/compare/92566947b3ac...ccf1d4553ac4 From MAILER-DAEMON Fri Mar 19 11:25:43 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lNH0R-0004j8-Lz for mharc-qemu-commits@gnu.org; Fri, 19 Mar 2021 11:25:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36580) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNH0Q-0004ix-1M for qemu-commits@nongnu.org; Fri, 19 Mar 2021 11:25:42 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:47217) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNH0N-0007PQ-JR for qemu-commits@nongnu.org; Fri, 19 Mar 2021 11:25:41 -0400 Received: from github.com (hubbernetes-node-0defff4.ash1-iad.github.net [10.56.120.51]) by smtp.github.com (Postfix) with ESMTPA id D4F9F900099 for ; Fri, 19 Mar 2021 08:25:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616167538; bh=TgBUk7HtEyD12YAuc2vs7ZquwppHsQLjHg1NAgBjHrQ=; h=Date:From:To:Subject:From; b=YZSPdz+zhQExEX3PiakunGf/nNtB7VVaYsCbBvYTjrXNw4BzF8OkCH4IKRmYEyjSg qtpgZyCJfp+klFvzvbN6izpZmVQs/r6dEJlCFferv3EFuRCoPgctt0mZY+O40rmVCQ DE3p4Qu/FdcPAietlABqfKN4jdD6h26qujLexD/s= Date: Fri, 19 Mar 2021 08:25:38 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -45 X-Spam_score: -4.6 X-Spam_bar: ---- X-Spam_report: (-4.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 958537: fuzz: Avoid deprecated misuse of -drive if=sd X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Mar 2021 15:25:42 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 9585376ab5e5a988cc64627ae56e5652da5b851f=0D https://github.com/qemu/qemu/commit/9585376ab5e5a988cc64627ae56e565= 2da5b851f=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/fuzz/generic_fuzz_configs.h=0D =0D Log Message:=0D -----------=0D fuzz: Avoid deprecated misuse of -drive if=3Dsd=0D =0D qemu-fuzz-i386-target-generic-fuzz-sdhci-v3 uses -drive=3Dsd where it=0D should use -drive if=3Dnone instead. This prints a deprecation warning:=0D= =0D $ ./build-oss-fuzz/DEST_DIR/qemu-fuzz-i386-target-generic-fuzz-sdhci-= v3 -runs=3D1 -seed=3D1=0D [ASan warnings snipped...]=0D --> i386: -drive if=3Dsd,index=3D0,file=3Dnull-co://,format=3Draw,id=3Dmy= drive: warning: bogus if=3Dsd is deprecated, use if=3Dnone=0D INFO: Seed: 1=0D [More normal output snipped...]=0D =0D Support for this usage will be gone soon. Adjust the test.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210319132008.1830950-1-armbru@redhat.com>=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: bd36f1fe1aa96e85d781df017651fda4945f9968=0D https://github.com/qemu/qemu/commit/bd36f1fe1aa96e85d781df017651fda= 4945f9968=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D =0D Log Message:=0D -----------=0D docs/system/deprecated: Fix note on fdc drive properties=0D =0D Commit 4a27a638e7 "fdc: Deprecate configuring floppies with -global=0D isa-fdc" actually deprecated any use of floppy controller driver=0D properties, not just with -global. Correct the deprecation note=0D accordingly.=0D =0D Fixes: 4a27a638e718b445648de6b27c709353551d9b44=0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D Message-id: 20210309161214.1402527-2-armbru@redhat.com=0D Signed-off-by: John Snow =0D =0D =0D Commit: 36585e2b12c25133b88fc8acfc5c603b0b539074=0D https://github.com/qemu/qemu/commit/36585e2b12c25133b88fc8acfc5c603= b0b539074=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/block/fdc.c=0D M tests/qemu-iotests/172=0D M tests/qemu-iotests/172.out=0D =0D Log Message:=0D -----------=0D fdc: Drop deprecated floppy configuration=0D =0D Drop the crap deprecated in commit 4a27a638e7 "fdc: Deprecate=0D configuring floppies with -global isa-fdc" (v5.1.0).=0D =0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D Message-id: 20210309161214.1402527-3-armbru@redhat.com=0D Signed-off-by: John Snow =0D =0D =0D Commit: f2a9a6c2a86570ccbf8c5c30cbb8bf723168c459=0D https://github.com/qemu/qemu/commit/f2a9a6c2a86570ccbf8c5c30cbb8bf7= 23168c459=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M hw/block/fdc.c=0D =0D Log Message:=0D -----------=0D fdc: Inline fdctrl_connect_drives() into fdctrl_realize_common()=0D =0D The previous commit rendered the name fdctrl_connect_drives() somewhat=0D= misleading. Get rid of it by inlining the (now pretty simple)=0D function into its only caller.=0D =0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D Message-id: 20210309161214.1402527-4-armbru@redhat.com=0D Signed-off-by: John Snow =0D =0D =0D Commit: fe9f70a1c37d2b00c41836788cf97116a99d338b=0D https://github.com/qemu/qemu/commit/fe9f70a1c37d2b00c41836788cf9711= 6a99d338b=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M blockdev.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M include/sysemu/blockdev.h=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D blockdev: Drop deprecated bogus -drive interface type=0D =0D Drop the crap deprecated in commit a1b40bda08 "blockdev: Deprecate=0D -drive with bogus interface type" (v5.1.0).=0D =0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D Message-id: 20210309161214.1402527-5-armbru@redhat.com=0D Signed-off-by: John Snow =0D =0D =0D Commit: e178113ff6465b55893c2b048b0a4be82a7bbd25=0D https://github.com/qemu/qemu/commit/e178113ff6465b55893c2b048b0a4be= 82a7bbd25=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/xilinx_zynq.c=0D M hw/audio/cs4231.c=0D M hw/block/fdc.c=0D M hw/char/etraxfs_ser.c=0D M hw/cris/axis_dev88.c=0D M hw/display/tcx.c=0D M hw/intc/etraxfs_pic.c=0D M hw/microblaze/xlnx-zynqmp-pmu.c=0D M hw/misc/zynq_slcr.c=0D M hw/sparc/sun4m.c=0D M hw/timer/etraxfs_timer.c=0D M include/hw/arm/armv7m.h=0D M include/hw/arm/fsl-imx25.h=0D M include/hw/arm/fsl-imx31.h=0D M include/hw/arm/fsl-imx6.h=0D M include/hw/arm/fsl-imx6ul.h=0D M include/hw/arm/fsl-imx7.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/cris/etraxfs.h=0D M include/hw/i386/ich9.h=0D M include/hw/misc/grlib_ahb_apb_pnp.h=0D M include/hw/misc/zynq-xadc.h=0D M include/hw/register.h=0D M include/hw/sparc/grlib.h=0D M softmmu/vl.c=0D M tests/vmstate-static-checker-data/dump1.json=0D M tests/vmstate-static-checker-data/dump2.json=0D =0D Log Message:=0D -----------=0D hw: Replace anti-social QOM type names=0D =0D Several QOM type names contain ',':=0D =0D ARM,bitband-memory=0D etraxfs,pic=0D etraxfs,serial=0D etraxfs,timer=0D fsl,imx25=0D fsl,imx31=0D fsl,imx6=0D fsl,imx6ul=0D fsl,imx7=0D grlib,ahbpnp=0D grlib,apbpnp=0D grlib,apbuart=0D grlib,gptimer=0D grlib,irqmp=0D qemu,register=0D SUNW,bpp=0D SUNW,CS4231=0D SUNW,DBRI=0D SUNW,DBRI.prom=0D SUNW,fdtwo=0D SUNW,sx=0D SUNW,tcx=0D xilinx,zynq_slcr=0D xlnx,zynqmp=0D xlnx,zynqmp-pmu-soc=0D xlnx,zynq-xadc=0D =0D These are all device types. They can't be plugged with -device /=0D device_add, except for xlnx,zynqmp-pmu-soc, and I doubt that one=0D actually works.=0D =0D They *can* be used with -device / device_add to request help.=0D Usability is poor, though: you have to double the comma, like this:=0D =0D $ qemu-system-x86_64 -device SUNW,,fdtwo,help=0D =0D Trap for the unwary. The fact that this was broken in=0D device-introspect-test for more than six years until commit e27bd49876=0D= fixed it demonstrates that "the unwary" includes seasoned developers.=0D =0D One QOM type name contains ' ': "ICH9 SMB". Because having to=0D remember just one way to quote would be too easy.=0D =0D Rename the "SUNW,FOO types to "sun-FOO". Summarily replace ',' and '=0D ' by '-' in the other type names.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210304140229.575481-2-armbru@redhat.com>=0D Reviewed-by: Mark Cave-Ayland =0D Acked-by: Paolo Bonzini =0D =0D =0D Commit: bb3c92ed105f0704ffd1cc1dc6031b6d457c829e=0D https://github.com/qemu/qemu/commit/bb3c92ed105f0704ffd1cc1dc6031b6= d457c829e=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/exec/memory.h=0D =0D Log Message:=0D -----------=0D memory: Drop "qemu:" prefix from QOM memory region type names=0D =0D Almost all QOM type names consist only of letters, digits, '-', '_',=0D and '.'. Just two contain ':': "qemu:memory-region" and=0D "qemu:iommu-memory-region". Neither can be plugged with -object.=0D Rename them to "memory-region" and "iommu-memory-region".=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210304140229.575481-3-armbru@redhat.com>=0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Acked-by: Paolo Bonzini =0D =0D =0D Commit: 8631a430e65ef73b3d8a297128be2ef3c7317b90=0D https://github.com/qemu/qemu/commit/8631a430e65ef73b3d8a297128be2ef= 3c7317b90=0D Author: Peter Maydell =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M blockdev.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/arm/xilinx_zynq.c=0D M hw/audio/cs4231.c=0D M hw/block/fdc.c=0D M hw/char/etraxfs_ser.c=0D M hw/cris/axis_dev88.c=0D M hw/display/tcx.c=0D M hw/intc/etraxfs_pic.c=0D M hw/microblaze/xlnx-zynqmp-pmu.c=0D M hw/misc/zynq_slcr.c=0D M hw/sparc/sun4m.c=0D M hw/timer/etraxfs_timer.c=0D M include/exec/memory.h=0D M include/hw/arm/armv7m.h=0D M include/hw/arm/fsl-imx25.h=0D M include/hw/arm/fsl-imx31.h=0D M include/hw/arm/fsl-imx6.h=0D M include/hw/arm/fsl-imx6ul.h=0D M include/hw/arm/fsl-imx7.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/cris/etraxfs.h=0D M include/hw/i386/ich9.h=0D M include/hw/misc/grlib_ahb_apb_pnp.h=0D M include/hw/misc/zynq-xadc.h=0D M include/hw/register.h=0D M include/hw/sparc/grlib.h=0D M include/sysemu/blockdev.h=0D M softmmu/vl.c=0D M tests/qemu-iotests/172=0D M tests/qemu-iotests/172.out=0D M tests/qtest/fuzz/generic_fuzz_configs.h=0D M tests/vmstate-static-checker-data/dump1.json=0D M tests/vmstate-static-checker-data/dump2.json=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/armbru/tags/pull-qom-fdc-2021-03-= 16-v5' into staging=0D =0D QOM and fdc patches patches for 2021-03-16=0D =0D # gpg: Signature made Fri 19 Mar 2021 14:18:47 GMT=0D # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918= 653=0D # gpg: issuer "armbru@redhat.com"=0D # gpg: Good signature from "Markus Armbruster " [full]= =0D # gpg: aka "Markus Armbruster " [ful= l]=0D # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 = 8653=0D =0D * remotes/armbru/tags/pull-qom-fdc-2021-03-16-v5:=0D memory: Drop "qemu:" prefix from QOM memory region type names=0D hw: Replace anti-social QOM type names=0D blockdev: Drop deprecated bogus -drive interface type=0D fdc: Inline fdctrl_connect_drives() into fdctrl_realize_common()=0D fdc: Drop deprecated floppy configuration=0D docs/system/deprecated: Fix note on fdc drive properties=0D fuzz: Avoid deprecated misuse of -drive if=3Dsd=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/ccf1d4553ac4...8631a430e65e= =0D From MAILER-DAEMON Fri Mar 19 12:39:59 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lNIAJ-0005p7-HT for mharc-qemu-commits@gnu.org; Fri, 19 Mar 2021 12:39:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54004) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNIAI-0005oq-OV for qemu-commits@nongnu.org; Fri, 19 Mar 2021 12:39:58 -0400 Received: from out-20.smtp.github.com ([192.30.252.203]:54743) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNIAG-0007hK-66 for qemu-commits@nongnu.org; Fri, 19 Mar 2021 12:39:58 -0400 Received: from github.com (hubbernetes-node-ca82a3e.va3-iad.github.net [10.48.113.52]) by smtp.github.com (Postfix) with ESMTPA id 84BD6E0D30 for ; Fri, 19 Mar 2021 09:39:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616171995; bh=MNaRGhvmUYjZfRoQ7Ow9Y2Ft1vKLdaKYreWvIlrj8VM=; h=Date:From:To:Subject:From; b=dhT5ASfFKIYqZBKDkQVSmnXKOJ2r5s2uoOyFESzBOqBjqYGK+A2fSNeiuAq2lEe3q 614CGO5j5ooQzrLJm0bOku5ngy6OQ4RZ9FRQSZoTDscnC85jORLVI3Bp3YJiJPi7K7 XIDtPGM9SzhvAfoy8PvK+x0LFgFIpBSGPcV2bMR8= Date: Fri, 19 Mar 2021 09:39:55 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.203; envelope-from=noreply@github.com; helo=out-20.smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 958537: fuzz: Avoid deprecated misuse of -drive if=sd X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Mar 2021 16:39:59 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 9585376ab5e5a988cc64627ae56e5652da5b851f=0D https://github.com/qemu/qemu/commit/9585376ab5e5a988cc64627ae56e565= 2da5b851f=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M tests/qtest/fuzz/generic_fuzz_configs.h=0D =0D Log Message:=0D -----------=0D fuzz: Avoid deprecated misuse of -drive if=3Dsd=0D =0D qemu-fuzz-i386-target-generic-fuzz-sdhci-v3 uses -drive=3Dsd where it=0D should use -drive if=3Dnone instead. This prints a deprecation warning:=0D= =0D $ ./build-oss-fuzz/DEST_DIR/qemu-fuzz-i386-target-generic-fuzz-sdhci-= v3 -runs=3D1 -seed=3D1=0D [ASan warnings snipped...]=0D --> i386: -drive if=3Dsd,index=3D0,file=3Dnull-co://,format=3Draw,id=3Dmy= drive: warning: bogus if=3Dsd is deprecated, use if=3Dnone=0D INFO: Seed: 1=0D [More normal output snipped...]=0D =0D Support for this usage will be gone soon. Adjust the test.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210319132008.1830950-1-armbru@redhat.com>=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: bd36f1fe1aa96e85d781df017651fda4945f9968=0D https://github.com/qemu/qemu/commit/bd36f1fe1aa96e85d781df017651fda= 4945f9968=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D =0D Log Message:=0D -----------=0D docs/system/deprecated: Fix note on fdc drive properties=0D =0D Commit 4a27a638e7 "fdc: Deprecate configuring floppies with -global=0D isa-fdc" actually deprecated any use of floppy controller driver=0D properties, not just with -global. Correct the deprecation note=0D accordingly.=0D =0D Fixes: 4a27a638e718b445648de6b27c709353551d9b44=0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D Message-id: 20210309161214.1402527-2-armbru@redhat.com=0D Signed-off-by: John Snow =0D =0D =0D Commit: 36585e2b12c25133b88fc8acfc5c603b0b539074=0D https://github.com/qemu/qemu/commit/36585e2b12c25133b88fc8acfc5c603= b0b539074=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/block/fdc.c=0D M tests/qemu-iotests/172=0D M tests/qemu-iotests/172.out=0D =0D Log Message:=0D -----------=0D fdc: Drop deprecated floppy configuration=0D =0D Drop the crap deprecated in commit 4a27a638e7 "fdc: Deprecate=0D configuring floppies with -global isa-fdc" (v5.1.0).=0D =0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D Message-id: 20210309161214.1402527-3-armbru@redhat.com=0D Signed-off-by: John Snow =0D =0D =0D Commit: f2a9a6c2a86570ccbf8c5c30cbb8bf723168c459=0D https://github.com/qemu/qemu/commit/f2a9a6c2a86570ccbf8c5c30cbb8bf7= 23168c459=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M hw/block/fdc.c=0D =0D Log Message:=0D -----------=0D fdc: Inline fdctrl_connect_drives() into fdctrl_realize_common()=0D =0D The previous commit rendered the name fdctrl_connect_drives() somewhat=0D= misleading. Get rid of it by inlining the (now pretty simple)=0D function into its only caller.=0D =0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D Message-id: 20210309161214.1402527-4-armbru@redhat.com=0D Signed-off-by: John Snow =0D =0D =0D Commit: fe9f70a1c37d2b00c41836788cf97116a99d338b=0D https://github.com/qemu/qemu/commit/fe9f70a1c37d2b00c41836788cf9711= 6a99d338b=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M blockdev.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M include/sysemu/blockdev.h=0D M softmmu/vl.c=0D =0D Log Message:=0D -----------=0D blockdev: Drop deprecated bogus -drive interface type=0D =0D Drop the crap deprecated in commit a1b40bda08 "blockdev: Deprecate=0D -drive with bogus interface type" (v5.1.0).=0D =0D Signed-off-by: Markus Armbruster =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D Message-id: 20210309161214.1402527-5-armbru@redhat.com=0D Signed-off-by: John Snow =0D =0D =0D Commit: e178113ff6465b55893c2b048b0a4be82a7bbd25=0D https://github.com/qemu/qemu/commit/e178113ff6465b55893c2b048b0a4be= 82a7bbd25=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/xilinx_zynq.c=0D M hw/audio/cs4231.c=0D M hw/block/fdc.c=0D M hw/char/etraxfs_ser.c=0D M hw/cris/axis_dev88.c=0D M hw/display/tcx.c=0D M hw/intc/etraxfs_pic.c=0D M hw/microblaze/xlnx-zynqmp-pmu.c=0D M hw/misc/zynq_slcr.c=0D M hw/sparc/sun4m.c=0D M hw/timer/etraxfs_timer.c=0D M include/hw/arm/armv7m.h=0D M include/hw/arm/fsl-imx25.h=0D M include/hw/arm/fsl-imx31.h=0D M include/hw/arm/fsl-imx6.h=0D M include/hw/arm/fsl-imx6ul.h=0D M include/hw/arm/fsl-imx7.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/cris/etraxfs.h=0D M include/hw/i386/ich9.h=0D M include/hw/misc/grlib_ahb_apb_pnp.h=0D M include/hw/misc/zynq-xadc.h=0D M include/hw/register.h=0D M include/hw/sparc/grlib.h=0D M softmmu/vl.c=0D M tests/vmstate-static-checker-data/dump1.json=0D M tests/vmstate-static-checker-data/dump2.json=0D =0D Log Message:=0D -----------=0D hw: Replace anti-social QOM type names=0D =0D Several QOM type names contain ',':=0D =0D ARM,bitband-memory=0D etraxfs,pic=0D etraxfs,serial=0D etraxfs,timer=0D fsl,imx25=0D fsl,imx31=0D fsl,imx6=0D fsl,imx6ul=0D fsl,imx7=0D grlib,ahbpnp=0D grlib,apbpnp=0D grlib,apbuart=0D grlib,gptimer=0D grlib,irqmp=0D qemu,register=0D SUNW,bpp=0D SUNW,CS4231=0D SUNW,DBRI=0D SUNW,DBRI.prom=0D SUNW,fdtwo=0D SUNW,sx=0D SUNW,tcx=0D xilinx,zynq_slcr=0D xlnx,zynqmp=0D xlnx,zynqmp-pmu-soc=0D xlnx,zynq-xadc=0D =0D These are all device types. They can't be plugged with -device /=0D device_add, except for xlnx,zynqmp-pmu-soc, and I doubt that one=0D actually works.=0D =0D They *can* be used with -device / device_add to request help.=0D Usability is poor, though: you have to double the comma, like this:=0D =0D $ qemu-system-x86_64 -device SUNW,,fdtwo,help=0D =0D Trap for the unwary. The fact that this was broken in=0D device-introspect-test for more than six years until commit e27bd49876=0D= fixed it demonstrates that "the unwary" includes seasoned developers.=0D =0D One QOM type name contains ' ': "ICH9 SMB". Because having to=0D remember just one way to quote would be too easy.=0D =0D Rename the "SUNW,FOO types to "sun-FOO". Summarily replace ',' and '=0D ' by '-' in the other type names.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210304140229.575481-2-armbru@redhat.com>=0D Reviewed-by: Mark Cave-Ayland =0D Acked-by: Paolo Bonzini =0D =0D =0D Commit: bb3c92ed105f0704ffd1cc1dc6031b6d457c829e=0D https://github.com/qemu/qemu/commit/bb3c92ed105f0704ffd1cc1dc6031b6= d457c829e=0D Author: Markus Armbruster =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M include/exec/memory.h=0D =0D Log Message:=0D -----------=0D memory: Drop "qemu:" prefix from QOM memory region type names=0D =0D Almost all QOM type names consist only of letters, digits, '-', '_',=0D and '.'. Just two contain ':': "qemu:memory-region" and=0D "qemu:iommu-memory-region". Neither can be plugged with -object.=0D Rename them to "memory-region" and "iommu-memory-region".=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210304140229.575481-3-armbru@redhat.com>=0D Reviewed-by: Alistair Francis =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Acked-by: Paolo Bonzini =0D =0D =0D Commit: 8631a430e65ef73b3d8a297128be2ef3c7317b90=0D https://github.com/qemu/qemu/commit/8631a430e65ef73b3d8a297128be2ef= 3c7317b90=0D Author: Peter Maydell =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M blockdev.c=0D M docs/system/deprecated.rst=0D M docs/system/removed-features.rst=0D M hw/arm/xilinx_zynq.c=0D M hw/audio/cs4231.c=0D M hw/block/fdc.c=0D M hw/char/etraxfs_ser.c=0D M hw/cris/axis_dev88.c=0D M hw/display/tcx.c=0D M hw/intc/etraxfs_pic.c=0D M hw/microblaze/xlnx-zynqmp-pmu.c=0D M hw/misc/zynq_slcr.c=0D M hw/sparc/sun4m.c=0D M hw/timer/etraxfs_timer.c=0D M include/exec/memory.h=0D M include/hw/arm/armv7m.h=0D M include/hw/arm/fsl-imx25.h=0D M include/hw/arm/fsl-imx31.h=0D M include/hw/arm/fsl-imx6.h=0D M include/hw/arm/fsl-imx6ul.h=0D M include/hw/arm/fsl-imx7.h=0D M include/hw/arm/xlnx-zynqmp.h=0D M include/hw/cris/etraxfs.h=0D M include/hw/i386/ich9.h=0D M include/hw/misc/grlib_ahb_apb_pnp.h=0D M include/hw/misc/zynq-xadc.h=0D M include/hw/register.h=0D M include/hw/sparc/grlib.h=0D M include/sysemu/blockdev.h=0D M softmmu/vl.c=0D M tests/qemu-iotests/172=0D M tests/qemu-iotests/172.out=0D M tests/qtest/fuzz/generic_fuzz_configs.h=0D M tests/vmstate-static-checker-data/dump1.json=0D M tests/vmstate-static-checker-data/dump2.json=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/armbru/tags/pull-qom-fdc-2021-03-= 16-v5' into staging=0D =0D QOM and fdc patches patches for 2021-03-16=0D =0D # gpg: Signature made Fri 19 Mar 2021 14:18:47 GMT=0D # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918= 653=0D # gpg: issuer "armbru@redhat.com"=0D # gpg: Good signature from "Markus Armbruster " [full]= =0D # gpg: aka "Markus Armbruster " [ful= l]=0D # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 = 8653=0D =0D * remotes/armbru/tags/pull-qom-fdc-2021-03-16-v5:=0D memory: Drop "qemu:" prefix from QOM memory region type names=0D hw: Replace anti-social QOM type names=0D blockdev: Drop deprecated bogus -drive interface type=0D fdc: Inline fdctrl_connect_drives() into fdctrl_realize_common()=0D fdc: Drop deprecated floppy configuration=0D docs/system/deprecated: Fix note on fdc drive properties=0D fuzz: Avoid deprecated misuse of -drive if=3Dsd=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/92566947b3ac...8631a430e65e= =0D From MAILER-DAEMON Fri Mar 19 12:45:55 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lNIG3-0000QE-Eu for mharc-qemu-commits@gnu.org; Fri, 19 Mar 2021 12:45:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55502) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNIFz-0000Ne-GE for qemu-commits@nongnu.org; Fri, 19 Mar 2021 12:45:52 -0400 Received: from out-22.smtp.github.com ([192.30.252.205]:41075 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNIFu-0002dZ-SL for qemu-commits@nongnu.org; Fri, 19 Mar 2021 12:45:51 -0400 Received: from github.com (hubbernetes-node-62d8c21.ac4-iad.github.net [10.52.202.89]) by smtp.github.com (Postfix) with ESMTPA id 2B0D656002F for ; Fri, 19 Mar 2021 09:45:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616172346; bh=RQux9+JKqQVtemrdj5ph69FwpXYEilLO3baSsFlEKA4=; h=Date:From:To:Subject:From; b=Le3zB8K82bko7WaRJegrrJ0RpSRNjJ0MV/CQXfV5YoVXUgyFsoC9M25sH0zDTJBXX VZDxlQkLfafiazzu/8ftA00wq0ZyDYN/X4xjzXrE6/yTO/446DBE9X06uoi46I87aK SCSkKNSbJ5i/CRUA//J7txvEcvtKRibBjBrVLrIM= Date: Fri, 19 Mar 2021 09:45:46 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] b1eee9: qemuutil: remove qemu_set_fd_handler duplicate symbol X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Mar 2021 16:45:54 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: b1eee9bb6de5902a8eabff4a9e7556855fadea6c https://github.com/qemu/qemu/commit/b1eee9bb6de5902a8eabff4a9e7556855fadea6c Author: Paolo Bonzini Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M stubs/meson.build R stubs/set-fd-handler.c Log Message: ----------- qemuutil: remove qemu_set_fd_handler duplicate symbol libqemuutil has two definitions of qemu_set_fd_handler. This is not needed since the only users of the function are qemu-io.c and the emulators, both of which already include util/main-loop.c. Signed-off-by: Paolo Bonzini Message-Id: Tested-by: Markus Armbruster Signed-off-by: Markus Armbruster Message-Id: <20210318155519.1224118-2-armbru@redhat.com> Commit: 6dd75472d58d3d199eb5003a8d2ec2334c68f18f https://github.com/qemu/qemu/commit/6dd75472d58d3d199eb5003a8d2ec2334c68f18f Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: A include/qapi/compat-policy.h A qapi/compat.json M qapi/meson.build M qapi/qapi-schema.json M qapi/qmp-dispatch.c M qemu-options.hx M softmmu/vl.c Log Message: ----------- qemu-options: New -compat to set policy for deprecated interfaces New option -compat lets you configure what to do when deprecated interfaces get used. This is intended for testing users of the management interfaces. It is experimental. -compat deprecated-input= configures what to do when deprecated input is received. Input policy can be "accept" (accept silently), or "reject" (reject the request with an error). -compat deprecated-output= configures what to do when deprecated output is sent. Output policy can be "accept" (pass on unchanged), or "hide" (filter out the deprecated parts). Default is "accept". Policies other than "accept" are implemented later in this series. For now, -compat covers only syntactic aspects of QMP, i.e. stuff tagged with feature 'deprecated'. We may want to extend it to cover semantic aspects, CLI, and experimental features. Note that there is no good way for management application to detect presence of -compat: it's not visible output of query-qmp-schema or query-command-line-options. Tolerable, because it's meant for testing. If running with -compat fails, skip the test. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-3-armbru@redhat.com> Commit: 91fa93e516d080d440ead2ad4f88960545bd5b2c https://github.com/qemu/qemu/commit/91fa93e516d080d440ead2ad4f88960545bd5b2c Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M include/qapi/compat-policy.h M include/qapi/qobject-output-visitor.h M include/qapi/visitor-impl.h M include/qapi/visitor.h M qapi/qapi-visit-core.c M qapi/qmp-dispatch.c M qapi/qobject-output-visitor.c M qapi/trace-events M scripts/qapi/commands.py M scripts/qapi/visit.py M tests/qapi-schema/qapi-schema-test.json M tests/qapi-schema/qapi-schema-test.out M tests/unit/test-qmp-cmds.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP command results This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP command results. Example: when QEMU is run with -compat deprecated-output=hide, then {"execute": "query-cpus-fast"} yields {"return": [{"thread-id": 9805, "props": {"core-id": 0, "thread-id": 0, "socket-id": 0}, "qom-path": "/machine/unattached/device[0]", "cpu-index": 0, "target": "x86_64"}]} instead of {"return": [{"arch": "x86", "thread-id": 22436, "props": {"core-id": 0, "thread-id": 0, "socket-id": 0}, "qom-path": "/machine/unattached/device[0]", "cpu-index": 0, "target": "x86_64"}]} Note the suppression of deprecated member "arch". Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-4-armbru@redhat.com> Commit: 278fc2f7d3425dfbc6aa91644bffc65e94afad7c https://github.com/qemu/qemu/commit/278fc2f7d3425dfbc6aa91644bffc65e94afad7c Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M scripts/qapi/events.py M tests/unit/test-qmp-event.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP events This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP events: suppress deprecated ones. No QMP event is deprecated right now. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-5-armbru@redhat.com> Commit: a291a38fa1db6a67bd9046da26a48e82c591ca49 https://github.com/qemu/qemu/commit/a291a38fa1db6a67bd9046da26a48e82c591ca49 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M scripts/qapi/events.py M tests/qapi-schema/qapi-schema-test.json M tests/qapi-schema/qapi-schema-test.out M tests/unit/test-qmp-event.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP event data This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP event data: suppress deprecated members. No QMP event data is deprecated right now. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-6-armbru@redhat.com> Commit: 624fa80c8c199229af7ff42eb20b5b2ab851e4ee https://github.com/qemu/qemu/commit/624fa80c8c199229af7ff42eb20b5b2ab851e4ee Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M monitor/misc.c M monitor/monitor-internal.h M monitor/qmp-cmds-control.c M qapi/introspect.json M storage-daemon/qemu-storage-daemon.c Log Message: ----------- monitor: Drop query-qmp-schema 'gen': false hack QMP commands return their response as a generated QAPI type, which the monitor core converts to JSON via QObject. query-qmp-schema's response is the generated introspection data. This is a QLitObject since commit 7d0f982bfb "qapi: generate a literal qobject for introspection", v2.12). Before, it was a string. Instead of converting QLitObject / string -> QObject -> QAPI type SchemaInfoList -> QObject -> JSON, we take a shortcut: the command is 'gen': false, so it can return the QObject instead of the QAPI type. Slightly simpler and more efficient. The next commit will filter the response for output policy, and this is easier in the SchemaInfoList representation. Drop the shortcut. This replaces the manual command registration by a generated one. The manual registration makes the command available before the machine is built by passing flag QCO_ALLOW_PRECONFIG. To keep it available there, we need need to add 'allow-preconfig': true to its definition in the schema. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-7-armbru@redhat.com> Commit: 2df68d777c7abfb80a260021b3db3283f37843a1 https://github.com/qemu/qemu/commit/2df68d777c7abfb80a260021b3db3283f37843a1 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M monitor/qmp-cmds-control.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP introspection This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP command query-qmp-schema: suppress information on deprecated commands, events and object type members, i.e. anything that has the special feature flag "deprecated". Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-8-armbru@redhat.com> Commit: 130d4824222cf062ed8ee3c5ab9fa2bd852b33b6 https://github.com/qemu/qemu/commit/130d4824222cf062ed8ee3c5ab9fa2bd852b33b6 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M tests/unit/test-util-sockets.c Log Message: ----------- test-util-sockets: Add stub for monitor_set_cur() Without this stub, the next commit fails to link. I suspect the real cause is 947e47448d "monitor: Use getter/setter functions for cur_mon". Cc: Kevin Wolf Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-9-armbru@redhat.com> Commit: d2032598c434fe385145ee6ea58007a19ef7e723 https://github.com/qemu/qemu/commit/d2032598c434fe385145ee6ea58007a19ef7e723 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M include/qapi/qmp/dispatch.h M qapi/qmp-dispatch.c M scripts/qapi/commands.py M tests/unit/test-qmp-cmds.c Log Message: ----------- qapi: Implement deprecated-input=reject for QMP commands This policy rejects deprecated input, and thus permits "testing the future". Implement it for QMP commands: make deprecated ones fail. Example: when QEMU is run with -compat deprecated-input=reject, then {"execute": "query-cpus"} fails like this {"error": {"class": "CommandNotFound", "desc": "Deprecated command query-cpus disabled by policy"}} When the deprecated command is removed, the error will change to {"error": {"class": "CommandNotFound", "desc": "The command query-cpus has not been found"}} Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-10-armbru@redhat.com> Commit: db29164103e53ae7c112086127e3d1c92b1d4d89 https://github.com/qemu/qemu/commit/db29164103e53ae7c112086127e3d1c92b1d4d89 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M include/qapi/compat-policy.h M include/qapi/qobject-input-visitor.h M include/qapi/visitor-impl.h M include/qapi/visitor.h M qapi/qapi-visit-core.c M qapi/qmp-dispatch.c M qapi/qobject-input-visitor.c M qapi/trace-events M scripts/qapi/commands.py M scripts/qapi/visit.py M tests/unit/test-qmp-cmds.c Log Message: ----------- qapi: Implement deprecated-input=reject for QMP command arguments This policy rejects deprecated input, and thus permits "testing the future". Implement it for QMP command arguments: reject commands with deprecated ones. Example: when QEMU is run with -compat deprecated-input=reject, then {"execute": "eject", "arguments": {"device": "cd"}} fails like this {"error": {"class": "GenericError", "desc": "Deprecated parameter 'device' disabled by policy"}} When the deprecated parameter is removed, the error will change to {"error": {"class": "GenericError", "desc": "Parameter 'device' is unexpected"}} Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-11-armbru@redhat.com> Commit: dbb675c19aa6ca328f4449ccd1ff605f9cb744e9 https://github.com/qemu/qemu/commit/dbb675c19aa6ca328f4449ccd1ff605f9cb744e9 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M qapi/compat.json M qapi/qmp-dispatch.c M qapi/qobject-input-visitor.c M qemu-options.hx Log Message: ----------- qapi: New -compat deprecated-input=crash Policy "crash" calls abort() when deprecated input is received. Bugs in integration tests may mask the error from policy "reject". Provide a larger hammer: crash outright. Masking that seems unlikely. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-12-armbru@redhat.com> Commit: 2e1293cbaac75e84f541f9acfa8e26749f4c3562 https://github.com/qemu/qemu/commit/2e1293cbaac75e84f541f9acfa8e26749f4c3562 Author: Peter Maydell Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: A include/qapi/compat-policy.h M include/qapi/qmp/dispatch.h M include/qapi/qobject-input-visitor.h M include/qapi/qobject-output-visitor.h M include/qapi/visitor-impl.h M include/qapi/visitor.h M monitor/misc.c M monitor/monitor-internal.h M monitor/qmp-cmds-control.c A qapi/compat.json M qapi/introspect.json M qapi/meson.build M qapi/qapi-schema.json M qapi/qapi-visit-core.c M qapi/qmp-dispatch.c M qapi/qobject-input-visitor.c M qapi/qobject-output-visitor.c M qapi/trace-events M qemu-options.hx M scripts/qapi/commands.py M scripts/qapi/events.py M scripts/qapi/visit.py M softmmu/vl.c M storage-daemon/qemu-storage-daemon.c M stubs/meson.build R stubs/set-fd-handler.c M tests/qapi-schema/qapi-schema-test.json M tests/qapi-schema/qapi-schema-test.out M tests/unit/test-qmp-cmds.c M tests/unit/test-qmp-event.c M tests/unit/test-util-sockets.c Log Message: ----------- Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-03-16-v4' into staging QAPI patches patches for 2021-03-16 # gpg: Signature made Fri 19 Mar 2021 15:06:52 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster " [full] # gpg: aka "Markus Armbruster " [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2021-03-16-v4: qapi: New -compat deprecated-input=crash qapi: Implement deprecated-input=reject for QMP command arguments qapi: Implement deprecated-input=reject for QMP commands test-util-sockets: Add stub for monitor_set_cur() qapi: Implement deprecated-output=hide for QMP introspection monitor: Drop query-qmp-schema 'gen': false hack qapi: Implement deprecated-output=hide for QMP event data qapi: Implement deprecated-output=hide for QMP events qapi: Implement deprecated-output=hide for QMP command results qemu-options: New -compat to set policy for deprecated interfaces qemuutil: remove qemu_set_fd_handler duplicate symbol Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/8631a430e65e...2e1293cbaac7 From MAILER-DAEMON Fri Mar 19 14:01:34 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lNJRG-00032o-LG for mharc-qemu-commits@gnu.org; Fri, 19 Mar 2021 14:01:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46850) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNJR8-00031N-3D for qemu-commits@nongnu.org; Fri, 19 Mar 2021 14:01:29 -0400 Received: from out-18.smtp.github.com ([192.30.252.201]:57995 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNJQz-0004bC-G4 for qemu-commits@nongnu.org; Fri, 19 Mar 2021 14:01:24 -0400 Received: from github.com (hubbernetes-node-4bbd509.va3-iad.github.net [10.48.24.54]) by smtp.github.com (Postfix) with ESMTPA id B24BA34059D for ; Fri, 19 Mar 2021 11:01:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616176874; bh=x0Vp03+O05+BoXuC6HNmKOwjHQvphLJtCBkfxWY78NA=; h=Date:From:To:Subject:From; b=N8+WAvRvOuCnWSTbRbMX8jmWJyocnTrcW12lAWkBmojcRBWwcmI4cCxaryzRtcqY4 f41qllm7/j5sMOp0IjWy/rpmwgZaAaoHEuzC8FrkbE+8XcCrHoRcBhHg1corwcvpel 3GjpQT4rijIEqDnXWYezOdaGbETN1pF7WdzlpADo= Date: Fri, 19 Mar 2021 11:01:14 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -73 X-Spam_score: -7.4 X-Spam_bar: ------- X-Spam_report: (-7.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] b1eee9: qemuutil: remove qemu_set_fd_handler duplicate symbol X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Mar 2021 18:01:31 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: b1eee9bb6de5902a8eabff4a9e7556855fadea6c https://github.com/qemu/qemu/commit/b1eee9bb6de5902a8eabff4a9e7556855fadea6c Author: Paolo Bonzini Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M stubs/meson.build R stubs/set-fd-handler.c Log Message: ----------- qemuutil: remove qemu_set_fd_handler duplicate symbol libqemuutil has two definitions of qemu_set_fd_handler. This is not needed since the only users of the function are qemu-io.c and the emulators, both of which already include util/main-loop.c. Signed-off-by: Paolo Bonzini Message-Id: Tested-by: Markus Armbruster Signed-off-by: Markus Armbruster Message-Id: <20210318155519.1224118-2-armbru@redhat.com> Commit: 6dd75472d58d3d199eb5003a8d2ec2334c68f18f https://github.com/qemu/qemu/commit/6dd75472d58d3d199eb5003a8d2ec2334c68f18f Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: A include/qapi/compat-policy.h A qapi/compat.json M qapi/meson.build M qapi/qapi-schema.json M qapi/qmp-dispatch.c M qemu-options.hx M softmmu/vl.c Log Message: ----------- qemu-options: New -compat to set policy for deprecated interfaces New option -compat lets you configure what to do when deprecated interfaces get used. This is intended for testing users of the management interfaces. It is experimental. -compat deprecated-input= configures what to do when deprecated input is received. Input policy can be "accept" (accept silently), or "reject" (reject the request with an error). -compat deprecated-output= configures what to do when deprecated output is sent. Output policy can be "accept" (pass on unchanged), or "hide" (filter out the deprecated parts). Default is "accept". Policies other than "accept" are implemented later in this series. For now, -compat covers only syntactic aspects of QMP, i.e. stuff tagged with feature 'deprecated'. We may want to extend it to cover semantic aspects, CLI, and experimental features. Note that there is no good way for management application to detect presence of -compat: it's not visible output of query-qmp-schema or query-command-line-options. Tolerable, because it's meant for testing. If running with -compat fails, skip the test. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-3-armbru@redhat.com> Commit: 91fa93e516d080d440ead2ad4f88960545bd5b2c https://github.com/qemu/qemu/commit/91fa93e516d080d440ead2ad4f88960545bd5b2c Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M include/qapi/compat-policy.h M include/qapi/qobject-output-visitor.h M include/qapi/visitor-impl.h M include/qapi/visitor.h M qapi/qapi-visit-core.c M qapi/qmp-dispatch.c M qapi/qobject-output-visitor.c M qapi/trace-events M scripts/qapi/commands.py M scripts/qapi/visit.py M tests/qapi-schema/qapi-schema-test.json M tests/qapi-schema/qapi-schema-test.out M tests/unit/test-qmp-cmds.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP command results This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP command results. Example: when QEMU is run with -compat deprecated-output=hide, then {"execute": "query-cpus-fast"} yields {"return": [{"thread-id": 9805, "props": {"core-id": 0, "thread-id": 0, "socket-id": 0}, "qom-path": "/machine/unattached/device[0]", "cpu-index": 0, "target": "x86_64"}]} instead of {"return": [{"arch": "x86", "thread-id": 22436, "props": {"core-id": 0, "thread-id": 0, "socket-id": 0}, "qom-path": "/machine/unattached/device[0]", "cpu-index": 0, "target": "x86_64"}]} Note the suppression of deprecated member "arch". Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-4-armbru@redhat.com> Commit: 278fc2f7d3425dfbc6aa91644bffc65e94afad7c https://github.com/qemu/qemu/commit/278fc2f7d3425dfbc6aa91644bffc65e94afad7c Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M scripts/qapi/events.py M tests/unit/test-qmp-event.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP events This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP events: suppress deprecated ones. No QMP event is deprecated right now. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-5-armbru@redhat.com> Commit: a291a38fa1db6a67bd9046da26a48e82c591ca49 https://github.com/qemu/qemu/commit/a291a38fa1db6a67bd9046da26a48e82c591ca49 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M scripts/qapi/events.py M tests/qapi-schema/qapi-schema-test.json M tests/qapi-schema/qapi-schema-test.out M tests/unit/test-qmp-event.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP event data This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP event data: suppress deprecated members. No QMP event data is deprecated right now. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-6-armbru@redhat.com> Commit: 624fa80c8c199229af7ff42eb20b5b2ab851e4ee https://github.com/qemu/qemu/commit/624fa80c8c199229af7ff42eb20b5b2ab851e4ee Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M monitor/misc.c M monitor/monitor-internal.h M monitor/qmp-cmds-control.c M qapi/introspect.json M storage-daemon/qemu-storage-daemon.c Log Message: ----------- monitor: Drop query-qmp-schema 'gen': false hack QMP commands return their response as a generated QAPI type, which the monitor core converts to JSON via QObject. query-qmp-schema's response is the generated introspection data. This is a QLitObject since commit 7d0f982bfb "qapi: generate a literal qobject for introspection", v2.12). Before, it was a string. Instead of converting QLitObject / string -> QObject -> QAPI type SchemaInfoList -> QObject -> JSON, we take a shortcut: the command is 'gen': false, so it can return the QObject instead of the QAPI type. Slightly simpler and more efficient. The next commit will filter the response for output policy, and this is easier in the SchemaInfoList representation. Drop the shortcut. This replaces the manual command registration by a generated one. The manual registration makes the command available before the machine is built by passing flag QCO_ALLOW_PRECONFIG. To keep it available there, we need need to add 'allow-preconfig': true to its definition in the schema. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-7-armbru@redhat.com> Commit: 2df68d777c7abfb80a260021b3db3283f37843a1 https://github.com/qemu/qemu/commit/2df68d777c7abfb80a260021b3db3283f37843a1 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M monitor/qmp-cmds-control.c Log Message: ----------- qapi: Implement deprecated-output=hide for QMP introspection This policy suppresses deprecated bits in output, and thus permits "testing the future". Implement it for QMP command query-qmp-schema: suppress information on deprecated commands, events and object type members, i.e. anything that has the special feature flag "deprecated". Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-8-armbru@redhat.com> Commit: 130d4824222cf062ed8ee3c5ab9fa2bd852b33b6 https://github.com/qemu/qemu/commit/130d4824222cf062ed8ee3c5ab9fa2bd852b33b6 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M tests/unit/test-util-sockets.c Log Message: ----------- test-util-sockets: Add stub for monitor_set_cur() Without this stub, the next commit fails to link. I suspect the real cause is 947e47448d "monitor: Use getter/setter functions for cur_mon". Cc: Kevin Wolf Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-9-armbru@redhat.com> Commit: d2032598c434fe385145ee6ea58007a19ef7e723 https://github.com/qemu/qemu/commit/d2032598c434fe385145ee6ea58007a19ef7e723 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M include/qapi/qmp/dispatch.h M qapi/qmp-dispatch.c M scripts/qapi/commands.py M tests/unit/test-qmp-cmds.c Log Message: ----------- qapi: Implement deprecated-input=reject for QMP commands This policy rejects deprecated input, and thus permits "testing the future". Implement it for QMP commands: make deprecated ones fail. Example: when QEMU is run with -compat deprecated-input=reject, then {"execute": "query-cpus"} fails like this {"error": {"class": "CommandNotFound", "desc": "Deprecated command query-cpus disabled by policy"}} When the deprecated command is removed, the error will change to {"error": {"class": "CommandNotFound", "desc": "The command query-cpus has not been found"}} Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-10-armbru@redhat.com> Commit: db29164103e53ae7c112086127e3d1c92b1d4d89 https://github.com/qemu/qemu/commit/db29164103e53ae7c112086127e3d1c92b1d4d89 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M include/qapi/compat-policy.h M include/qapi/qobject-input-visitor.h M include/qapi/visitor-impl.h M include/qapi/visitor.h M qapi/qapi-visit-core.c M qapi/qmp-dispatch.c M qapi/qobject-input-visitor.c M qapi/trace-events M scripts/qapi/commands.py M scripts/qapi/visit.py M tests/unit/test-qmp-cmds.c Log Message: ----------- qapi: Implement deprecated-input=reject for QMP command arguments This policy rejects deprecated input, and thus permits "testing the future". Implement it for QMP command arguments: reject commands with deprecated ones. Example: when QEMU is run with -compat deprecated-input=reject, then {"execute": "eject", "arguments": {"device": "cd"}} fails like this {"error": {"class": "GenericError", "desc": "Deprecated parameter 'device' disabled by policy"}} When the deprecated parameter is removed, the error will change to {"error": {"class": "GenericError", "desc": "Parameter 'device' is unexpected"}} Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-11-armbru@redhat.com> Commit: dbb675c19aa6ca328f4449ccd1ff605f9cb744e9 https://github.com/qemu/qemu/commit/dbb675c19aa6ca328f4449ccd1ff605f9cb744e9 Author: Markus Armbruster Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: M qapi/compat.json M qapi/qmp-dispatch.c M qapi/qobject-input-visitor.c M qemu-options.hx Log Message: ----------- qapi: New -compat deprecated-input=crash Policy "crash" calls abort() when deprecated input is received. Bugs in integration tests may mask the error from policy "reject". Provide a larger hammer: crash outright. Masking that seems unlikely. Signed-off-by: Markus Armbruster Reviewed-by: Eric Blake Message-Id: <20210318155519.1224118-12-armbru@redhat.com> Commit: 2e1293cbaac75e84f541f9acfa8e26749f4c3562 https://github.com/qemu/qemu/commit/2e1293cbaac75e84f541f9acfa8e26749f4c3562 Author: Peter Maydell Date: 2021-03-19 (Fri, 19 Mar 2021) Changed paths: A include/qapi/compat-policy.h M include/qapi/qmp/dispatch.h M include/qapi/qobject-input-visitor.h M include/qapi/qobject-output-visitor.h M include/qapi/visitor-impl.h M include/qapi/visitor.h M monitor/misc.c M monitor/monitor-internal.h M monitor/qmp-cmds-control.c A qapi/compat.json M qapi/introspect.json M qapi/meson.build M qapi/qapi-schema.json M qapi/qapi-visit-core.c M qapi/qmp-dispatch.c M qapi/qobject-input-visitor.c M qapi/qobject-output-visitor.c M qapi/trace-events M qemu-options.hx M scripts/qapi/commands.py M scripts/qapi/events.py M scripts/qapi/visit.py M softmmu/vl.c M storage-daemon/qemu-storage-daemon.c M stubs/meson.build R stubs/set-fd-handler.c M tests/qapi-schema/qapi-schema-test.json M tests/qapi-schema/qapi-schema-test.out M tests/unit/test-qmp-cmds.c M tests/unit/test-qmp-event.c M tests/unit/test-util-sockets.c Log Message: ----------- Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-03-16-v4' into staging QAPI patches patches for 2021-03-16 # gpg: Signature made Fri 19 Mar 2021 15:06:52 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster " [full] # gpg: aka "Markus Armbruster " [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2021-03-16-v4: qapi: New -compat deprecated-input=crash qapi: Implement deprecated-input=reject for QMP command arguments qapi: Implement deprecated-input=reject for QMP commands test-util-sockets: Add stub for monitor_set_cur() qapi: Implement deprecated-output=hide for QMP introspection monitor: Drop query-qmp-schema 'gen': false hack qapi: Implement deprecated-output=hide for QMP event data qapi: Implement deprecated-output=hide for QMP events qapi: Implement deprecated-output=hide for QMP command results qemu-options: New -compat to set policy for deprecated interfaces qemuutil: remove qemu_set_fd_handler duplicate symbol Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/8631a430e65e...2e1293cbaac7 From MAILER-DAEMON Fri Mar 19 14:07:03 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lNJWY-0005Qa-0z for mharc-qemu-commits@gnu.org; Fri, 19 Mar 2021 14:07:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48064) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNJWW-0005PD-GW for qemu-commits@nongnu.org; Fri, 19 Mar 2021 14:07:00 -0400 Received: from out-27.smtp.github.com ([192.30.252.210]:51873) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNJWU-0007ZQ-3G for qemu-commits@nongnu.org; Fri, 19 Mar 2021 14:07:00 -0400 Received: from github.com (hubbernetes-node-ad33654.ash1-iad.github.net [10.56.122.46]) by smtp.github.com (Postfix) with ESMTPA id B03AC900D68 for ; Fri, 19 Mar 2021 11:06:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616177216; bh=uW9sVkoKHPnDUIKewtWh2nYGS7ET02IVPZewf/UYVhM=; h=Date:From:To:Subject:From; b=ctmaqDFfTR4vHGt7MNqjpCON4zZFxMWfqBLEsV64cuEZSh03LeRcUl8juYK94EwJr js/xhi5hpcGrbWewpUkZNzd2EBR2LTS6IyZH6msKa5RsAwvzjQGbOtAZifsWROsVU4 GBwDUfTHdoGYgEJiY+1qpI4g+d1I/rvQ8Y3dWcpI= Date: Fri, 19 Mar 2021 11:06:56 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.210; envelope-from=noreply@github.com; helo=out-27.smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 6d9abb: qom: use qemu_printf to print help for user-creata... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Mar 2021 18:07:00 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 6d9abb6de9cc53a508823db0283061824f2f98a2=0D https://github.com/qemu/qemu/commit/6d9abb6de9cc53a508823db02830618= 24f2f98a2=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: use qemu_printf to print help for user-creatable objects=0D =0D Since we have added help support for object_add, the help is=0D printed on stdout. Switch to qemu_printf so that it goes to=0D the monitor.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: b8184135835068e9579e678f0b54465ee6161d32=0D https://github.com/qemu/qemu/commit/b8184135835068e9579e678f0b54465= ee6161d32=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M target/i386/cpu.c=0D M target/i386/cpu.h=0D M target/i386/tcg/excp_helper.c=0D M target/i386/tcg/helper-tcg.h=0D =0D Log Message:=0D -----------=0D target/i386: allow modifying TCG phys-addr-bits=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: da3f3b020f5346f59c30241ff6f3da60be87ed78=0D https://github.com/qemu/qemu/commit/da3f3b020f5346f59c30241ff6f3da6= 0be87ed78=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M target/i386/tcg/misc_helper.c=0D =0D Log Message:=0D -----------=0D target/i386: fail if toggling LA57 in 64-bit mode=0D =0D This fixes kvm-unit-tests access.flat with -cpu qemu64,la57.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 687758565ab39028f7310c30355a765f171ff1bf=0D https://github.com/qemu/qemu/commit/687758565ab39028f7310c30355a765= f171ff1bf=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M target/i386/tcg/helper-tcg.h=0D M target/i386/tcg/seg_helper.c=0D M target/i386/tcg/svm_helper.c=0D =0D Log Message:=0D -----------=0D target/i386: svm: do not discard high 32 bits of EXITINFO1=0D =0D env->error_code is only 32-bits wide, so the high 32 bits of EXITINFO1=0D= are being lost. However, even though saving guest state and restoring=0D= host state must be delayed to do_vmexit, because they might take tb_lock,= =0D it is always possible to write to the VMCB. So do this for the exit=0D code and EXITINFO1, just like it is already being done for EXITINFO2.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 816d20c927a930f1ff66656a8dafd9861806c602=0D https://github.com/qemu/qemu/commit/816d20c927a930f1ff66656a8dafd98= 61806c602=0D Author: Vitaly Kuznetsov =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M target/i386/machine.c=0D =0D Log Message:=0D -----------=0D i386: Fix 'hypercall_hypercall' typo=0D =0D Even the name of this section is 'cpu/msr_hyperv_hypercall',=0D 'hypercall_hypercall' is clearly a typo.=0D =0D Signed-off-by: Vitaly Kuznetsov =0D Message-Id: <20210318160249.1084178-3-vkuznets@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 561dbb41b1d752098249128d8462aaadc56fd15d=0D https://github.com/qemu/qemu/commit/561dbb41b1d752098249128d8462aaa= dc56fd15d=0D Author: Vitaly Kuznetsov =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/hyperv.txt=0D M target/i386/kvm/hyperv-proto.h=0D M target/i386/machine.c=0D =0D Log Message:=0D -----------=0D i386: Make migration fail when Hyper-V reenlightenment was enabled but = 'user_tsc_khz' is unset=0D =0D KVM doesn't fully support Hyper-V reenlightenment notifications on=0D migration. In particular, it doesn't support emulating TSC frequency=0D of the source host by trapping all TSC accesses so unless TSC scaling=0D is supported on the destination host and KVM_SET_TSC_KHZ succeeds, it=0D is unsafe to proceed with migration.=0D =0D KVM_SET_TSC_KHZ is called from two sites: kvm_arch_init_vcpu() and=0D kvm_arch_put_registers(). The later (intentionally) doesn't propagate=0D errors allowing migrations to succeed even when TSC scaling is not=0D supported on the destination. This doesn't suit 're-enlightenment'=0D use-case as we have to guarantee that TSC frequency stays constant.=0D =0D Require 'tsc-frequency=3D' command line option to be specified for succes= sful=0D migration when re-enlightenment was enabled by the guest.=0D =0D Signed-off-by: Vitaly Kuznetsov =0D Message-Id: <20210319123801.1111090-1-vkuznets@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 52ad57a9b68e215c4f5fa2cfd2412132b522bff5=0D https://github.com/qemu/qemu/commit/52ad57a9b68e215c4f5fa2cfd241213= 2b522bff5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M hw/intc/i8259.c=0D =0D Log Message:=0D -----------=0D hw/intc/i8259: Refactor pic_read_irq() to avoid uninitialized variable=0D= =0D Some compiler versions are smart enough to detect a potentially=0D uninitialized variable, but are not smart enough to detect that this=0D cannot happen due to the code flow:=0D =0D ../hw/intc/i8259.c: In function =E2=80=98pic_read_irq=E2=80=99:=0D ../hw/intc/i8259.c:203:13: error: =E2=80=98irq2=E2=80=99 may be used unin= itialized in this function [-Werror=3Dmaybe-uninitialized]=0D 203 | irq =3D irq2 + 8;=0D | ~~~~^~~~~~~~~~=0D =0D Restrict irq2 variable use to the inner statement.=0D =0D Fixes: 78ef2b6989f ("i8259: Reorder intack in pic_read_irq")=0D Reported-by: Christian Borntraeger =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210318163059.3686596-1-philmd@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: af05ffffd7fa28010d4df9f5744514b16e71055d=0D https://github.com/qemu/qemu/commit/af05ffffd7fa28010d4df9f5744514b= 16e71055d=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D R tests/qtest/fuzz-test.c=0D A tests/qtest/lpc-ich9-test.c=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D tests/qtest: cleanup the testcase for bug 1878642=0D =0D Clean up the writes to the configuration space and the PM region, and=0D rename the test to lpc-ich9-test.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: bdee969c0e65d4d509932b1d70e3a3b2ffbff6d5=0D https://github.com/qemu/qemu/commit/bdee969c0e65d4d509932b1d70e3a3b= 2ffbff6d5=0D Author: Peter Maydell =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/hyperv.txt=0D M hw/intc/i8259.c=0D M qom/object_interfaces.c=0D M target/i386/cpu.c=0D M target/i386/cpu.h=0D M target/i386/kvm/hyperv-proto.h=0D M target/i386/machine.c=0D M target/i386/tcg/excp_helper.c=0D M target/i386/tcg/helper-tcg.h=0D M target/i386/tcg/misc_helper.c=0D M target/i386/tcg/seg_helper.c=0D M target/i386/tcg/svm_helper.c=0D R tests/qtest/fuzz-test.c=0D A tests/qtest/lpc-ich9-test.c=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream'= into staging=0D =0D * fixes for i386 TCG paging=0D * fixes for Hyper-V enlightenments=0D * avoid uninitialized variable warning=0D =0D # gpg: Signature made Fri 19 Mar 2021 14:38:12 GMT=0D # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7A= E83=0D # gpg: issuer "pbonzini@redhat.com"=0D # gpg: Good signature from "Paolo Bonzini " [full]=0D # gpg: aka "Paolo Bonzini " [full]=0D= # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 = 69B1=0D # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 = AE83=0D =0D * remotes/bonzini-gitlab/tags/for-upstream:=0D tests/qtest: cleanup the testcase for bug 1878642=0D hw/intc/i8259: Refactor pic_read_irq() to avoid uninitialized variable=0D= i386: Make migration fail when Hyper-V reenlightenment was enabled but = 'user_tsc_khz' is unset=0D i386: Fix 'hypercall_hypercall' typo=0D target/i386: svm: do not discard high 32 bits of EXITINFO1=0D target/i386: fail if toggling LA57 in 64-bit mode=0D target/i386: allow modifying TCG phys-addr-bits=0D qom: use qemu_printf to print help for user-creatable objects=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/2e1293cbaac7...bdee969c0e65= =0D From MAILER-DAEMON Sat Mar 20 12:55:49 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lNetA-0003To-Uf for mharc-qemu-commits@gnu.org; Sat, 20 Mar 2021 12:55:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58164) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNetA-0003RM-1D for qemu-commits@nongnu.org; Sat, 20 Mar 2021 12:55:48 -0400 Received: from out-27.smtp.github.com ([192.30.252.210]:37421) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lNet7-0002N5-AI for qemu-commits@nongnu.org; Sat, 20 Mar 2021 12:55:47 -0400 Received: from github.com (hubbernetes-node-dc2a576.ash1-iad.github.net [10.56.118.46]) by smtp.github.com (Postfix) with ESMTPA id A4101900407 for ; Sat, 20 Mar 2021 09:55:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616259344; bh=rK8om0KWZzmYBgXWQ+7e0gi2ZgThgQHToIFb6mEZmHU=; h=Date:From:To:Subject:From; b=1O48RpMps9wuyq9nH9TYfqJbCvFbyTzLZfBU2YJVj7eRFdyY4CictQL2OE7ceYX36 SvwPUI5xGDtRjA/POvViZ9bbN0VMBXnWGsSW55fLgEVElksVYBBxmwweMaak2vBjxz ulHZBqriVPC1oMuJ49MLbtOKF2lhYNzRR1bEGLT4= Date: Sat, 20 Mar 2021 09:55:44 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.210; envelope-from=noreply@github.com; helo=out-27.smtp.github.com X-Spam_score_int: -72 X-Spam_score: -7.3 X-Spam_bar: ------- X-Spam_report: (-7.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.251, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 6d9abb: qom: use qemu_printf to print help for user-creata... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 20 Mar 2021 16:55:48 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 6d9abb6de9cc53a508823db0283061824f2f98a2=0D https://github.com/qemu/qemu/commit/6d9abb6de9cc53a508823db02830618= 24f2f98a2=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M qom/object_interfaces.c=0D =0D Log Message:=0D -----------=0D qom: use qemu_printf to print help for user-creatable objects=0D =0D Since we have added help support for object_add, the help is=0D printed on stdout. Switch to qemu_printf so that it goes to=0D the monitor.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: b8184135835068e9579e678f0b54465ee6161d32=0D https://github.com/qemu/qemu/commit/b8184135835068e9579e678f0b54465= ee6161d32=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M target/i386/cpu.c=0D M target/i386/cpu.h=0D M target/i386/tcg/excp_helper.c=0D M target/i386/tcg/helper-tcg.h=0D =0D Log Message:=0D -----------=0D target/i386: allow modifying TCG phys-addr-bits=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: da3f3b020f5346f59c30241ff6f3da60be87ed78=0D https://github.com/qemu/qemu/commit/da3f3b020f5346f59c30241ff6f3da6= 0be87ed78=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M target/i386/tcg/misc_helper.c=0D =0D Log Message:=0D -----------=0D target/i386: fail if toggling LA57 in 64-bit mode=0D =0D This fixes kvm-unit-tests access.flat with -cpu qemu64,la57.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 687758565ab39028f7310c30355a765f171ff1bf=0D https://github.com/qemu/qemu/commit/687758565ab39028f7310c30355a765= f171ff1bf=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M target/i386/tcg/helper-tcg.h=0D M target/i386/tcg/seg_helper.c=0D M target/i386/tcg/svm_helper.c=0D =0D Log Message:=0D -----------=0D target/i386: svm: do not discard high 32 bits of EXITINFO1=0D =0D env->error_code is only 32-bits wide, so the high 32 bits of EXITINFO1=0D= are being lost. However, even though saving guest state and restoring=0D= host state must be delayed to do_vmexit, because they might take tb_lock,= =0D it is always possible to write to the VMCB. So do this for the exit=0D code and EXITINFO1, just like it is already being done for EXITINFO2.=0D =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 816d20c927a930f1ff66656a8dafd9861806c602=0D https://github.com/qemu/qemu/commit/816d20c927a930f1ff66656a8dafd98= 61806c602=0D Author: Vitaly Kuznetsov =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M target/i386/machine.c=0D =0D Log Message:=0D -----------=0D i386: Fix 'hypercall_hypercall' typo=0D =0D Even the name of this section is 'cpu/msr_hyperv_hypercall',=0D 'hypercall_hypercall' is clearly a typo.=0D =0D Signed-off-by: Vitaly Kuznetsov =0D Message-Id: <20210318160249.1084178-3-vkuznets@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 561dbb41b1d752098249128d8462aaadc56fd15d=0D https://github.com/qemu/qemu/commit/561dbb41b1d752098249128d8462aaa= dc56fd15d=0D Author: Vitaly Kuznetsov =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/hyperv.txt=0D M target/i386/kvm/hyperv-proto.h=0D M target/i386/machine.c=0D =0D Log Message:=0D -----------=0D i386: Make migration fail when Hyper-V reenlightenment was enabled but = 'user_tsc_khz' is unset=0D =0D KVM doesn't fully support Hyper-V reenlightenment notifications on=0D migration. In particular, it doesn't support emulating TSC frequency=0D of the source host by trapping all TSC accesses so unless TSC scaling=0D is supported on the destination host and KVM_SET_TSC_KHZ succeeds, it=0D is unsafe to proceed with migration.=0D =0D KVM_SET_TSC_KHZ is called from two sites: kvm_arch_init_vcpu() and=0D kvm_arch_put_registers(). The later (intentionally) doesn't propagate=0D errors allowing migrations to succeed even when TSC scaling is not=0D supported on the destination. This doesn't suit 're-enlightenment'=0D use-case as we have to guarantee that TSC frequency stays constant.=0D =0D Require 'tsc-frequency=3D' command line option to be specified for succes= sful=0D migration when re-enlightenment was enabled by the guest.=0D =0D Signed-off-by: Vitaly Kuznetsov =0D Message-Id: <20210319123801.1111090-1-vkuznets@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: 52ad57a9b68e215c4f5fa2cfd2412132b522bff5=0D https://github.com/qemu/qemu/commit/52ad57a9b68e215c4f5fa2cfd241213= 2b522bff5=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M hw/intc/i8259.c=0D =0D Log Message:=0D -----------=0D hw/intc/i8259: Refactor pic_read_irq() to avoid uninitialized variable=0D= =0D Some compiler versions are smart enough to detect a potentially=0D uninitialized variable, but are not smart enough to detect that this=0D cannot happen due to the code flow:=0D =0D ../hw/intc/i8259.c: In function =E2=80=98pic_read_irq=E2=80=99:=0D ../hw/intc/i8259.c:203:13: error: =E2=80=98irq2=E2=80=99 may be used unin= itialized in this function [-Werror=3Dmaybe-uninitialized]=0D 203 | irq =3D irq2 + 8;=0D | ~~~~^~~~~~~~~~=0D =0D Restrict irq2 variable use to the inner statement.=0D =0D Fixes: 78ef2b6989f ("i8259: Reorder intack in pic_read_irq")=0D Reported-by: Christian Borntraeger =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210318163059.3686596-1-philmd@redhat.com>=0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: af05ffffd7fa28010d4df9f5744514b16e71055d=0D https://github.com/qemu/qemu/commit/af05ffffd7fa28010d4df9f5744514b= 16e71055d=0D Author: Paolo Bonzini =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D R tests/qtest/fuzz-test.c=0D A tests/qtest/lpc-ich9-test.c=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D tests/qtest: cleanup the testcase for bug 1878642=0D =0D Clean up the writes to the configuration space and the PM region, and=0D rename the test to lpc-ich9-test.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Paolo Bonzini =0D =0D =0D Commit: bdee969c0e65d4d509932b1d70e3a3b2ffbff6d5=0D https://github.com/qemu/qemu/commit/bdee969c0e65d4d509932b1d70e3a3b= 2ffbff6d5=0D Author: Peter Maydell =0D Date: 2021-03-19 (Fri, 19 Mar 2021)=0D =0D Changed paths:=0D M docs/hyperv.txt=0D M hw/intc/i8259.c=0D M qom/object_interfaces.c=0D M target/i386/cpu.c=0D M target/i386/cpu.h=0D M target/i386/kvm/hyperv-proto.h=0D M target/i386/machine.c=0D M target/i386/tcg/excp_helper.c=0D M target/i386/tcg/helper-tcg.h=0D M target/i386/tcg/misc_helper.c=0D M target/i386/tcg/seg_helper.c=0D M target/i386/tcg/svm_helper.c=0D R tests/qtest/fuzz-test.c=0D A tests/qtest/lpc-ich9-test.c=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream'= into staging=0D =0D * fixes for i386 TCG paging=0D * fixes for Hyper-V enlightenments=0D * avoid uninitialized variable warning=0D =0D # gpg: Signature made Fri 19 Mar 2021 14:38:12 GMT=0D # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7A= E83=0D # gpg: issuer "pbonzini@redhat.com"=0D # gpg: Good signature from "Paolo Bonzini " [full]=0D # gpg: aka "Paolo Bonzini " [full]=0D= # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 = 69B1=0D # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 = AE83=0D =0D * remotes/bonzini-gitlab/tags/for-upstream:=0D tests/qtest: cleanup the testcase for bug 1878642=0D hw/intc/i8259: Refactor pic_read_irq() to avoid uninitialized variable=0D= i386: Make migration fail when Hyper-V reenlightenment was enabled but = 'user_tsc_khz' is unset=0D i386: Fix 'hypercall_hypercall' typo=0D target/i386: svm: do not discard high 32 bits of EXITINFO1=0D target/i386: fail if toggling LA57 in 64-bit mode=0D target/i386: allow modifying TCG phys-addr-bits=0D qom: use qemu_printf to print help for user-creatable objects=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/2e1293cbaac7...bdee969c0e65= =0D From MAILER-DAEMON Mon Mar 22 06:06:40 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOHSK-0006Oz-2U for mharc-qemu-commits@gnu.org; Mon, 22 Mar 2021 06:06:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55248) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOHSH-0006Lo-72 for qemu-commits@nongnu.org; Mon, 22 Mar 2021 06:06:37 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:45383 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOHSE-0001pz-Tt for qemu-commits@nongnu.org; Mon, 22 Mar 2021 06:06:36 -0400 Received: from github.com (hubbernetes-node-f714f2f.va3-iad.github.net [10.48.109.37]) by smtp.github.com (Postfix) with ESMTPA id EC5F45C03F0 for ; Mon, 22 Mar 2021 03:06:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616407594; bh=TnIDM8cIAT2qJZxBhWFkJLrwMYxrYBX5xly1K/wTZMY=; h=Date:From:To:Subject:From; b=crhDP5dkUzGa6CWwbM6JiNth0sXOVLLEgBPAzqBHDl5gwB5FmE6cqf8NW4i7SRG8w hEp5tE0zdR5MHL/DbrSn+8pX9P93Abh4Vabm+HMcD8CWljYU7+JXj+B6wyJL9//4JB kvMKVV2vxlM9Gm70w8jxDbls3mRrlYtPqm1FPEWs= Date: Mon, 22 Mar 2021 03:06:33 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 8db5c3: docs/devel/testing.rst: Fix references to unit tests X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Mar 2021 10:06:37 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 8db5c3e216d3a9173cede1ff1a5f40cfe6bb0693=0D https://github.com/qemu/qemu/commit/8db5c3e216d3a9173cede1ff1a5f40c= fe6bb0693=0D Author: Wainer dos Santos Moschetta =0D Date: 2021-03-20 (Sat, 20 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/testing.rst=0D =0D Log Message:=0D -----------=0D docs/devel/testing.rst: Fix references to unit tests=0D =0D With the recent move of the unit tests to tests/unit directory some=0D instructions under the "Unit tests" section became imprecise, which=0D are fixed by this change.=0D =0D Fixes: da668aa15b99 ("tests: Move unit tests into a separate directory")=0D= Signed-off-by: Wainer dos Santos Moschetta =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Willian Rampazzo =0D Message-Id: <20210318174407.2299930-1-wainersm@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: d8b2e5639a08155e6dad7d5befeb12c160c8118e=0D https://github.com/qemu/qemu/commit/d8b2e5639a08155e6dad7d5befeb12c= 160c8118e=0D Author: Emanuele Giuseppe Esposito =0D Date: 2021-03-20 (Sat, 20 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/test-block-iothread.c=0D =0D Log Message:=0D -----------=0D tests/unit/test-block-iothread: fix maybe-uninitialized error on GCC 11= =0D =0D When building qemu with GCC 11, test-block-iothread produces the followin= g=0D warning:=0D =0D ../tests/unit/test-block-iothread.c:148:11: error: =E2=80=98buf=E2=80=99 = may be used=0D uninitialized [-Werror=3Dmaybe-uninitialized]=0D =0D This is caused by buf[512] left uninitialized and passed to=0D bdrv_save_vmstate() that expects a const uint8_t *, so the compiler=0D assumes it will be read and expects the parameter to be initialized.=0D =0D Signed-off-by: Emanuele Giuseppe Esposito =0D Reviewed-by: Paolo Bonzini =0D Message-Id: <20210319112218.49609-1-eesposit@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 630d86b7f2c3b4e1869e3c300cb7dbad35a51f36=0D https://github.com/qemu/qemu/commit/630d86b7f2c3b4e1869e3c300cb7dba= d35a51f36=0D Author: David CARLIER =0D Date: 2021-03-20 (Sat, 20 Mar 2021)=0D =0D Changed paths:=0D M configure=0D =0D Log Message:=0D -----------=0D configure: fix for SunOS based systems=0D =0D local directive make the configure fails on these systems.=0D =0D Signed-off-by: David Carlier =0D Message-Id: =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 7e47061d93b4c60abc9c86337744f362c74627f3=0D https://github.com/qemu/qemu/commit/7e47061d93b4c60abc9c86337744f36= 2c74627f3=0D Author: David CARLIER =0D Date: 2021-03-20 (Sat, 20 Mar 2021)=0D =0D Changed paths:=0D M contrib/ivshmem-client/ivshmem-client.c=0D M contrib/ivshmem-server/ivshmem-server.c=0D =0D Log Message:=0D -----------=0D contrib: ivshmem client and server build fix for SunOS.=0D =0D sun is a macro on these systems, thus renaming the variables on the=0D client and server.=0D =0D Signed-off-by: David Carlier =0D Message-Id: =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 262fd27392128c180afc8f968d90d530574862f7=0D https://github.com/qemu/qemu/commit/262fd27392128c180afc8f968d90d53= 0574862f7=0D Author: Warner Losh =0D Date: 2021-03-20 (Sat, 20 Mar 2021)=0D =0D Changed paths:=0D M tests/vm/freebsd=0D =0D Log Message:=0D -----------=0D FreeBSD: Upgrade to 12.2 release=0D =0D FreeBSD 12.1 has reached end of life. Use 12.2 instead so that FreeBSD's=0D= project's packages will work. Update which timezone to pick. Work around= a QEMU=0D bug that incorrectly raises an exception on a CRC32 instruction with the = FPU=0D disabled. The qemu bug is described here:=0D https://www.mail-archive.com/qemu-devel@nongnu.org/msg784158.html=0D =0D Signed-off-by: Warner Losh =0D Message-Id: <20210307155654.993-2-imp@bsdimp.com>=0D [thuth: Disable gnutls to work-around a problem with libtasn1]=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: f0f20022a0c744930935fdb7020a8c18347d391a=0D https://github.com/qemu/qemu/commit/f0f20022a0c744930935fdb7020a8c1= 8347d391a=0D Author: Peter Maydell =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M configure=0D M contrib/ivshmem-client/ivshmem-client.c=0D M contrib/ivshmem-server/ivshmem-server.c=0D M docs/devel/testing.rst=0D M tests/unit/test-block-iothread.c=0D M tests/vm/freebsd=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-20= 21-03-21' into staging=0D =0D * Small fixes for the unit tests=0D * Compilation fixes for Illumos et al.=0D * Update the FreeBSD VM to 12.2=0D =0D # gpg: Signature made Sun 21 Mar 2021 16:51:42 GMT=0D # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702= DB5=0D # gpg: issuer "thuth@redhat.com"=0D # gpg: Good signature from "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [unknown]=0D= # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 = 2DB5=0D =0D * remotes/thuth-gitlab/tags/pull-request-2021-03-21:=0D FreeBSD: Upgrade to 12.2 release=0D contrib: ivshmem client and server build fix for SunOS.=0D configure: fix for SunOS based systems=0D tests/unit/test-block-iothread: fix maybe-uninitialized error on GCC 11= =0D docs/devel/testing.rst: Fix references to unit tests=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/bdee969c0e65...f0f20022a0c7= =0D From MAILER-DAEMON Mon Mar 22 07:24:44 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOIfr-0006cn-Ti for mharc-qemu-commits@gnu.org; Mon, 22 Mar 2021 07:24:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49504) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOIfq-0006Zg-MG for qemu-commits@nongnu.org; Mon, 22 Mar 2021 07:24:42 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:56129 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOIfo-0005G8-5u for qemu-commits@nongnu.org; Mon, 22 Mar 2021 07:24:42 -0400 Received: from github.com (hubbernetes-node-e31fea2.va3-iad.github.net [10.48.119.81]) by smtp.github.com (Postfix) with ESMTPA id 6A4FD5C0216 for ; Mon, 22 Mar 2021 04:24:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616412279; bh=qO6OhgYtB/8P8i6RQET9o0kFFWWFr/k1nCg5DoB4xoM=; h=Date:From:To:Subject:From; b=hklIzJ9/Ui5CP0xL1K3hwFGuT/30Q4u4JcBXmknOkEBUzfjJ5XNxsVZtZaTHcljXK p908LGP7/370IXuOZHWwAHNKu/owID5nejaaiqnmpsoOCdj2eqM2/rOdKi74L4oqs+ DglKLvo71F8QlJZY58qztMJj05hVAkfVYfgGNlJ0= Date: Mon, 22 Mar 2021 04:24:39 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 8db5c3: docs/devel/testing.rst: Fix references to unit tests X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Mar 2021 11:24:42 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 8db5c3e216d3a9173cede1ff1a5f40cfe6bb0693=0D https://github.com/qemu/qemu/commit/8db5c3e216d3a9173cede1ff1a5f40c= fe6bb0693=0D Author: Wainer dos Santos Moschetta =0D Date: 2021-03-20 (Sat, 20 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/testing.rst=0D =0D Log Message:=0D -----------=0D docs/devel/testing.rst: Fix references to unit tests=0D =0D With the recent move of the unit tests to tests/unit directory some=0D instructions under the "Unit tests" section became imprecise, which=0D are fixed by this change.=0D =0D Fixes: da668aa15b99 ("tests: Move unit tests into a separate directory")=0D= Signed-off-by: Wainer dos Santos Moschetta =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Willian Rampazzo =0D Message-Id: <20210318174407.2299930-1-wainersm@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: d8b2e5639a08155e6dad7d5befeb12c160c8118e=0D https://github.com/qemu/qemu/commit/d8b2e5639a08155e6dad7d5befeb12c= 160c8118e=0D Author: Emanuele Giuseppe Esposito =0D Date: 2021-03-20 (Sat, 20 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/test-block-iothread.c=0D =0D Log Message:=0D -----------=0D tests/unit/test-block-iothread: fix maybe-uninitialized error on GCC 11= =0D =0D When building qemu with GCC 11, test-block-iothread produces the followin= g=0D warning:=0D =0D ../tests/unit/test-block-iothread.c:148:11: error: =E2=80=98buf=E2=80=99 = may be used=0D uninitialized [-Werror=3Dmaybe-uninitialized]=0D =0D This is caused by buf[512] left uninitialized and passed to=0D bdrv_save_vmstate() that expects a const uint8_t *, so the compiler=0D assumes it will be read and expects the parameter to be initialized.=0D =0D Signed-off-by: Emanuele Giuseppe Esposito =0D Reviewed-by: Paolo Bonzini =0D Message-Id: <20210319112218.49609-1-eesposit@redhat.com>=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 630d86b7f2c3b4e1869e3c300cb7dbad35a51f36=0D https://github.com/qemu/qemu/commit/630d86b7f2c3b4e1869e3c300cb7dba= d35a51f36=0D Author: David CARLIER =0D Date: 2021-03-20 (Sat, 20 Mar 2021)=0D =0D Changed paths:=0D M configure=0D =0D Log Message:=0D -----------=0D configure: fix for SunOS based systems=0D =0D local directive make the configure fails on these systems.=0D =0D Signed-off-by: David Carlier =0D Message-Id: =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 7e47061d93b4c60abc9c86337744f362c74627f3=0D https://github.com/qemu/qemu/commit/7e47061d93b4c60abc9c86337744f36= 2c74627f3=0D Author: David CARLIER =0D Date: 2021-03-20 (Sat, 20 Mar 2021)=0D =0D Changed paths:=0D M contrib/ivshmem-client/ivshmem-client.c=0D M contrib/ivshmem-server/ivshmem-server.c=0D =0D Log Message:=0D -----------=0D contrib: ivshmem client and server build fix for SunOS.=0D =0D sun is a macro on these systems, thus renaming the variables on the=0D client and server.=0D =0D Signed-off-by: David Carlier =0D Message-Id: =0D Reviewed-by: Peter Maydell =0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: 262fd27392128c180afc8f968d90d530574862f7=0D https://github.com/qemu/qemu/commit/262fd27392128c180afc8f968d90d53= 0574862f7=0D Author: Warner Losh =0D Date: 2021-03-20 (Sat, 20 Mar 2021)=0D =0D Changed paths:=0D M tests/vm/freebsd=0D =0D Log Message:=0D -----------=0D FreeBSD: Upgrade to 12.2 release=0D =0D FreeBSD 12.1 has reached end of life. Use 12.2 instead so that FreeBSD's=0D= project's packages will work. Update which timezone to pick. Work around= a QEMU=0D bug that incorrectly raises an exception on a CRC32 instruction with the = FPU=0D disabled. The qemu bug is described here:=0D https://www.mail-archive.com/qemu-devel@nongnu.org/msg784158.html=0D =0D Signed-off-by: Warner Losh =0D Message-Id: <20210307155654.993-2-imp@bsdimp.com>=0D [thuth: Disable gnutls to work-around a problem with libtasn1]=0D Signed-off-by: Thomas Huth =0D =0D =0D Commit: f0f20022a0c744930935fdb7020a8c18347d391a=0D https://github.com/qemu/qemu/commit/f0f20022a0c744930935fdb7020a8c1= 8347d391a=0D Author: Peter Maydell =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M configure=0D M contrib/ivshmem-client/ivshmem-client.c=0D M contrib/ivshmem-server/ivshmem-server.c=0D M docs/devel/testing.rst=0D M tests/unit/test-block-iothread.c=0D M tests/vm/freebsd=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/thuth-gitlab/tags/pull-request-20= 21-03-21' into staging=0D =0D * Small fixes for the unit tests=0D * Compilation fixes for Illumos et al.=0D * Update the FreeBSD VM to 12.2=0D =0D # gpg: Signature made Sun 21 Mar 2021 16:51:42 GMT=0D # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702= DB5=0D # gpg: issuer "thuth@redhat.com"=0D # gpg: Good signature from "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [full]=0D # gpg: aka "Thomas Huth " [unknown]=0D= # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 = 2DB5=0D =0D * remotes/thuth-gitlab/tags/pull-request-2021-03-21:=0D FreeBSD: Upgrade to 12.2 release=0D contrib: ivshmem client and server build fix for SunOS.=0D configure: fix for SunOS based systems=0D tests/unit/test-block-iothread: fix maybe-uninitialized error on GCC 11= =0D docs/devel/testing.rst: Fix references to unit tests=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/bdee969c0e65...f0f20022a0c7= =0D From MAILER-DAEMON Mon Mar 22 07:30:46 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOIli-0004Cs-Oh for mharc-qemu-commits@gnu.org; Mon, 22 Mar 2021 07:30:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51106) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOIlh-0004Ar-JC for qemu-commits@nongnu.org; Mon, 22 Mar 2021 07:30:45 -0400 Received: from out-18.smtp.github.com ([192.30.252.201]:34839 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOIlc-0000OL-T7 for qemu-commits@nongnu.org; Mon, 22 Mar 2021 07:30:45 -0400 Received: from github.com (hubbernetes-node-72e1843.va3-iad.github.net [10.48.113.27]) by smtp.github.com (Postfix) with ESMTPA id 236B9340901 for ; Mon, 22 Mar 2021 04:30:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616412640; bh=ddZyNUuvOVg/D9xCtt3e4D4Tv7wk/0xxBvgWoXw0do8=; h=Date:From:To:Subject:From; b=jsPGXy93E3+QaPQRRtuC3YV/P4Qtkcmvud8q3vhAieb58lkU0JhVKQknHzm7u2HFh TmRKlfDpkIgrD/X/wnT2+2zAX1nHjPICDwQKw09a9euw8y9tQnKFhzdIIzoEkF9vY7 ArU43nu5aGeDJ3jBOw71orG2NJT+fj+nId8BkQGU= Date: Mon, 22 Mar 2021 04:30:40 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] af7745: net: eth: Add a helper to pad a short Ethernet frame X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Mar 2021 11:30:45 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: af774513f7d646badfdb5b686650254f7f08af6b=0D https://github.com/qemu/qemu/commit/af774513f7d646badfdb5b686650254= f7f08af6b=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M include/net/eth.h=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net: eth: Add a helper to pad a short Ethernet frame=0D =0D Add a helper to pad a short Ethernet frame to the minimum required=0D length, which can be used by backends' code.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 935344bed6769d6bcb74c6d992818929a6ccb35b=0D https://github.com/qemu/qemu/commit/935344bed6769d6bcb74c6d99281892= 9a6ccb35b=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M include/net/net.h=0D =0D Log Message:=0D -----------=0D net: Add a 'do_not_pad" to NetClientState=0D =0D This adds a flag in NetClientState, so that a net client can tell=0D its peer that the packets do not need to be padded to the minimum=0D size of an Ethernet frame (60 bytes) before sending to it.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 969e50b61a285b0cc8dea6d4d2ade3f758d5ecc7=0D https://github.com/qemu/qemu/commit/969e50b61a285b0cc8dea6d4d2ade3f= 758d5ecc7=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/slirp.c=0D M net/tap-win32.c=0D M net/tap.c=0D =0D Log Message:=0D -----------=0D net: Pad short frames to minimum size before sending from SLiRP/TAP=0D =0D The minimum Ethernet frame length is 60 bytes. For short frames with=0D smaller length like ARP packets (only 42 bytes), on a real world NIC=0D it can choose either padding its length to the minimum required 60=0D bytes, or sending it out directly to the wire. Such behavior can be=0D hardcoded or controled by a register bit. Similarly on the receive=0D path, NICs can choose either dropping such short frames directly or=0D handing them over to software to handle.=0D =0D On the other hand, for the network backends like SLiRP/TAP, they=0D don't expose a way to control the short frame behavior. As of today=0D they just send/receive data from/to the other end connected to them,=0D which means any sized packet is acceptable. So they can send and=0D receive short frames without any problem. It is observed that ARP=0D packets sent from SLiRP/TAP are 42 bytes, and SLiRP/TAP just send=0D these ARP packets to the other end which might be a NIC model that=0D does not allow short frames to pass through.=0D =0D To provide better compatibility, for packets sent from QEMU network=0D backends like SLiRP/TAP, we change to pad short frames before sending=0D it out to the other end, if the other end does not forbid it via the=0D nc->do_not_pad flag. This ensures a backend as an Ethernet sender=0D does not violate the spec. But with this change, the behavior of=0D dropping short frames from SLiRP/TAP interfaces in the NIC model=0D cannot be emulated because it always receives a packet that is spec=0D complaint. The capability of sending short frames from NIC models is=0D still supported and short frames can still pass through SLiRP/TAP.=0D =0D This commit should be able to fix the issue as reported with some=0D NIC models before, that ARP requests get dropped, preventing the=0D guest from becoming visible on the network. It was workarounded in=0D these NIC models on the receive path, that when a short frame is=0D received, it is padded up to 60 bytes.=0D =0D The following 2 commits seem to be the one to workaround this issue=0D in e1000 and vmxenet3 before, and should probably be reverted.=0D =0D commit 78aeb23eded2 ("e1000: Pad short frames to minimum size (60 bytes= )")=0D commit 40a87c6c9b11 ("vmxnet3: Pad short frames to minimum size (60 byt= es)")=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: d4c6293041ee7941191a91e4ca2d2af4b0959599=0D https://github.com/qemu/qemu/commit/d4c6293041ee7941191a91e4ca2d2af= 4b0959599=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/net/virtio-net.c=0D =0D Log Message:=0D -----------=0D hw/net: virtio-net: Initialize nc->do_not_pad to true=0D =0D For virtio-net, there is no need to pad the Ethernet frame size to=0D 60 bytes before sending to it.=0D =0D Signed-off-by: Bin Meng =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 9162ed664926fe6e8dfa2f43e152ab088b5369ed=0D https://github.com/qemu/qemu/commit/9162ed664926fe6e8dfa2f43e152ab0= 88b5369ed=0D Author: Lukas Straub =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/colo-compare.c=0D =0D Log Message:=0D -----------=0D net/colo-compare.c: Fix memory leak for non-tcp packet=0D =0D Additional to removing the packet from the secondary queue,=0D we also need to free it.=0D =0D Signed-off-by: Lukas Straub =0D Signed-off-by: Zhang Chen =0D Reviewed-by: Zhang Chen =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 739128e43b6da3d0a48ec8551d94909dc5a8f3bc=0D https://github.com/qemu/qemu/commit/739128e43b6da3d0a48ec8551d94909= dc5a8f3bc=0D Author: Lukas Straub =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/colo-compare.c=0D =0D Log Message:=0D -----------=0D net/colo-compare.c: Optimize removal of secondary packet=0D =0D g_queue_remove needs to look up the list entry first, but we=0D already have it as result and can remove it directly with=0D g_queue_delete_link.=0D =0D Signed-off-by: Lukas Straub =0D Signed-off-by: Zhang Chen =0D Reviewed-by: Zhang Chen =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: b565b44ec202fbe52a017273319db83f067fe574=0D https://github.com/qemu/qemu/commit/b565b44ec202fbe52a017273319db83= f067fe574=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net/eth: Use correct in6_address offset in _eth_get_rss_ex_dst_addr()=0D= =0D The in6_address comes after the ip6_ext_hdr_routing header,=0D not after the ip6_ext_hdr one. Fix the offset.=0D =0D Cc: qemu-stable@nongnu.org=0D Reported-by: Stefano Garzarella =0D Fixes: eb700029c78 ("net_pkt: Extend packet abstraction as required by e1= 000e functionality")=0D Reviewed-by: Miroslav Rezanina =0D Reviewed-by: Stefano Garzarella =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 38462440ca22a8ead2ec1e98ef3c45e264fa6f60=0D https://github.com/qemu/qemu/commit/38462440ca22a8ead2ec1e98ef3c45e= 264fa6f60=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net/eth: Simplify _eth_get_rss_ex_dst_addr()=0D =0D The length field is already contained in the ip6_ext_hdr structure.=0D Check it direcly in eth_parse_ipv6_hdr() before calling=0D _eth_get_rss_ex_dst_addr(), which gets a bit simplified.=0D =0D Reviewed-by: Miroslav Rezanina =0D Reviewed-by: Stefano Garzarella =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: dbd8d3f959e5ba9b1804a5c99c7f8af42d96809b=0D https://github.com/qemu/qemu/commit/dbd8d3f959e5ba9b1804a5c99c7f8af= 42d96809b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net/eth: Better describe _eth_get_rss_ex_dst_addr's offset argument=0D =0D The 'offset' argument represents the offset to the ip6_ext_hdr=0D header, rename it as 'ext_hdr_offset'.=0D =0D Reviewed-by: Stefano Garzarella =0D Reviewed-by: Miroslav Rezanina =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 6f10f77dcdbc151217d19229d9aeeb93c9c1c408=0D https://github.com/qemu/qemu/commit/6f10f77dcdbc151217d19229d9aeeb9= 3c9c1c408=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net/eth: Check size earlier in _eth_get_rss_ex_dst_addr()=0D =0D Reviewed-by: Stefano Garzarella =0D Reviewed-by: Miroslav Rezanina =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: ef763586c943815eb0836c54c207ce8572e176a7=0D https://github.com/qemu/qemu/commit/ef763586c943815eb0836c54c207ce8= 572e176a7=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net/eth: Check iovec has enough data earlier=0D =0D We want to check fields from ip6_ext_hdr_routing structure=0D and if correct read the full in6_address. Let's directly check=0D if our iovec contains enough data for everything, else return=0D early.=0D =0D Suggested-by: Stefano Garzarella =0D Reviewed-by: Miroslav Rezanina =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 7d6a4f123e00c9dbd40867ae1a650a4fd0bc4a3d=0D https://github.com/qemu/qemu/commit/7d6a4f123e00c9dbd40867ae1a650a4= fd0bc4a3d=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M net/eth.c=0D A tests/qtest/fuzz-e1000e-test.c=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D net/eth: Read ip6_ext_hdr_routing buffer before accessing it=0D =0D We can't know the caller read enough data in the memory pointed=0D by ext_hdr to cast it as a ip6_ext_hdr_routing.=0D Declare rt_hdr on the stack and fill it again from the iovec.=0D =0D Since we already checked there is enough data in the iovec buffer,=0D simply add an assert() call to consume the bytes_read variable.=0D =0D This fix a 2 bytes buffer overrun in eth_parse_ipv6_hdr() reported=0D by QEMU fuzzer:=0D =0D $ cat << EOF | ./qemu-system-i386 -M pc-q35-5.0 \=0D -accel qtest -monitor none \=0D -serial none -nographic -qtest stdio=0D outl 0xcf8 0x80001010=0D outl 0xcfc 0xe1020000=0D outl 0xcf8 0x80001004=0D outw 0xcfc 0x7=0D write 0x25 0x1 0x86=0D write 0x26 0x1 0xdd=0D write 0x4f 0x1 0x2b=0D write 0xe1020030 0x4 0x190002e1=0D write 0xe102003a 0x2 0x0807=0D write 0xe1020048 0x4 0x12077cdd=0D write 0xe1020400 0x4 0xba077cdd=0D write 0xe1020420 0x4 0x190002e1=0D write 0xe1020428 0x4 0x3509d807=0D write 0xe1020438 0x1 0xe2=0D EOF=0D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=0D =3D=3D2859770=3D=3DERROR: AddressSanitizer: stack-buffer-overflow on ad= dress 0x7ffdef904902 at pc 0x561ceefa78de bp 0x7ffdef904820 sp 0x7ffdef90= 4818=0D READ of size 1 at 0x7ffdef904902 thread T0=0D #0 0x561ceefa78dd in _eth_get_rss_ex_dst_addr net/eth.c:410:17=0D #1 0x561ceefa41fb in eth_parse_ipv6_hdr net/eth.c:532:17=0D #2 0x561cef7de639 in net_tx_pkt_parse_headers hw/net/net_tx_pkt.c:2= 28:14=0D #3 0x561cef7dbef4 in net_tx_pkt_parse hw/net/net_tx_pkt.c:273:9=0D #4 0x561ceec29f22 in e1000e_process_tx_desc hw/net/e1000e_core.c:73= 0:29=0D #5 0x561ceec28eac in e1000e_start_xmit hw/net/e1000e_core.c:927:9=0D= #6 0x561ceec1baab in e1000e_set_tdt hw/net/e1000e_core.c:2444:9=0D #7 0x561ceebf300e in e1000e_core_write hw/net/e1000e_core.c:3256:9=0D= #8 0x561cef3cd4cd in e1000e_mmio_write hw/net/e1000e.c:110:5=0D =0D Address 0x7ffdef904902 is located in stack of thread T0 at offset 34 in= frame=0D #0 0x561ceefa320f in eth_parse_ipv6_hdr net/eth.c:486=0D =0D This frame has 1 object(s):=0D [32, 34) 'ext_hdr' (line 487) <=3D=3D Memory access at offset 34 ov= erflows this variable=0D HINT: this may be a false positive if your program uses some custom sta= ck unwind mechanism, swapcontext or vfork=0D (longjmp and C++ exceptions *are* supported)=0D SUMMARY: AddressSanitizer: stack-buffer-overflow net/eth.c:410:17 in _e= th_get_rss_ex_dst_addr=0D Shadow bytes around the buggy address:=0D 0x10003df188d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df188e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df188f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18900: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18910: 00 00 00 00 00 00 00 00 00 00 00 00 f1 f1 f1 f1=0D =3D>0x10003df18920:[02]f3 f3 f3 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18930: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18940: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18950: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18960: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18970: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D Shadow byte legend (one shadow byte represents 8 application bytes):=0D= Addressable: 00=0D Partially addressable: 01 02 03 04 05 06 07=0D Stack left redzone: f1=0D Stack right redzone: f3=0D =3D=3D2859770=3D=3DABORTING=0D =0D Add the corresponding qtest case with the fuzzer reproducer.=0D =0D FWIW GCC 11 similarly reported:=0D =0D net/eth.c: In function 'eth_parse_ipv6_hdr':=0D net/eth.c:410:15: error: array subscript 'struct ip6_ext_hdr_routing[0]= ' is partly outside array bounds of 'struct ip6_ext_hdr[1]' [-Werror=3Dar= ray-bounds]=0D 410 | if ((rthdr->rtype =3D=3D 2) && (rthdr->segleft =3D=3D 1)) {= =0D | ~~~~~^~~~~~~=0D net/eth.c:485:24: note: while referencing 'ext_hdr'=0D 485 | struct ip6_ext_hdr ext_hdr;=0D | ^~~~~~~=0D net/eth.c:410:38: error: array subscript 'struct ip6_ext_hdr_routing[0]= ' is partly outside array bounds of 'struct ip6_ext_hdr[1]' [-Werror=3Dar= ray-bounds]=0D 410 | if ((rthdr->rtype =3D=3D 2) && (rthdr->segleft =3D=3D 1)) {= =0D | ~~~~~^~~~~~~~~=0D net/eth.c:485:24: note: while referencing 'ext_hdr'=0D 485 | struct ip6_ext_hdr ext_hdr;=0D | ^~~~~~~=0D =0D Cc: qemu-stable@nongnu.org=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1879531=0D Reported-by: Alexander Bulekov =0D Reported-by: Miroslav Rezanina =0D Reviewed-by: Stefano Garzarella =0D Reviewed-by: Miroslav Rezanina =0D Fixes: eb700029c78 ("net_pkt: Extend packet abstraction as required by e1= 000e functionality")=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: c7274b5ef43614dd133daec1e2018f71d8744088=0D https://github.com/qemu/qemu/commit/c7274b5ef43614dd133daec1e2018f7= 1d8744088=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net/eth: Add an assert() and invert if() statement to simplify code=0D =0D To simplify the function body, invert the if() statement, returning=0D earlier.=0D Since we already checked there is enough data in the iovec buffer,=0D simply add an assert() call to consume the bytes_read variable.=0D =0D Reviewed-by: Stefano Garzarella =0D Reviewed-by: Miroslav Rezanina =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: b184750926812cb78ac0caf4c4b2b13683b5bde3=0D https://github.com/qemu/qemu/commit/b184750926812cb78ac0caf4c4b2b13= 683b5bde3=0D Author: Peter Maydell =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/net/virtio-net.c=0D M include/net/eth.h=0D M include/net/net.h=0D M net/colo-compare.c=0D M net/eth.c=0D M net/slirp.c=0D M net/tap-win32.c=0D M net/tap.c=0D A tests/qtest/fuzz-e1000e-test.c=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' i= nto staging=0D =0D # gpg: Signature made Mon 22 Mar 2021 09:35:08 GMT=0D # gpg: using RSA key EF04965B398D6211=0D # gpg: Good signature from "Jason Wang (Jason Wang on RedHat) " [marginal]=0D # gpg: WARNING: This key is not certified with sufficiently trusted signa= tures!=0D # gpg: It is not certain that the signature belongs to the owner= .=0D # Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D = 6211=0D =0D * remotes/jasowang/tags/net-pull-request:=0D net/eth: Add an assert() and invert if() statement to simplify code=0D net/eth: Read ip6_ext_hdr_routing buffer before accessing it=0D net/eth: Check iovec has enough data earlier=0D net/eth: Check size earlier in _eth_get_rss_ex_dst_addr()=0D net/eth: Better describe _eth_get_rss_ex_dst_addr's offset argument=0D net/eth: Simplify _eth_get_rss_ex_dst_addr()=0D net/eth: Use correct in6_address offset in _eth_get_rss_ex_dst_addr()=0D= net/colo-compare.c: Optimize removal of secondary packet=0D net/colo-compare.c: Fix memory leak for non-tcp packet=0D hw/net: virtio-net: Initialize nc->do_not_pad to true=0D net: Pad short frames to minimum size before sending from SLiRP/TAP=0D net: Add a 'do_not_pad" to NetClientState=0D net: eth: Add a helper to pad a short Ethernet frame=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/f0f20022a0c7...b18475092681= =0D From MAILER-DAEMON Mon Mar 22 10:14:44 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOLKO-0000jc-2r for mharc-qemu-commits@gnu.org; Mon, 22 Mar 2021 10:14:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38658) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOLKJ-0000iJ-4K for qemu-commits@nongnu.org; Mon, 22 Mar 2021 10:14:42 -0400 Received: from out-18.smtp.github.com ([192.30.252.201]:46993 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOLKF-0003S0-OO for qemu-commits@nongnu.org; Mon, 22 Mar 2021 10:14:38 -0400 Received: from github.com (hubbernetes-node-36cdb7e.va3-iad.github.net [10.48.110.31]) by smtp.github.com (Postfix) with ESMTPA id 051DE3408F1 for ; Mon, 22 Mar 2021 07:14:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616422475; bh=aO44xW94h3O+6nnaDS9ufL7A6W1eHA+R3zd4z7K4JaA=; h=Date:From:To:Subject:From; b=yBmy9fCJ4O0zw44saoBDmOXXW0P/fthI8h9EAB2qUYvauuQfvjzF2vHjmdd6+0Czb 5zHOYJ3rwInPX7br9LQi0w+CA9kVWTQ1WwYdZKOcHAgFNVdW4+BjNsIBLvYQnsPj6P +eao92F7w6AoXqU5VeBWX5nKmFN+xR1lPuKM4NwY= Date: Mon, 22 Mar 2021 07:14:35 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] af7745: net: eth: Add a helper to pad a short Ethernet frame X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Mar 2021 14:14:42 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: af774513f7d646badfdb5b686650254f7f08af6b=0D https://github.com/qemu/qemu/commit/af774513f7d646badfdb5b686650254= f7f08af6b=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M include/net/eth.h=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net: eth: Add a helper to pad a short Ethernet frame=0D =0D Add a helper to pad a short Ethernet frame to the minimum required=0D length, which can be used by backends' code.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 935344bed6769d6bcb74c6d992818929a6ccb35b=0D https://github.com/qemu/qemu/commit/935344bed6769d6bcb74c6d99281892= 9a6ccb35b=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M include/net/net.h=0D =0D Log Message:=0D -----------=0D net: Add a 'do_not_pad" to NetClientState=0D =0D This adds a flag in NetClientState, so that a net client can tell=0D its peer that the packets do not need to be padded to the minimum=0D size of an Ethernet frame (60 bytes) before sending to it.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 969e50b61a285b0cc8dea6d4d2ade3f758d5ecc7=0D https://github.com/qemu/qemu/commit/969e50b61a285b0cc8dea6d4d2ade3f= 758d5ecc7=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/slirp.c=0D M net/tap-win32.c=0D M net/tap.c=0D =0D Log Message:=0D -----------=0D net: Pad short frames to minimum size before sending from SLiRP/TAP=0D =0D The minimum Ethernet frame length is 60 bytes. For short frames with=0D smaller length like ARP packets (only 42 bytes), on a real world NIC=0D it can choose either padding its length to the minimum required 60=0D bytes, or sending it out directly to the wire. Such behavior can be=0D hardcoded or controled by a register bit. Similarly on the receive=0D path, NICs can choose either dropping such short frames directly or=0D handing them over to software to handle.=0D =0D On the other hand, for the network backends like SLiRP/TAP, they=0D don't expose a way to control the short frame behavior. As of today=0D they just send/receive data from/to the other end connected to them,=0D which means any sized packet is acceptable. So they can send and=0D receive short frames without any problem. It is observed that ARP=0D packets sent from SLiRP/TAP are 42 bytes, and SLiRP/TAP just send=0D these ARP packets to the other end which might be a NIC model that=0D does not allow short frames to pass through.=0D =0D To provide better compatibility, for packets sent from QEMU network=0D backends like SLiRP/TAP, we change to pad short frames before sending=0D it out to the other end, if the other end does not forbid it via the=0D nc->do_not_pad flag. This ensures a backend as an Ethernet sender=0D does not violate the spec. But with this change, the behavior of=0D dropping short frames from SLiRP/TAP interfaces in the NIC model=0D cannot be emulated because it always receives a packet that is spec=0D complaint. The capability of sending short frames from NIC models is=0D still supported and short frames can still pass through SLiRP/TAP.=0D =0D This commit should be able to fix the issue as reported with some=0D NIC models before, that ARP requests get dropped, preventing the=0D guest from becoming visible on the network. It was workarounded in=0D these NIC models on the receive path, that when a short frame is=0D received, it is padded up to 60 bytes.=0D =0D The following 2 commits seem to be the one to workaround this issue=0D in e1000 and vmxenet3 before, and should probably be reverted.=0D =0D commit 78aeb23eded2 ("e1000: Pad short frames to minimum size (60 bytes= )")=0D commit 40a87c6c9b11 ("vmxnet3: Pad short frames to minimum size (60 byt= es)")=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: d4c6293041ee7941191a91e4ca2d2af4b0959599=0D https://github.com/qemu/qemu/commit/d4c6293041ee7941191a91e4ca2d2af= 4b0959599=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/net/virtio-net.c=0D =0D Log Message:=0D -----------=0D hw/net: virtio-net: Initialize nc->do_not_pad to true=0D =0D For virtio-net, there is no need to pad the Ethernet frame size to=0D 60 bytes before sending to it.=0D =0D Signed-off-by: Bin Meng =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 9162ed664926fe6e8dfa2f43e152ab088b5369ed=0D https://github.com/qemu/qemu/commit/9162ed664926fe6e8dfa2f43e152ab0= 88b5369ed=0D Author: Lukas Straub =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/colo-compare.c=0D =0D Log Message:=0D -----------=0D net/colo-compare.c: Fix memory leak for non-tcp packet=0D =0D Additional to removing the packet from the secondary queue,=0D we also need to free it.=0D =0D Signed-off-by: Lukas Straub =0D Signed-off-by: Zhang Chen =0D Reviewed-by: Zhang Chen =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 739128e43b6da3d0a48ec8551d94909dc5a8f3bc=0D https://github.com/qemu/qemu/commit/739128e43b6da3d0a48ec8551d94909= dc5a8f3bc=0D Author: Lukas Straub =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/colo-compare.c=0D =0D Log Message:=0D -----------=0D net/colo-compare.c: Optimize removal of secondary packet=0D =0D g_queue_remove needs to look up the list entry first, but we=0D already have it as result and can remove it directly with=0D g_queue_delete_link.=0D =0D Signed-off-by: Lukas Straub =0D Signed-off-by: Zhang Chen =0D Reviewed-by: Zhang Chen =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: b565b44ec202fbe52a017273319db83f067fe574=0D https://github.com/qemu/qemu/commit/b565b44ec202fbe52a017273319db83= f067fe574=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net/eth: Use correct in6_address offset in _eth_get_rss_ex_dst_addr()=0D= =0D The in6_address comes after the ip6_ext_hdr_routing header,=0D not after the ip6_ext_hdr one. Fix the offset.=0D =0D Cc: qemu-stable@nongnu.org=0D Reported-by: Stefano Garzarella =0D Fixes: eb700029c78 ("net_pkt: Extend packet abstraction as required by e1= 000e functionality")=0D Reviewed-by: Miroslav Rezanina =0D Reviewed-by: Stefano Garzarella =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 38462440ca22a8ead2ec1e98ef3c45e264fa6f60=0D https://github.com/qemu/qemu/commit/38462440ca22a8ead2ec1e98ef3c45e= 264fa6f60=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net/eth: Simplify _eth_get_rss_ex_dst_addr()=0D =0D The length field is already contained in the ip6_ext_hdr structure.=0D Check it direcly in eth_parse_ipv6_hdr() before calling=0D _eth_get_rss_ex_dst_addr(), which gets a bit simplified.=0D =0D Reviewed-by: Miroslav Rezanina =0D Reviewed-by: Stefano Garzarella =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: dbd8d3f959e5ba9b1804a5c99c7f8af42d96809b=0D https://github.com/qemu/qemu/commit/dbd8d3f959e5ba9b1804a5c99c7f8af= 42d96809b=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net/eth: Better describe _eth_get_rss_ex_dst_addr's offset argument=0D =0D The 'offset' argument represents the offset to the ip6_ext_hdr=0D header, rename it as 'ext_hdr_offset'.=0D =0D Reviewed-by: Stefano Garzarella =0D Reviewed-by: Miroslav Rezanina =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 6f10f77dcdbc151217d19229d9aeeb93c9c1c408=0D https://github.com/qemu/qemu/commit/6f10f77dcdbc151217d19229d9aeeb9= 3c9c1c408=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net/eth: Check size earlier in _eth_get_rss_ex_dst_addr()=0D =0D Reviewed-by: Stefano Garzarella =0D Reviewed-by: Miroslav Rezanina =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: ef763586c943815eb0836c54c207ce8572e176a7=0D https://github.com/qemu/qemu/commit/ef763586c943815eb0836c54c207ce8= 572e176a7=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net/eth: Check iovec has enough data earlier=0D =0D We want to check fields from ip6_ext_hdr_routing structure=0D and if correct read the full in6_address. Let's directly check=0D if our iovec contains enough data for everything, else return=0D early.=0D =0D Suggested-by: Stefano Garzarella =0D Reviewed-by: Miroslav Rezanina =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: 7d6a4f123e00c9dbd40867ae1a650a4fd0bc4a3d=0D https://github.com/qemu/qemu/commit/7d6a4f123e00c9dbd40867ae1a650a4= fd0bc4a3d=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M net/eth.c=0D A tests/qtest/fuzz-e1000e-test.c=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D net/eth: Read ip6_ext_hdr_routing buffer before accessing it=0D =0D We can't know the caller read enough data in the memory pointed=0D by ext_hdr to cast it as a ip6_ext_hdr_routing.=0D Declare rt_hdr on the stack and fill it again from the iovec.=0D =0D Since we already checked there is enough data in the iovec buffer,=0D simply add an assert() call to consume the bytes_read variable.=0D =0D This fix a 2 bytes buffer overrun in eth_parse_ipv6_hdr() reported=0D by QEMU fuzzer:=0D =0D $ cat << EOF | ./qemu-system-i386 -M pc-q35-5.0 \=0D -accel qtest -monitor none \=0D -serial none -nographic -qtest stdio=0D outl 0xcf8 0x80001010=0D outl 0xcfc 0xe1020000=0D outl 0xcf8 0x80001004=0D outw 0xcfc 0x7=0D write 0x25 0x1 0x86=0D write 0x26 0x1 0xdd=0D write 0x4f 0x1 0x2b=0D write 0xe1020030 0x4 0x190002e1=0D write 0xe102003a 0x2 0x0807=0D write 0xe1020048 0x4 0x12077cdd=0D write 0xe1020400 0x4 0xba077cdd=0D write 0xe1020420 0x4 0x190002e1=0D write 0xe1020428 0x4 0x3509d807=0D write 0xe1020438 0x1 0xe2=0D EOF=0D =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=0D =3D=3D2859770=3D=3DERROR: AddressSanitizer: stack-buffer-overflow on ad= dress 0x7ffdef904902 at pc 0x561ceefa78de bp 0x7ffdef904820 sp 0x7ffdef90= 4818=0D READ of size 1 at 0x7ffdef904902 thread T0=0D #0 0x561ceefa78dd in _eth_get_rss_ex_dst_addr net/eth.c:410:17=0D #1 0x561ceefa41fb in eth_parse_ipv6_hdr net/eth.c:532:17=0D #2 0x561cef7de639 in net_tx_pkt_parse_headers hw/net/net_tx_pkt.c:2= 28:14=0D #3 0x561cef7dbef4 in net_tx_pkt_parse hw/net/net_tx_pkt.c:273:9=0D #4 0x561ceec29f22 in e1000e_process_tx_desc hw/net/e1000e_core.c:73= 0:29=0D #5 0x561ceec28eac in e1000e_start_xmit hw/net/e1000e_core.c:927:9=0D= #6 0x561ceec1baab in e1000e_set_tdt hw/net/e1000e_core.c:2444:9=0D #7 0x561ceebf300e in e1000e_core_write hw/net/e1000e_core.c:3256:9=0D= #8 0x561cef3cd4cd in e1000e_mmio_write hw/net/e1000e.c:110:5=0D =0D Address 0x7ffdef904902 is located in stack of thread T0 at offset 34 in= frame=0D #0 0x561ceefa320f in eth_parse_ipv6_hdr net/eth.c:486=0D =0D This frame has 1 object(s):=0D [32, 34) 'ext_hdr' (line 487) <=3D=3D Memory access at offset 34 ov= erflows this variable=0D HINT: this may be a false positive if your program uses some custom sta= ck unwind mechanism, swapcontext or vfork=0D (longjmp and C++ exceptions *are* supported)=0D SUMMARY: AddressSanitizer: stack-buffer-overflow net/eth.c:410:17 in _e= th_get_rss_ex_dst_addr=0D Shadow bytes around the buggy address:=0D 0x10003df188d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df188e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df188f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18900: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18910: 00 00 00 00 00 00 00 00 00 00 00 00 f1 f1 f1 f1=0D =3D>0x10003df18920:[02]f3 f3 f3 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18930: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18940: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18950: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18960: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D 0x10003df18970: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00=0D Shadow byte legend (one shadow byte represents 8 application bytes):=0D= Addressable: 00=0D Partially addressable: 01 02 03 04 05 06 07=0D Stack left redzone: f1=0D Stack right redzone: f3=0D =3D=3D2859770=3D=3DABORTING=0D =0D Add the corresponding qtest case with the fuzzer reproducer.=0D =0D FWIW GCC 11 similarly reported:=0D =0D net/eth.c: In function 'eth_parse_ipv6_hdr':=0D net/eth.c:410:15: error: array subscript 'struct ip6_ext_hdr_routing[0]= ' is partly outside array bounds of 'struct ip6_ext_hdr[1]' [-Werror=3Dar= ray-bounds]=0D 410 | if ((rthdr->rtype =3D=3D 2) && (rthdr->segleft =3D=3D 1)) {= =0D | ~~~~~^~~~~~~=0D net/eth.c:485:24: note: while referencing 'ext_hdr'=0D 485 | struct ip6_ext_hdr ext_hdr;=0D | ^~~~~~~=0D net/eth.c:410:38: error: array subscript 'struct ip6_ext_hdr_routing[0]= ' is partly outside array bounds of 'struct ip6_ext_hdr[1]' [-Werror=3Dar= ray-bounds]=0D 410 | if ((rthdr->rtype =3D=3D 2) && (rthdr->segleft =3D=3D 1)) {= =0D | ~~~~~^~~~~~~~~=0D net/eth.c:485:24: note: while referencing 'ext_hdr'=0D 485 | struct ip6_ext_hdr ext_hdr;=0D | ^~~~~~~=0D =0D Cc: qemu-stable@nongnu.org=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1879531=0D Reported-by: Alexander Bulekov =0D Reported-by: Miroslav Rezanina =0D Reviewed-by: Stefano Garzarella =0D Reviewed-by: Miroslav Rezanina =0D Fixes: eb700029c78 ("net_pkt: Extend packet abstraction as required by e1= 000e functionality")=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: c7274b5ef43614dd133daec1e2018f71d8744088=0D https://github.com/qemu/qemu/commit/c7274b5ef43614dd133daec1e2018f7= 1d8744088=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M net/eth.c=0D =0D Log Message:=0D -----------=0D net/eth: Add an assert() and invert if() statement to simplify code=0D =0D To simplify the function body, invert the if() statement, returning=0D earlier.=0D Since we already checked there is enough data in the iovec buffer,=0D simply add an assert() call to consume the bytes_read variable.=0D =0D Reviewed-by: Stefano Garzarella =0D Reviewed-by: Miroslav Rezanina =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Jason Wang =0D =0D =0D Commit: b184750926812cb78ac0caf4c4b2b13683b5bde3=0D https://github.com/qemu/qemu/commit/b184750926812cb78ac0caf4c4b2b13= 683b5bde3=0D Author: Peter Maydell =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M hw/net/virtio-net.c=0D M include/net/eth.h=0D M include/net/net.h=0D M net/colo-compare.c=0D M net/eth.c=0D M net/slirp.c=0D M net/tap-win32.c=0D M net/tap.c=0D A tests/qtest/fuzz-e1000e-test.c=0D M tests/qtest/meson.build=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' i= nto staging=0D =0D # gpg: Signature made Mon 22 Mar 2021 09:35:08 GMT=0D # gpg: using RSA key EF04965B398D6211=0D # gpg: Good signature from "Jason Wang (Jason Wang on RedHat) " [marginal]=0D # gpg: WARNING: This key is not certified with sufficiently trusted signa= tures!=0D # gpg: It is not certain that the signature belongs to the owner= .=0D # Primary key fingerprint: 215D 46F4 8246 689E C77F 3562 EF04 965B 398D = 6211=0D =0D * remotes/jasowang/tags/net-pull-request:=0D net/eth: Add an assert() and invert if() statement to simplify code=0D net/eth: Read ip6_ext_hdr_routing buffer before accessing it=0D net/eth: Check iovec has enough data earlier=0D net/eth: Check size earlier in _eth_get_rss_ex_dst_addr()=0D net/eth: Better describe _eth_get_rss_ex_dst_addr's offset argument=0D net/eth: Simplify _eth_get_rss_ex_dst_addr()=0D net/eth: Use correct in6_address offset in _eth_get_rss_ex_dst_addr()=0D= net/colo-compare.c: Optimize removal of secondary packet=0D net/colo-compare.c: Fix memory leak for non-tcp packet=0D hw/net: virtio-net: Initialize nc->do_not_pad to true=0D net: Pad short frames to minimum size before sending from SLiRP/TAP=0D net: Add a 'do_not_pad" to NetClientState=0D net: eth: Add a helper to pad a short Ethernet frame=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/f0f20022a0c7...b18475092681= =0D From MAILER-DAEMON Mon Mar 22 10:26:57 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOLWD-0007g8-CZ for mharc-qemu-commits@gnu.org; Mon, 22 Mar 2021 10:26:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:42088) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOLWB-0007cA-DC for qemu-commits@nongnu.org; Mon, 22 Mar 2021 10:26:55 -0400 Received: from out-21.smtp.github.com ([192.30.252.204]:40209 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOLW8-0002Db-Ov for qemu-commits@nongnu.org; Mon, 22 Mar 2021 10:26:54 -0400 Received: from github.com (hubbernetes-node-f7f585d.ac4-iad.github.net [10.52.205.51]) by smtp.github.com (Postfix) with ESMTPA id F2C22520033 for ; Mon, 22 Mar 2021 07:26:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616423212; bh=vYy96J7l0pPFV+i4z70xIz6Lsa2ugTmQhtaFPSGXJjM=; h=Date:From:To:Subject:From; b=mXMegj4Q+iqed0/eo15+d5Lhw6bfQg2YMBf6UWnY6CHkFh3iTbof/sr/jyFPo1M2+ 4zk6Fd56f7JQvKUR3ZXRtp58DfgvYIhhKJE58lOl6yCMg4iuJo4tgjBNSK2EZw/Fn8 kW3W8c/bqc8gtn0+jEmlLXX0+KO9i7vO53cpz8cE= Date: Mon, 22 Mar 2021 07:26:51 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 20b427: target/mips/mxu_translate.c: Fix array overrun for... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Mar 2021 14:26:55 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 20b42789aa4d2a4d292b1fc8590065f9d391d78d=0D https://github.com/qemu/qemu/commit/20b42789aa4d2a4d292b1fc8590065f= 9d391d78d=0D Author: Peter Maydell =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M target/mips/mxu_translate.c=0D =0D Log Message:=0D -----------=0D target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAX=0D =0D Coverity reported (CID 1450831) an array overrun in=0D gen_mxu_D16MAX_D16MIN():=0D =0D 1103 } else if (unlikely((XRb =3D=3D 0) || (XRa =3D=3D 0))) {=0D ....=0D 1112 if (opc =3D=3D OPC_MXU_D16MAX) {=0D 1113 tcg_gen_smax_i32(mxu_gpr[XRa - 1], t0, t1);=0D 1114 } else {=0D 1115 tcg_gen_smin_i32(mxu_gpr[XRa - 1], t0, t1);=0D 1116 }=0D =0D >>> Overrunning array "mxu_gpr" of 15 8-byte elements at element=0D index 4294967295 (byte offset 34359738367) using index "XRa - 1U"=0D (which evaluates to 4294967295).=0D =0D This happens because the code is confused about which of XRa, XRb and=0D XRc is the output, and which are the inputs. XRa is the output, but=0D most of the conditions separating out different special cases are=0D written as if XRc is the output, with the result that we can end up=0D in the code path that assumes XRa is non-0 even when it is zero.=0D =0D Fix the erroneous code, bringing it in to line with the structure=0D used in functions like gen_mxu_S32MAX_S32MIN() and=0D gen_mxu_Q8MAX_Q8MIN().=0D =0D Fixes: CID 1450831=0D Fixes: bb84cbf38505bd1d8=0D Cc: qemu-stable@nongnu.org=0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210316131353.4533-1-peter.maydell@linaro.org>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: f071dc1f0ccc45e4ac4f538b7c273a0fdcfe1401=0D https://github.com/qemu/qemu/commit/f071dc1f0ccc45e4ac4f538b7c273a0= fdcfe1401=0D Author: Jiaxun Yang =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D =0D Log Message:=0D -----------=0D target/mips: Deprecate Trap-and-Emul KVM support=0D =0D Upstream kernel had removed both host[1] and guest[2] support.=0D =0D [1]: https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/commi= t/?id=3D45c7e8af4a5e3f0bea4ac209eea34118dd57ac64=0D [2]: https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/commi= t/?id=3Da1515ec7204edca770c07929df8538fcdb03ad46=0D =0D Signed-off-by: Jiaxun Yang =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210317011235.7425-1-jiaxun.yang@flygoat.com>=0D [PMD: Specify mentioned kernel is Linux]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: c95bd5ff1660883d15ad6e0005e4c8571604f51a=0D https://github.com/qemu/qemu/commit/c95bd5ff1660883d15ad6e0005e4c85= 71604f51a=0D Author: Peter Maydell =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M target/mips/mxu_translate.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/philmd/tags/mips-fixes-20210322' = into staging=0D =0D MIPS patches queue=0D =0D - Fix array overrun (Coverity CID 1450831)=0D - Deprecate KVM TE (Trap-and-Emul)=0D =0D # gpg: Signature made Mon 22 Mar 2021 14:06:48 GMT=0D # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC= 0DE=0D # gpg: Good signature from "Philippe Mathieu-Daud=C3=A9 (F4BUG) " [full]=0D # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD = C0DE=0D =0D * remotes/philmd/tags/mips-fixes-20210322:=0D target/mips: Deprecate Trap-and-Emul KVM support=0D target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAX=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/b18475092681...c95bd5ff1660= =0D From MAILER-DAEMON Mon Mar 22 12:02:21 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lON0X-0007Sp-IC for mharc-qemu-commits@gnu.org; Mon, 22 Mar 2021 12:02:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:44446) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lON0V-0007RT-8B for qemu-commits@nongnu.org; Mon, 22 Mar 2021 12:02:19 -0400 Received: from out-22.smtp.github.com ([192.30.252.205]:45669 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lON0J-0000EH-RF for qemu-commits@nongnu.org; Mon, 22 Mar 2021 12:02:18 -0400 Received: from github.com (hubbernetes-node-2546592.ac4-iad.github.net [10.52.125.43]) by smtp.github.com (Postfix) with ESMTPA id 4D5DF560324 for ; Mon, 22 Mar 2021 09:02:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616428926; bh=n+uV9E95Ec01E2tNUvUzAc3zUSXU3oZIHiVyNSwS+BI=; h=Date:From:To:Subject:From; b=z3NcQppTLUhEQpYimxC9Qsj2/YYoQ9UVFl2YzovGaD0sP5nKQ12wiMqVCDgs1xigB 92kFnionXBJCu1BBOzxKON4nTl+SRFzvztblaFosspZd4MRLEL9XRHuHmgLU38Q1pi h63NjDmORSDEYuaOa2J+YhCWPq56KrGp/DAhwCXY= Date: Mon, 22 Mar 2021 09:02:06 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 20b427: target/mips/mxu_translate.c: Fix array overrun for... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Mar 2021 16:02:19 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 20b42789aa4d2a4d292b1fc8590065f9d391d78d=0D https://github.com/qemu/qemu/commit/20b42789aa4d2a4d292b1fc8590065f= 9d391d78d=0D Author: Peter Maydell =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M target/mips/mxu_translate.c=0D =0D Log Message:=0D -----------=0D target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAX=0D =0D Coverity reported (CID 1450831) an array overrun in=0D gen_mxu_D16MAX_D16MIN():=0D =0D 1103 } else if (unlikely((XRb =3D=3D 0) || (XRa =3D=3D 0))) {=0D ....=0D 1112 if (opc =3D=3D OPC_MXU_D16MAX) {=0D 1113 tcg_gen_smax_i32(mxu_gpr[XRa - 1], t0, t1);=0D 1114 } else {=0D 1115 tcg_gen_smin_i32(mxu_gpr[XRa - 1], t0, t1);=0D 1116 }=0D =0D >>> Overrunning array "mxu_gpr" of 15 8-byte elements at element=0D index 4294967295 (byte offset 34359738367) using index "XRa - 1U"=0D (which evaluates to 4294967295).=0D =0D This happens because the code is confused about which of XRa, XRb and=0D XRc is the output, and which are the inputs. XRa is the output, but=0D most of the conditions separating out different special cases are=0D written as if XRc is the output, with the result that we can end up=0D in the code path that assumes XRa is non-0 even when it is zero.=0D =0D Fix the erroneous code, bringing it in to line with the structure=0D used in functions like gen_mxu_S32MAX_S32MIN() and=0D gen_mxu_Q8MAX_Q8MIN().=0D =0D Fixes: CID 1450831=0D Fixes: bb84cbf38505bd1d8=0D Cc: qemu-stable@nongnu.org=0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210316131353.4533-1-peter.maydell@linaro.org>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: f071dc1f0ccc45e4ac4f538b7c273a0fdcfe1401=0D https://github.com/qemu/qemu/commit/f071dc1f0ccc45e4ac4f538b7c273a0= fdcfe1401=0D Author: Jiaxun Yang =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D =0D Log Message:=0D -----------=0D target/mips: Deprecate Trap-and-Emul KVM support=0D =0D Upstream kernel had removed both host[1] and guest[2] support.=0D =0D [1]: https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/commi= t/?id=3D45c7e8af4a5e3f0bea4ac209eea34118dd57ac64=0D [2]: https://git.kernel.org/pub/scm/linux/kernel/git/mips/linux.git/commi= t/?id=3Da1515ec7204edca770c07929df8538fcdb03ad46=0D =0D Signed-off-by: Jiaxun Yang =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210317011235.7425-1-jiaxun.yang@flygoat.com>=0D [PMD: Specify mentioned kernel is Linux]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: c95bd5ff1660883d15ad6e0005e4c8571604f51a=0D https://github.com/qemu/qemu/commit/c95bd5ff1660883d15ad6e0005e4c85= 71604f51a=0D Author: Peter Maydell =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M docs/system/deprecated.rst=0D M target/mips/mxu_translate.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/philmd/tags/mips-fixes-20210322' = into staging=0D =0D MIPS patches queue=0D =0D - Fix array overrun (Coverity CID 1450831)=0D - Deprecate KVM TE (Trap-and-Emul)=0D =0D # gpg: Signature made Mon 22 Mar 2021 14:06:48 GMT=0D # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC= 0DE=0D # gpg: Good signature from "Philippe Mathieu-Daud=C3=A9 (F4BUG) " [full]=0D # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD = C0DE=0D =0D * remotes/philmd/tags/mips-fixes-20210322:=0D target/mips: Deprecate Trap-and-Emul KVM support=0D target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAX=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/b18475092681...c95bd5ff1660= =0D From MAILER-DAEMON Mon Mar 22 12:07:58 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lON5y-0006RP-Fc for mharc-qemu-commits@gnu.org; Mon, 22 Mar 2021 12:07:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46730) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lON5w-0006MU-4H for qemu-commits@nongnu.org; Mon, 22 Mar 2021 12:07:56 -0400 Received: from out-22.smtp.github.com ([192.30.252.205]:36975 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lON5p-0003Qc-K5 for qemu-commits@nongnu.org; Mon, 22 Mar 2021 12:07:55 -0400 Received: from github.com (hubbernetes-node-c034147.ac4-iad.github.net [10.52.210.47]) by smtp.github.com (Postfix) with ESMTPA id ABFF85604F1 for ; Mon, 22 Mar 2021 09:07:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616429267; bh=Cv1djiOIo/mBhD/e0rzhqMLWvmAXiABmjlcrXw7fROw=; h=Date:From:To:Subject:From; b=ZZ+OqbgnYlpWN5dsmDAsrS89MD9liacO2VBYrinkBU6Sb3xDkz+HtUfuMMsqQuTtn hp0F8pMx7JSK/pl/lzP+Wm5bEBKSsb2kDDHqIOgnQAQ3zduRvUlWHVHS13oFVRiBeo d9wdkzHGakCdVJorsKymEoZ/LkakwfV7WI7PT42w= Date: Mon, 22 Mar 2021 09:07:47 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 0ab8c0: virtio: Fix virtio_mmio_read()/virtio_mmio_write() X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Mar 2021 16:07:56 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 0ab8c021c6c594846915cbeb501fa87ab8780949 https://github.com/qemu/qemu/commit/0ab8c021c6c594846915cbeb501fa87ab8780949 Author: Laurent Vivier Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/virtio-mmio.c Log Message: ----------- virtio: Fix virtio_mmio_read()/virtio_mmio_write() Both functions don't check the personality of the interface (legacy or modern) before accessing the configuration memory and always use virtio_config_readX()/virtio_config_writeX(). With this patch, they now check the personality and in legacy mode call virtio_config_readX()/virtio_config_writeX(), otherwise call virtio_config_modern_readX()/virtio_config_modern_writeX(). This change has been tested with virtio-mmio guests (virt stretch/armhf and virt sid/m68k) and virtio-pci guests (pseries RHEL-7.3/ppc64 and /ppc64le). Signed-off-by: Laurent Vivier Message-Id: <20210314200300.3259170-1-laurent@vivier.eu> Reviewed-by: Stefano Garzarella Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: a890557d5a90b2c99988bc478bfd7f77392cfd8d https://github.com/qemu/qemu/commit/a890557d5a90b2c99988bc478bfd7f77392cfd8d Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Drop misleading EAGAIN checks in slave_read() slave_read() checks EAGAIN when reading or writing to the socket fails. This gives the impression that the slave channel is in non-blocking mode, which is certainly not the case with the current code base. And the rest of the code isn't actually ready to cope with non-blocking I/O. Just drop the checks everywhere in this function for the sake of clarity. Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-2-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: 9e06080bed293d94ec1f874e62f25f147b20bc6c https://github.com/qemu/qemu/commit/9e06080bed293d94ec1f874e62f25f147b20bc6c Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Fix double-close on slave_read() error path Some message types, e.g. VHOST_USER_SLAVE_VRING_HOST_NOTIFIER_MSG, can convey file descriptors. These must be closed before returning from slave_read() to avoid being leaked. This can currently be done in two different places: [1] just after the request has been processed [2] on the error path, under the goto label err: These path are supposed to be mutually exclusive but they are not actually. If the VHOST_USER_NEED_REPLY_MASK flag was passed and the sending of the reply fails, both [1] and [2] are performed with the same descriptor values. This can potentially cause subtle bugs if one of the descriptor was recycled by some other thread in the meantime. This code duplication complicates rollback for no real good benefit. Do the closing in a unique place, under a new fdcleanup: goto label at the end of the function. Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-3-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: de62e4946052076186428900a85d6547627e84c6 https://github.com/qemu/qemu/commit/de62e4946052076186428900a85d6547627e84c6 Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Factor out duplicated slave_fd teardown code Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-4-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: 57dc02173cb089c11d3c84a0570cb60fe7d7f0d5 https://github.com/qemu/qemu/commit/57dc02173cb089c11d3c84a0570cb60fe7d7f0d5 Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Convert slave channel to QIOChannelSocket The slave channel is implemented with socketpair() : QEMU creates the pair, passes one of the socket to virtiofsd and monitors the other one with the main event loop using qemu_set_fd_handler(). In order to fix a potential deadlock between QEMU and a vhost-user external process (e.g. virtiofsd with DAX), we want to be able to monitor and service the slave channel while handling vhost-user requests. Prepare ground for this by converting the slave channel to be a QIOChannelSocket. This will make monitoring of the slave channel as simple as calling qio_channel_add_watch_source(). Since the connection is already established between the two sockets, only incoming I/O (G_IO_IN) and disconnect (G_IO_HUP) need to be serviced. This also allows to get rid of the ancillary data parsing since QIOChannelSocket can do this for us. Note that the MSG_CTRUNC check is dropped on the way because QIOChannelSocket ignores this case. This isn't a problem since slave_read() provisions space for 8 file descriptors, but affected vhost-user slave protocol messages generally only convey one. If for some reason a buggy implementation passes more file descriptors, no need to break the connection, just like we don't break it if some other type of ancillary data is received : this isn't explicitely violating the protocol per-se so it seems better to ignore it. The current code errors out on short reads and writes. Use the qio_channel_*_all() variants to address this on the way. Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-5-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: a7f523c7d114d445c5d83aecdba3efc038e5a692 https://github.com/qemu/qemu/commit/a7f523c7d114d445c5d83aecdba3efc038e5a692 Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Introduce nested event loop in vhost_user_read() A deadlock condition potentially exists if a vhost-user process needs to request something to QEMU on the slave channel while processing a vhost-user message. This doesn't seem to affect any vhost-user implementation so far, but this is currently biting the upcoming enablement of DAX with virtio-fs. The issue is being observed when the guest does an emergency reboot while a mapping still exits in the DAX window, which is very easy to get with a busy enough workload (e.g. as simulated by blogbench [1]) : - QEMU sends VHOST_USER_GET_VRING_BASE to virtiofsd. - In order to complete the request, virtiofsd then asks QEMU to remove the mapping on the slave channel. All these dialogs are synchronous, hence the deadlock. As pointed out by Stefan Hajnoczi: When QEMU's vhost-user master implementation sends a vhost-user protocol message, vhost_user_read() does a "blocking" read during which slave_fd is not monitored by QEMU. The natural solution for this issue is an event loop. The main event loop cannot be nested though since we have no guarantees that its fd handlers are prepared for re-entrancy. Introduce a new event loop that only monitors the chardev I/O for now in vhost_user_read() and push the actual reading to a one-shot handler. A subsequent patch will teach the loop to monitor and process messages from the slave channel as well. [1] https://github.com/jedisct1/Blogbench Suggested-by: Stefan Hajnoczi Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-6-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: db8a3772e300c1a656331a92da0785d81667dc81 https://github.com/qemu/qemu/commit/db8a3772e300c1a656331a92da0785d81667dc81 Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Monitor slave channel in vhost_user_read() Now that everything is in place, have the nested event loop to monitor the slave channel. The source in the main event loop is destroyed and recreated to ensure any pending even for the slave channel that was previously detected is purged. This guarantees that the main loop wont invoke slave_read() based on an event that was already handled by the nested loop. Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-7-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: d2adda34a9989404a4fc86cb4127a3ea103a7938 https://github.com/qemu/qemu/commit/d2adda34a9989404a4fc86cb4127a3ea103a7938 Author: Wang Liang Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/virtio-pmem.c Log Message: ----------- virtio-pmem: fix virtio_pmem_resp assign problem ret in virtio_pmem_resp is a uint32_t variable, which should be assigned using virtio_stl_p. The kernel side driver does not guarantee virtio_pmem_resp to be initialized to zero in advance, So sometimes the flush operation will fail. Signed-off-by: Wang Liang Message-Id: <20210317024145.271212-1-wangliangzz@126.com> Reviewed-by: Stefano Garzarella Reviewed-by: David Hildenbrand Reviewed-by: Pankaj Gupta Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 6b1712129b1a72f11f139656d26edcc974d46f77 https://github.com/qemu/qemu/commit/6b1712129b1a72f11f139656d26edcc974d46f77 Author: Isaku Yamahata Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/piix4.c M hw/isa/vt82c686.c Log Message: ----------- acpi:piix4, vt82c686: reinitialize acpi PM device on reset Commit 6be8cf56bc8b made sure that SCI is enabled in PM1.CNT on reset in acpi_only mode by modifying acpi_pm1_cnt_reset() and that worked for q35 as expected. The function was introduced by commit eaba51c573a (acpi, acpi_piix, vt82c686: factor out PM1_CNT logic) that forgot to actually call it at piix4 reset time and as result SCI_EN wasn't set as was expected by 6be8cf56bc8b in acpi_only mode. So Windows crashes when it notices that SCI_EN is not set and FADT is not providing information about how to enable it anymore. Reproducer: qemu-system-x86_64 -enable-kvm -M pc-i440fx-6.0,smm=off -cdrom any_windows_10x64.iso Fix it by calling acpi_pm1_cnt_reset() at piix4 reset time. Occasionally this patch adds reset acpi PM related registers on piix4/vt582c686 reset time and de-assert sci. piix4_pm_realize() initializes acpi pm tmr, evt, cnt and gpe. via_pm_realize() initializes acpi pm tmr, evt and cnt. reset them on device reset. pm_reset() in ich9.c correctly calls corresponding reset functions. Fixes: 6be8cf56bc8b (acpi/core: always set SCI_EN when SMM isn't supported) Reported-by: Reinoud Zandijk Co-developed-by: Igor Mammedov Signed-off-by: Igor Mammedov Signed-off-by: Isaku Yamahata Message-Id: <1ceb31c6782f701674d3b907a419f5a82adb37bc.1616012290.git.isaku.yamahata@intel.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 4ad57bd923f5797582c45164ba3f3aec419ca746 https://github.com/qemu/qemu/commit/4ad57bd923f5797582c45164ba3f3aec419ca746 Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M tests/qtest/bios-tables-test-allowed-diff.h Log Message: ----------- tests: acpi: temporary whitelist DSDT changes Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-2-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: e4339831694a4a122187732d8c71f3b533b34449 https://github.com/qemu/qemu/commit/e4339831694a4a122187732d8c71f3b533b34449 Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/pci.c M hw/acpi/pcihp.c M hw/acpi/piix4.c M hw/acpi/trace-events M hw/i386/acpi-build.c M hw/pci/pci.c M include/hw/acpi/pcihp.h M include/hw/pci/pci.h Log Message: ----------- pci: introduce acpi-index property for PCI device In x86/ACPI world, linux distros are using predictable network interface naming since systemd v197. Which on QEMU based VMs results into path based naming scheme, that names network interfaces based on PCI topology. With itm on has to plug NIC in exactly the same bus/slot, which was used when disk image was first provisioned/configured or one risks to loose network configuration due to NIC being renamed to actually used topology. That also restricts freedom to reshape PCI configuration of VM without need to reconfigure used guest image. systemd also offers "onboard" naming scheme which is preferred over PCI slot/topology one, provided that firmware implements: " PCI Firmware Specification 3.1 4.6.7. DSM for Naming a PCI or PCI Express Device Under Operating Systems " that allows to assign user defined index to PCI device, which systemd will use to name NIC. For example, using -device e1000,acpi-index=100 guest will rename NIC to 'eno100', where 'eno' is default prefix for "onboard" naming scheme. This doesn't require any advance configuration on guest side to com in effect at 'onboard' scheme takes priority over path based naming. Hope is that 'acpi-index' it will be easier to consume by management layer, compared to forcing specific PCI topology and/or having several disk image templates for different topologies and will help to simplify process of spawning VM from the same template without need to reconfigure guest NIC. This patch adds, 'acpi-index'* property and wires up a 32bit register on top of pci hotplug register block to pass index value to AML code at runtime. Following patch will add corresponding _DSM code and wire it up to PCI devices described in ACPI. *) name comes from linux kernel terminology Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-3-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: cfe657405f9565e6467ab1254f289d821caa21f5 https://github.com/qemu/qemu/commit/cfe657405f9565e6467ab1254f289d821caa21f5 Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/pcihp.c Log Message: ----------- pci: acpi: ensure that acpi-index is unique it helps to avoid device naming conflicts when guest OS is configured to use acpi-index for naming. Spec ialso says so: PCI Firmware Specification Revision 3.2 4.6.7. _DSM for Naming a PCI or PCI Express Device Under Operating Systems " Instance number must be unique under \_SB scope. This instance number does not have to be sequential in a given system configuration. " Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: e1ca75fa18e3c664b7e241c40c229ced0ae4715e https://github.com/qemu/qemu/commit/e1ca75fa18e3c664b7e241c40c229ced0ae4715e Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/aml-build.c M include/hw/acpi/aml-build.h Log Message: ----------- acpi: add aml_to_decimalstring() and aml_call6() helpers it will be used by follow up patches Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-5-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 33990834fa1eabef4aa7389f62eb715769eb58cf https://github.com/qemu/qemu/commit/33990834fa1eabef4aa7389f62eb715769eb58cf Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/i386/acpi-build.c M include/hw/acpi/pci.h Log Message: ----------- pci: acpi: add _DSM method to PCI devices Implement _DSM according to: PCI Firmware Specification 3.1 4.6.7. DSM for Naming a PCI or PCI Express Device Under Operating Systems and wire it up to cold and hot-plugged PCI devices. Feature depends on ACPI hotplug being enabled (as that provides PCI devices descriptions in ACPI and MMIO registers that are reused to fetch acpi-index). acpi-index should work for - cold plugged NICs: $QEMU -device e1000,acpi-index=100 => 'eno100' - hot-plugged (monitor) device_add e1000,acpi-index=200,id=remove_me => 'eno200' - re-plugged (monitor) device_del remove_me (monitor) device_add e1000,acpi-index=1 => 'eno1' Windows also sees index under "PCI Label Id" field in properties dialog but otherwise it doesn't seem to have any effect. Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-6-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: e36610fb343c5b418450abf3ff2d5d62e91b7145 https://github.com/qemu/qemu/commit/e36610fb343c5b418450abf3ff2d5d62e91b7145 Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M tests/data/acpi/pc/DSDT M tests/data/acpi/pc/DSDT.acpihmat M tests/data/acpi/pc/DSDT.bridge M tests/data/acpi/pc/DSDT.cphp M tests/data/acpi/pc/DSDT.dimmpxm M tests/data/acpi/pc/DSDT.hpbridge M tests/data/acpi/pc/DSDT.ipmikcs M tests/data/acpi/pc/DSDT.memhp M tests/data/acpi/pc/DSDT.nohpet M tests/data/acpi/pc/DSDT.numamem M tests/data/acpi/pc/DSDT.roothp M tests/qtest/bios-tables-test-allowed-diff.h Log Message: ----------- tests: acpi: update expected blobs expected changes are: * larger BNMR operation region * new PIDX field and method to fetch acpi-index * PDSM method that implements PCI device _DSM + per device _DSM that calls PDSM @@ -221,10 +221,11 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) B0EJ, 32 } - OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + OperationRegion (BNMR, SystemIO, 0xAE10, 0x08) Field (BNMR, DWordAcc, NoLock, WriteAsZeros) { - BNUM, 32 + BNUM, 32, + PIDX, 32 } Mutex (BLCK, 0x00) @@ -236,6 +237,52 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Release (BLCK) Return (Zero) } + + Method (AIDX, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + PIDX = (One << Arg1) + Local0 = PIDX /* \_SB_.PCI0.PIDX */ + Release (BLCK) + Return (Local0) + } + + Method (PDSM, 6, Serialized) + { + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Local0 = AIDX (Arg4, Arg5) + If ((Arg2 == Zero)) + { + If ((Arg1 == 0x02)) + { + If (!((Local0 == Zero) | (Local0 == 0xFFFFFFFF))) + { + Return (Buffer (One) + { + 0x81 // . + }) + } + } + + Return (Buffer (One) + { + 0x00 // . + }) + } + ElseIf ((Arg2 == 0x07)) + { + Local1 = Package (0x02) + { + Zero, + "" + } + Local1 [Zero] = Local0 + Return (Local1) + } + } + } } Scope (_SB) @@ -785,7 +832,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) 0xAE00, // Range Minimum 0xAE00, // Range Maximum 0x01, // Alignment - 0x14, // Length + 0x18, // Length ) }) } @@ -842,11 +889,22 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Device (S00) { Name (_ADR, Zero) // _ADR: Address + Name (_SUN, Zero) // _SUN: Slot User Number + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN)) + } } Device (S10) { Name (_ADR, 0x00020000) // _ADR: Address + Name (_SUN, 0x02) // _SUN: Slot User Number + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN)) + } + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State { Return (Zero) [...] Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-7-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 0e2b838a0ee8ef50d6d468ad7381b98b9b6307d8 https://github.com/qemu/qemu/commit/0e2b838a0ee8ef50d6d468ad7381b98b9b6307d8 Author: David Hildenbrand Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/arm/virt-acpi-build.c M hw/i386/acpi-build.c M hw/i386/acpi-microvm.c M include/hw/acpi/aml-build.h Log Message: ----------- acpi: Set proper maximum size for "etc/table-loader" blob The resizeable memory region / RAMBlock that is created for the cmd blob has a maximum size of whole host pages (e.g., 4k), because RAMBlocks work on full host pages. In addition, in i386 ACPI code: acpi_align_size(tables->linker->cmd_blob, ACPI_BUILD_ALIGN_SIZE); makes sure to align to multiples of 4k, padding with 0. For example, if our cmd_blob is created with a size of 2k, the maximum size is 4k - we cannot grow beyond that. Growing might be required due to guest action when rebuilding the tables, but also on incoming migration. This automatic generation of the maximum size used to be sufficient, however, there are cases where we cross host pages now when growing at runtime: we exceed the maximum size of the RAMBlock and can crash QEMU when trying to resize the resizeable memory region / RAMBlock: $ build/qemu-system-x86_64 --enable-kvm \ -machine q35,nvdimm=on \ -smp 1 \ -cpu host \ -m size=2G,slots=8,maxmem=4G \ -object memory-backend-file,id=mem0,mem-path=/tmp/nvdimm,size=256M \ -device nvdimm,label-size=131072,memdev=mem0,id=nvdimm0,slot=1 \ -nodefaults \ -device vmgenid \ -device intel-iommu Results in: Unexpected error in qemu_ram_resize() at ../softmmu/physmem.c:1850: qemu-system-x86_64: Size too large: /rom@etc/table-loader: 0x2000 > 0x1000: Invalid argument In this configuration, we consume exactly 4k (32 entries, 128 bytes each) when creating the VM. However, once the guest boots up and maps the MCFG, we also create the MCFG table and end up consuming 2 additional entries (pointer + checksum) -- which is where we try resizing the memory region / RAMBlock, however, the maximum size does not allow for it. Currently, we get the following maximum sizes for our different mutable tables based on behavior of resizeable RAMBlock: hw table max_size ------- --------------------------------------------------------- virt "etc/acpi/tables" ACPI_BUILD_TABLE_MAX_SIZE (0x200000) virt "etc/table-loader" HOST_PAGE_ALIGN(initial_size) virt "etc/acpi/rsdp" HOST_PAGE_ALIGN(initial_size) i386 "etc/acpi/tables" ACPI_BUILD_TABLE_MAX_SIZE (0x200000) i386 "etc/table-loader" HOST_PAGE_ALIGN(initial_size) i386 "etc/acpi/rsdp" HOST_PAGE_ALIGN(initial_size) microvm "etc/acpi/tables" ACPI_BUILD_TABLE_MAX_SIZE (0x200000) microvm "etc/table-loader" HOST_PAGE_ALIGN(initial_size) microvm "etc/acpi/rsdp" HOST_PAGE_ALIGN(initial_size) Let's set the maximum table size for "etc/table-loader" to 64k, so we can properly grow at runtime, which should be good enough for the future. Migration is not concerned with the maximum size of a RAMBlock, only with the used size - so existing setups are not affected. Of course, we cannot migrate a VM that would have crash when started on older QEMU from new QEMU to older QEMU without failing early on the destination when synchronizing the RAM state: qemu-system-x86_64: Size too large: /rom@etc/table-loader: 0x2000 > 0x1000: Invalid argument qemu-system-x86_64: error while loading state for instance 0x0 of device 'ram' qemu-system-x86_64: load of migration failed: Invalid argument We'll refactor the code next, to make sure we get rid of this implicit behavior for "etc/acpi/rsdp" as well and to make the code easier to grasp. Reviewed-by: Igor Mammedov Cc: Alistair Francis Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Peter Maydell Cc: Shannon Zhao Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Richard Henderson Cc: Laszlo Ersek Signed-off-by: David Hildenbrand Message-Id: <20210304105554.121674-2-david@redhat.com> Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 560cb4660eb6fe7121b766a10b0b762a962206fa https://github.com/qemu/qemu/commit/560cb4660eb6fe7121b766a10b0b762a962206fa Author: David Hildenbrand Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/i386/acpi-microvm.c Log Message: ----------- microvm: Don't open-code "etc/table-loader" Let's just reuse ACPI_BUILD_LOADER_FILE. Cc: Alistair Francis Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Peter Maydell Cc: Shannon Zhao Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Richard Henderson Cc: Laszlo Ersek Signed-off-by: David Hildenbrand Message-Id: <20210304105554.121674-3-david@redhat.com> Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 03fb75964f0ca02c708abd205a052beb8d577f55 https://github.com/qemu/qemu/commit/03fb75964f0ca02c708abd205a052beb8d577f55 Author: David Hildenbrand Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/utils.c M hw/arm/virt-acpi-build.c M hw/i386/acpi-build.c M hw/i386/acpi-microvm.c M include/hw/acpi/aml-build.h M include/hw/acpi/utils.h Log Message: ----------- acpi: Move maximum size logic into acpi_add_rom_blob() We want to have safety margins for all tables based on the table type. Let's move the maximum size logic into acpi_add_rom_blob() and make it dependent on the table name, so we don't have to replicate for each and every instance that creates such tables. Suggested-by: Laszlo Ersek Cc: Alistair Francis Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Peter Maydell Cc: Shannon Zhao Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Richard Henderson Cc: Laszlo Ersek Signed-off-by: David Hildenbrand Message-Id: <20210304105554.121674-4-david@redhat.com> Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: e3f7d11f6e913f1a627bed457428b24efe7c2e5c https://github.com/qemu/qemu/commit/e3f7d11f6e913f1a627bed457428b24efe7c2e5c Author: David Hildenbrand Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/utils.c Log Message: ----------- acpi: Set proper maximum size for "etc/acpi/rsdp" blob Let's also set a maximum size for "etc/acpi/rsdp", so the maximum size doesn't get implicitly set based on the initial table size. In my experiments, the table size was in the range of 22 bytes, so a single page (== what we used until now) seems to be good enough. Now that we have defined maximum sizes for all currently used table types, let's assert that we catch usage with new tables that need a proper maximum size definition. Also assert that our initial size does not exceed the maximum size; while qemu_ram_alloc_internal() properly asserts that the initial RAMBlock size is <= its maximum size, the result might differ when the host page size is bigger than 4k. Suggested-by: Laszlo Ersek Cc: Alistair Francis Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Peter Maydell Cc: Shannon Zhao Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Richard Henderson Cc: Laszlo Ersek Signed-off-by: David Hildenbrand Message-Id: <20210304105554.121674-5-david@redhat.com> Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 5971d4a968d51a80daaad53ddaec2b285115af62 https://github.com/qemu/qemu/commit/5971d4a968d51a80daaad53ddaec2b285115af62 Author: Marian Postevca Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/i386/acpi-build.c M hw/i386/acpi-microvm.c M hw/i386/microvm.c M hw/i386/pc.c M hw/i386/x86.c M include/hw/i386/microvm.h M include/hw/i386/pc.h M include/hw/i386/x86.h Log Message: ----------- acpi: Move setters/getters of oem fields to X86MachineState The code that sets/gets oem fields is duplicated in both PC and MICROVM variants. This commit moves it to X86MachineState so that all x86 variants can use it and duplication is removed. Signed-off-by: Marian Postevca Message-Id: <20210221001737.24499-2-posteuca@mutex.one> Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: fdde0a1188bc48f861491c54ebc1a582cd7410aa https://github.com/qemu/qemu/commit/fdde0a1188bc48f861491c54ebc1a582cd7410aa Author: Peter Maydell Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/aml-build.c M hw/acpi/pci.c M hw/acpi/pcihp.c M hw/acpi/piix4.c M hw/acpi/trace-events M hw/acpi/utils.c M hw/arm/virt-acpi-build.c M hw/i386/acpi-build.c M hw/i386/acpi-microvm.c M hw/i386/microvm.c M hw/i386/pc.c M hw/i386/x86.c M hw/isa/vt82c686.c M hw/pci/pci.c M hw/virtio/vhost-user.c M hw/virtio/virtio-mmio.c M hw/virtio/virtio-pmem.c M include/hw/acpi/aml-build.h M include/hw/acpi/pci.h M include/hw/acpi/pcihp.h M include/hw/acpi/utils.h M include/hw/i386/microvm.h M include/hw/i386/pc.h M include/hw/i386/x86.h M include/hw/pci/pci.h M tests/data/acpi/pc/DSDT M tests/data/acpi/pc/DSDT.acpihmat M tests/data/acpi/pc/DSDT.bridge M tests/data/acpi/pc/DSDT.cphp M tests/data/acpi/pc/DSDT.dimmpxm M tests/data/acpi/pc/DSDT.hpbridge M tests/data/acpi/pc/DSDT.ipmikcs M tests/data/acpi/pc/DSDT.memhp M tests/data/acpi/pc/DSDT.nohpet M tests/data/acpi/pc/DSDT.numamem M tests/data/acpi/pc/DSDT.roothp Log Message: ----------- Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,virtio,pci: fixes, features Fixes all over the place. ACPI index support. Signed-off-by: Michael S. Tsirkin # gpg: Signature made Mon 22 Mar 2021 15:39:50 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin " [full] # gpg: aka "Michael S. Tsirkin " [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: acpi: Move setters/getters of oem fields to X86MachineState acpi: Set proper maximum size for "etc/acpi/rsdp" blob acpi: Move maximum size logic into acpi_add_rom_blob() microvm: Don't open-code "etc/table-loader" acpi: Set proper maximum size for "etc/table-loader" blob tests: acpi: update expected blobs pci: acpi: add _DSM method to PCI devices acpi: add aml_to_decimalstring() and aml_call6() helpers pci: acpi: ensure that acpi-index is unique pci: introduce acpi-index property for PCI device tests: acpi: temporary whitelist DSDT changes acpi:piix4, vt82c686: reinitialize acpi PM device on reset virtio-pmem: fix virtio_pmem_resp assign problem vhost-user: Monitor slave channel in vhost_user_read() vhost-user: Introduce nested event loop in vhost_user_read() vhost-user: Convert slave channel to QIOChannelSocket vhost-user: Factor out duplicated slave_fd teardown code vhost-user: Fix double-close on slave_read() error path vhost-user: Drop misleading EAGAIN checks in slave_read() virtio: Fix virtio_mmio_read()/virtio_mmio_write() Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/c95bd5ff1660...fdde0a1188bc From MAILER-DAEMON Mon Mar 22 14:51:15 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOPdy-0007cy-8C for mharc-qemu-commits@gnu.org; Mon, 22 Mar 2021 14:51:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:38762) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOPdr-0007bR-Ck for qemu-commits@nongnu.org; Mon, 22 Mar 2021 14:51:08 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:53539) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOPdm-0001Cn-B7 for qemu-commits@nongnu.org; Mon, 22 Mar 2021 14:51:06 -0400 Received: from github.com (hubbernetes-node-9d655c3.ash1-iad.github.net [10.56.22.52]) by smtp.github.com (Postfix) with ESMTPA id 9F440900AD9 for ; Mon, 22 Mar 2021 11:51:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616439061; bh=lv+H1vT7A2v/dIBYIaJxSNJDpxdBxfKfXudNSbQlBqE=; h=Date:From:To:Subject:From; b=Iq9dloLpVyN4UAsFRC3mvIA2ESrHv4dmEN4xsgb2QXGUK978JXlDERZuZhI2W2oMX yc4rUZBdCwCZz1NYueO6WZ+tivH0YxmAzt7MK4ILCkOaD6PtHRo9IJThm+akqOO7s2 xUBAjZl8AJZ0nOcOMInMGlfGHOJLalQFJrR//iIw= Date: Mon, 22 Mar 2021 11:51:01 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] a78d9f: hw/sd: sd: Fix build error when DEBUG_SD is on X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 22 Mar 2021 18:51:09 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: a78d9f27b73de3c42f376540bd1d1d0570eb1fa3=0D https://github.com/qemu/qemu/commit/a78d9f27b73de3c42f376540bd1d1d0= 570eb1fa3=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sd.c=0D =0D Log Message:=0D -----------=0D hw/sd: sd: Fix build error when DEBUG_SD is on=0D =0D "qemu-common.h" should be included to provide the forward declaration=0D of qemu_hexdump() when DEBUG_SD is on.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210228050609.24779-1-bmeng.cn@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 818a5cdcfcf0a55d60b59b2cb74482ef4ba6b205=0D https://github.com/qemu/qemu/commit/818a5cdcfcf0a55d60b59b2cb74482e= f4ba6b205=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sd.c=0D =0D Log Message:=0D -----------=0D hw/sd: sd: Actually perform the erase operation=0D =0D At present the sd_erase() does not erase the requested range of card=0D data to 0xFFs. Let's make the erase operation actually happen.=0D =0D Signed-off-by: Bin Meng =0D Message-Id: <1613811493-58815-1-git-send-email-bmeng.cn@gmail.com>=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: b263d8f928001b5cfa2a993ea43b7a5b3a1811e8=0D https://github.com/qemu/qemu/commit/b263d8f928001b5cfa2a993ea43b7a5= b3a1811e8=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sdhci.c=0D =0D Log Message:=0D -----------=0D hw/sd: sdhci: Don't transfer any data when command time out=0D =0D At the end of sdhci_send_command(), it starts a data transfer if the=0D command register indicates data is associated. But the data transfer=0D should only be initiated when the command execution has succeeded.=0D =0D With this fix, the following reproducer:=0D =0D outl 0xcf8 0x80001810=0D outl 0xcfc 0xe1068000=0D outl 0xcf8 0x80001804=0D outw 0xcfc 0x7=0D write 0xe106802c 0x1 0x0f=0D write 0xe1068004 0xc 0x2801d10101fffffbff28a384=0D write 0xe106800c 0x1f 0x9dacbbcad9e8f7061524334251606f7e8d9cabbac9d8e7f60= 514233241505f=0D write 0xe1068003 0x28 0x80d000251480d000252280d000253080d000253e80d000254= c80d000255a80d000256880d0002576=0D write 0xe1068003 0x1 0xfe=0D =0D cannot be reproduced with the following QEMU command line:=0D =0D $ qemu-system-x86_64 -nographic -M pc-q35-5.0 \=0D -device sdhci-pci,sd-spec-version=3D3 \=0D -drive if=3Dsd,index=3D0,file=3Dnull-co://,format=3Draw,id=3Dmydriv= e \=0D -device sd-card,drive=3Dmydrive \=0D -monitor none -serial none -qtest stdio=0D =0D Cc: qemu-stable@nongnu.org=0D Fixes: CVE-2020-17380=0D Fixes: CVE-2020-25085=0D Fixes: CVE-2021-3409=0D Fixes: d7dfca0807a0 ("hw/sdhci: introduce standard SD host controller")=0D= Reported-by: Alexander Bulekov =0D Reported-by: Cornelius Aschermann (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Sergej Schumilo (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Simon W=C3=B6rner (Ruhr-Universit=C3=A4t Bochum)=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1892960=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1909418=0D Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=3D1928146=0D Acked-by: Alistair Francis =0D Tested-by: Alexander Bulekov =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Bin Meng =0D Message-Id: <20210303122639.20004-2-bmeng.cn@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 8be45cc947832b3c02144c9d52921f499f2d77fe=0D https://github.com/qemu/qemu/commit/8be45cc947832b3c02144c9d52921f4= 99f2d77fe=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sdhci.c=0D =0D Log Message:=0D -----------=0D hw/sd: sdhci: Don't write to SDHC_SYSAD register when transfer is in pr= ogress=0D =0D Per "SD Host Controller Standard Specification Version 7.00"=0D chapter 2.2.1 SDMA System Address Register:=0D =0D This register can be accessed only if no transaction is executing=0D (i.e., after a transaction has stopped).=0D =0D With this fix, the following reproducer:=0D =0D outl 0xcf8 0x80001010=0D outl 0xcfc 0xfbefff00=0D outl 0xcf8 0x80001001=0D outl 0xcfc 0x06000000=0D write 0xfbefff2c 0x1 0x05=0D write 0xfbefff0f 0x1 0x37=0D write 0xfbefff0a 0x1 0x01=0D write 0xfbefff0f 0x1 0x29=0D write 0xfbefff0f 0x1 0x02=0D write 0xfbefff0f 0x1 0x03=0D write 0xfbefff04 0x1 0x01=0D write 0xfbefff05 0x1 0x01=0D write 0xfbefff07 0x1 0x02=0D write 0xfbefff0c 0x1 0x33=0D write 0xfbefff0e 0x1 0x20=0D write 0xfbefff0f 0x1 0x00=0D write 0xfbefff2a 0x1 0x01=0D write 0xfbefff0c 0x1 0x00=0D write 0xfbefff03 0x1 0x00=0D write 0xfbefff05 0x1 0x00=0D write 0xfbefff2a 0x1 0x02=0D write 0xfbefff0c 0x1 0x32=0D write 0xfbefff01 0x1 0x01=0D write 0xfbefff02 0x1 0x01=0D write 0xfbefff03 0x1 0x01=0D =0D cannot be reproduced with the following QEMU command line:=0D =0D $ qemu-system-x86_64 -nographic -machine accel=3Dqtest -m 512M \=0D -nodefaults -device sdhci-pci,sd-spec-version=3D3 \=0D -drive if=3Dsd,index=3D0,file=3Dnull-co://,format=3Draw,id=3Dmydri= ve \=0D -device sd-card,drive=3Dmydrive -qtest stdio=0D =0D Cc: qemu-stable@nongnu.org=0D Fixes: CVE-2020-17380=0D Fixes: CVE-2020-25085=0D Fixes: CVE-2021-3409=0D Fixes: d7dfca0807a0 ("hw/sdhci: introduce standard SD host controller")=0D= Reported-by: Alexander Bulekov =0D Reported-by: Cornelius Aschermann (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Sergej Schumilo (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Simon W=C3=B6rner (Ruhr-Universit=C3=A4t Bochum)=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1892960=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1909418=0D Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=3D1928146=0D Tested-by: Alexander Bulekov =0D Signed-off-by: Bin Meng =0D Message-Id: <20210303122639.20004-3-bmeng.cn@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: bc6f28995ff88f5d82c38afcfd65406f0ae375aa=0D https://github.com/qemu/qemu/commit/bc6f28995ff88f5d82c38afcfd65406= f0ae375aa=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sdhci.c=0D =0D Log Message:=0D -----------=0D hw/sd: sdhci: Correctly set the controller status for ADMA=0D =0D When an ADMA transfer is started, the codes forget to set the=0D controller status to indicate a transfer is in progress.=0D =0D With this fix, the following 2 reproducers:=0D =0D https://paste.debian.net/plain/1185136=0D https://paste.debian.net/plain/1185141=0D =0D cannot be reproduced with the following QEMU command line:=0D =0D $ qemu-system-x86_64 -nographic -machine accel=3Dqtest -m 512M \=0D -nodefaults -device sdhci-pci,sd-spec-version=3D3 \=0D -drive if=3Dsd,index=3D0,file=3Dnull-co://,format=3Draw,id=3Dmydriv= e \=0D -device sd-card,drive=3Dmydrive -qtest stdio=0D =0D Cc: qemu-stable@nongnu.org=0D Fixes: CVE-2020-17380=0D Fixes: CVE-2020-25085=0D Fixes: CVE-2021-3409=0D Fixes: d7dfca0807a0 ("hw/sdhci: introduce standard SD host controller")=0D= Reported-by: Alexander Bulekov =0D Reported-by: Cornelius Aschermann (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Sergej Schumilo (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Simon W=C3=B6rner (Ruhr-Universit=C3=A4t Bochum)=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1892960=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1909418=0D Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=3D1928146=0D Tested-by: Alexander Bulekov =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Bin Meng =0D Message-Id: <20210303122639.20004-4-bmeng.cn@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 5cd7aa3451b76bb19c0f6adc2b931f091e5d7fcd=0D https://github.com/qemu/qemu/commit/5cd7aa3451b76bb19c0f6adc2b931f0= 91e5d7fcd=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sdhci.c=0D =0D Log Message:=0D -----------=0D hw/sd: sdhci: Limit block size only when SDHC_BLKSIZE register is writa= ble=0D =0D The codes to limit the maximum block size is only necessary when=0D SDHC_BLKSIZE register is writable.=0D =0D Tested-by: Alexander Bulekov =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Bin Meng =0D Message-Id: <20210303122639.20004-5-bmeng.cn@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: cffb446e8fd19a14e1634c7a3a8b07be3f01d5c9=0D https://github.com/qemu/qemu/commit/cffb446e8fd19a14e1634c7a3a8b07b= e3f01d5c9=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sdhci.c=0D =0D Log Message:=0D -----------=0D hw/sd: sdhci: Reset the data pointer of s->fifo_buffer[] when a differe= nt block size is programmed=0D =0D If the block size is programmed to a different value from the=0D previous one, reset the data pointer of s->fifo_buffer[] so that=0D s->fifo_buffer[] can be filled in using the new block size in=0D the next transfer.=0D =0D With this fix, the following reproducer:=0D =0D outl 0xcf8 0x80001010=0D outl 0xcfc 0xe0000000=0D outl 0xcf8 0x80001001=0D outl 0xcfc 0x06000000=0D write 0xe000002c 0x1 0x05=0D write 0xe0000005 0x1 0x02=0D write 0xe0000007 0x1 0x01=0D write 0xe0000028 0x1 0x10=0D write 0x0 0x1 0x23=0D write 0x2 0x1 0x08=0D write 0xe000000c 0x1 0x01=0D write 0xe000000e 0x1 0x20=0D write 0xe000000f 0x1 0x00=0D write 0xe000000c 0x1 0x32=0D write 0xe0000004 0x2 0x0200=0D write 0xe0000028 0x1 0x00=0D write 0xe0000003 0x1 0x40=0D =0D cannot be reproduced with the following QEMU command line:=0D =0D $ qemu-system-x86_64 -nographic -machine accel=3Dqtest -m 512M \=0D -nodefaults -device sdhci-pci,sd-spec-version=3D3 \=0D -drive if=3Dsd,index=3D0,file=3Dnull-co://,format=3Draw,id=3Dmydriv= e \=0D -device sd-card,drive=3Dmydrive -qtest stdio=0D =0D Cc: qemu-stable@nongnu.org=0D Fixes: CVE-2020-17380=0D Fixes: CVE-2020-25085=0D Fixes: CVE-2021-3409=0D Fixes: d7dfca0807a0 ("hw/sdhci: introduce standard SD host controller")=0D= Reported-by: Alexander Bulekov =0D Reported-by: Cornelius Aschermann (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Sergej Schumilo (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Simon W=C3=B6rner (Ruhr-Universit=C3=A4t Bochum)=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1892960=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1909418=0D Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=3D1928146=0D Tested-by: Alexander Bulekov =0D Signed-off-by: Bin Meng =0D Message-Id: <20210303122639.20004-6-bmeng.cn@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 5ca634afcf83215a9a54ca6e66032325b5ffb5f6=0D https://github.com/qemu/qemu/commit/5ca634afcf83215a9a54ca6e6603232= 5b5ffb5f6=0D Author: Peter Maydell =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sd.c=0D M hw/sd/sdhci.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/philmd/tags/sdmmc-20210322' into = staging=0D =0D SD/MMC patches queue=0D =0D - Fix build error when DEBUG_SD is on=0D - Perform SD ERASE operation=0D - SDHCI ADMA heap buffer overflow=0D (CVE-2020-17380, CVE-2020-25085, CVE-2021-3409)=0D =0D # gpg: Signature made Mon 22 Mar 2021 17:13:43 GMT=0D # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC= 0DE=0D # gpg: Good signature from "Philippe Mathieu-Daud=C3=A9 (F4BUG) " [full]=0D # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD = C0DE=0D =0D * remotes/philmd/tags/sdmmc-20210322:=0D hw/sd: sdhci: Reset the data pointer of s->fifo_buffer[] when a differe= nt block size is programmed=0D hw/sd: sdhci: Limit block size only when SDHC_BLKSIZE register is writa= ble=0D hw/sd: sdhci: Correctly set the controller status for ADMA=0D hw/sd: sdhci: Don't write to SDHC_SYSAD register when transfer is in pr= ogress=0D hw/sd: sdhci: Don't transfer any data when command time out=0D hw/sd: sd: Actually perform the erase operation=0D hw/sd: sd: Fix build error when DEBUG_SD is on=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/fdde0a1188bc...5ca634afcf83= =0D From MAILER-DAEMON Tue Mar 23 06:49:26 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOebG-0004FT-Gt for mharc-qemu-commits@gnu.org; Tue, 23 Mar 2021 06:49:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:45732) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOebB-0004Ck-UH for qemu-commits@nongnu.org; Tue, 23 Mar 2021 06:49:25 -0400 Received: from out-20.smtp.github.com ([192.30.252.203]:57281) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOeb7-0000fe-3z for qemu-commits@nongnu.org; Tue, 23 Mar 2021 06:49:20 -0400 Received: from github.com (hubbernetes-node-9bee3b4.va3-iad.github.net [10.48.110.37]) by smtp.github.com (Postfix) with ESMTPA id DF316E05C8 for ; Tue, 23 Mar 2021 03:49:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616496555; bh=c+EfSoNt3VBk2acXPn4Xt9M4EE6lLkuRcYAzal9aRQY=; h=Date:From:To:Subject:From; b=thnJxODZZq6dyBlwP8mKoRVB+rUvelg4vl52kw5f9M3xGpL/ScqUHVVgvBQvszBT2 hlVVNHl36cWsSW8/c/o04GhYOgjeGewO5Ti2ERs1AEw4Uv8u5uab+I9NGU3+ca0L2Q iKccRe5uxeSlsN30UqGQwTkD+OAzuwUXFYw9TJAY= Date: Tue, 23 Mar 2021 03:49:15 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.203; envelope-from=noreply@github.com; helo=out-20.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] a78d9f: hw/sd: sd: Fix build error when DEBUG_SD is on X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 10:49:25 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: a78d9f27b73de3c42f376540bd1d1d0570eb1fa3=0D https://github.com/qemu/qemu/commit/a78d9f27b73de3c42f376540bd1d1d0= 570eb1fa3=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sd.c=0D =0D Log Message:=0D -----------=0D hw/sd: sd: Fix build error when DEBUG_SD is on=0D =0D "qemu-common.h" should be included to provide the forward declaration=0D of qemu_hexdump() when DEBUG_SD is on.=0D =0D Signed-off-by: Bin Meng =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210228050609.24779-1-bmeng.cn@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 818a5cdcfcf0a55d60b59b2cb74482ef4ba6b205=0D https://github.com/qemu/qemu/commit/818a5cdcfcf0a55d60b59b2cb74482e= f4ba6b205=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sd.c=0D =0D Log Message:=0D -----------=0D hw/sd: sd: Actually perform the erase operation=0D =0D At present the sd_erase() does not erase the requested range of card=0D data to 0xFFs. Let's make the erase operation actually happen.=0D =0D Signed-off-by: Bin Meng =0D Message-Id: <1613811493-58815-1-git-send-email-bmeng.cn@gmail.com>=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: b263d8f928001b5cfa2a993ea43b7a5b3a1811e8=0D https://github.com/qemu/qemu/commit/b263d8f928001b5cfa2a993ea43b7a5= b3a1811e8=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sdhci.c=0D =0D Log Message:=0D -----------=0D hw/sd: sdhci: Don't transfer any data when command time out=0D =0D At the end of sdhci_send_command(), it starts a data transfer if the=0D command register indicates data is associated. But the data transfer=0D should only be initiated when the command execution has succeeded.=0D =0D With this fix, the following reproducer:=0D =0D outl 0xcf8 0x80001810=0D outl 0xcfc 0xe1068000=0D outl 0xcf8 0x80001804=0D outw 0xcfc 0x7=0D write 0xe106802c 0x1 0x0f=0D write 0xe1068004 0xc 0x2801d10101fffffbff28a384=0D write 0xe106800c 0x1f 0x9dacbbcad9e8f7061524334251606f7e8d9cabbac9d8e7f60= 514233241505f=0D write 0xe1068003 0x28 0x80d000251480d000252280d000253080d000253e80d000254= c80d000255a80d000256880d0002576=0D write 0xe1068003 0x1 0xfe=0D =0D cannot be reproduced with the following QEMU command line:=0D =0D $ qemu-system-x86_64 -nographic -M pc-q35-5.0 \=0D -device sdhci-pci,sd-spec-version=3D3 \=0D -drive if=3Dsd,index=3D0,file=3Dnull-co://,format=3Draw,id=3Dmydriv= e \=0D -device sd-card,drive=3Dmydrive \=0D -monitor none -serial none -qtest stdio=0D =0D Cc: qemu-stable@nongnu.org=0D Fixes: CVE-2020-17380=0D Fixes: CVE-2020-25085=0D Fixes: CVE-2021-3409=0D Fixes: d7dfca0807a0 ("hw/sdhci: introduce standard SD host controller")=0D= Reported-by: Alexander Bulekov =0D Reported-by: Cornelius Aschermann (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Sergej Schumilo (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Simon W=C3=B6rner (Ruhr-Universit=C3=A4t Bochum)=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1892960=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1909418=0D Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=3D1928146=0D Acked-by: Alistair Francis =0D Tested-by: Alexander Bulekov =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Bin Meng =0D Message-Id: <20210303122639.20004-2-bmeng.cn@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 8be45cc947832b3c02144c9d52921f499f2d77fe=0D https://github.com/qemu/qemu/commit/8be45cc947832b3c02144c9d52921f4= 99f2d77fe=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sdhci.c=0D =0D Log Message:=0D -----------=0D hw/sd: sdhci: Don't write to SDHC_SYSAD register when transfer is in pr= ogress=0D =0D Per "SD Host Controller Standard Specification Version 7.00"=0D chapter 2.2.1 SDMA System Address Register:=0D =0D This register can be accessed only if no transaction is executing=0D (i.e., after a transaction has stopped).=0D =0D With this fix, the following reproducer:=0D =0D outl 0xcf8 0x80001010=0D outl 0xcfc 0xfbefff00=0D outl 0xcf8 0x80001001=0D outl 0xcfc 0x06000000=0D write 0xfbefff2c 0x1 0x05=0D write 0xfbefff0f 0x1 0x37=0D write 0xfbefff0a 0x1 0x01=0D write 0xfbefff0f 0x1 0x29=0D write 0xfbefff0f 0x1 0x02=0D write 0xfbefff0f 0x1 0x03=0D write 0xfbefff04 0x1 0x01=0D write 0xfbefff05 0x1 0x01=0D write 0xfbefff07 0x1 0x02=0D write 0xfbefff0c 0x1 0x33=0D write 0xfbefff0e 0x1 0x20=0D write 0xfbefff0f 0x1 0x00=0D write 0xfbefff2a 0x1 0x01=0D write 0xfbefff0c 0x1 0x00=0D write 0xfbefff03 0x1 0x00=0D write 0xfbefff05 0x1 0x00=0D write 0xfbefff2a 0x1 0x02=0D write 0xfbefff0c 0x1 0x32=0D write 0xfbefff01 0x1 0x01=0D write 0xfbefff02 0x1 0x01=0D write 0xfbefff03 0x1 0x01=0D =0D cannot be reproduced with the following QEMU command line:=0D =0D $ qemu-system-x86_64 -nographic -machine accel=3Dqtest -m 512M \=0D -nodefaults -device sdhci-pci,sd-spec-version=3D3 \=0D -drive if=3Dsd,index=3D0,file=3Dnull-co://,format=3Draw,id=3Dmydri= ve \=0D -device sd-card,drive=3Dmydrive -qtest stdio=0D =0D Cc: qemu-stable@nongnu.org=0D Fixes: CVE-2020-17380=0D Fixes: CVE-2020-25085=0D Fixes: CVE-2021-3409=0D Fixes: d7dfca0807a0 ("hw/sdhci: introduce standard SD host controller")=0D= Reported-by: Alexander Bulekov =0D Reported-by: Cornelius Aschermann (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Sergej Schumilo (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Simon W=C3=B6rner (Ruhr-Universit=C3=A4t Bochum)=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1892960=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1909418=0D Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=3D1928146=0D Tested-by: Alexander Bulekov =0D Signed-off-by: Bin Meng =0D Message-Id: <20210303122639.20004-3-bmeng.cn@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: bc6f28995ff88f5d82c38afcfd65406f0ae375aa=0D https://github.com/qemu/qemu/commit/bc6f28995ff88f5d82c38afcfd65406= f0ae375aa=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sdhci.c=0D =0D Log Message:=0D -----------=0D hw/sd: sdhci: Correctly set the controller status for ADMA=0D =0D When an ADMA transfer is started, the codes forget to set the=0D controller status to indicate a transfer is in progress.=0D =0D With this fix, the following 2 reproducers:=0D =0D https://paste.debian.net/plain/1185136=0D https://paste.debian.net/plain/1185141=0D =0D cannot be reproduced with the following QEMU command line:=0D =0D $ qemu-system-x86_64 -nographic -machine accel=3Dqtest -m 512M \=0D -nodefaults -device sdhci-pci,sd-spec-version=3D3 \=0D -drive if=3Dsd,index=3D0,file=3Dnull-co://,format=3Draw,id=3Dmydriv= e \=0D -device sd-card,drive=3Dmydrive -qtest stdio=0D =0D Cc: qemu-stable@nongnu.org=0D Fixes: CVE-2020-17380=0D Fixes: CVE-2020-25085=0D Fixes: CVE-2021-3409=0D Fixes: d7dfca0807a0 ("hw/sdhci: introduce standard SD host controller")=0D= Reported-by: Alexander Bulekov =0D Reported-by: Cornelius Aschermann (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Sergej Schumilo (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Simon W=C3=B6rner (Ruhr-Universit=C3=A4t Bochum)=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1892960=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1909418=0D Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=3D1928146=0D Tested-by: Alexander Bulekov =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Bin Meng =0D Message-Id: <20210303122639.20004-4-bmeng.cn@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 5cd7aa3451b76bb19c0f6adc2b931f091e5d7fcd=0D https://github.com/qemu/qemu/commit/5cd7aa3451b76bb19c0f6adc2b931f0= 91e5d7fcd=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sdhci.c=0D =0D Log Message:=0D -----------=0D hw/sd: sdhci: Limit block size only when SDHC_BLKSIZE register is writa= ble=0D =0D The codes to limit the maximum block size is only necessary when=0D SDHC_BLKSIZE register is writable.=0D =0D Tested-by: Alexander Bulekov =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: Bin Meng =0D Message-Id: <20210303122639.20004-5-bmeng.cn@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: cffb446e8fd19a14e1634c7a3a8b07be3f01d5c9=0D https://github.com/qemu/qemu/commit/cffb446e8fd19a14e1634c7a3a8b07b= e3f01d5c9=0D Author: Bin Meng =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sdhci.c=0D =0D Log Message:=0D -----------=0D hw/sd: sdhci: Reset the data pointer of s->fifo_buffer[] when a differe= nt block size is programmed=0D =0D If the block size is programmed to a different value from the=0D previous one, reset the data pointer of s->fifo_buffer[] so that=0D s->fifo_buffer[] can be filled in using the new block size in=0D the next transfer.=0D =0D With this fix, the following reproducer:=0D =0D outl 0xcf8 0x80001010=0D outl 0xcfc 0xe0000000=0D outl 0xcf8 0x80001001=0D outl 0xcfc 0x06000000=0D write 0xe000002c 0x1 0x05=0D write 0xe0000005 0x1 0x02=0D write 0xe0000007 0x1 0x01=0D write 0xe0000028 0x1 0x10=0D write 0x0 0x1 0x23=0D write 0x2 0x1 0x08=0D write 0xe000000c 0x1 0x01=0D write 0xe000000e 0x1 0x20=0D write 0xe000000f 0x1 0x00=0D write 0xe000000c 0x1 0x32=0D write 0xe0000004 0x2 0x0200=0D write 0xe0000028 0x1 0x00=0D write 0xe0000003 0x1 0x40=0D =0D cannot be reproduced with the following QEMU command line:=0D =0D $ qemu-system-x86_64 -nographic -machine accel=3Dqtest -m 512M \=0D -nodefaults -device sdhci-pci,sd-spec-version=3D3 \=0D -drive if=3Dsd,index=3D0,file=3Dnull-co://,format=3Draw,id=3Dmydriv= e \=0D -device sd-card,drive=3Dmydrive -qtest stdio=0D =0D Cc: qemu-stable@nongnu.org=0D Fixes: CVE-2020-17380=0D Fixes: CVE-2020-25085=0D Fixes: CVE-2021-3409=0D Fixes: d7dfca0807a0 ("hw/sdhci: introduce standard SD host controller")=0D= Reported-by: Alexander Bulekov =0D Reported-by: Cornelius Aschermann (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Sergej Schumilo (Ruhr-Universit=C3=A4t Bochum)=0D Reported-by: Simon W=C3=B6rner (Ruhr-Universit=C3=A4t Bochum)=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1892960=0D Buglink: https://bugs.launchpad.net/qemu/+bug/1909418=0D Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=3D1928146=0D Tested-by: Alexander Bulekov =0D Signed-off-by: Bin Meng =0D Message-Id: <20210303122639.20004-6-bmeng.cn@gmail.com>=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 5ca634afcf83215a9a54ca6e66032325b5ffb5f6=0D https://github.com/qemu/qemu/commit/5ca634afcf83215a9a54ca6e6603232= 5b5ffb5f6=0D Author: Peter Maydell =0D Date: 2021-03-22 (Mon, 22 Mar 2021)=0D =0D Changed paths:=0D M hw/sd/sd.c=0D M hw/sd/sdhci.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/philmd/tags/sdmmc-20210322' into = staging=0D =0D SD/MMC patches queue=0D =0D - Fix build error when DEBUG_SD is on=0D - Perform SD ERASE operation=0D - SDHCI ADMA heap buffer overflow=0D (CVE-2020-17380, CVE-2020-25085, CVE-2021-3409)=0D =0D # gpg: Signature made Mon 22 Mar 2021 17:13:43 GMT=0D # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC= 0DE=0D # gpg: Good signature from "Philippe Mathieu-Daud=C3=A9 (F4BUG) " [full]=0D # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD = C0DE=0D =0D * remotes/philmd/tags/sdmmc-20210322:=0D hw/sd: sdhci: Reset the data pointer of s->fifo_buffer[] when a differe= nt block size is programmed=0D hw/sd: sdhci: Limit block size only when SDHC_BLKSIZE register is writa= ble=0D hw/sd: sdhci: Correctly set the controller status for ADMA=0D hw/sd: sdhci: Don't write to SDHC_SYSAD register when transfer is in pr= ogress=0D hw/sd: sdhci: Don't transfer any data when command time out=0D hw/sd: sd: Actually perform the erase operation=0D hw/sd: sd: Fix build error when DEBUG_SD is on=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/c95bd5ff1660...5ca634afcf83= =0D From MAILER-DAEMON Tue Mar 23 06:56:45 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOeiL-0001IO-DX for mharc-qemu-commits@gnu.org; Tue, 23 Mar 2021 06:56:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47594) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOeiI-0001F6-9k for qemu-commits@nongnu.org; Tue, 23 Mar 2021 06:56:42 -0400 Received: from out-19.smtp.github.com ([192.30.252.202]:53341) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOeiB-00051B-IC for qemu-commits@nongnu.org; Tue, 23 Mar 2021 06:56:41 -0400 Received: from github.com (hubbernetes-node-27adbab.va3-iad.github.net [10.48.103.16]) by smtp.github.com (Postfix) with ESMTPA id EBD32E08F8 for ; Tue, 23 Mar 2021 03:56:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616496994; bh=CNeow+9qo71Yup6PtJf267slZrzgMKGNJr3V/FaQkvE=; h=Date:From:To:Subject:From; b=RJAz59mYimSU/KSOAH7ZajHOn4ecXr6JPLfaM5xCh4BQTX4ipk+nanEViAvTyRzA4 SxFWaYywYgB7DU9tEOrdPFCKuhENL2UtAy0jAkjyByQwaWGfuVJB0NJcC5qLEE6ovZ kCj4jb/bVniaIk2T3ZBFdR800Q9Yi+RfOdeZUnaA= Date: Tue, 23 Mar 2021 03:56:34 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.202; envelope-from=noreply@github.com; helo=out-19.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 0ab8c0: virtio: Fix virtio_mmio_read()/virtio_mmio_write() X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 10:56:42 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 0ab8c021c6c594846915cbeb501fa87ab8780949 https://github.com/qemu/qemu/commit/0ab8c021c6c594846915cbeb501fa87ab8780949 Author: Laurent Vivier Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/virtio-mmio.c Log Message: ----------- virtio: Fix virtio_mmio_read()/virtio_mmio_write() Both functions don't check the personality of the interface (legacy or modern) before accessing the configuration memory and always use virtio_config_readX()/virtio_config_writeX(). With this patch, they now check the personality and in legacy mode call virtio_config_readX()/virtio_config_writeX(), otherwise call virtio_config_modern_readX()/virtio_config_modern_writeX(). This change has been tested with virtio-mmio guests (virt stretch/armhf and virt sid/m68k) and virtio-pci guests (pseries RHEL-7.3/ppc64 and /ppc64le). Signed-off-by: Laurent Vivier Message-Id: <20210314200300.3259170-1-laurent@vivier.eu> Reviewed-by: Stefano Garzarella Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: a890557d5a90b2c99988bc478bfd7f77392cfd8d https://github.com/qemu/qemu/commit/a890557d5a90b2c99988bc478bfd7f77392cfd8d Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Drop misleading EAGAIN checks in slave_read() slave_read() checks EAGAIN when reading or writing to the socket fails. This gives the impression that the slave channel is in non-blocking mode, which is certainly not the case with the current code base. And the rest of the code isn't actually ready to cope with non-blocking I/O. Just drop the checks everywhere in this function for the sake of clarity. Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-2-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: 9e06080bed293d94ec1f874e62f25f147b20bc6c https://github.com/qemu/qemu/commit/9e06080bed293d94ec1f874e62f25f147b20bc6c Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Fix double-close on slave_read() error path Some message types, e.g. VHOST_USER_SLAVE_VRING_HOST_NOTIFIER_MSG, can convey file descriptors. These must be closed before returning from slave_read() to avoid being leaked. This can currently be done in two different places: [1] just after the request has been processed [2] on the error path, under the goto label err: These path are supposed to be mutually exclusive but they are not actually. If the VHOST_USER_NEED_REPLY_MASK flag was passed and the sending of the reply fails, both [1] and [2] are performed with the same descriptor values. This can potentially cause subtle bugs if one of the descriptor was recycled by some other thread in the meantime. This code duplication complicates rollback for no real good benefit. Do the closing in a unique place, under a new fdcleanup: goto label at the end of the function. Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-3-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: de62e4946052076186428900a85d6547627e84c6 https://github.com/qemu/qemu/commit/de62e4946052076186428900a85d6547627e84c6 Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Factor out duplicated slave_fd teardown code Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-4-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: 57dc02173cb089c11d3c84a0570cb60fe7d7f0d5 https://github.com/qemu/qemu/commit/57dc02173cb089c11d3c84a0570cb60fe7d7f0d5 Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Convert slave channel to QIOChannelSocket The slave channel is implemented with socketpair() : QEMU creates the pair, passes one of the socket to virtiofsd and monitors the other one with the main event loop using qemu_set_fd_handler(). In order to fix a potential deadlock between QEMU and a vhost-user external process (e.g. virtiofsd with DAX), we want to be able to monitor and service the slave channel while handling vhost-user requests. Prepare ground for this by converting the slave channel to be a QIOChannelSocket. This will make monitoring of the slave channel as simple as calling qio_channel_add_watch_source(). Since the connection is already established between the two sockets, only incoming I/O (G_IO_IN) and disconnect (G_IO_HUP) need to be serviced. This also allows to get rid of the ancillary data parsing since QIOChannelSocket can do this for us. Note that the MSG_CTRUNC check is dropped on the way because QIOChannelSocket ignores this case. This isn't a problem since slave_read() provisions space for 8 file descriptors, but affected vhost-user slave protocol messages generally only convey one. If for some reason a buggy implementation passes more file descriptors, no need to break the connection, just like we don't break it if some other type of ancillary data is received : this isn't explicitely violating the protocol per-se so it seems better to ignore it. The current code errors out on short reads and writes. Use the qio_channel_*_all() variants to address this on the way. Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-5-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: a7f523c7d114d445c5d83aecdba3efc038e5a692 https://github.com/qemu/qemu/commit/a7f523c7d114d445c5d83aecdba3efc038e5a692 Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Introduce nested event loop in vhost_user_read() A deadlock condition potentially exists if a vhost-user process needs to request something to QEMU on the slave channel while processing a vhost-user message. This doesn't seem to affect any vhost-user implementation so far, but this is currently biting the upcoming enablement of DAX with virtio-fs. The issue is being observed when the guest does an emergency reboot while a mapping still exits in the DAX window, which is very easy to get with a busy enough workload (e.g. as simulated by blogbench [1]) : - QEMU sends VHOST_USER_GET_VRING_BASE to virtiofsd. - In order to complete the request, virtiofsd then asks QEMU to remove the mapping on the slave channel. All these dialogs are synchronous, hence the deadlock. As pointed out by Stefan Hajnoczi: When QEMU's vhost-user master implementation sends a vhost-user protocol message, vhost_user_read() does a "blocking" read during which slave_fd is not monitored by QEMU. The natural solution for this issue is an event loop. The main event loop cannot be nested though since we have no guarantees that its fd handlers are prepared for re-entrancy. Introduce a new event loop that only monitors the chardev I/O for now in vhost_user_read() and push the actual reading to a one-shot handler. A subsequent patch will teach the loop to monitor and process messages from the slave channel as well. [1] https://github.com/jedisct1/Blogbench Suggested-by: Stefan Hajnoczi Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-6-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: db8a3772e300c1a656331a92da0785d81667dc81 https://github.com/qemu/qemu/commit/db8a3772e300c1a656331a92da0785d81667dc81 Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Monitor slave channel in vhost_user_read() Now that everything is in place, have the nested event loop to monitor the slave channel. The source in the main event loop is destroyed and recreated to ensure any pending even for the slave channel that was previously detected is purged. This guarantees that the main loop wont invoke slave_read() based on an event that was already handled by the nested loop. Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-7-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: d2adda34a9989404a4fc86cb4127a3ea103a7938 https://github.com/qemu/qemu/commit/d2adda34a9989404a4fc86cb4127a3ea103a7938 Author: Wang Liang Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/virtio-pmem.c Log Message: ----------- virtio-pmem: fix virtio_pmem_resp assign problem ret in virtio_pmem_resp is a uint32_t variable, which should be assigned using virtio_stl_p. The kernel side driver does not guarantee virtio_pmem_resp to be initialized to zero in advance, So sometimes the flush operation will fail. Signed-off-by: Wang Liang Message-Id: <20210317024145.271212-1-wangliangzz@126.com> Reviewed-by: Stefano Garzarella Reviewed-by: David Hildenbrand Reviewed-by: Pankaj Gupta Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 79a2aca20cb4601e6a30bbe8620ee1ef9b960ae1 https://github.com/qemu/qemu/commit/79a2aca20cb4601e6a30bbe8620ee1ef9b960ae1 Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M tests/qtest/bios-tables-test-allowed-diff.h Log Message: ----------- tests: acpi: temporary whitelist DSDT changes Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-2-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: b32bd763a1ca929677e22ae1c51cb3920921bdce https://github.com/qemu/qemu/commit/b32bd763a1ca929677e22ae1c51cb3920921bdce Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/pci.c M hw/acpi/pcihp.c M hw/acpi/piix4.c M hw/acpi/trace-events M hw/i386/acpi-build.c M hw/pci/pci.c M include/hw/acpi/pcihp.h M include/hw/pci/pci.h Log Message: ----------- pci: introduce acpi-index property for PCI device In x86/ACPI world, linux distros are using predictable network interface naming since systemd v197. Which on QEMU based VMs results into path based naming scheme, that names network interfaces based on PCI topology. With itm on has to plug NIC in exactly the same bus/slot, which was used when disk image was first provisioned/configured or one risks to loose network configuration due to NIC being renamed to actually used topology. That also restricts freedom to reshape PCI configuration of VM without need to reconfigure used guest image. systemd also offers "onboard" naming scheme which is preferred over PCI slot/topology one, provided that firmware implements: " PCI Firmware Specification 3.1 4.6.7. DSM for Naming a PCI or PCI Express Device Under Operating Systems " that allows to assign user defined index to PCI device, which systemd will use to name NIC. For example, using -device e1000,acpi-index=100 guest will rename NIC to 'eno100', where 'eno' is default prefix for "onboard" naming scheme. This doesn't require any advance configuration on guest side to com in effect at 'onboard' scheme takes priority over path based naming. Hope is that 'acpi-index' it will be easier to consume by management layer, compared to forcing specific PCI topology and/or having several disk image templates for different topologies and will help to simplify process of spawning VM from the same template without need to reconfigure guest NIC. This patch adds, 'acpi-index'* property and wires up a 32bit register on top of pci hotplug register block to pass index value to AML code at runtime. Following patch will add corresponding _DSM code and wire it up to PCI devices described in ACPI. *) name comes from linux kernel terminology Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-3-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 4fd7da4c0336c8fd822cd808d62f7ff8c9936aef https://github.com/qemu/qemu/commit/4fd7da4c0336c8fd822cd808d62f7ff8c9936aef Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/pcihp.c Log Message: ----------- pci: acpi: ensure that acpi-index is unique it helps to avoid device naming conflicts when guest OS is configured to use acpi-index for naming. Spec ialso says so: PCI Firmware Specification Revision 3.2 4.6.7. _DSM for Naming a PCI or PCI Express Device Under Operating Systems " Instance number must be unique under \_SB scope. This instance number does not have to be sequential in a given system configuration. " Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 910e4069710d854757c8fe8921dcff5b62dcd960 https://github.com/qemu/qemu/commit/910e4069710d854757c8fe8921dcff5b62dcd960 Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/aml-build.c M include/hw/acpi/aml-build.h Log Message: ----------- acpi: add aml_to_decimalstring() and aml_call6() helpers it will be used by follow up patches Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-5-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: b7f23f62e40bb7bc87fe170471a31ab1fb8a0784 https://github.com/qemu/qemu/commit/b7f23f62e40bb7bc87fe170471a31ab1fb8a0784 Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/i386/acpi-build.c M include/hw/acpi/pci.h Log Message: ----------- pci: acpi: add _DSM method to PCI devices Implement _DSM according to: PCI Firmware Specification 3.1 4.6.7. DSM for Naming a PCI or PCI Express Device Under Operating Systems and wire it up to cold and hot-plugged PCI devices. Feature depends on ACPI hotplug being enabled (as that provides PCI devices descriptions in ACPI and MMIO registers that are reused to fetch acpi-index). acpi-index should work for - cold plugged NICs: $QEMU -device e1000,acpi-index=100 => 'eno100' - hot-plugged (monitor) device_add e1000,acpi-index=200,id=remove_me => 'eno200' - re-plugged (monitor) device_del remove_me (monitor) device_add e1000,acpi-index=1 => 'eno1' Windows also sees index under "PCI Label Id" field in properties dialog but otherwise it doesn't seem to have any effect. Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-6-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 835fde4a781f8abf230d567f759647c403944b57 https://github.com/qemu/qemu/commit/835fde4a781f8abf230d567f759647c403944b57 Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M tests/data/acpi/pc/DSDT M tests/data/acpi/pc/DSDT.acpihmat M tests/data/acpi/pc/DSDT.bridge M tests/data/acpi/pc/DSDT.cphp M tests/data/acpi/pc/DSDT.dimmpxm M tests/data/acpi/pc/DSDT.hpbridge M tests/data/acpi/pc/DSDT.ipmikcs M tests/data/acpi/pc/DSDT.memhp M tests/data/acpi/pc/DSDT.nohpet M tests/data/acpi/pc/DSDT.numamem M tests/data/acpi/pc/DSDT.roothp M tests/qtest/bios-tables-test-allowed-diff.h Log Message: ----------- tests: acpi: update expected blobs expected changes are: * larger BNMR operation region * new PIDX field and method to fetch acpi-index * PDSM method that implements PCI device _DSM + per device _DSM that calls PDSM @@ -221,10 +221,11 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) B0EJ, 32 } - OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + OperationRegion (BNMR, SystemIO, 0xAE10, 0x08) Field (BNMR, DWordAcc, NoLock, WriteAsZeros) { - BNUM, 32 + BNUM, 32, + PIDX, 32 } Mutex (BLCK, 0x00) @@ -236,6 +237,52 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Release (BLCK) Return (Zero) } + + Method (AIDX, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + PIDX = (One << Arg1) + Local0 = PIDX /* \_SB_.PCI0.PIDX */ + Release (BLCK) + Return (Local0) + } + + Method (PDSM, 6, Serialized) + { + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Local0 = AIDX (Arg4, Arg5) + If ((Arg2 == Zero)) + { + If ((Arg1 == 0x02)) + { + If (!((Local0 == Zero) | (Local0 == 0xFFFFFFFF))) + { + Return (Buffer (One) + { + 0x81 // . + }) + } + } + + Return (Buffer (One) + { + 0x00 // . + }) + } + ElseIf ((Arg2 == 0x07)) + { + Local1 = Package (0x02) + { + Zero, + "" + } + Local1 [Zero] = Local0 + Return (Local1) + } + } + } } Scope (_SB) @@ -785,7 +832,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) 0xAE00, // Range Minimum 0xAE00, // Range Maximum 0x01, // Alignment - 0x14, // Length + 0x18, // Length ) }) } @@ -842,11 +889,22 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Device (S00) { Name (_ADR, Zero) // _ADR: Address + Name (_SUN, Zero) // _SUN: Slot User Number + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN)) + } } Device (S10) { Name (_ADR, 0x00020000) // _ADR: Address + Name (_SUN, 0x02) // _SUN: Slot User Number + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN)) + } + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State { Return (Zero) [...] Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-7-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 6c2b24d1d2b19cd330d971cdbc8e6b115dc97ca4 https://github.com/qemu/qemu/commit/6c2b24d1d2b19cd330d971cdbc8e6b115dc97ca4 Author: David Hildenbrand Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/arm/virt-acpi-build.c M hw/i386/acpi-build.c M hw/i386/acpi-microvm.c M include/hw/acpi/aml-build.h Log Message: ----------- acpi: Set proper maximum size for "etc/table-loader" blob The resizeable memory region / RAMBlock that is created for the cmd blob has a maximum size of whole host pages (e.g., 4k), because RAMBlocks work on full host pages. In addition, in i386 ACPI code: acpi_align_size(tables->linker->cmd_blob, ACPI_BUILD_ALIGN_SIZE); makes sure to align to multiples of 4k, padding with 0. For example, if our cmd_blob is created with a size of 2k, the maximum size is 4k - we cannot grow beyond that. Growing might be required due to guest action when rebuilding the tables, but also on incoming migration. This automatic generation of the maximum size used to be sufficient, however, there are cases where we cross host pages now when growing at runtime: we exceed the maximum size of the RAMBlock and can crash QEMU when trying to resize the resizeable memory region / RAMBlock: $ build/qemu-system-x86_64 --enable-kvm \ -machine q35,nvdimm=on \ -smp 1 \ -cpu host \ -m size=2G,slots=8,maxmem=4G \ -object memory-backend-file,id=mem0,mem-path=/tmp/nvdimm,size=256M \ -device nvdimm,label-size=131072,memdev=mem0,id=nvdimm0,slot=1 \ -nodefaults \ -device vmgenid \ -device intel-iommu Results in: Unexpected error in qemu_ram_resize() at ../softmmu/physmem.c:1850: qemu-system-x86_64: Size too large: /rom@etc/table-loader: 0x2000 > 0x1000: Invalid argument In this configuration, we consume exactly 4k (32 entries, 128 bytes each) when creating the VM. However, once the guest boots up and maps the MCFG, we also create the MCFG table and end up consuming 2 additional entries (pointer + checksum) -- which is where we try resizing the memory region / RAMBlock, however, the maximum size does not allow for it. Currently, we get the following maximum sizes for our different mutable tables based on behavior of resizeable RAMBlock: hw table max_size ------- --------------------------------------------------------- virt "etc/acpi/tables" ACPI_BUILD_TABLE_MAX_SIZE (0x200000) virt "etc/table-loader" HOST_PAGE_ALIGN(initial_size) virt "etc/acpi/rsdp" HOST_PAGE_ALIGN(initial_size) i386 "etc/acpi/tables" ACPI_BUILD_TABLE_MAX_SIZE (0x200000) i386 "etc/table-loader" HOST_PAGE_ALIGN(initial_size) i386 "etc/acpi/rsdp" HOST_PAGE_ALIGN(initial_size) microvm "etc/acpi/tables" ACPI_BUILD_TABLE_MAX_SIZE (0x200000) microvm "etc/table-loader" HOST_PAGE_ALIGN(initial_size) microvm "etc/acpi/rsdp" HOST_PAGE_ALIGN(initial_size) Let's set the maximum table size for "etc/table-loader" to 64k, so we can properly grow at runtime, which should be good enough for the future. Migration is not concerned with the maximum size of a RAMBlock, only with the used size - so existing setups are not affected. Of course, we cannot migrate a VM that would have crash when started on older QEMU from new QEMU to older QEMU without failing early on the destination when synchronizing the RAM state: qemu-system-x86_64: Size too large: /rom@etc/table-loader: 0x2000 > 0x1000: Invalid argument qemu-system-x86_64: error while loading state for instance 0x0 of device 'ram' qemu-system-x86_64: load of migration failed: Invalid argument We'll refactor the code next, to make sure we get rid of this implicit behavior for "etc/acpi/rsdp" as well and to make the code easier to grasp. Reviewed-by: Igor Mammedov Cc: Alistair Francis Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Peter Maydell Cc: Shannon Zhao Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Richard Henderson Cc: Laszlo Ersek Signed-off-by: David Hildenbrand Message-Id: <20210304105554.121674-2-david@redhat.com> Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 2a3bdc5cec1a16fb731661d2eac896284f691e1f https://github.com/qemu/qemu/commit/2a3bdc5cec1a16fb731661d2eac896284f691e1f Author: David Hildenbrand Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/i386/acpi-microvm.c Log Message: ----------- microvm: Don't open-code "etc/table-loader" Let's just reuse ACPI_BUILD_LOADER_FILE. Cc: Alistair Francis Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Peter Maydell Cc: Shannon Zhao Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Richard Henderson Cc: Laszlo Ersek Signed-off-by: David Hildenbrand Message-Id: <20210304105554.121674-3-david@redhat.com> Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 6930ba0d44b2f4420948aec5209f665385411f7f https://github.com/qemu/qemu/commit/6930ba0d44b2f4420948aec5209f665385411f7f Author: David Hildenbrand Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/utils.c M hw/arm/virt-acpi-build.c M hw/i386/acpi-build.c M hw/i386/acpi-microvm.c M include/hw/acpi/aml-build.h M include/hw/acpi/utils.h Log Message: ----------- acpi: Move maximum size logic into acpi_add_rom_blob() We want to have safety margins for all tables based on the table type. Let's move the maximum size logic into acpi_add_rom_blob() and make it dependent on the table name, so we don't have to replicate for each and every instance that creates such tables. Suggested-by: Laszlo Ersek Cc: Alistair Francis Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Peter Maydell Cc: Shannon Zhao Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Richard Henderson Cc: Laszlo Ersek Signed-off-by: David Hildenbrand Message-Id: <20210304105554.121674-4-david@redhat.com> Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 50337286b796f3866d1880f6e8a895fa5853b543 https://github.com/qemu/qemu/commit/50337286b796f3866d1880f6e8a895fa5853b543 Author: David Hildenbrand Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/utils.c Log Message: ----------- acpi: Set proper maximum size for "etc/acpi/rsdp" blob Let's also set a maximum size for "etc/acpi/rsdp", so the maximum size doesn't get implicitly set based on the initial table size. In my experiments, the table size was in the range of 22 bytes, so a single page (== what we used until now) seems to be good enough. Now that we have defined maximum sizes for all currently used table types, let's assert that we catch usage with new tables that need a proper maximum size definition. Also assert that our initial size does not exceed the maximum size; while qemu_ram_alloc_internal() properly asserts that the initial RAMBlock size is <= its maximum size, the result might differ when the host page size is bigger than 4k. Suggested-by: Laszlo Ersek Cc: Alistair Francis Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Peter Maydell Cc: Shannon Zhao Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Richard Henderson Cc: Laszlo Ersek Signed-off-by: David Hildenbrand Message-Id: <20210304105554.121674-5-david@redhat.com> Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: d07b22863b8e0981bdc9384a787a703f1fd4ba42 https://github.com/qemu/qemu/commit/d07b22863b8e0981bdc9384a787a703f1fd4ba42 Author: Marian Postevca Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/i386/acpi-build.c M hw/i386/acpi-microvm.c M hw/i386/microvm.c M hw/i386/pc.c M hw/i386/x86.c M include/hw/i386/microvm.h M include/hw/i386/pc.h M include/hw/i386/x86.h Log Message: ----------- acpi: Move setters/getters of oem fields to X86MachineState The code that sets/gets oem fields is duplicated in both PC and MICROVM variants. This commit moves it to X86MachineState so that all x86 variants can use it and duplication is removed. Signed-off-by: Marian Postevca Message-Id: <20210221001737.24499-2-posteuca@mutex.one> Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 97414988490de91673c51e6aa88a9f507e6a1edc https://github.com/qemu/qemu/commit/97414988490de91673c51e6aa88a9f507e6a1edc Author: Peter Maydell Date: 2021-03-23 (Tue, 23 Mar 2021) Changed paths: M hw/acpi/aml-build.c M hw/acpi/pci.c M hw/acpi/pcihp.c M hw/acpi/piix4.c M hw/acpi/trace-events M hw/acpi/utils.c M hw/arm/virt-acpi-build.c M hw/i386/acpi-build.c M hw/i386/acpi-microvm.c M hw/i386/microvm.c M hw/i386/pc.c M hw/i386/x86.c M hw/pci/pci.c M hw/virtio/vhost-user.c M hw/virtio/virtio-mmio.c M hw/virtio/virtio-pmem.c M include/hw/acpi/aml-build.h M include/hw/acpi/pci.h M include/hw/acpi/pcihp.h M include/hw/acpi/utils.h M include/hw/i386/microvm.h M include/hw/i386/pc.h M include/hw/i386/x86.h M include/hw/pci/pci.h M tests/data/acpi/pc/DSDT M tests/data/acpi/pc/DSDT.acpihmat M tests/data/acpi/pc/DSDT.bridge M tests/data/acpi/pc/DSDT.cphp M tests/data/acpi/pc/DSDT.dimmpxm M tests/data/acpi/pc/DSDT.hpbridge M tests/data/acpi/pc/DSDT.ipmikcs M tests/data/acpi/pc/DSDT.memhp M tests/data/acpi/pc/DSDT.nohpet M tests/data/acpi/pc/DSDT.numamem M tests/data/acpi/pc/DSDT.roothp Log Message: ----------- Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,virtio,pci: fixes, features Fixes all over the place. ACPI index support. Signed-off-by: Michael S. Tsirkin # gpg: Signature made Mon 22 Mar 2021 22:58:45 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin " [full] # gpg: aka "Michael S. Tsirkin " [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: acpi: Move setters/getters of oem fields to X86MachineState acpi: Set proper maximum size for "etc/acpi/rsdp" blob acpi: Move maximum size logic into acpi_add_rom_blob() microvm: Don't open-code "etc/table-loader" acpi: Set proper maximum size for "etc/table-loader" blob tests: acpi: update expected blobs pci: acpi: add _DSM method to PCI devices acpi: add aml_to_decimalstring() and aml_call6() helpers pci: acpi: ensure that acpi-index is unique pci: introduce acpi-index property for PCI device tests: acpi: temporary whitelist DSDT changes virtio-pmem: fix virtio_pmem_resp assign problem vhost-user: Monitor slave channel in vhost_user_read() vhost-user: Introduce nested event loop in vhost_user_read() vhost-user: Convert slave channel to QIOChannelSocket vhost-user: Factor out duplicated slave_fd teardown code vhost-user: Fix double-close on slave_read() error path vhost-user: Drop misleading EAGAIN checks in slave_read() virtio: Fix virtio_mmio_read()/virtio_mmio_write() Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/5ca634afcf83...97414988490d From MAILER-DAEMON Tue Mar 23 11:31:03 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOizn-0007nh-4d for mharc-qemu-commits@gnu.org; Tue, 23 Mar 2021 11:31:03 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33544) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOizl-0007kf-EZ for qemu-commits@nongnu.org; Tue, 23 Mar 2021 11:31:01 -0400 Received: from out-24.smtp.github.com ([192.30.252.207]:60983) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOizb-0008MX-Gd for qemu-commits@nongnu.org; Tue, 23 Mar 2021 11:31:00 -0400 Received: from github.com (hubbernetes-node-895fcae.ac4-iad.github.net [10.52.200.39]) by smtp.github.com (Postfix) with ESMTPA id B9AE1600914 for ; Tue, 23 Mar 2021 08:30:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616513450; bh=pPgBwdo9m22no7NRZ66y1wOYjmx/a8EZLDokZzRIvFA=; h=Date:From:To:Subject:From; b=FkPXHy/+VF7F3+FSQEsX8UbeMNiQn0GhPMaYC70O/veAw47phCHh096oveqvaQUwQ QnxPipR1ZZlgSBTCWlVV1x1ARhEFjpe/flyBanpZa4f0V7ccJliwPkR9Yxxuec6sWY uFn+RmUo684UH88+WN5ITSeJgzJ7eTE3zh8fCG2A= Date: Tue, 23 Mar 2021 08:30:50 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 0ab8c0: virtio: Fix virtio_mmio_read()/virtio_mmio_write() X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 15:31:01 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 0ab8c021c6c594846915cbeb501fa87ab8780949 https://github.com/qemu/qemu/commit/0ab8c021c6c594846915cbeb501fa87ab8780949 Author: Laurent Vivier Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/virtio-mmio.c Log Message: ----------- virtio: Fix virtio_mmio_read()/virtio_mmio_write() Both functions don't check the personality of the interface (legacy or modern) before accessing the configuration memory and always use virtio_config_readX()/virtio_config_writeX(). With this patch, they now check the personality and in legacy mode call virtio_config_readX()/virtio_config_writeX(), otherwise call virtio_config_modern_readX()/virtio_config_modern_writeX(). This change has been tested with virtio-mmio guests (virt stretch/armhf and virt sid/m68k) and virtio-pci guests (pseries RHEL-7.3/ppc64 and /ppc64le). Signed-off-by: Laurent Vivier Message-Id: <20210314200300.3259170-1-laurent@vivier.eu> Reviewed-by: Stefano Garzarella Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: a890557d5a90b2c99988bc478bfd7f77392cfd8d https://github.com/qemu/qemu/commit/a890557d5a90b2c99988bc478bfd7f77392cfd8d Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Drop misleading EAGAIN checks in slave_read() slave_read() checks EAGAIN when reading or writing to the socket fails. This gives the impression that the slave channel is in non-blocking mode, which is certainly not the case with the current code base. And the rest of the code isn't actually ready to cope with non-blocking I/O. Just drop the checks everywhere in this function for the sake of clarity. Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-2-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: 9e06080bed293d94ec1f874e62f25f147b20bc6c https://github.com/qemu/qemu/commit/9e06080bed293d94ec1f874e62f25f147b20bc6c Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Fix double-close on slave_read() error path Some message types, e.g. VHOST_USER_SLAVE_VRING_HOST_NOTIFIER_MSG, can convey file descriptors. These must be closed before returning from slave_read() to avoid being leaked. This can currently be done in two different places: [1] just after the request has been processed [2] on the error path, under the goto label err: These path are supposed to be mutually exclusive but they are not actually. If the VHOST_USER_NEED_REPLY_MASK flag was passed and the sending of the reply fails, both [1] and [2] are performed with the same descriptor values. This can potentially cause subtle bugs if one of the descriptor was recycled by some other thread in the meantime. This code duplication complicates rollback for no real good benefit. Do the closing in a unique place, under a new fdcleanup: goto label at the end of the function. Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-3-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: de62e4946052076186428900a85d6547627e84c6 https://github.com/qemu/qemu/commit/de62e4946052076186428900a85d6547627e84c6 Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Factor out duplicated slave_fd teardown code Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-4-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: 57dc02173cb089c11d3c84a0570cb60fe7d7f0d5 https://github.com/qemu/qemu/commit/57dc02173cb089c11d3c84a0570cb60fe7d7f0d5 Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Convert slave channel to QIOChannelSocket The slave channel is implemented with socketpair() : QEMU creates the pair, passes one of the socket to virtiofsd and monitors the other one with the main event loop using qemu_set_fd_handler(). In order to fix a potential deadlock between QEMU and a vhost-user external process (e.g. virtiofsd with DAX), we want to be able to monitor and service the slave channel while handling vhost-user requests. Prepare ground for this by converting the slave channel to be a QIOChannelSocket. This will make monitoring of the slave channel as simple as calling qio_channel_add_watch_source(). Since the connection is already established between the two sockets, only incoming I/O (G_IO_IN) and disconnect (G_IO_HUP) need to be serviced. This also allows to get rid of the ancillary data parsing since QIOChannelSocket can do this for us. Note that the MSG_CTRUNC check is dropped on the way because QIOChannelSocket ignores this case. This isn't a problem since slave_read() provisions space for 8 file descriptors, but affected vhost-user slave protocol messages generally only convey one. If for some reason a buggy implementation passes more file descriptors, no need to break the connection, just like we don't break it if some other type of ancillary data is received : this isn't explicitely violating the protocol per-se so it seems better to ignore it. The current code errors out on short reads and writes. Use the qio_channel_*_all() variants to address this on the way. Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-5-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: a7f523c7d114d445c5d83aecdba3efc038e5a692 https://github.com/qemu/qemu/commit/a7f523c7d114d445c5d83aecdba3efc038e5a692 Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Introduce nested event loop in vhost_user_read() A deadlock condition potentially exists if a vhost-user process needs to request something to QEMU on the slave channel while processing a vhost-user message. This doesn't seem to affect any vhost-user implementation so far, but this is currently biting the upcoming enablement of DAX with virtio-fs. The issue is being observed when the guest does an emergency reboot while a mapping still exits in the DAX window, which is very easy to get with a busy enough workload (e.g. as simulated by blogbench [1]) : - QEMU sends VHOST_USER_GET_VRING_BASE to virtiofsd. - In order to complete the request, virtiofsd then asks QEMU to remove the mapping on the slave channel. All these dialogs are synchronous, hence the deadlock. As pointed out by Stefan Hajnoczi: When QEMU's vhost-user master implementation sends a vhost-user protocol message, vhost_user_read() does a "blocking" read during which slave_fd is not monitored by QEMU. The natural solution for this issue is an event loop. The main event loop cannot be nested though since we have no guarantees that its fd handlers are prepared for re-entrancy. Introduce a new event loop that only monitors the chardev I/O for now in vhost_user_read() and push the actual reading to a one-shot handler. A subsequent patch will teach the loop to monitor and process messages from the slave channel as well. [1] https://github.com/jedisct1/Blogbench Suggested-by: Stefan Hajnoczi Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-6-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: db8a3772e300c1a656331a92da0785d81667dc81 https://github.com/qemu/qemu/commit/db8a3772e300c1a656331a92da0785d81667dc81 Author: Greg Kurz Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/vhost-user.c Log Message: ----------- vhost-user: Monitor slave channel in vhost_user_read() Now that everything is in place, have the nested event loop to monitor the slave channel. The source in the main event loop is destroyed and recreated to ensure any pending even for the slave channel that was previously detected is purged. This guarantees that the main loop wont invoke slave_read() based on an event that was already handled by the nested loop. Signed-off-by: Greg Kurz Message-Id: <20210312092212.782255-7-groug@kaod.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Stefan Hajnoczi Commit: d2adda34a9989404a4fc86cb4127a3ea103a7938 https://github.com/qemu/qemu/commit/d2adda34a9989404a4fc86cb4127a3ea103a7938 Author: Wang Liang Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/virtio/virtio-pmem.c Log Message: ----------- virtio-pmem: fix virtio_pmem_resp assign problem ret in virtio_pmem_resp is a uint32_t variable, which should be assigned using virtio_stl_p. The kernel side driver does not guarantee virtio_pmem_resp to be initialized to zero in advance, So sometimes the flush operation will fail. Signed-off-by: Wang Liang Message-Id: <20210317024145.271212-1-wangliangzz@126.com> Reviewed-by: Stefano Garzarella Reviewed-by: David Hildenbrand Reviewed-by: Pankaj Gupta Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 79a2aca20cb4601e6a30bbe8620ee1ef9b960ae1 https://github.com/qemu/qemu/commit/79a2aca20cb4601e6a30bbe8620ee1ef9b960ae1 Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M tests/qtest/bios-tables-test-allowed-diff.h Log Message: ----------- tests: acpi: temporary whitelist DSDT changes Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-2-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: b32bd763a1ca929677e22ae1c51cb3920921bdce https://github.com/qemu/qemu/commit/b32bd763a1ca929677e22ae1c51cb3920921bdce Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/pci.c M hw/acpi/pcihp.c M hw/acpi/piix4.c M hw/acpi/trace-events M hw/i386/acpi-build.c M hw/pci/pci.c M include/hw/acpi/pcihp.h M include/hw/pci/pci.h Log Message: ----------- pci: introduce acpi-index property for PCI device In x86/ACPI world, linux distros are using predictable network interface naming since systemd v197. Which on QEMU based VMs results into path based naming scheme, that names network interfaces based on PCI topology. With itm on has to plug NIC in exactly the same bus/slot, which was used when disk image was first provisioned/configured or one risks to loose network configuration due to NIC being renamed to actually used topology. That also restricts freedom to reshape PCI configuration of VM without need to reconfigure used guest image. systemd also offers "onboard" naming scheme which is preferred over PCI slot/topology one, provided that firmware implements: " PCI Firmware Specification 3.1 4.6.7. DSM for Naming a PCI or PCI Express Device Under Operating Systems " that allows to assign user defined index to PCI device, which systemd will use to name NIC. For example, using -device e1000,acpi-index=100 guest will rename NIC to 'eno100', where 'eno' is default prefix for "onboard" naming scheme. This doesn't require any advance configuration on guest side to com in effect at 'onboard' scheme takes priority over path based naming. Hope is that 'acpi-index' it will be easier to consume by management layer, compared to forcing specific PCI topology and/or having several disk image templates for different topologies and will help to simplify process of spawning VM from the same template without need to reconfigure guest NIC. This patch adds, 'acpi-index'* property and wires up a 32bit register on top of pci hotplug register block to pass index value to AML code at runtime. Following patch will add corresponding _DSM code and wire it up to PCI devices described in ACPI. *) name comes from linux kernel terminology Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-3-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 4fd7da4c0336c8fd822cd808d62f7ff8c9936aef https://github.com/qemu/qemu/commit/4fd7da4c0336c8fd822cd808d62f7ff8c9936aef Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/pcihp.c Log Message: ----------- pci: acpi: ensure that acpi-index is unique it helps to avoid device naming conflicts when guest OS is configured to use acpi-index for naming. Spec ialso says so: PCI Firmware Specification Revision 3.2 4.6.7. _DSM for Naming a PCI or PCI Express Device Under Operating Systems " Instance number must be unique under \_SB scope. This instance number does not have to be sequential in a given system configuration. " Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 910e4069710d854757c8fe8921dcff5b62dcd960 https://github.com/qemu/qemu/commit/910e4069710d854757c8fe8921dcff5b62dcd960 Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/aml-build.c M include/hw/acpi/aml-build.h Log Message: ----------- acpi: add aml_to_decimalstring() and aml_call6() helpers it will be used by follow up patches Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-5-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: b7f23f62e40bb7bc87fe170471a31ab1fb8a0784 https://github.com/qemu/qemu/commit/b7f23f62e40bb7bc87fe170471a31ab1fb8a0784 Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/i386/acpi-build.c M include/hw/acpi/pci.h Log Message: ----------- pci: acpi: add _DSM method to PCI devices Implement _DSM according to: PCI Firmware Specification 3.1 4.6.7. DSM for Naming a PCI or PCI Express Device Under Operating Systems and wire it up to cold and hot-plugged PCI devices. Feature depends on ACPI hotplug being enabled (as that provides PCI devices descriptions in ACPI and MMIO registers that are reused to fetch acpi-index). acpi-index should work for - cold plugged NICs: $QEMU -device e1000,acpi-index=100 => 'eno100' - hot-plugged (monitor) device_add e1000,acpi-index=200,id=remove_me => 'eno200' - re-plugged (monitor) device_del remove_me (monitor) device_add e1000,acpi-index=1 => 'eno1' Windows also sees index under "PCI Label Id" field in properties dialog but otherwise it doesn't seem to have any effect. Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-6-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 835fde4a781f8abf230d567f759647c403944b57 https://github.com/qemu/qemu/commit/835fde4a781f8abf230d567f759647c403944b57 Author: Igor Mammedov Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M tests/data/acpi/pc/DSDT M tests/data/acpi/pc/DSDT.acpihmat M tests/data/acpi/pc/DSDT.bridge M tests/data/acpi/pc/DSDT.cphp M tests/data/acpi/pc/DSDT.dimmpxm M tests/data/acpi/pc/DSDT.hpbridge M tests/data/acpi/pc/DSDT.ipmikcs M tests/data/acpi/pc/DSDT.memhp M tests/data/acpi/pc/DSDT.nohpet M tests/data/acpi/pc/DSDT.numamem M tests/data/acpi/pc/DSDT.roothp M tests/qtest/bios-tables-test-allowed-diff.h Log Message: ----------- tests: acpi: update expected blobs expected changes are: * larger BNMR operation region * new PIDX field and method to fetch acpi-index * PDSM method that implements PCI device _DSM + per device _DSM that calls PDSM @@ -221,10 +221,11 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) B0EJ, 32 } - OperationRegion (BNMR, SystemIO, 0xAE10, 0x04) + OperationRegion (BNMR, SystemIO, 0xAE10, 0x08) Field (BNMR, DWordAcc, NoLock, WriteAsZeros) { - BNUM, 32 + BNUM, 32, + PIDX, 32 } Mutex (BLCK, 0x00) @@ -236,6 +237,52 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Release (BLCK) Return (Zero) } + + Method (AIDX, 2, NotSerialized) + { + Acquire (BLCK, 0xFFFF) + BNUM = Arg0 + PIDX = (One << Arg1) + Local0 = PIDX /* \_SB_.PCI0.PIDX */ + Release (BLCK) + Return (Local0) + } + + Method (PDSM, 6, Serialized) + { + If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) + { + Local0 = AIDX (Arg4, Arg5) + If ((Arg2 == Zero)) + { + If ((Arg1 == 0x02)) + { + If (!((Local0 == Zero) | (Local0 == 0xFFFFFFFF))) + { + Return (Buffer (One) + { + 0x81 // . + }) + } + } + + Return (Buffer (One) + { + 0x00 // . + }) + } + ElseIf ((Arg2 == 0x07)) + { + Local1 = Package (0x02) + { + Zero, + "" + } + Local1 [Zero] = Local0 + Return (Local1) + } + } + } } Scope (_SB) @@ -785,7 +832,7 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) 0xAE00, // Range Minimum 0xAE00, // Range Maximum 0x01, // Alignment - 0x14, // Length + 0x18, // Length ) }) } @@ -842,11 +889,22 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC ", 0x00000001) Device (S00) { Name (_ADR, Zero) // _ADR: Address + Name (_SUN, Zero) // _SUN: Slot User Number + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN)) + } } Device (S10) { Name (_ADR, 0x00020000) // _ADR: Address + Name (_SUN, 0x02) // _SUN: Slot User Number + Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method + { + Return (PDSM (Arg0, Arg1, Arg2, Arg3, BSEL, _SUN)) + } + Method (_S1D, 0, NotSerialized) // _S1D: S1 Device State { Return (Zero) [...] Signed-off-by: Igor Mammedov Message-Id: <20210315180102.3008391-7-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 6c2b24d1d2b19cd330d971cdbc8e6b115dc97ca4 https://github.com/qemu/qemu/commit/6c2b24d1d2b19cd330d971cdbc8e6b115dc97ca4 Author: David Hildenbrand Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/arm/virt-acpi-build.c M hw/i386/acpi-build.c M hw/i386/acpi-microvm.c M include/hw/acpi/aml-build.h Log Message: ----------- acpi: Set proper maximum size for "etc/table-loader" blob The resizeable memory region / RAMBlock that is created for the cmd blob has a maximum size of whole host pages (e.g., 4k), because RAMBlocks work on full host pages. In addition, in i386 ACPI code: acpi_align_size(tables->linker->cmd_blob, ACPI_BUILD_ALIGN_SIZE); makes sure to align to multiples of 4k, padding with 0. For example, if our cmd_blob is created with a size of 2k, the maximum size is 4k - we cannot grow beyond that. Growing might be required due to guest action when rebuilding the tables, but also on incoming migration. This automatic generation of the maximum size used to be sufficient, however, there are cases where we cross host pages now when growing at runtime: we exceed the maximum size of the RAMBlock and can crash QEMU when trying to resize the resizeable memory region / RAMBlock: $ build/qemu-system-x86_64 --enable-kvm \ -machine q35,nvdimm=on \ -smp 1 \ -cpu host \ -m size=2G,slots=8,maxmem=4G \ -object memory-backend-file,id=mem0,mem-path=/tmp/nvdimm,size=256M \ -device nvdimm,label-size=131072,memdev=mem0,id=nvdimm0,slot=1 \ -nodefaults \ -device vmgenid \ -device intel-iommu Results in: Unexpected error in qemu_ram_resize() at ../softmmu/physmem.c:1850: qemu-system-x86_64: Size too large: /rom@etc/table-loader: 0x2000 > 0x1000: Invalid argument In this configuration, we consume exactly 4k (32 entries, 128 bytes each) when creating the VM. However, once the guest boots up and maps the MCFG, we also create the MCFG table and end up consuming 2 additional entries (pointer + checksum) -- which is where we try resizing the memory region / RAMBlock, however, the maximum size does not allow for it. Currently, we get the following maximum sizes for our different mutable tables based on behavior of resizeable RAMBlock: hw table max_size ------- --------------------------------------------------------- virt "etc/acpi/tables" ACPI_BUILD_TABLE_MAX_SIZE (0x200000) virt "etc/table-loader" HOST_PAGE_ALIGN(initial_size) virt "etc/acpi/rsdp" HOST_PAGE_ALIGN(initial_size) i386 "etc/acpi/tables" ACPI_BUILD_TABLE_MAX_SIZE (0x200000) i386 "etc/table-loader" HOST_PAGE_ALIGN(initial_size) i386 "etc/acpi/rsdp" HOST_PAGE_ALIGN(initial_size) microvm "etc/acpi/tables" ACPI_BUILD_TABLE_MAX_SIZE (0x200000) microvm "etc/table-loader" HOST_PAGE_ALIGN(initial_size) microvm "etc/acpi/rsdp" HOST_PAGE_ALIGN(initial_size) Let's set the maximum table size for "etc/table-loader" to 64k, so we can properly grow at runtime, which should be good enough for the future. Migration is not concerned with the maximum size of a RAMBlock, only with the used size - so existing setups are not affected. Of course, we cannot migrate a VM that would have crash when started on older QEMU from new QEMU to older QEMU without failing early on the destination when synchronizing the RAM state: qemu-system-x86_64: Size too large: /rom@etc/table-loader: 0x2000 > 0x1000: Invalid argument qemu-system-x86_64: error while loading state for instance 0x0 of device 'ram' qemu-system-x86_64: load of migration failed: Invalid argument We'll refactor the code next, to make sure we get rid of this implicit behavior for "etc/acpi/rsdp" as well and to make the code easier to grasp. Reviewed-by: Igor Mammedov Cc: Alistair Francis Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Peter Maydell Cc: Shannon Zhao Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Richard Henderson Cc: Laszlo Ersek Signed-off-by: David Hildenbrand Message-Id: <20210304105554.121674-2-david@redhat.com> Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 2a3bdc5cec1a16fb731661d2eac896284f691e1f https://github.com/qemu/qemu/commit/2a3bdc5cec1a16fb731661d2eac896284f691e1f Author: David Hildenbrand Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/i386/acpi-microvm.c Log Message: ----------- microvm: Don't open-code "etc/table-loader" Let's just reuse ACPI_BUILD_LOADER_FILE. Cc: Alistair Francis Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Peter Maydell Cc: Shannon Zhao Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Richard Henderson Cc: Laszlo Ersek Signed-off-by: David Hildenbrand Message-Id: <20210304105554.121674-3-david@redhat.com> Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 6930ba0d44b2f4420948aec5209f665385411f7f https://github.com/qemu/qemu/commit/6930ba0d44b2f4420948aec5209f665385411f7f Author: David Hildenbrand Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/utils.c M hw/arm/virt-acpi-build.c M hw/i386/acpi-build.c M hw/i386/acpi-microvm.c M include/hw/acpi/aml-build.h M include/hw/acpi/utils.h Log Message: ----------- acpi: Move maximum size logic into acpi_add_rom_blob() We want to have safety margins for all tables based on the table type. Let's move the maximum size logic into acpi_add_rom_blob() and make it dependent on the table name, so we don't have to replicate for each and every instance that creates such tables. Suggested-by: Laszlo Ersek Cc: Alistair Francis Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Peter Maydell Cc: Shannon Zhao Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Richard Henderson Cc: Laszlo Ersek Signed-off-by: David Hildenbrand Message-Id: <20210304105554.121674-4-david@redhat.com> Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 50337286b796f3866d1880f6e8a895fa5853b543 https://github.com/qemu/qemu/commit/50337286b796f3866d1880f6e8a895fa5853b543 Author: David Hildenbrand Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/acpi/utils.c Log Message: ----------- acpi: Set proper maximum size for "etc/acpi/rsdp" blob Let's also set a maximum size for "etc/acpi/rsdp", so the maximum size doesn't get implicitly set based on the initial table size. In my experiments, the table size was in the range of 22 bytes, so a single page (== what we used until now) seems to be good enough. Now that we have defined maximum sizes for all currently used table types, let's assert that we catch usage with new tables that need a proper maximum size definition. Also assert that our initial size does not exceed the maximum size; while qemu_ram_alloc_internal() properly asserts that the initial RAMBlock size is <= its maximum size, the result might differ when the host page size is bigger than 4k. Suggested-by: Laszlo Ersek Cc: Alistair Francis Cc: Paolo Bonzini Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Peter Maydell Cc: Shannon Zhao Cc: Marcel Apfelbaum Cc: Paolo Bonzini Cc: Richard Henderson Cc: Laszlo Ersek Signed-off-by: David Hildenbrand Message-Id: <20210304105554.121674-5-david@redhat.com> Reviewed-by: Laszlo Ersek Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: d07b22863b8e0981bdc9384a787a703f1fd4ba42 https://github.com/qemu/qemu/commit/d07b22863b8e0981bdc9384a787a703f1fd4ba42 Author: Marian Postevca Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/i386/acpi-build.c M hw/i386/acpi-microvm.c M hw/i386/microvm.c M hw/i386/pc.c M hw/i386/x86.c M include/hw/i386/microvm.h M include/hw/i386/pc.h M include/hw/i386/x86.h Log Message: ----------- acpi: Move setters/getters of oem fields to X86MachineState The code that sets/gets oem fields is duplicated in both PC and MICROVM variants. This commit moves it to X86MachineState so that all x86 variants can use it and duplication is removed. Signed-off-by: Marian Postevca Message-Id: <20210221001737.24499-2-posteuca@mutex.one> Reviewed-by: Igor Mammedov Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Commit: 97414988490de91673c51e6aa88a9f507e6a1edc https://github.com/qemu/qemu/commit/97414988490de91673c51e6aa88a9f507e6a1edc Author: Peter Maydell Date: 2021-03-23 (Tue, 23 Mar 2021) Changed paths: M hw/acpi/aml-build.c M hw/acpi/pci.c M hw/acpi/pcihp.c M hw/acpi/piix4.c M hw/acpi/trace-events M hw/acpi/utils.c M hw/arm/virt-acpi-build.c M hw/i386/acpi-build.c M hw/i386/acpi-microvm.c M hw/i386/microvm.c M hw/i386/pc.c M hw/i386/x86.c M hw/pci/pci.c M hw/virtio/vhost-user.c M hw/virtio/virtio-mmio.c M hw/virtio/virtio-pmem.c M include/hw/acpi/aml-build.h M include/hw/acpi/pci.h M include/hw/acpi/pcihp.h M include/hw/acpi/utils.h M include/hw/i386/microvm.h M include/hw/i386/pc.h M include/hw/i386/x86.h M include/hw/pci/pci.h M tests/data/acpi/pc/DSDT M tests/data/acpi/pc/DSDT.acpihmat M tests/data/acpi/pc/DSDT.bridge M tests/data/acpi/pc/DSDT.cphp M tests/data/acpi/pc/DSDT.dimmpxm M tests/data/acpi/pc/DSDT.hpbridge M tests/data/acpi/pc/DSDT.ipmikcs M tests/data/acpi/pc/DSDT.memhp M tests/data/acpi/pc/DSDT.nohpet M tests/data/acpi/pc/DSDT.numamem M tests/data/acpi/pc/DSDT.roothp Log Message: ----------- Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,virtio,pci: fixes, features Fixes all over the place. ACPI index support. Signed-off-by: Michael S. Tsirkin # gpg: Signature made Mon 22 Mar 2021 22:58:45 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin " [full] # gpg: aka "Michael S. Tsirkin " [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * remotes/mst/tags/for_upstream: acpi: Move setters/getters of oem fields to X86MachineState acpi: Set proper maximum size for "etc/acpi/rsdp" blob acpi: Move maximum size logic into acpi_add_rom_blob() microvm: Don't open-code "etc/table-loader" acpi: Set proper maximum size for "etc/table-loader" blob tests: acpi: update expected blobs pci: acpi: add _DSM method to PCI devices acpi: add aml_to_decimalstring() and aml_call6() helpers pci: acpi: ensure that acpi-index is unique pci: introduce acpi-index property for PCI device tests: acpi: temporary whitelist DSDT changes virtio-pmem: fix virtio_pmem_resp assign problem vhost-user: Monitor slave channel in vhost_user_read() vhost-user: Introduce nested event loop in vhost_user_read() vhost-user: Convert slave channel to QIOChannelSocket vhost-user: Factor out duplicated slave_fd teardown code vhost-user: Fix double-close on slave_read() error path vhost-user: Drop misleading EAGAIN checks in slave_read() virtio: Fix virtio_mmio_read()/virtio_mmio_write() Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/5ca634afcf83...97414988490d From MAILER-DAEMON Tue Mar 23 11:36:46 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOj5J-0004pU-Nw for mharc-qemu-commits@gnu.org; Tue, 23 Mar 2021 11:36:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34862) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOj5I-0004le-9A for qemu-commits@nongnu.org; Tue, 23 Mar 2021 11:36:44 -0400 Received: from out-25.smtp.github.com ([192.30.252.208]:55267 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOj56-000355-14 for qemu-commits@nongnu.org; Tue, 23 Mar 2021 11:36:43 -0400 Received: from github.com (hubbernetes-node-312c3a1.ash1-iad.github.net [10.56.117.73]) by smtp.github.com (Postfix) with ESMTPA id 58BF98408E8 for ; Tue, 23 Mar 2021 08:36:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616513791; bh=4a1Tm3oj22QN/cTuMREc7rMvciAzRsjovUWayiaYHfA=; h=Date:From:To:Subject:From; b=t7f9iyqUkCijGeCOucd3ORwk5cbfsmXvIJ5VyDN1pEuIs7mXKXJfw0XNoi4WiHr6U lwr590ZHIa64+GdhCfhRDYllQqMOGMRihSZhj5JaJW8zJ9n82JQm2P03a1m58p4TJ0 tDm9SB4nMYxFGY/ymwfDVAcMhebVkAsXRcQcR04U= Date: Tue, 23 Mar 2021 08:36:31 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 5e437d: target/riscv: fix vs() to return proper error code X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 15:36:44 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 5e437d3ccdccfd85f6e69ca60f921be2dab62c3c https://github.com/qemu/qemu/commit/5e437d3ccdccfd85f6e69ca60f921be2dab62c3c Author: Frank Chang Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/csr.c Log Message: ----------- target/riscv: fix vs() to return proper error code vs() should return -RISCV_EXCP_ILLEGAL_INST instead of -1 if rvv feature is not enabled. If -1 is returned, exception will be raised and cs->exception_index will be set to the negative return value. The exception will then be treated as an instruction access fault instead of illegal instruction fault. Signed-off-by: Frank Chang Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-id: 20210223065935.20208-1-frank.chang@sifive.com Signed-off-by: Alistair Francis Commit: 82a4ed8e5014ee814c63be33987e6783d5eacce2 https://github.com/qemu/qemu/commit/82a4ed8e5014ee814c63be33987e6783d5eacce2 Author: Alexander Wagner Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/char/ibex_uart.c M include/hw/char/ibex_uart.h Log Message: ----------- hw/char: disable ibex uart receive if the buffer is full Not disabling the UART leads to QEMU overwriting the UART receive buffer with the newest received byte. The rx_level variable is added to allow the use of the existing OpenTitan driver libraries. Signed-off-by: Alexander Wagner Reviewed-by: Alistair Francis Message-id: 20210309152130.13038-1-alexander.wagner@ulal.de Signed-off-by: Alistair Francis Commit: b297129ae19e26d3cc0e376d2bfc33d76b06d83b https://github.com/qemu/qemu/commit/b297129ae19e26d3cc0e376d2bfc33d76b06d83b Author: Jim Shu Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/cpu_helper.c M target/riscv/pmp.c M target/riscv/pmp.h Log Message: ----------- target/riscv: propagate PMP permission to TLB page Currently, PMP permission checking of TLB page is bypassed if TLB hits Fix it by propagating PMP permission to TLB page permission. PMP permission checking also use MMU-style API to change TLB permission and size. Signed-off-by: Jim Shu Reviewed-by: Alistair Francis Message-id: 1613916082-19528-2-git-send-email-cwshu@andestech.com Signed-off-by: Alistair Francis Commit: 663e119317d77780949830226f5575305405ab75 https://github.com/qemu/qemu/commit/663e119317d77780949830226f5575305405ab75 Author: Jim Shu Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/cpu_helper.c Log Message: ----------- target/riscv: add log of PMP permission checking Like MMU translation, add qemu log of PMP permission checking for debugging. Signed-off-by: Jim Shu Reviewed-by: Alistair Francis Message-id: 1613916082-19528-3-git-send-email-cwshu@andestech.com Signed-off-by: Alistair Francis Commit: 2c2e0f2842520bcd25472285cfce39696e52e662 https://github.com/qemu/qemu/commit/2c2e0f2842520bcd25472285cfce39696e52e662 Author: Jim Shu Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/pmp.c Log Message: ----------- target/riscv: flush TLB pages if PMP permission has been changed If PMP permission of any address has been changed by updating PMP entry, flush all TLB pages to prevent from getting old permission. Signed-off-by: Jim Shu Reviewed-by: Alistair Francis Message-id: 1613916082-19528-4-git-send-email-cwshu@andestech.com Signed-off-by: Alistair Francis Commit: 90ec1cff768fcbe1fa2870d2018f378376f4f744 https://github.com/qemu/qemu/commit/90ec1cff768fcbe1fa2870d2018f378376f4f744 Author: Georg Kotheimer Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/cpu_helper.c Log Message: ----------- target/riscv: Adjust privilege level for HLV(X)/HSV instructions According to the specification the "field SPVP of hstatus controls the privilege level of the access" for the hypervisor virtual-machine load and store instructions HLV, HLVX and HSV. Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Message-id: 20210311103005.1400718-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis Commit: e89b631cf44d590dbd2c250358f4130f64b5d890 https://github.com/qemu/qemu/commit/e89b631cf44d590dbd2c250358f4130f64b5d890 Author: Georg Kotheimer Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/csr.c Log Message: ----------- target/riscv: Make VSTIP and VSEIP read-only in hip Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Message-id: 20210311094902.1377593-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis Commit: db9ab38b81058b41e5f469165067feea46762eee https://github.com/qemu/qemu/commit/db9ab38b81058b41e5f469165067feea46762eee Author: Georg Kotheimer Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/cpu_helper.c Log Message: ----------- target/riscv: Use background registers also for MSTATUS_MPV The current condition for the use of background registers only considers the hypervisor load and store instructions, but not accesses from M mode via MSTATUS_MPRV+MPV. Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Message-id: 20210311103036.1401073-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis Commit: 0489348d0d31f216e925855f3ac37a6fc666aaaf https://github.com/qemu/qemu/commit/0489348d0d31f216e925855f3ac37a6fc666aaaf Author: Asherah Connor Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/riscv/Kconfig M hw/riscv/virt.c M include/hw/riscv/virt.h Log Message: ----------- hw/riscv: Add fw_cfg support to virt Provides fw_cfg for the virt machine on riscv. This enables using e.g. ramfb later. Signed-off-by: Asherah Connor Reviewed-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 20210318235041.17175-2-ashe@kivikakk.ee Signed-off-by: Alistair Francis Commit: c346749ee9d75fcb11bb816d0665ce174425d667 https://github.com/qemu/qemu/commit/c346749ee9d75fcb11bb816d0665ce174425d667 Author: Asherah Connor Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/riscv/virt.c Log Message: ----------- hw/riscv: allow ramfb on virt Allow ramfb on virt. This lets `-device ramfb' work. Signed-off-by: Asherah Connor Reviewed-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 20210318235041.17175-3-ashe@kivikakk.ee Signed-off-by: Alistair Francis Commit: 9d5451e077cd84809bcdf460c39b5f4fec17fc79 https://github.com/qemu/qemu/commit/9d5451e077cd84809bcdf460c39b5f4fec17fc79 Author: Georg Kotheimer Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/csr.c Log Message: ----------- target/riscv: Fix read and write accesses to vsip and vsie The previous implementation was broken in many ways: - Used mideleg instead of hideleg to mask accesses - Used MIP_VSSIP instead of VS_MODE_INTERRUPTS to mask writes to vsie - Did not shift between S bits and VS bits (VSEIP <-> SEIP, ...) Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Message-id: 20210311094738.1376795-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis Commit: ec352d0cab58a7bf66019057d0dfcffd9e7785a8 https://github.com/qemu/qemu/commit/ec352d0cab58a7bf66019057d0dfcffd9e7785a8 Author: Georg Kotheimer Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/cpu.c M target/riscv/cpu.h M target/riscv/cpu_helper.c Log Message: ----------- target/riscv: Add proper two-stage lookup exception detection The current two-stage lookup detection in riscv_cpu_do_interrupt falls short of its purpose, as all it checks is whether two-stage address translation either via the hypervisor-load store instructions or the MPRV feature would be allowed. What we really need instead is whether two-stage address translation was active when the exception was raised. However, in riscv_cpu_do_interrupt we do not have the information to reliably detect this. Therefore, when we raise a memory fault exception we have to record whether two-stage address translation is active. Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Message-id: 20210319141459.1196741-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis Commit: aac8e46e9da6e6ad048d858ecb033c953753f31a https://github.com/qemu/qemu/commit/aac8e46e9da6e6ad048d858ecb033c953753f31a Author: Bin Meng Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/block/m25p80.c Log Message: ----------- hw/block: m25p80: Support fast read for SST flashes Per SST25VF016B datasheet [1], SST flash requires a dummy byte after the address bytes. Note only SPI mode is supported by SST flashes. [1] http://ww1.microchip.com/downloads/en/devicedoc/s71271_04.pdf Signed-off-by: Bin Meng Acked-by: Alistair Francis Message-id: 20210306060152.7250-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis Commit: d6150ace2bccfee6b5f7bb555ca749739b02f687 https://github.com/qemu/qemu/commit/d6150ace2bccfee6b5f7bb555ca749739b02f687 Author: Bin Meng Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/riscv/microchip_pfsoc.c M include/hw/riscv/microchip_pfsoc.h Log Message: ----------- hw/riscv: microchip_pfsoc: Map EMMC/SD mux register Since HSS commit c20a89f8dcac, the Icicle Kit reference design has been updated to use a register mapped at 0x4f000000 instead of a GPIO to control whether eMMC or SD card is to be used. With this support the same HSS image can be used for both eMMC and SD card boot flow, while previously two different board configurations were used. This is undocumented but one can take a look at the HSS code HSS_MMCInit() in services/mmc/mmc_api.c. With this commit, HSS image built from 2020.12 release boots again. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 20210322075248.136255-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis Commit: d4e28f0eb8d6f4de42bf7685eb5d3b70407d5e50 https://github.com/qemu/qemu/commit/d4e28f0eb8d6f4de42bf7685eb5d3b70407d5e50 Author: Bin Meng Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: A docs/system/riscv/microchip-icicle-kit.rst M docs/system/target-riscv.rst Log Message: ----------- docs/system: riscv: Add documentation for 'microchip-icicle-kit' machine This adds the documentation to describe what is supported for the 'microchip-icicle-kit' machine, and how to boot the machine in QEMU. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 20210322075248.136255-2-bmeng.cn@gmail.com Signed-off-by: Alistair Francis Commit: 9a27f69bd668d9d71674407badc412ce1231c7d5 https://github.com/qemu/qemu/commit/9a27f69bd668d9d71674407badc412ce1231c7d5 Author: Georg Kotheimer Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/translate.c Log Message: ----------- target/riscv: Prevent lost illegal instruction exceptions When decode_insn16() fails, we fall back to decode_RV32_64C() for further compressed instruction decoding. However, prior to this change, we did not raise an illegal instruction exception, if decode_RV32_64C() fails to decode the instruction. This means that we skipped illegal compressed instructions instead of raising an illegal instruction exception. Instead of patching decode_RV32_64C(), we can just remove it, as it is dead code since f330433b363 anyway. Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Message-id: 20210322121609.3097928-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis Commit: 9950da284fa5e2ea9ab57d87e05b693fb60c79ce https://github.com/qemu/qemu/commit/9950da284fa5e2ea9ab57d87e05b693fb60c79ce Author: Peter Maydell Date: 2021-03-23 (Tue, 23 Mar 2021) Changed paths: A docs/system/riscv/microchip-icicle-kit.rst M docs/system/target-riscv.rst M hw/block/m25p80.c M hw/char/ibex_uart.c M hw/riscv/Kconfig M hw/riscv/microchip_pfsoc.c M hw/riscv/virt.c M include/hw/char/ibex_uart.h M include/hw/riscv/microchip_pfsoc.h M include/hw/riscv/virt.h M target/riscv/cpu.c M target/riscv/cpu.h M target/riscv/cpu_helper.c M target/riscv/csr.c M target/riscv/pmp.c M target/riscv/pmp.h M target/riscv/translate.c Log Message: ----------- Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210322-2' into staging RISC-V PR for 6.0 This PR includes: - Fix for vector CSR access - Improvements to the Ibex UART device - PMP improvements and bug fixes - Hypervisor extension bug fixes - ramfb support for the virt machine - Fast read support for SST flash - Improvements to the microchip_pfsoc machine # gpg: Signature made Tue 23 Mar 2021 01:56:53 GMT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis " [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20210322-2: target/riscv: Prevent lost illegal instruction exceptions docs/system: riscv: Add documentation for 'microchip-icicle-kit' machine hw/riscv: microchip_pfsoc: Map EMMC/SD mux register hw/block: m25p80: Support fast read for SST flashes target/riscv: Add proper two-stage lookup exception detection target/riscv: Fix read and write accesses to vsip and vsie hw/riscv: allow ramfb on virt hw/riscv: Add fw_cfg support to virt target/riscv: Use background registers also for MSTATUS_MPV target/riscv: Make VSTIP and VSEIP read-only in hip target/riscv: Adjust privilege level for HLV(X)/HSV instructions target/riscv: flush TLB pages if PMP permission has been changed target/riscv: add log of PMP permission checking target/riscv: propagate PMP permission to TLB page hw/char: disable ibex uart receive if the buffer is full target/riscv: fix vs() to return proper error code Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/97414988490d...9950da284fa5 From MAILER-DAEMON Tue Mar 23 12:49:33 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOkDk-0000qu-9J for mharc-qemu-commits@gnu.org; Tue, 23 Mar 2021 12:49:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53526) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOkDf-0000kB-6u for qemu-commits@nongnu.org; Tue, 23 Mar 2021 12:49:28 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:60917) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOkDZ-0000dp-QH for qemu-commits@nongnu.org; Tue, 23 Mar 2021 12:49:26 -0400 Received: from github.com (hubbernetes-node-fb13474.ash1-iad.github.net [10.56.112.53]) by smtp.github.com (Postfix) with ESMTPA id F3E0C9006FD for ; Tue, 23 Mar 2021 09:49:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616518161; bh=kRp0TXklSFpbB1aEb0EZiuLuPmpg8qPhoB+Q7h4pT6g=; h=Date:From:To:Subject:From; b=2eekeCCOo8nQLor2NvFt2OQ1MtNzKS34dDeJwqkIXvLrX2kctCRtUynR1g7dtbSKl tMkI5QbxixM0Lu0vINVyHHl932GNs4fCO6lVX/iBZYqVTlFw+x60lJL/+KW5lgHJkD VCwqlD9sZrfCyCcNrmg0W97VFzYxOxdRhEKdBrm8= Date: Tue, 23 Mar 2021 09:49:20 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 5e437d: target/riscv: fix vs() to return proper error code X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 16:49:28 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 5e437d3ccdccfd85f6e69ca60f921be2dab62c3c https://github.com/qemu/qemu/commit/5e437d3ccdccfd85f6e69ca60f921be2dab62c3c Author: Frank Chang Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/csr.c Log Message: ----------- target/riscv: fix vs() to return proper error code vs() should return -RISCV_EXCP_ILLEGAL_INST instead of -1 if rvv feature is not enabled. If -1 is returned, exception will be raised and cs->exception_index will be set to the negative return value. The exception will then be treated as an instruction access fault instead of illegal instruction fault. Signed-off-by: Frank Chang Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-id: 20210223065935.20208-1-frank.chang@sifive.com Signed-off-by: Alistair Francis Commit: 82a4ed8e5014ee814c63be33987e6783d5eacce2 https://github.com/qemu/qemu/commit/82a4ed8e5014ee814c63be33987e6783d5eacce2 Author: Alexander Wagner Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/char/ibex_uart.c M include/hw/char/ibex_uart.h Log Message: ----------- hw/char: disable ibex uart receive if the buffer is full Not disabling the UART leads to QEMU overwriting the UART receive buffer with the newest received byte. The rx_level variable is added to allow the use of the existing OpenTitan driver libraries. Signed-off-by: Alexander Wagner Reviewed-by: Alistair Francis Message-id: 20210309152130.13038-1-alexander.wagner@ulal.de Signed-off-by: Alistair Francis Commit: b297129ae19e26d3cc0e376d2bfc33d76b06d83b https://github.com/qemu/qemu/commit/b297129ae19e26d3cc0e376d2bfc33d76b06d83b Author: Jim Shu Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/cpu_helper.c M target/riscv/pmp.c M target/riscv/pmp.h Log Message: ----------- target/riscv: propagate PMP permission to TLB page Currently, PMP permission checking of TLB page is bypassed if TLB hits Fix it by propagating PMP permission to TLB page permission. PMP permission checking also use MMU-style API to change TLB permission and size. Signed-off-by: Jim Shu Reviewed-by: Alistair Francis Message-id: 1613916082-19528-2-git-send-email-cwshu@andestech.com Signed-off-by: Alistair Francis Commit: 663e119317d77780949830226f5575305405ab75 https://github.com/qemu/qemu/commit/663e119317d77780949830226f5575305405ab75 Author: Jim Shu Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/cpu_helper.c Log Message: ----------- target/riscv: add log of PMP permission checking Like MMU translation, add qemu log of PMP permission checking for debugging. Signed-off-by: Jim Shu Reviewed-by: Alistair Francis Message-id: 1613916082-19528-3-git-send-email-cwshu@andestech.com Signed-off-by: Alistair Francis Commit: 2c2e0f2842520bcd25472285cfce39696e52e662 https://github.com/qemu/qemu/commit/2c2e0f2842520bcd25472285cfce39696e52e662 Author: Jim Shu Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/pmp.c Log Message: ----------- target/riscv: flush TLB pages if PMP permission has been changed If PMP permission of any address has been changed by updating PMP entry, flush all TLB pages to prevent from getting old permission. Signed-off-by: Jim Shu Reviewed-by: Alistair Francis Message-id: 1613916082-19528-4-git-send-email-cwshu@andestech.com Signed-off-by: Alistair Francis Commit: 90ec1cff768fcbe1fa2870d2018f378376f4f744 https://github.com/qemu/qemu/commit/90ec1cff768fcbe1fa2870d2018f378376f4f744 Author: Georg Kotheimer Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/cpu_helper.c Log Message: ----------- target/riscv: Adjust privilege level for HLV(X)/HSV instructions According to the specification the "field SPVP of hstatus controls the privilege level of the access" for the hypervisor virtual-machine load and store instructions HLV, HLVX and HSV. Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Message-id: 20210311103005.1400718-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis Commit: e89b631cf44d590dbd2c250358f4130f64b5d890 https://github.com/qemu/qemu/commit/e89b631cf44d590dbd2c250358f4130f64b5d890 Author: Georg Kotheimer Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/csr.c Log Message: ----------- target/riscv: Make VSTIP and VSEIP read-only in hip Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Message-id: 20210311094902.1377593-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis Commit: db9ab38b81058b41e5f469165067feea46762eee https://github.com/qemu/qemu/commit/db9ab38b81058b41e5f469165067feea46762eee Author: Georg Kotheimer Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/cpu_helper.c Log Message: ----------- target/riscv: Use background registers also for MSTATUS_MPV The current condition for the use of background registers only considers the hypervisor load and store instructions, but not accesses from M mode via MSTATUS_MPRV+MPV. Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Message-id: 20210311103036.1401073-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis Commit: 0489348d0d31f216e925855f3ac37a6fc666aaaf https://github.com/qemu/qemu/commit/0489348d0d31f216e925855f3ac37a6fc666aaaf Author: Asherah Connor Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/riscv/Kconfig M hw/riscv/virt.c M include/hw/riscv/virt.h Log Message: ----------- hw/riscv: Add fw_cfg support to virt Provides fw_cfg for the virt machine on riscv. This enables using e.g. ramfb later. Signed-off-by: Asherah Connor Reviewed-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 20210318235041.17175-2-ashe@kivikakk.ee Signed-off-by: Alistair Francis Commit: c346749ee9d75fcb11bb816d0665ce174425d667 https://github.com/qemu/qemu/commit/c346749ee9d75fcb11bb816d0665ce174425d667 Author: Asherah Connor Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/riscv/virt.c Log Message: ----------- hw/riscv: allow ramfb on virt Allow ramfb on virt. This lets `-device ramfb' work. Signed-off-by: Asherah Connor Reviewed-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 20210318235041.17175-3-ashe@kivikakk.ee Signed-off-by: Alistair Francis Commit: 9d5451e077cd84809bcdf460c39b5f4fec17fc79 https://github.com/qemu/qemu/commit/9d5451e077cd84809bcdf460c39b5f4fec17fc79 Author: Georg Kotheimer Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/csr.c Log Message: ----------- target/riscv: Fix read and write accesses to vsip and vsie The previous implementation was broken in many ways: - Used mideleg instead of hideleg to mask accesses - Used MIP_VSSIP instead of VS_MODE_INTERRUPTS to mask writes to vsie - Did not shift between S bits and VS bits (VSEIP <-> SEIP, ...) Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Message-id: 20210311094738.1376795-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis Commit: ec352d0cab58a7bf66019057d0dfcffd9e7785a8 https://github.com/qemu/qemu/commit/ec352d0cab58a7bf66019057d0dfcffd9e7785a8 Author: Georg Kotheimer Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/cpu.c M target/riscv/cpu.h M target/riscv/cpu_helper.c Log Message: ----------- target/riscv: Add proper two-stage lookup exception detection The current two-stage lookup detection in riscv_cpu_do_interrupt falls short of its purpose, as all it checks is whether two-stage address translation either via the hypervisor-load store instructions or the MPRV feature would be allowed. What we really need instead is whether two-stage address translation was active when the exception was raised. However, in riscv_cpu_do_interrupt we do not have the information to reliably detect this. Therefore, when we raise a memory fault exception we have to record whether two-stage address translation is active. Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Message-id: 20210319141459.1196741-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis Commit: aac8e46e9da6e6ad048d858ecb033c953753f31a https://github.com/qemu/qemu/commit/aac8e46e9da6e6ad048d858ecb033c953753f31a Author: Bin Meng Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/block/m25p80.c Log Message: ----------- hw/block: m25p80: Support fast read for SST flashes Per SST25VF016B datasheet [1], SST flash requires a dummy byte after the address bytes. Note only SPI mode is supported by SST flashes. [1] http://ww1.microchip.com/downloads/en/devicedoc/s71271_04.pdf Signed-off-by: Bin Meng Acked-by: Alistair Francis Message-id: 20210306060152.7250-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis Commit: d6150ace2bccfee6b5f7bb555ca749739b02f687 https://github.com/qemu/qemu/commit/d6150ace2bccfee6b5f7bb555ca749739b02f687 Author: Bin Meng Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M hw/riscv/microchip_pfsoc.c M include/hw/riscv/microchip_pfsoc.h Log Message: ----------- hw/riscv: microchip_pfsoc: Map EMMC/SD mux register Since HSS commit c20a89f8dcac, the Icicle Kit reference design has been updated to use a register mapped at 0x4f000000 instead of a GPIO to control whether eMMC or SD card is to be used. With this support the same HSS image can be used for both eMMC and SD card boot flow, while previously two different board configurations were used. This is undocumented but one can take a look at the HSS code HSS_MMCInit() in services/mmc/mmc_api.c. With this commit, HSS image built from 2020.12 release boots again. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 20210322075248.136255-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis Commit: d4e28f0eb8d6f4de42bf7685eb5d3b70407d5e50 https://github.com/qemu/qemu/commit/d4e28f0eb8d6f4de42bf7685eb5d3b70407d5e50 Author: Bin Meng Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: A docs/system/riscv/microchip-icicle-kit.rst M docs/system/target-riscv.rst Log Message: ----------- docs/system: riscv: Add documentation for 'microchip-icicle-kit' machine This adds the documentation to describe what is supported for the 'microchip-icicle-kit' machine, and how to boot the machine in QEMU. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 20210322075248.136255-2-bmeng.cn@gmail.com Signed-off-by: Alistair Francis Commit: 9a27f69bd668d9d71674407badc412ce1231c7d5 https://github.com/qemu/qemu/commit/9a27f69bd668d9d71674407badc412ce1231c7d5 Author: Georg Kotheimer Date: 2021-03-22 (Mon, 22 Mar 2021) Changed paths: M target/riscv/translate.c Log Message: ----------- target/riscv: Prevent lost illegal instruction exceptions When decode_insn16() fails, we fall back to decode_RV32_64C() for further compressed instruction decoding. However, prior to this change, we did not raise an illegal instruction exception, if decode_RV32_64C() fails to decode the instruction. This means that we skipped illegal compressed instructions instead of raising an illegal instruction exception. Instead of patching decode_RV32_64C(), we can just remove it, as it is dead code since f330433b363 anyway. Signed-off-by: Georg Kotheimer Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Message-id: 20210322121609.3097928-1-georg.kotheimer@kernkonzept.com Signed-off-by: Alistair Francis Commit: 9950da284fa5e2ea9ab57d87e05b693fb60c79ce https://github.com/qemu/qemu/commit/9950da284fa5e2ea9ab57d87e05b693fb60c79ce Author: Peter Maydell Date: 2021-03-23 (Tue, 23 Mar 2021) Changed paths: A docs/system/riscv/microchip-icicle-kit.rst M docs/system/target-riscv.rst M hw/block/m25p80.c M hw/char/ibex_uart.c M hw/riscv/Kconfig M hw/riscv/microchip_pfsoc.c M hw/riscv/virt.c M include/hw/char/ibex_uart.h M include/hw/riscv/microchip_pfsoc.h M include/hw/riscv/virt.h M target/riscv/cpu.c M target/riscv/cpu.h M target/riscv/cpu_helper.c M target/riscv/csr.c M target/riscv/pmp.c M target/riscv/pmp.h M target/riscv/translate.c Log Message: ----------- Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210322-2' into staging RISC-V PR for 6.0 This PR includes: - Fix for vector CSR access - Improvements to the Ibex UART device - PMP improvements and bug fixes - Hypervisor extension bug fixes - ramfb support for the virt machine - Fast read support for SST flash - Improvements to the microchip_pfsoc machine # gpg: Signature made Tue 23 Mar 2021 01:56:53 GMT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis " [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20210322-2: target/riscv: Prevent lost illegal instruction exceptions docs/system: riscv: Add documentation for 'microchip-icicle-kit' machine hw/riscv: microchip_pfsoc: Map EMMC/SD mux register hw/block: m25p80: Support fast read for SST flashes target/riscv: Add proper two-stage lookup exception detection target/riscv: Fix read and write accesses to vsip and vsie hw/riscv: allow ramfb on virt hw/riscv: Add fw_cfg support to virt target/riscv: Use background registers also for MSTATUS_MPV target/riscv: Make VSTIP and VSEIP read-only in hip target/riscv: Adjust privilege level for HLV(X)/HSV instructions target/riscv: flush TLB pages if PMP permission has been changed target/riscv: add log of PMP permission checking target/riscv: propagate PMP permission to TLB page hw/char: disable ibex uart receive if the buffer is full target/riscv: fix vs() to return proper error code Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/97414988490d...9950da284fa5 From MAILER-DAEMON Tue Mar 23 12:55:40 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOkJf-0001nj-WE for mharc-qemu-commits@gnu.org; Tue, 23 Mar 2021 12:55:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54632) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOkJX-0001gv-H6 for qemu-commits@nongnu.org; Tue, 23 Mar 2021 12:55:32 -0400 Received: from out-18.smtp.github.com ([192.30.252.201]:45285 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOkJV-0003q3-B1 for qemu-commits@nongnu.org; Tue, 23 Mar 2021 12:55:31 -0400 Received: from github.com (hubbernetes-node-e6573fc.va3-iad.github.net [10.48.109.21]) by smtp.github.com (Postfix) with ESMTPA id D1585341045 for ; Tue, 23 Mar 2021 09:55:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616518511; bh=0gKH7p2hAXxGd6jZt5KUGXExui9uh66eoqN3HYOpPcM=; h=Date:From:To:Subject:From; b=sLecLYkev26QFkz+6/nEQmHhaL7BtUU0txuZ32IYxAjxd3cGOjYf7Wr07/mhv6NR2 RdJWhPm/izBpTDBTlBQPFRFSxr69cspQM3itDDfHbnalBVy+uux/ApKR4XzzII/aZB QO1np1rfyNusHJvhZ1Z+6igMfLGGoEJRY8dNC8PI= Date: Tue, 23 Mar 2021 09:55:11 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] b807ca: xen-block: Fix removal of backend instance via xen... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 16:55:32 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: b807ca3fa0ca29ec015adcf4045e716337cd3635 https://github.com/qemu/qemu/commit/b807ca3fa0ca29ec015adcf4045e716337cd3635 Author: Anthony PERARD Date: 2021-03-23 (Tue, 23 Mar 2021) Changed paths: M hw/block/xen-block.c Log Message: ----------- xen-block: Fix removal of backend instance via xenstore Whenever a Xen block device is detach via xenstore, the image associated with it remained open by the backend QEMU and an error is logged: qemu-system-i386: failed to destroy drive: Node xvdz-qcow2 is in use This happened since object_unparent() doesn't immediately frees the object and thus keep a reference to the node we are trying to free. The reference is hold by the "drive" property and the call xen_block_drive_destroy() fails. In order to fix that, we call drain_call_rcu() to run the callback setup by bus_remove_child() via object_unparent(). Fixes: 2d24a6466154 ("device-core: use RCU for list of children of a bus") Signed-off-by: Anthony PERARD Reviewed-by: Paul Durrant Message-Id: <20210308143232.83388-1-anthony.perard@citrix.com> Commit: ae3845efb306819f4c2693f64ed761c4ce5cd8e9 https://github.com/qemu/qemu/commit/ae3845efb306819f4c2693f64ed761c4ce5cd8e9 Author: Peter Maydell Date: 2021-03-23 (Tue, 23 Mar 2021) Changed paths: M hw/block/xen-block.c Log Message: ----------- Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20210323' into staging Xen patch - Fix Xen backend block detach via xenstore. # gpg: Signature made Tue 23 Mar 2021 11:53:08 GMT # gpg: using RSA key F80C006308E22CFD8A92E7980CF5572FD7FB55AF # gpg: Good signature from "Anthony PERARD " [marginal] # gpg: aka "Anthony PERARD " [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 5379 2F71 024C 600F 778A 7161 D8D5 7199 DF83 42C8 # Subkey fingerprint: F80C 0063 08E2 2CFD 8A92 E798 0CF5 572F D7FB 55AF * remotes/aperard/tags/pull-xen-20210323: xen-block: Fix removal of backend instance via xenstore Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/9950da284fa5...ae3845efb306 From MAILER-DAEMON Tue Mar 23 17:14:38 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOoMH-0007N1-VF for mharc-qemu-commits@gnu.org; Tue, 23 Mar 2021 17:14:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:37708) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOoMG-0007LG-82 for qemu-commits@nongnu.org; Tue, 23 Mar 2021 17:14:36 -0400 Received: from out-24.smtp.github.com ([192.30.252.207]:47941) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOoMA-0000lS-Tr for qemu-commits@nongnu.org; Tue, 23 Mar 2021 17:14:35 -0400 Received: from github.com (hubbernetes-node-3dade23.ac4-iad.github.net [10.52.205.29]) by smtp.github.com (Postfix) with ESMTPA id 25D28600159 for ; Tue, 23 Mar 2021 14:14:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616534070; bh=tLfhG45OQ1i4IGRsBbphbsrI6OiNUrbt919eA4ECWFE=; h=Date:From:To:Subject:From; b=enSlUlvTtPrpIDacIlG/L8z7YLruG3x01CQ+aiZ47t2e7l5n5Xmye5MYbDv7crcFd 3tFaQkhUKefi4SZILpk7iy+brbNoevZG3KbOLgyW8Pk21kM8OfeSxMC3Qq9ZdVKAXw S6603gep7cfnPzYjpDO30wyt/Lmj03xzyPJCbX5E= Date: Tue, 23 Mar 2021 14:14:30 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] b807ca: xen-block: Fix removal of backend instance via xen... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 21:14:36 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: b807ca3fa0ca29ec015adcf4045e716337cd3635 https://github.com/qemu/qemu/commit/b807ca3fa0ca29ec015adcf4045e716337cd3635 Author: Anthony PERARD Date: 2021-03-23 (Tue, 23 Mar 2021) Changed paths: M hw/block/xen-block.c Log Message: ----------- xen-block: Fix removal of backend instance via xenstore Whenever a Xen block device is detach via xenstore, the image associated with it remained open by the backend QEMU and an error is logged: qemu-system-i386: failed to destroy drive: Node xvdz-qcow2 is in use This happened since object_unparent() doesn't immediately frees the object and thus keep a reference to the node we are trying to free. The reference is hold by the "drive" property and the call xen_block_drive_destroy() fails. In order to fix that, we call drain_call_rcu() to run the callback setup by bus_remove_child() via object_unparent(). Fixes: 2d24a6466154 ("device-core: use RCU for list of children of a bus") Signed-off-by: Anthony PERARD Reviewed-by: Paul Durrant Message-Id: <20210308143232.83388-1-anthony.perard@citrix.com> Commit: ae3845efb306819f4c2693f64ed761c4ce5cd8e9 https://github.com/qemu/qemu/commit/ae3845efb306819f4c2693f64ed761c4ce5cd8e9 Author: Peter Maydell Date: 2021-03-23 (Tue, 23 Mar 2021) Changed paths: M hw/block/xen-block.c Log Message: ----------- Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20210323' into staging Xen patch - Fix Xen backend block detach via xenstore. # gpg: Signature made Tue 23 Mar 2021 11:53:08 GMT # gpg: using RSA key F80C006308E22CFD8A92E7980CF5572FD7FB55AF # gpg: Good signature from "Anthony PERARD " [marginal] # gpg: aka "Anthony PERARD " [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 5379 2F71 024C 600F 778A 7161 D8D5 7199 DF83 42C8 # Subkey fingerprint: F80C 0063 08E2 2CFD 8A92 E798 0CF5 572F D7FB 55AF * remotes/aperard/tags/pull-xen-20210323: xen-block: Fix removal of backend instance via xenstore Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/9950da284fa5...ae3845efb306 From MAILER-DAEMON Tue Mar 23 17:21:07 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOoSV-0006SD-QP for mharc-qemu-commits@gnu.org; Tue, 23 Mar 2021 17:21:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39526) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOoSQ-0006PD-DF for qemu-commits@nongnu.org; Tue, 23 Mar 2021 17:20:59 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:39697 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOoSN-0003Z1-6Y for qemu-commits@nongnu.org; Tue, 23 Mar 2021 17:20:57 -0400 Received: from github.com (hubbernetes-node-3a60f09.va3-iad.github.net [10.48.113.73]) by smtp.github.com (Postfix) with ESMTPA id 4B3085C0227 for ; Tue, 23 Mar 2021 14:20:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616534454; bh=oQUeodFAP55UrunE8VUA6jb5PG4trxqj8t+dt8II5zw=; h=Date:From:To:Subject:From; b=Z2eepWFgBJjsZAqeJWAaV1NEORKufZ9zNl7LHndfolpmmFnofCasucIyBY1LnPZHv lG5mS0QoYLPnHm/yuCZuhTIiCpUM1V8UQwEDrLasBjqHCAmEA1cAUisfUW4Vwi2RDl kqO3b34560uOwTUgw1wLsTKueDpB40RwTmNlao9o= Date: Tue, 23 Mar 2021 14:20:54 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] e6fa97: hw/arm/virt: Disable pl011 clock migration if needed X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 21:20:59 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: e6fa978d8343ec7cf20b9c8b2dcb390646242457=0D https://github.com/qemu/qemu/commit/e6fa978d8343ec7cf20b9c8b2dcb390= 646242457=0D Author: Gavin Shan =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M hw/char/pl011.c=0D M hw/core/machine.c=0D M include/hw/char/pl011.h=0D =0D Log Message:=0D -----------=0D hw/arm/virt: Disable pl011 clock migration if needed=0D =0D A clock is added by commit aac63e0e6ea3 ("hw/char/pl011: add a clock=0D input") since v5.2.0 which corresponds to virt-5.2 machine type. It=0D causes backwards migration failure from upstream to downstream (v5.1.0)=0D= when the machine type is specified with virt-5.1.=0D =0D This fixes the issue by following instructions from section "Connecting=0D= subsections to properties" in docs/devel/migration.rst. With this applied= ,=0D the PL011 clock is migrated based on the machine type.=0D =0D virt-5.2 or newer: migration=0D virt-5.1 or older: non-migration=0D =0D Cc: qemu-stable@nongnu.org # v5.2.0+=0D Fixes: aac63e0e6ea3 ("hw/char/pl011: add a clock input")=0D Suggested-by: Andrew Jones =0D Signed-off-by: Gavin Shan =0D Reviewed-by: Andrew Jones =0D Message-id: 20210318023801.18287-1-gshan@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: d1e8cf77f1739018b792ddc6b377b509fbf8e7c8=0D https://github.com/qemu/qemu/commit/d1e8cf77f1739018b792ddc6b377b50= 9fbf8e7c8=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M include/exec/memory.h=0D M tests/qtest/fuzz/generic_fuzz.c=0D =0D Log Message:=0D -----------=0D memory: Make flatview_cb return bool, not int=0D =0D The return value of the flatview_cb callback passed to the=0D flatview_for_each_range() function is zero if the iteration through=0D the ranges should continue, or non-zero to break out of it. Use a=0D bool for this rather than int.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210318174823.18066-2-peter.maydell@linaro.org=0D =0D =0D Commit: a5e32ec1ed6353b853ec0b7874fd59eedc83c5ea=0D https://github.com/qemu/qemu/commit/a5e32ec1ed6353b853ec0b7874fd59e= edc83c5ea=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M include/exec/memory.h=0D =0D Log Message:=0D -----------=0D memory: Document flatview_for_each_range()=0D =0D Add a documentation comment describing flatview_for_each_range().=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210318174823.18066-3-peter.maydell@linaro.org=0D =0D =0D Commit: b3566001d4d4c3f4626442584556bd18b0e7243b=0D https://github.com/qemu/qemu/commit/b3566001d4d4c3f4626442584556bd1= 8b0e7243b=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M include/exec/memory.h=0D M softmmu/memory.c=0D M tests/qtest/fuzz/generic_fuzz.c=0D =0D Log Message:=0D -----------=0D memory: Add offset_in_region to flatview_cb arguments=0D =0D The function flatview_for_each_range() calls a callback for each=0D range in a FlatView. Currently the callback gets the start and=0D length of the range and the MemoryRegion involved, but not the offset=0D within the MemoryRegion. Add this to the callback's arguments; we're=0D going to want it for a new use in the next commit.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210318174823.18066-4-peter.maydell@linaro.org=0D =0D =0D Commit: 1228c4596a0046b3e4e71f62773caa835dfc79df=0D https://github.com/qemu/qemu/commit/1228c4596a0046b3e4e71f62773caa8= 35dfc79df=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M hw/core/loader.c=0D M include/hw/loader.h=0D =0D Log Message:=0D -----------=0D hw/core/loader: Add new function rom_ptr_for_as()=0D =0D For accesses to rom blob data before or during reset, we have a=0D function rom_ptr() which looks for a rom blob that would be loaded to=0D the specified address, and returns a pointer into the rom blob data=0D corresponding to that address. This allows board or CPU code to say=0D "what is the data that is going to be loaded to this address?".=0D =0D However, this function does not take account of memory region=0D aliases. If for instance a machine model has RAM at address=0D 0x0000_0000 which is aliased to also appear at 0x1000_0000, a=0D rom_ptr() query for address 0x0000_0000 will only return a match if=0D the guest image provided by the user was loaded at 0x0000_0000 and=0D not if it was loaded at 0x1000_0000, even though they are the same=0D RAM and a run-time guest CPU read of 0x0000_0000 will read the data=0D loaded to 0x1000_0000.=0D =0D Provide a new function rom_ptr_for_as() which takes an AddressSpace=0D argument, so that it can check whether the MemoryRegion corresponding=0D to the address is also mapped anywhere else in the AddressSpace and=0D look for rom blobs that loaded to that alias.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210318174823.18066-5-peter.maydell@linaro.org=0D =0D =0D Commit: 75ce72b785a7c9fcb9af2779854142a34825da59=0D https://github.com/qemu/qemu/commit/75ce72b785a7c9fcb9af2779854142a= 34825da59=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.c=0D =0D Log Message:=0D -----------=0D target/arm: Make M-profile VTOR loads on reset handle memory aliasing=0D= =0D For Arm M-profile CPUs, on reset the CPU must load its initial PC and=0D SP from a vector table in guest memory. Because we can't guarantee=0D reset ordering, we have to handle the possibility that the ROM blob=0D loader's reset function has not yet run when the CPU resets, in which=0D case the data in an ELF file specified by the user won't be in guest=0D memory to be read yet.=0D =0D We work around the reset ordering problem by checking whether the ROM=0D blob loader has any data for the address where the vector table is,=0D using rom_ptr(). Unfortunately this does not handle the possibility=0D of memory aliasing. For many M-profile boards, memory can be=0D accessed via multiple possible physical addresses; if the board has=0D the vector table at address X but the user's ELF file loads data via=0D a different address Y which is an alias to the same underlying guest=0D RAM then rom_ptr() will not find it.=0D =0D Use the new rom_ptr_for_as() function, which deals with memory=0D aliasing when locating a relevant ROM blob.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210318174823.18066-6-peter.maydell@linaro.org=0D =0D =0D Commit: dad90de78e9e9d47cefcbcd30115706b98e6ec87=0D https://github.com/qemu/qemu/commit/dad90de78e9e9d47cefcbcd30115706= b98e6ec87=0D Author: Richard Henderson =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M target/arm/tlb_helper.c=0D =0D Log Message:=0D -----------=0D target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill=0D =0D Pretend the fault always happens at page table level 3.=0D =0D Failure to set this leaves level =3D 0, which is impossible for=0D ARMFault_Permission, and produces an invalid syndrome, which=0D reaches g_assert_not_reached in cpu_loop.=0D =0D Fixes: 8db94ab4e5db ("linux-user/aarch64: Pass syndrome to EXC_*_ABORT")=0D= Reported-by: Laurent Vivier =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Peter Maydell =0D Message-id: 20210320000606.1788699-1-richard.henderson@linaro.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 1a4d83b5643e8e965cbc16950f78066a7cd27cb4=0D https://github.com/qemu/qemu/commit/1a4d83b5643e8e965cbc16950f78066= a7cd27cb4=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M hw/char/pl011.c=0D M hw/core/loader.c=0D M hw/core/machine.c=0D M include/exec/memory.h=0D M include/hw/char/pl011.h=0D M include/hw/loader.h=0D M softmmu/memory.c=0D M target/arm/cpu.c=0D M target/arm/tlb_helper.c=0D M tests/qtest/fuzz/generic_fuzz.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10323' into staging=0D =0D target-arm queue:=0D * hw/arm/virt: Disable pl011 clock migration if needed=0D * target/arm: Make M-profile VTOR loads on reset handle memory aliasing=0D= * target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill=0D= =0D # gpg: Signature made Tue 23 Mar 2021 14:26:09 GMT=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210323:=0D target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill=0D target/arm: Make M-profile VTOR loads on reset handle memory aliasing=0D= hw/core/loader: Add new function rom_ptr_for_as()=0D memory: Add offset_in_region to flatview_cb arguments=0D memory: Document flatview_for_each_range()=0D memory: Make flatview_cb return bool, not int=0D hw/arm/virt: Disable pl011 clock migration if needed=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/ae3845efb306...1a4d83b5643e= =0D From MAILER-DAEMON Tue Mar 23 18:28:57 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOpWD-0002V8-NX for mharc-qemu-commits@gnu.org; Tue, 23 Mar 2021 18:28:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55998) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOpWB-0002PG-20 for qemu-commits@nongnu.org; Tue, 23 Mar 2021 18:28:55 -0400 Received: from out-25.smtp.github.com ([192.30.252.208]:38199 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOpW6-00004t-V8 for qemu-commits@nongnu.org; Tue, 23 Mar 2021 18:28:54 -0400 Received: from github.com (hubbernetes-node-1fb1e72.ash1-iad.github.net [10.56.111.39]) by smtp.github.com (Postfix) with ESMTPA id 41D5D8404F9 for ; Tue, 23 Mar 2021 15:28:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616538530; bh=WeWIe8XLADFNXX3CpuVYppXvSAAYOqF8YMmUwKXj4ls=; h=Date:From:To:Subject:From; b=CC1eGO1WguFF2coLnpfc3tl2ehmcn2zi66z+9ibej7hQ/DEyaNzsohgxJObzX0Du3 EFl2tD1ZJKQRBIxZeWEkMOR92vNPeszmX1RZ0j8k7ESDTQgn5FJe5vjMhx+xz6HV00 ay7xw0834PVepLhQkx5eCcjJCJiym5+oVjCdWtog= Date: Tue, 23 Mar 2021 15:28:50 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] e6fa97: hw/arm/virt: Disable pl011 clock migration if needed X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 22:28:56 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: e6fa978d8343ec7cf20b9c8b2dcb390646242457=0D https://github.com/qemu/qemu/commit/e6fa978d8343ec7cf20b9c8b2dcb390= 646242457=0D Author: Gavin Shan =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M hw/char/pl011.c=0D M hw/core/machine.c=0D M include/hw/char/pl011.h=0D =0D Log Message:=0D -----------=0D hw/arm/virt: Disable pl011 clock migration if needed=0D =0D A clock is added by commit aac63e0e6ea3 ("hw/char/pl011: add a clock=0D input") since v5.2.0 which corresponds to virt-5.2 machine type. It=0D causes backwards migration failure from upstream to downstream (v5.1.0)=0D= when the machine type is specified with virt-5.1.=0D =0D This fixes the issue by following instructions from section "Connecting=0D= subsections to properties" in docs/devel/migration.rst. With this applied= ,=0D the PL011 clock is migrated based on the machine type.=0D =0D virt-5.2 or newer: migration=0D virt-5.1 or older: non-migration=0D =0D Cc: qemu-stable@nongnu.org # v5.2.0+=0D Fixes: aac63e0e6ea3 ("hw/char/pl011: add a clock input")=0D Suggested-by: Andrew Jones =0D Signed-off-by: Gavin Shan =0D Reviewed-by: Andrew Jones =0D Message-id: 20210318023801.18287-1-gshan@redhat.com=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: d1e8cf77f1739018b792ddc6b377b509fbf8e7c8=0D https://github.com/qemu/qemu/commit/d1e8cf77f1739018b792ddc6b377b50= 9fbf8e7c8=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M include/exec/memory.h=0D M tests/qtest/fuzz/generic_fuzz.c=0D =0D Log Message:=0D -----------=0D memory: Make flatview_cb return bool, not int=0D =0D The return value of the flatview_cb callback passed to the=0D flatview_for_each_range() function is zero if the iteration through=0D the ranges should continue, or non-zero to break out of it. Use a=0D bool for this rather than int.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210318174823.18066-2-peter.maydell@linaro.org=0D =0D =0D Commit: a5e32ec1ed6353b853ec0b7874fd59eedc83c5ea=0D https://github.com/qemu/qemu/commit/a5e32ec1ed6353b853ec0b7874fd59e= edc83c5ea=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M include/exec/memory.h=0D =0D Log Message:=0D -----------=0D memory: Document flatview_for_each_range()=0D =0D Add a documentation comment describing flatview_for_each_range().=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210318174823.18066-3-peter.maydell@linaro.org=0D =0D =0D Commit: b3566001d4d4c3f4626442584556bd18b0e7243b=0D https://github.com/qemu/qemu/commit/b3566001d4d4c3f4626442584556bd1= 8b0e7243b=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M include/exec/memory.h=0D M softmmu/memory.c=0D M tests/qtest/fuzz/generic_fuzz.c=0D =0D Log Message:=0D -----------=0D memory: Add offset_in_region to flatview_cb arguments=0D =0D The function flatview_for_each_range() calls a callback for each=0D range in a FlatView. Currently the callback gets the start and=0D length of the range and the MemoryRegion involved, but not the offset=0D within the MemoryRegion. Add this to the callback's arguments; we're=0D going to want it for a new use in the next commit.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210318174823.18066-4-peter.maydell@linaro.org=0D =0D =0D Commit: 1228c4596a0046b3e4e71f62773caa835dfc79df=0D https://github.com/qemu/qemu/commit/1228c4596a0046b3e4e71f62773caa8= 35dfc79df=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M hw/core/loader.c=0D M include/hw/loader.h=0D =0D Log Message:=0D -----------=0D hw/core/loader: Add new function rom_ptr_for_as()=0D =0D For accesses to rom blob data before or during reset, we have a=0D function rom_ptr() which looks for a rom blob that would be loaded to=0D the specified address, and returns a pointer into the rom blob data=0D corresponding to that address. This allows board or CPU code to say=0D "what is the data that is going to be loaded to this address?".=0D =0D However, this function does not take account of memory region=0D aliases. If for instance a machine model has RAM at address=0D 0x0000_0000 which is aliased to also appear at 0x1000_0000, a=0D rom_ptr() query for address 0x0000_0000 will only return a match if=0D the guest image provided by the user was loaded at 0x0000_0000 and=0D not if it was loaded at 0x1000_0000, even though they are the same=0D RAM and a run-time guest CPU read of 0x0000_0000 will read the data=0D loaded to 0x1000_0000.=0D =0D Provide a new function rom_ptr_for_as() which takes an AddressSpace=0D argument, so that it can check whether the MemoryRegion corresponding=0D to the address is also mapped anywhere else in the AddressSpace and=0D look for rom blobs that loaded to that alias.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210318174823.18066-5-peter.maydell@linaro.org=0D =0D =0D Commit: 75ce72b785a7c9fcb9af2779854142a34825da59=0D https://github.com/qemu/qemu/commit/75ce72b785a7c9fcb9af2779854142a= 34825da59=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.c=0D =0D Log Message:=0D -----------=0D target/arm: Make M-profile VTOR loads on reset handle memory aliasing=0D= =0D For Arm M-profile CPUs, on reset the CPU must load its initial PC and=0D SP from a vector table in guest memory. Because we can't guarantee=0D reset ordering, we have to handle the possibility that the ROM blob=0D loader's reset function has not yet run when the CPU resets, in which=0D case the data in an ELF file specified by the user won't be in guest=0D memory to be read yet.=0D =0D We work around the reset ordering problem by checking whether the ROM=0D blob loader has any data for the address where the vector table is,=0D using rom_ptr(). Unfortunately this does not handle the possibility=0D of memory aliasing. For many M-profile boards, memory can be=0D accessed via multiple possible physical addresses; if the board has=0D the vector table at address X but the user's ELF file loads data via=0D a different address Y which is an alias to the same underlying guest=0D RAM then rom_ptr() will not find it.=0D =0D Use the new rom_ptr_for_as() function, which deals with memory=0D aliasing when locating a relevant ROM blob.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Richard Henderson =0D Message-id: 20210318174823.18066-6-peter.maydell@linaro.org=0D =0D =0D Commit: dad90de78e9e9d47cefcbcd30115706b98e6ec87=0D https://github.com/qemu/qemu/commit/dad90de78e9e9d47cefcbcd30115706= b98e6ec87=0D Author: Richard Henderson =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M target/arm/tlb_helper.c=0D =0D Log Message:=0D -----------=0D target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill=0D =0D Pretend the fault always happens at page table level 3.=0D =0D Failure to set this leaves level =3D 0, which is impossible for=0D ARMFault_Permission, and produces an invalid syndrome, which=0D reaches g_assert_not_reached in cpu_loop.=0D =0D Fixes: 8db94ab4e5db ("linux-user/aarch64: Pass syndrome to EXC_*_ABORT")=0D= Reported-by: Laurent Vivier =0D Signed-off-by: Richard Henderson =0D Reviewed-by: Peter Maydell =0D Message-id: 20210320000606.1788699-1-richard.henderson@linaro.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 1a4d83b5643e8e965cbc16950f78066a7cd27cb4=0D https://github.com/qemu/qemu/commit/1a4d83b5643e8e965cbc16950f78066= a7cd27cb4=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M hw/char/pl011.c=0D M hw/core/loader.c=0D M hw/core/machine.c=0D M include/exec/memory.h=0D M include/hw/char/pl011.h=0D M include/hw/loader.h=0D M softmmu/memory.c=0D M target/arm/cpu.c=0D M target/arm/tlb_helper.c=0D M tests/qtest/fuzz/generic_fuzz.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10323' into staging=0D =0D target-arm queue:=0D * hw/arm/virt: Disable pl011 clock migration if needed=0D * target/arm: Make M-profile VTOR loads on reset handle memory aliasing=0D= * target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill=0D= =0D # gpg: Signature made Tue 23 Mar 2021 14:26:09 GMT=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210323:=0D target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill=0D target/arm: Make M-profile VTOR loads on reset handle memory aliasing=0D= hw/core/loader: Add new function rom_ptr_for_as()=0D memory: Add offset_in_region to flatview_cb arguments=0D memory: Document flatview_for_each_range()=0D memory: Make flatview_cb return bool, not int=0D hw/arm/virt: Disable pl011 clock migration if needed=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/ae3845efb306...1a4d83b5643e= =0D From MAILER-DAEMON Tue Mar 23 18:34:45 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOpbp-0003Hc-2A for mharc-qemu-commits@gnu.org; Tue, 23 Mar 2021 18:34:45 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57654) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOpbn-0003Cj-44 for qemu-commits@nongnu.org; Tue, 23 Mar 2021 18:34:43 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:43737) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOpbf-0002kU-WE for qemu-commits@nongnu.org; Tue, 23 Mar 2021 18:34:42 -0400 Received: from github.com (hubbernetes-node-8c2f178.ash1-iad.github.net [10.56.101.39]) by smtp.github.com (Postfix) with ESMTPA id 568F1900081 for ; Tue, 23 Mar 2021 15:34:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616538875; bh=kTGutaZD5bHD07jZZy0Dz93e0P0rkjpnLjkFdNS9P7w=; h=Date:From:To:Subject:From; b=hMbW3soNuoyBqFMgKyFVFvTkLs+7E4BPSUvO7ceAlE+UZy5o5fr/zb5IJQYLX/3Nj svbsGuy8K7luVM7C2/RbmfCHyRzensnnsNlxuTr7pnA2dVDq8hs76usC2hywIN2NpK J4zCHXTETjkDrJfYgs3pR+a+byALR4X1+F+aiVYo= Date: Tue, 23 Mar 2021 15:34:35 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 7552cb: qapi/pragma: Tidy up after removal of deprecated c... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 22:34:43 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 7552cbe1d0aacf2fd5b7f69cb65534891e9e23d3=0D https://github.com/qemu/qemu/commit/7552cbe1d0aacf2fd5b7f69cb655348= 91e9e23d3=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M qapi/pragma.json=0D =0D Log Message:=0D -----------=0D qapi/pragma: Tidy up after removal of deprecated commands=0D =0D Commit cbde7be900 "migrate: remove QMP/HMP commands for speed,=0D downtime and cache size" neglected to remove query-migrate-cache-size=0D from pragma returns-whitelist.=0D =0D Commit 8af54b9172 "machine: remove 'query-cpus' QMP command" neglected=0D= to remove CpuInfo & friends from pragma name-case-exceptions.=0D =0D Remove these now.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-2-armbru@redhat.com>=0D Reviewed-by: John Snow =0D =0D =0D Commit: 00d16f239f3a1ba0b1ea09dc0852386a25a144bc=0D https://github.com/qemu/qemu/commit/00d16f239f3a1ba0b1ea09dc0852386= a25a144bc=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D R tests/qapi-schema/flat-union-inline.err=0D R tests/qapi-schema/flat-union-inline.json=0D R tests/qapi-schema/flat-union-inline.out=0D M tests/qapi-schema/meson.build=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Drop redundant flat-union-inline test=0D =0D flat-union-inline.json covers longhand branch definition with an=0D invalid type value. It's redundant: longhand branch definition is=0D covered by flat-union-inline-invalid-dict.json, and invalid type value=0D= is covered by nested-struct-data.json. Drop the test.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-3-armbru@redhat.com>=0D Reviewed-by: John Snow =0D =0D =0D Commit: 5bd18d98cd88e2df1e1e274546a06ebe7fdd5eec=0D https://github.com/qemu/qemu/commit/5bd18d98cd88e2df1e1e274546a06eb= e7fdd5eec=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/event-member-invalid-dict.err=0D M tests/qapi-schema/event-member-invalid-dict.json=0D M tests/qapi-schema/flat-union-inline-invalid-dict.json=0D M tests/qapi-schema/nested-struct-data-invalid-dict.err=0D M tests/qapi-schema/nested-struct-data-invalid-dict.json=0D M tests/qapi-schema/nested-struct-data.json=0D M tests/qapi-schema/struct-member-invalid-dict.err=0D M tests/qapi-schema/struct-member-invalid-dict.json=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Rework comments on longhand member definitions=0D =0D A few old comments talk about "desired future use of defaults" and=0D "anonymous inline branch types". Kind of misleading since commit=0D 87adbbffd4 "qapi: add a dictionary form for TYPE" added longhand=0D member definitions. Talk about that instead.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-4-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: John Snow =0D =0D =0D Commit: 27ae2f0787ae42eca9ec34961d2269d7a1fc5230=0D https://github.com/qemu/qemu/commit/27ae2f0787ae42eca9ec34961d2269d= 7a1fc5230=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/alternate-clash.err=0D M tests/qapi-schema/alternate-clash.json=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Belatedly update comment on alternate clash=0D =0D Commit 0426d53c65 "qapi: Simplify visiting of alternate types"=0D eliminated the implicit alternate enum, but neglected to update a=0D comment about it in a test. Do that now.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-5-armbru@redhat.com>=0D Reviewed-by: John Snow =0D =0D =0D Commit: 1444989a3a4e8399e366ceecf4ed5bbd2d83c727=0D https://github.com/qemu/qemu/commit/1444989a3a4e8399e366ceecf4ed5bb= d2d83c727=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/flat-union-no-base.err=0D M tests/qapi-schema/flat-union-no-base.json=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Drop TODO comment on simple unions=0D =0D Simple unions don't need more features, they need to die.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-6-armbru@redhat.com>=0D Reviewed-by: John Snow =0D =0D =0D Commit: 73c40b07c6fffcb2725f4c9d3f361967e39aef97=0D https://github.com/qemu/qemu/commit/73c40b07c6fffcb2725f4c9d3f36196= 7e39aef97=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/reserved-member-u.err=0D M tests/qapi-schema/reserved-member-u.json=0D M tests/qapi-schema/reserved-member-u.out=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Tweak to demonstrate buggy member name check=0D =0D Member name 'u' and names starting with 'has-' or 'has_' are reserved=0D for the generator. check_type() enforces this, covered by tests=0D reserved-member-u and reserved-member-has.=0D =0D These tests neglect to cover optional members, where the name starts=0D with '*'. Tweak reserved-member-u to fix that. Test=0D reserved-member-has still covers non-optional members.=0D =0D This demonstrates the reserved member name check is broken for=0D optional members. The next commit will fix it.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-7-armbru@redhat.com>=0D Reviewed-by: John Snow =0D [Commit message improved slightly]=0D =0D =0D Commit: dbfe3c7c289c6b95a920b4e2a178e583c17c62a8=0D https://github.com/qemu/qemu/commit/dbfe3c7c289c6b95a920b4e2a178e58= 3c17c62a8=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/reserved-member-u.err=0D M tests/qapi-schema/reserved-member-u.json=0D M tests/qapi-schema/reserved-member-u.out=0D =0D Log Message:=0D -----------=0D qapi: Fix to reject optional members with reserved names=0D =0D check_type() fails to reject optional members with reserved names,=0D because it neglects to strip off the leading '*'. Fix that.=0D =0D The stripping in check_name_str() is now useless. Drop.=0D =0D Also drop the "no leading '*'" assertion, because valid_name.match()=0D ensures it can't fail.=0D =0D Fixes: 9fb081e0b98409556d023c7193eeb68947cd1211=0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-8-armbru@redhat.com>=0D Reviewed-by: John Snow =0D =0D =0D Commit: 5fbc78dd3675832062894aeca89a52c90a96f954=0D https://github.com/qemu/qemu/commit/5fbc78dd3675832062894aeca89a52c= 90a96f954=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/common.py=0D M scripts/qapi/expr.py=0D =0D Log Message:=0D -----------=0D qapi: Permit flat union members for any tag value=0D =0D Flat union branch names match the tag enum's member names. Omitted=0D branches default to "no members for this tag value".=0D =0D Branch names starting with a digit get rejected like "'data' member=0D '0' has an invalid name". However, omitting the branch works.=0D =0D This is because flat union tag values get checked twice: as enum=0D member name, and as union branch name. The former accepts leading=0D digits, the latter doesn't.=0D =0D Branches whose names start with a digit therefore cannot have members.=0D= Feels wrong. Get rid of the restriction by skipping the latter check.=0D= =0D This can expose c_name() to input it can't handle: a name starting=0D with a digit. Improve it to return a valid C identifier for any=0D input.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-9-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D [Commit message rewritten]=0D =0D =0D Commit: 0825f62c842f2c07c5471391c6d7fd3f4fe83732=0D https://github.com/qemu/qemu/commit/0825f62c842f2c07c5471391c6d7fd3= f4fe83732=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D =0D Log Message:=0D -----------=0D qapi: Lift enum-specific code out of check_name_str()=0D =0D check_name_str() masks leading digits when passed enum_member=3DTrue.=0D Only check_enum() does. Lift the masking into check_enum().=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-10-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: eaab06faa5540e02e4f4782c1a650c9805a36671=0D https://github.com/qemu/qemu/commit/eaab06faa5540e02e4f4782c1a650c9= 805a36671=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D =0D Log Message:=0D -----------=0D qapi: Rework name checking in preparation of stricter checking=0D =0D Naming rules differ for the various kinds of names. To prepare=0D enforcing them, define functions to check them: check_name_upper(),=0D check_name_lower(), and check_name_camel(). For now, these merely=0D wrap around check_name_str(), but that will change shortly. Replace=0D the other uses of check_name_str() by appropriate uses of the=0D wrappers. No change in behavior just yet.=0D =0D check_name_str() now returns the name without downstream and x-=0D prefix, for use by the wrappers in later patches. Requires tweaking=0D regexp @valid_name. It accepts the same strings as before.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-11-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D [Commit message improved]=0D =0D =0D Commit: d224e0c092653f0b9cff77ba6852147687b1bedb=0D https://github.com/qemu/qemu/commit/d224e0c092653f0b9cff77ba6852147= 687b1bedb=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D =0D Log Message:=0D -----------=0D qapi: Move uppercase rejection to check_name_lower()=0D =0D check_name_lower() is the only user of check_name_str() using=0D permit_upper=3DFalse. Move the associated code from check_name_str() to=0D= check_name_lower(), and drop the parameter.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-12-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 00ffe242d64f7622965c52c62adb06fd9664ada8=0D https://github.com/qemu/qemu/commit/00ffe242d64f7622965c52c62adb06f= d9664ada8=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D =0D Log Message:=0D -----------=0D qapi: Consistently permit any case in downstream prefixes=0D =0D We require lowercase __RFQDN_ downstream prefixes only where we=0D require the prefixed name to be lowercase. Don't; permit any case in=0D __RFQDN_ prefixes anywhere.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-13-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: d4f4cae8de19d2bdfcf09cdc4676e9b99857dcf2=0D https://github.com/qemu/qemu/commit/d4f4cae8de19d2bdfcf09cdc4676e9b= 99857dcf2=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/doc-good.json=0D M tests/qapi-schema/doc-good.out=0D M tests/qapi-schema/doc-good.txt=0D M tests/qapi-schema/doc-invalid-return.json=0D M tests/qapi-schema/event-case.err=0D M tests/qapi-schema/event-case.json=0D M tests/qapi-schema/event-case.out=0D M tests/qapi-schema/qapi-schema-test.json=0D M tests/qapi-schema/qapi-schema-test.out=0D M tests/unit/test-qmp-event.c=0D =0D Log Message:=0D -----------=0D qapi: Enforce event naming rules=0D =0D Event names should be ALL_CAPS with words separated by underscore.=0D Enforce this. The only offenders are in tests/. Fix them. Existing=0D test event-case covers the new error.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-14-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 3e6c8a633113fb6a60369c40cf2061de50727bf6=0D https://github.com/qemu/qemu/commit/3e6c8a633113fb6a60369c40cf2061d= e50727bf6=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/doc-bad-union-member.json=0D M tests/qapi-schema/double-type.err=0D M tests/qapi-schema/double-type.json=0D M tests/qapi-schema/features-deprecated-type.err=0D M tests/qapi-schema/features-deprecated-type.json=0D M tests/qapi-schema/meson.build=0D M tests/qapi-schema/redefined-builtin.err=0D M tests/qapi-schema/redefined-builtin.json=0D M tests/qapi-schema/redefined-type.err=0D M tests/qapi-schema/redefined-type.json=0D M tests/qapi-schema/struct-data-invalid.err=0D M tests/qapi-schema/struct-data-invalid.json=0D M tests/qapi-schema/struct-member-invalid-dict.err=0D M tests/qapi-schema/struct-member-invalid-dict.json=0D M tests/qapi-schema/struct-member-invalid.err=0D M tests/qapi-schema/struct-member-invalid.json=0D A tests/qapi-schema/type-case.err=0D A tests/qapi-schema/type-case.json=0D A tests/qapi-schema/type-case.out=0D M tests/qapi-schema/unknown-expr-key.err=0D M tests/qapi-schema/unknown-expr-key.json=0D =0D Log Message:=0D -----------=0D qapi: Enforce type naming rules=0D =0D Type names should be CamelCase. Enforce this. The only offenders are=0D= in tests/. Fix them. Add test type-case to cover the new error.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-15-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D [Regexp simplified, new test made more robust]=0D =0D =0D Commit: 492db12ec3b42be6f971ba8436e080bc096b58b5=0D https://github.com/qemu/qemu/commit/492db12ec3b42be6f971ba8436e080b= c096b58b5=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/meson.build=0D R tests/qapi-schema/redefined-builtin.err=0D R tests/qapi-schema/redefined-builtin.json=0D R tests/qapi-schema/redefined-builtin.out=0D A tests/qapi-schema/redefined-predefined.err=0D A tests/qapi-schema/redefined-predefined.json=0D A tests/qapi-schema/redefined-predefined.out=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Rename redefined-builtin to redefined-predefined=0D =0D The previous commit changed this test to clash with a predefined enum=0D type, not a built-in type. Adjust its name.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-16-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 4a67bd31a4a45773ed1e33ebd06ff949ff9525d7=0D https://github.com/qemu/qemu/commit/4a67bd31a4a45773ed1e33ebd06ff94= 9ff9525d7=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/parser.py=0D =0D Log Message:=0D -----------=0D qapi: Factor out QAPISchemaParser._check_pragma_list_of_str()=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-17-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: e90a61e3cc1ab30a2069173aee8b592933d827a1=0D https://github.com/qemu/qemu/commit/e90a61e3cc1ab30a2069173aee8b592= 933d827a1=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/meson.build=0D R tests/qapi-schema/pragma-doc-required-crap.err=0D R tests/qapi-schema/pragma-doc-required-crap.json=0D R tests/qapi-schema/pragma-doc-required-crap.out=0D R tests/qapi-schema/pragma-name-case-whitelist-crap.err=0D R tests/qapi-schema/pragma-name-case-whitelist-crap.json=0D R tests/qapi-schema/pragma-name-case-whitelist-crap.out=0D R tests/qapi-schema/pragma-returns-whitelist-crap.err=0D R tests/qapi-schema/pragma-returns-whitelist-crap.json=0D R tests/qapi-schema/pragma-returns-whitelist-crap.out=0D A tests/qapi-schema/pragma-value-not-bool.err=0D A tests/qapi-schema/pragma-value-not-bool.json=0D A tests/qapi-schema/pragma-value-not-bool.out=0D A tests/qapi-schema/pragma-value-not-list-of-str.err=0D A tests/qapi-schema/pragma-value-not-list-of-str.json=0D A tests/qapi-schema/pragma-value-not-list-of-str.out=0D A tests/qapi-schema/pragma-value-not-list.err=0D A tests/qapi-schema/pragma-value-not-list.json=0D A tests/qapi-schema/pragma-value-not-list.out=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Rename pragma-*-crap to pragma-value-not-*=0D =0D Rename pragma-doc-required-crap to pragma-not-bool,=0D pragma-returns-whitelist-crap to pragma-value-not-list, and=0D pragma-name-case-whitelist-crap to pragma-value-not-list-of-str.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-18-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: ef8b3829f6d194c856d7db34e14117e8ed90a396=0D https://github.com/qemu/qemu/commit/ef8b3829f6d194c856d7db34e14117e= 8ed90a396=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/meson.build=0D A tests/qapi-schema/returns-bad-type.err=0D A tests/qapi-schema/returns-bad-type.json=0D A tests/qapi-schema/returns-bad-type.out=0D R tests/qapi-schema/returns-whitelist.err=0D R tests/qapi-schema/returns-whitelist.json=0D R tests/qapi-schema/returns-whitelist.out=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Rename returns-whitelist to returns-bad-type=0D =0D This test covers returning "bad" types. Pragma returns-whitelist is=0D just one aspect. Naming it returns-whitelist is suboptimal. Rename=0D to returns-bad-type.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-19-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: b86df374784897c58b965939c9913c2a6c590426=0D https://github.com/qemu/qemu/commit/b86df374784897c58b965939c9913c2= a6c590426=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/qapi-code-gen.txt=0D M qapi/pragma.json=0D M qga/qapi-schema.json=0D M scripts/qapi/expr.py=0D M scripts/qapi/parser.py=0D M scripts/qapi/schema.py=0D M scripts/qapi/source.py=0D M tests/qapi-schema/enum-member-case.json=0D M tests/qapi-schema/pragma-value-not-list-of-str.err=0D M tests/qapi-schema/pragma-value-not-list-of-str.json=0D M tests/qapi-schema/pragma-value-not-list.err=0D M tests/qapi-schema/pragma-value-not-list.json=0D M tests/qapi-schema/qapi-schema-test.json=0D M tests/qapi-schema/returns-bad-type.json=0D =0D Log Message:=0D -----------=0D qapi: Rename pragma *-whitelist to *-exceptions=0D =0D Rename pragma returns-whitelist to command-returns-exceptions, and=0D name-case-whitelist to member-name-case-exceptions.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-20-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: b48a1033041c52c2ae12bd38a2caa36fe46ef466=0D https://github.com/qemu/qemu/commit/b48a1033041c52c2ae12bd38a2caa36= fe46ef466=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M qapi/pragma.json=0D =0D Log Message:=0D -----------=0D qapi/pragma: Streamline comments on member-name-exceptions=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-21-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 6e2e12a70c0b7f7fe71a7938b9c49bdaa608ce58=0D https://github.com/qemu/qemu/commit/6e2e12a70c0b7f7fe71a7938b9c49bd= aa608ce58=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/test-qmp-cmds.c=0D =0D Log Message:=0D -----------=0D tests-qmp-cmds: Drop unused and incorrect qmp_TestIfCmd()=0D =0D Commit 967c885108 "qapi: add 'if' to top-level expressions" added=0D command TestIfCmd with an 'if' condition. It also added the=0D qmp_TestIfCmd() to go with it, guarded by the corresponding #if.=0D Commit ccadd6bcba "qapi: Add 'if' to implicit struct members" changed=0D the command, but not the function. Compiles only because we don't=0D satisfy the #if. Instead of fixing the function, simply drop it.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-22-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 9af4b6b9e80daeab2ce47664ff422b5e421814de=0D https://github.com/qemu/qemu/commit/9af4b6b9e80daeab2ce47664ff422b5= e421814de=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/args-member-case.err=0D M tests/qapi-schema/enum-member-case.err=0D M tests/qapi-schema/union-branch-case.err=0D =0D Log Message:=0D -----------=0D qapi: Prepare for rejecting underscore in command and member names=0D =0D Command names and member names within a type should be all lower case=0D with words separated by a hyphen. We also accept underscore. Rework=0D check_name_lower() to optionally reject underscores, but don't use=0D that option, yet.=0D =0D Update expected test output for the changed error message.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-23-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: e744708a7783624292f8c405ca840f50a10b0003=0D https://github.com/qemu/qemu/commit/e744708a7783624292f8c405ca840f5= 0a10b0003=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D =0D Log Message:=0D -----------=0D qapi: Enforce feature naming rules=0D =0D Feature names should use '-', not '_'. Enforce this.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-24-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 05ebf841efac494d8bd1f6d74642c3e9a3df4c19=0D https://github.com/qemu/qemu/commit/05ebf841efac494d8bd1f6d74642c3e= 9a3df4c19=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/qapi-code-gen.txt=0D M qapi/pragma.json=0D M scripts/qapi/expr.py=0D M scripts/qapi/parser.py=0D M scripts/qapi/source.py=0D M tests/qapi-schema/qapi-schema-test.json=0D M tests/qapi-schema/qapi-schema-test.out=0D M tests/unit/test-qmp-cmds.c=0D =0D Log Message:=0D -----------=0D qapi: Enforce command naming rules=0D =0D Command names should be lower-case. Enforce this. Fix the fixable=0D offenders (all in tests/), and add the remainder to pragma=0D command-name-exceptions.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-25-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: e75d4225b76842ec899f25e8ff39b070119f033f=0D https://github.com/qemu/qemu/commit/e75d4225b76842ec899f25e8ff39b07= 0119f033f=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D R tests/qapi-schema/args-name-clash.err=0D R tests/qapi-schema/args-name-clash.json=0D R tests/qapi-schema/args-name-clash.out=0D M tests/qapi-schema/meson.build=0D A tests/qapi-schema/struct-member-name-clash.err=0D A tests/qapi-schema/struct-member-name-clash.json=0D A tests/qapi-schema/struct-member-name-clash.out=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Switch member name clash test to struct=0D =0D Test args-name-clash covers command parameter name clash. This=0D effectively covers struct member name clash as well. The next commit=0D will make parameter name clash impossible. Convert args-name-clash=0D from testing command to testing a struct, and rename it to=0D struct-member-name-clash.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-26-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D [Commit message typo fixed]=0D =0D =0D Commit: 5aceeac04de50e3a9d5c2a965379324659a94be0=0D https://github.com/qemu/qemu/commit/5aceeac04de50e3a9d5c2a965379324= 659a94be0=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/qapi-code-gen.txt=0D M qapi/pragma.json=0D M qga/qapi-schema.json=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/qapi-schema-test.json=0D M tests/qapi-schema/qapi-schema-test.out=0D M tests/qapi-schema/struct-member-name-clash.err=0D M tests/qapi-schema/struct-member-name-clash.json=0D =0D Log Message:=0D -----------=0D qapi: Enforce struct member naming rules=0D =0D Struct members, including command arguments, event data, and union=0D inline base members, should use '-', not '_'. Enforce this. Fix the=0D fixable offenders (all in tests/), and add the remainder to pragma=0D member-name-exceptions.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-27-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 407efbf9e776ade8e8d09b778851834f91b225a1=0D https://github.com/qemu/qemu/commit/407efbf9e776ade8e8d09b778851834= f91b225a1=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M qapi/pragma.json=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/enum-clash-member.err=0D M tests/qapi-schema/enum-clash-member.json=0D =0D Log Message:=0D -----------=0D qapi: Enforce enum member naming rules=0D =0D Enum members should use '-', not '_'. Enforce this. Fix the fixable=0D offenders (all in tests/), and add the remainder to pragma=0D member-name-exceptions.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-28-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: d83b47646ec2bdf4f7be9c2078f1bcbbb0544b2e=0D https://github.com/qemu/qemu/commit/d83b47646ec2bdf4f7be9c2078f1bcb= bb0544b2e=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/alternate-clash.err=0D M tests/qapi-schema/alternate-clash.json=0D M tests/qapi-schema/qapi-schema-test.json=0D M tests/qapi-schema/qapi-schema-test.out=0D M tests/qapi-schema/union-clash-branches.err=0D M tests/qapi-schema/union-clash-branches.json=0D =0D Log Message:=0D -----------=0D qapi: Enforce union and alternate branch naming rules=0D =0D Union branch names should use '-', not '_'. Enforce this. The only=0D offenders are in tests/. Fix them.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-29-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D [Commit message typo fixed]=0D =0D =0D Commit: bdabafc6836edc0f34732cac473899cb4e77a296=0D https://github.com/qemu/qemu/commit/bdabafc6836edc0f34732cac473899c= b4e77a296=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M block/monitor/block-hmp-cmds.c=0D M blockdev.c=0D M hmp-commands.hx=0D M qapi/block-core.json=0D M qapi/pragma.json=0D =0D Log Message:=0D -----------=0D block: Remove monitor command block_passwd=0D =0D Command block_passwd always fails since=0D =0D Commit c01c214b69 "block: remove all encryption handling APIs"=0D (v2.10.0) turned block_passwd into a stub that always fails, and=0D hardcoded encryption_key_missing to false in query-named-block-nodes=0D and query-block.=0D =0D Commit ad1324e044 "block: remove 'encryption_key_missing' flag from=0D QAPI" just landed. Complete the cleanup job: remove block_passwd.=0D =0D Cc: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323101951.3686029-1-armbru@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 266469947161aa10b1d36843580d369d5aa38589=0D https://github.com/qemu/qemu/commit/266469947161aa10b1d36843580d369= d5aa38589=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M block/monitor/block-hmp-cmds.c=0D M blockdev.c=0D M docs/devel/qapi-code-gen.txt=0D M hmp-commands.hx=0D M qapi/block-core.json=0D M qapi/pragma.json=0D M qga/qapi-schema.json=0D M scripts/qapi/common.py=0D M scripts/qapi/expr.py=0D M scripts/qapi/parser.py=0D M scripts/qapi/schema.py=0D M scripts/qapi/source.py=0D M tests/qapi-schema/alternate-clash.err=0D M tests/qapi-schema/alternate-clash.json=0D M tests/qapi-schema/args-member-case.err=0D R tests/qapi-schema/args-name-clash.err=0D R tests/qapi-schema/args-name-clash.json=0D R tests/qapi-schema/args-name-clash.out=0D M tests/qapi-schema/doc-bad-union-member.json=0D M tests/qapi-schema/doc-good.json=0D M tests/qapi-schema/doc-good.out=0D M tests/qapi-schema/doc-good.txt=0D M tests/qapi-schema/doc-invalid-return.json=0D M tests/qapi-schema/double-type.err=0D M tests/qapi-schema/double-type.json=0D M tests/qapi-schema/enum-clash-member.err=0D M tests/qapi-schema/enum-clash-member.json=0D M tests/qapi-schema/enum-member-case.err=0D M tests/qapi-schema/enum-member-case.json=0D M tests/qapi-schema/event-case.err=0D M tests/qapi-schema/event-case.json=0D M tests/qapi-schema/event-case.out=0D M tests/qapi-schema/event-member-invalid-dict.err=0D M tests/qapi-schema/event-member-invalid-dict.json=0D M tests/qapi-schema/features-deprecated-type.err=0D M tests/qapi-schema/features-deprecated-type.json=0D M tests/qapi-schema/flat-union-inline-invalid-dict.json=0D R tests/qapi-schema/flat-union-inline.err=0D R tests/qapi-schema/flat-union-inline.json=0D R tests/qapi-schema/flat-union-inline.out=0D M tests/qapi-schema/flat-union-no-base.err=0D M tests/qapi-schema/flat-union-no-base.json=0D M tests/qapi-schema/meson.build=0D M tests/qapi-schema/nested-struct-data-invalid-dict.err=0D M tests/qapi-schema/nested-struct-data-invalid-dict.json=0D M tests/qapi-schema/nested-struct-data.json=0D R tests/qapi-schema/pragma-doc-required-crap.err=0D R tests/qapi-schema/pragma-doc-required-crap.json=0D R tests/qapi-schema/pragma-doc-required-crap.out=0D R tests/qapi-schema/pragma-name-case-whitelist-crap.err=0D R tests/qapi-schema/pragma-name-case-whitelist-crap.json=0D R tests/qapi-schema/pragma-name-case-whitelist-crap.out=0D R tests/qapi-schema/pragma-returns-whitelist-crap.err=0D R tests/qapi-schema/pragma-returns-whitelist-crap.json=0D R tests/qapi-schema/pragma-returns-whitelist-crap.out=0D A tests/qapi-schema/pragma-value-not-bool.err=0D A tests/qapi-schema/pragma-value-not-bool.json=0D A tests/qapi-schema/pragma-value-not-bool.out=0D A tests/qapi-schema/pragma-value-not-list-of-str.err=0D A tests/qapi-schema/pragma-value-not-list-of-str.json=0D A tests/qapi-schema/pragma-value-not-list-of-str.out=0D A tests/qapi-schema/pragma-value-not-list.err=0D A tests/qapi-schema/pragma-value-not-list.json=0D A tests/qapi-schema/pragma-value-not-list.out=0D M tests/qapi-schema/qapi-schema-test.json=0D M tests/qapi-schema/qapi-schema-test.out=0D R tests/qapi-schema/redefined-builtin.err=0D R tests/qapi-schema/redefined-builtin.json=0D R tests/qapi-schema/redefined-builtin.out=0D A tests/qapi-schema/redefined-predefined.err=0D A tests/qapi-schema/redefined-predefined.json=0D A tests/qapi-schema/redefined-predefined.out=0D M tests/qapi-schema/redefined-type.err=0D M tests/qapi-schema/redefined-type.json=0D M tests/qapi-schema/reserved-member-u.err=0D M tests/qapi-schema/reserved-member-u.json=0D A tests/qapi-schema/returns-bad-type.err=0D A tests/qapi-schema/returns-bad-type.json=0D A tests/qapi-schema/returns-bad-type.out=0D R tests/qapi-schema/returns-whitelist.err=0D R tests/qapi-schema/returns-whitelist.json=0D R tests/qapi-schema/returns-whitelist.out=0D M tests/qapi-schema/struct-data-invalid.err=0D M tests/qapi-schema/struct-data-invalid.json=0D M tests/qapi-schema/struct-member-invalid-dict.err=0D M tests/qapi-schema/struct-member-invalid-dict.json=0D M tests/qapi-schema/struct-member-invalid.err=0D M tests/qapi-schema/struct-member-invalid.json=0D A tests/qapi-schema/struct-member-name-clash.err=0D A tests/qapi-schema/struct-member-name-clash.json=0D A tests/qapi-schema/struct-member-name-clash.out=0D A tests/qapi-schema/type-case.err=0D A tests/qapi-schema/type-case.json=0D A tests/qapi-schema/type-case.out=0D M tests/qapi-schema/union-branch-case.err=0D M tests/qapi-schema/union-clash-branches.err=0D M tests/qapi-schema/union-clash-branches.json=0D M tests/qapi-schema/unknown-expr-key.err=0D M tests/qapi-schema/unknown-expr-key.json=0D M tests/unit/test-qmp-cmds.c=0D M tests/unit/test-qmp-event.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-03-23'= into staging=0D =0D QAPI patches patches for 2021-03-23=0D =0D # gpg: Signature made Tue 23 Mar 2021 21:37:53 GMT=0D # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918= 653=0D # gpg: issuer "armbru@redhat.com"=0D # gpg: Good signature from "Markus Armbruster " [full]= =0D # gpg: aka "Markus Armbruster " [ful= l]=0D # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 = 8653=0D =0D * remotes/armbru/tags/pull-qapi-2021-03-23: (29 commits)=0D block: Remove monitor command block_passwd=0D qapi: Enforce union and alternate branch naming rules=0D qapi: Enforce enum member naming rules=0D qapi: Enforce struct member naming rules=0D tests/qapi-schema: Switch member name clash test to struct=0D qapi: Enforce command naming rules=0D qapi: Enforce feature naming rules=0D qapi: Prepare for rejecting underscore in command and member names=0D tests-qmp-cmds: Drop unused and incorrect qmp_TestIfCmd()=0D qapi/pragma: Streamline comments on member-name-exceptions=0D qapi: Rename pragma *-whitelist to *-exceptions=0D tests/qapi-schema: Rename returns-whitelist to returns-bad-type=0D tests/qapi-schema: Rename pragma-*-crap to pragma-value-not-*=0D qapi: Factor out QAPISchemaParser._check_pragma_list_of_str()=0D tests/qapi-schema: Rename redefined-builtin to redefined-predefined=0D qapi: Enforce type naming rules=0D qapi: Enforce event naming rules=0D qapi: Consistently permit any case in downstream prefixes=0D qapi: Move uppercase rejection to check_name_lower()=0D qapi: Rework name checking in preparation of stricter checking=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/1a4d83b5643e...266469947161= =0D From MAILER-DAEMON Tue Mar 23 19:47:34 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOqkI-0005ug-K1 for mharc-qemu-commits@gnu.org; Tue, 23 Mar 2021 19:47:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46426) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOqkH-0005u8-7z for qemu-commits@nongnu.org; Tue, 23 Mar 2021 19:47:33 -0400 Received: from out-26.smtp.github.com ([192.30.252.209]:47361 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOqkC-0003zM-La for qemu-commits@nongnu.org; Tue, 23 Mar 2021 19:47:32 -0400 Received: from github.com (hubbernetes-node-eee9c9e.ash1-iad.github.net [10.56.116.24]) by smtp.github.com (Postfix) with ESMTPA id 087745E0108 for ; Tue, 23 Mar 2021 16:47:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616543248; bh=yCXYEK1oLcvL8IUKDZx5hybhEle8Rj2NmBSO/pKHzX0=; h=Date:From:To:Subject:From; b=akwe5+3Caf54HFfhGZ7SxNPjoH4QKzafDsZp2uxng/vzIupiLFWTJ7bQlxR278Y5j rxMrhpqTiLsF9S8ZCKeIXli5CwaXPviYQesscCeBCWI+M2EtC3xjZsFSttdRZZvC27 2b88NkvMwXTZPZVELQcfjq+5Jy2xpwVRAZUuGex4= Date: Tue, 23 Mar 2021 16:47:28 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 7552cb: qapi/pragma: Tidy up after removal of deprecated c... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 23:47:33 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 7552cbe1d0aacf2fd5b7f69cb65534891e9e23d3=0D https://github.com/qemu/qemu/commit/7552cbe1d0aacf2fd5b7f69cb655348= 91e9e23d3=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M qapi/pragma.json=0D =0D Log Message:=0D -----------=0D qapi/pragma: Tidy up after removal of deprecated commands=0D =0D Commit cbde7be900 "migrate: remove QMP/HMP commands for speed,=0D downtime and cache size" neglected to remove query-migrate-cache-size=0D from pragma returns-whitelist.=0D =0D Commit 8af54b9172 "machine: remove 'query-cpus' QMP command" neglected=0D= to remove CpuInfo & friends from pragma name-case-exceptions.=0D =0D Remove these now.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-2-armbru@redhat.com>=0D Reviewed-by: John Snow =0D =0D =0D Commit: 00d16f239f3a1ba0b1ea09dc0852386a25a144bc=0D https://github.com/qemu/qemu/commit/00d16f239f3a1ba0b1ea09dc0852386= a25a144bc=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D R tests/qapi-schema/flat-union-inline.err=0D R tests/qapi-schema/flat-union-inline.json=0D R tests/qapi-schema/flat-union-inline.out=0D M tests/qapi-schema/meson.build=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Drop redundant flat-union-inline test=0D =0D flat-union-inline.json covers longhand branch definition with an=0D invalid type value. It's redundant: longhand branch definition is=0D covered by flat-union-inline-invalid-dict.json, and invalid type value=0D= is covered by nested-struct-data.json. Drop the test.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-3-armbru@redhat.com>=0D Reviewed-by: John Snow =0D =0D =0D Commit: 5bd18d98cd88e2df1e1e274546a06ebe7fdd5eec=0D https://github.com/qemu/qemu/commit/5bd18d98cd88e2df1e1e274546a06eb= e7fdd5eec=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/event-member-invalid-dict.err=0D M tests/qapi-schema/event-member-invalid-dict.json=0D M tests/qapi-schema/flat-union-inline-invalid-dict.json=0D M tests/qapi-schema/nested-struct-data-invalid-dict.err=0D M tests/qapi-schema/nested-struct-data-invalid-dict.json=0D M tests/qapi-schema/nested-struct-data.json=0D M tests/qapi-schema/struct-member-invalid-dict.err=0D M tests/qapi-schema/struct-member-invalid-dict.json=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Rework comments on longhand member definitions=0D =0D A few old comments talk about "desired future use of defaults" and=0D "anonymous inline branch types". Kind of misleading since commit=0D 87adbbffd4 "qapi: add a dictionary form for TYPE" added longhand=0D member definitions. Talk about that instead.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-4-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D Reviewed-by: John Snow =0D =0D =0D Commit: 27ae2f0787ae42eca9ec34961d2269d7a1fc5230=0D https://github.com/qemu/qemu/commit/27ae2f0787ae42eca9ec34961d2269d= 7a1fc5230=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/alternate-clash.err=0D M tests/qapi-schema/alternate-clash.json=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Belatedly update comment on alternate clash=0D =0D Commit 0426d53c65 "qapi: Simplify visiting of alternate types"=0D eliminated the implicit alternate enum, but neglected to update a=0D comment about it in a test. Do that now.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-5-armbru@redhat.com>=0D Reviewed-by: John Snow =0D =0D =0D Commit: 1444989a3a4e8399e366ceecf4ed5bbd2d83c727=0D https://github.com/qemu/qemu/commit/1444989a3a4e8399e366ceecf4ed5bb= d2d83c727=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/flat-union-no-base.err=0D M tests/qapi-schema/flat-union-no-base.json=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Drop TODO comment on simple unions=0D =0D Simple unions don't need more features, they need to die.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-6-armbru@redhat.com>=0D Reviewed-by: John Snow =0D =0D =0D Commit: 73c40b07c6fffcb2725f4c9d3f361967e39aef97=0D https://github.com/qemu/qemu/commit/73c40b07c6fffcb2725f4c9d3f36196= 7e39aef97=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/reserved-member-u.err=0D M tests/qapi-schema/reserved-member-u.json=0D M tests/qapi-schema/reserved-member-u.out=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Tweak to demonstrate buggy member name check=0D =0D Member name 'u' and names starting with 'has-' or 'has_' are reserved=0D for the generator. check_type() enforces this, covered by tests=0D reserved-member-u and reserved-member-has.=0D =0D These tests neglect to cover optional members, where the name starts=0D with '*'. Tweak reserved-member-u to fix that. Test=0D reserved-member-has still covers non-optional members.=0D =0D This demonstrates the reserved member name check is broken for=0D optional members. The next commit will fix it.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-7-armbru@redhat.com>=0D Reviewed-by: John Snow =0D [Commit message improved slightly]=0D =0D =0D Commit: dbfe3c7c289c6b95a920b4e2a178e583c17c62a8=0D https://github.com/qemu/qemu/commit/dbfe3c7c289c6b95a920b4e2a178e58= 3c17c62a8=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/reserved-member-u.err=0D M tests/qapi-schema/reserved-member-u.json=0D M tests/qapi-schema/reserved-member-u.out=0D =0D Log Message:=0D -----------=0D qapi: Fix to reject optional members with reserved names=0D =0D check_type() fails to reject optional members with reserved names,=0D because it neglects to strip off the leading '*'. Fix that.=0D =0D The stripping in check_name_str() is now useless. Drop.=0D =0D Also drop the "no leading '*'" assertion, because valid_name.match()=0D ensures it can't fail.=0D =0D Fixes: 9fb081e0b98409556d023c7193eeb68947cd1211=0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-8-armbru@redhat.com>=0D Reviewed-by: John Snow =0D =0D =0D Commit: 5fbc78dd3675832062894aeca89a52c90a96f954=0D https://github.com/qemu/qemu/commit/5fbc78dd3675832062894aeca89a52c= 90a96f954=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/common.py=0D M scripts/qapi/expr.py=0D =0D Log Message:=0D -----------=0D qapi: Permit flat union members for any tag value=0D =0D Flat union branch names match the tag enum's member names. Omitted=0D branches default to "no members for this tag value".=0D =0D Branch names starting with a digit get rejected like "'data' member=0D '0' has an invalid name". However, omitting the branch works.=0D =0D This is because flat union tag values get checked twice: as enum=0D member name, and as union branch name. The former accepts leading=0D digits, the latter doesn't.=0D =0D Branches whose names start with a digit therefore cannot have members.=0D= Feels wrong. Get rid of the restriction by skipping the latter check.=0D= =0D This can expose c_name() to input it can't handle: a name starting=0D with a digit. Improve it to return a valid C identifier for any=0D input.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-9-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D [Commit message rewritten]=0D =0D =0D Commit: 0825f62c842f2c07c5471391c6d7fd3f4fe83732=0D https://github.com/qemu/qemu/commit/0825f62c842f2c07c5471391c6d7fd3= f4fe83732=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D =0D Log Message:=0D -----------=0D qapi: Lift enum-specific code out of check_name_str()=0D =0D check_name_str() masks leading digits when passed enum_member=3DTrue.=0D Only check_enum() does. Lift the masking into check_enum().=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-10-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: eaab06faa5540e02e4f4782c1a650c9805a36671=0D https://github.com/qemu/qemu/commit/eaab06faa5540e02e4f4782c1a650c9= 805a36671=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D =0D Log Message:=0D -----------=0D qapi: Rework name checking in preparation of stricter checking=0D =0D Naming rules differ for the various kinds of names. To prepare=0D enforcing them, define functions to check them: check_name_upper(),=0D check_name_lower(), and check_name_camel(). For now, these merely=0D wrap around check_name_str(), but that will change shortly. Replace=0D the other uses of check_name_str() by appropriate uses of the=0D wrappers. No change in behavior just yet.=0D =0D check_name_str() now returns the name without downstream and x-=0D prefix, for use by the wrappers in later patches. Requires tweaking=0D regexp @valid_name. It accepts the same strings as before.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-11-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D [Commit message improved]=0D =0D =0D Commit: d224e0c092653f0b9cff77ba6852147687b1bedb=0D https://github.com/qemu/qemu/commit/d224e0c092653f0b9cff77ba6852147= 687b1bedb=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D =0D Log Message:=0D -----------=0D qapi: Move uppercase rejection to check_name_lower()=0D =0D check_name_lower() is the only user of check_name_str() using=0D permit_upper=3DFalse. Move the associated code from check_name_str() to=0D= check_name_lower(), and drop the parameter.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-12-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 00ffe242d64f7622965c52c62adb06fd9664ada8=0D https://github.com/qemu/qemu/commit/00ffe242d64f7622965c52c62adb06f= d9664ada8=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D =0D Log Message:=0D -----------=0D qapi: Consistently permit any case in downstream prefixes=0D =0D We require lowercase __RFQDN_ downstream prefixes only where we=0D require the prefixed name to be lowercase. Don't; permit any case in=0D __RFQDN_ prefixes anywhere.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-13-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: d4f4cae8de19d2bdfcf09cdc4676e9b99857dcf2=0D https://github.com/qemu/qemu/commit/d4f4cae8de19d2bdfcf09cdc4676e9b= 99857dcf2=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/doc-good.json=0D M tests/qapi-schema/doc-good.out=0D M tests/qapi-schema/doc-good.txt=0D M tests/qapi-schema/doc-invalid-return.json=0D M tests/qapi-schema/event-case.err=0D M tests/qapi-schema/event-case.json=0D M tests/qapi-schema/event-case.out=0D M tests/qapi-schema/qapi-schema-test.json=0D M tests/qapi-schema/qapi-schema-test.out=0D M tests/unit/test-qmp-event.c=0D =0D Log Message:=0D -----------=0D qapi: Enforce event naming rules=0D =0D Event names should be ALL_CAPS with words separated by underscore.=0D Enforce this. The only offenders are in tests/. Fix them. Existing=0D test event-case covers the new error.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-14-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 3e6c8a633113fb6a60369c40cf2061de50727bf6=0D https://github.com/qemu/qemu/commit/3e6c8a633113fb6a60369c40cf2061d= e50727bf6=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/doc-bad-union-member.json=0D M tests/qapi-schema/double-type.err=0D M tests/qapi-schema/double-type.json=0D M tests/qapi-schema/features-deprecated-type.err=0D M tests/qapi-schema/features-deprecated-type.json=0D M tests/qapi-schema/meson.build=0D M tests/qapi-schema/redefined-builtin.err=0D M tests/qapi-schema/redefined-builtin.json=0D M tests/qapi-schema/redefined-type.err=0D M tests/qapi-schema/redefined-type.json=0D M tests/qapi-schema/struct-data-invalid.err=0D M tests/qapi-schema/struct-data-invalid.json=0D M tests/qapi-schema/struct-member-invalid-dict.err=0D M tests/qapi-schema/struct-member-invalid-dict.json=0D M tests/qapi-schema/struct-member-invalid.err=0D M tests/qapi-schema/struct-member-invalid.json=0D A tests/qapi-schema/type-case.err=0D A tests/qapi-schema/type-case.json=0D A tests/qapi-schema/type-case.out=0D M tests/qapi-schema/unknown-expr-key.err=0D M tests/qapi-schema/unknown-expr-key.json=0D =0D Log Message:=0D -----------=0D qapi: Enforce type naming rules=0D =0D Type names should be CamelCase. Enforce this. The only offenders are=0D= in tests/. Fix them. Add test type-case to cover the new error.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-15-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D [Regexp simplified, new test made more robust]=0D =0D =0D Commit: 492db12ec3b42be6f971ba8436e080bc096b58b5=0D https://github.com/qemu/qemu/commit/492db12ec3b42be6f971ba8436e080b= c096b58b5=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/meson.build=0D R tests/qapi-schema/redefined-builtin.err=0D R tests/qapi-schema/redefined-builtin.json=0D R tests/qapi-schema/redefined-builtin.out=0D A tests/qapi-schema/redefined-predefined.err=0D A tests/qapi-schema/redefined-predefined.json=0D A tests/qapi-schema/redefined-predefined.out=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Rename redefined-builtin to redefined-predefined=0D =0D The previous commit changed this test to clash with a predefined enum=0D type, not a built-in type. Adjust its name.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-16-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 4a67bd31a4a45773ed1e33ebd06ff949ff9525d7=0D https://github.com/qemu/qemu/commit/4a67bd31a4a45773ed1e33ebd06ff94= 9ff9525d7=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/parser.py=0D =0D Log Message:=0D -----------=0D qapi: Factor out QAPISchemaParser._check_pragma_list_of_str()=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-17-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: e90a61e3cc1ab30a2069173aee8b592933d827a1=0D https://github.com/qemu/qemu/commit/e90a61e3cc1ab30a2069173aee8b592= 933d827a1=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/meson.build=0D R tests/qapi-schema/pragma-doc-required-crap.err=0D R tests/qapi-schema/pragma-doc-required-crap.json=0D R tests/qapi-schema/pragma-doc-required-crap.out=0D R tests/qapi-schema/pragma-name-case-whitelist-crap.err=0D R tests/qapi-schema/pragma-name-case-whitelist-crap.json=0D R tests/qapi-schema/pragma-name-case-whitelist-crap.out=0D R tests/qapi-schema/pragma-returns-whitelist-crap.err=0D R tests/qapi-schema/pragma-returns-whitelist-crap.json=0D R tests/qapi-schema/pragma-returns-whitelist-crap.out=0D A tests/qapi-schema/pragma-value-not-bool.err=0D A tests/qapi-schema/pragma-value-not-bool.json=0D A tests/qapi-schema/pragma-value-not-bool.out=0D A tests/qapi-schema/pragma-value-not-list-of-str.err=0D A tests/qapi-schema/pragma-value-not-list-of-str.json=0D A tests/qapi-schema/pragma-value-not-list-of-str.out=0D A tests/qapi-schema/pragma-value-not-list.err=0D A tests/qapi-schema/pragma-value-not-list.json=0D A tests/qapi-schema/pragma-value-not-list.out=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Rename pragma-*-crap to pragma-value-not-*=0D =0D Rename pragma-doc-required-crap to pragma-not-bool,=0D pragma-returns-whitelist-crap to pragma-value-not-list, and=0D pragma-name-case-whitelist-crap to pragma-value-not-list-of-str.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-18-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: ef8b3829f6d194c856d7db34e14117e8ed90a396=0D https://github.com/qemu/qemu/commit/ef8b3829f6d194c856d7db34e14117e= 8ed90a396=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/qapi-schema/meson.build=0D A tests/qapi-schema/returns-bad-type.err=0D A tests/qapi-schema/returns-bad-type.json=0D A tests/qapi-schema/returns-bad-type.out=0D R tests/qapi-schema/returns-whitelist.err=0D R tests/qapi-schema/returns-whitelist.json=0D R tests/qapi-schema/returns-whitelist.out=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Rename returns-whitelist to returns-bad-type=0D =0D This test covers returning "bad" types. Pragma returns-whitelist is=0D just one aspect. Naming it returns-whitelist is suboptimal. Rename=0D to returns-bad-type.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-19-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: b86df374784897c58b965939c9913c2a6c590426=0D https://github.com/qemu/qemu/commit/b86df374784897c58b965939c9913c2= a6c590426=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/qapi-code-gen.txt=0D M qapi/pragma.json=0D M qga/qapi-schema.json=0D M scripts/qapi/expr.py=0D M scripts/qapi/parser.py=0D M scripts/qapi/schema.py=0D M scripts/qapi/source.py=0D M tests/qapi-schema/enum-member-case.json=0D M tests/qapi-schema/pragma-value-not-list-of-str.err=0D M tests/qapi-schema/pragma-value-not-list-of-str.json=0D M tests/qapi-schema/pragma-value-not-list.err=0D M tests/qapi-schema/pragma-value-not-list.json=0D M tests/qapi-schema/qapi-schema-test.json=0D M tests/qapi-schema/returns-bad-type.json=0D =0D Log Message:=0D -----------=0D qapi: Rename pragma *-whitelist to *-exceptions=0D =0D Rename pragma returns-whitelist to command-returns-exceptions, and=0D name-case-whitelist to member-name-case-exceptions.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-20-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: b48a1033041c52c2ae12bd38a2caa36fe46ef466=0D https://github.com/qemu/qemu/commit/b48a1033041c52c2ae12bd38a2caa36= fe46ef466=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M qapi/pragma.json=0D =0D Log Message:=0D -----------=0D qapi/pragma: Streamline comments on member-name-exceptions=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-21-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 6e2e12a70c0b7f7fe71a7938b9c49bdaa608ce58=0D https://github.com/qemu/qemu/commit/6e2e12a70c0b7f7fe71a7938b9c49bd= aa608ce58=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/test-qmp-cmds.c=0D =0D Log Message:=0D -----------=0D tests-qmp-cmds: Drop unused and incorrect qmp_TestIfCmd()=0D =0D Commit 967c885108 "qapi: add 'if' to top-level expressions" added=0D command TestIfCmd with an 'if' condition. It also added the=0D qmp_TestIfCmd() to go with it, guarded by the corresponding #if.=0D Commit ccadd6bcba "qapi: Add 'if' to implicit struct members" changed=0D the command, but not the function. Compiles only because we don't=0D satisfy the #if. Instead of fixing the function, simply drop it.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-22-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 9af4b6b9e80daeab2ce47664ff422b5e421814de=0D https://github.com/qemu/qemu/commit/9af4b6b9e80daeab2ce47664ff422b5= e421814de=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/args-member-case.err=0D M tests/qapi-schema/enum-member-case.err=0D M tests/qapi-schema/union-branch-case.err=0D =0D Log Message:=0D -----------=0D qapi: Prepare for rejecting underscore in command and member names=0D =0D Command names and member names within a type should be all lower case=0D with words separated by a hyphen. We also accept underscore. Rework=0D check_name_lower() to optionally reject underscores, but don't use=0D that option, yet.=0D =0D Update expected test output for the changed error message.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-23-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: e744708a7783624292f8c405ca840f50a10b0003=0D https://github.com/qemu/qemu/commit/e744708a7783624292f8c405ca840f5= 0a10b0003=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D =0D Log Message:=0D -----------=0D qapi: Enforce feature naming rules=0D =0D Feature names should use '-', not '_'. Enforce this.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-24-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 05ebf841efac494d8bd1f6d74642c3e9a3df4c19=0D https://github.com/qemu/qemu/commit/05ebf841efac494d8bd1f6d74642c3e= 9a3df4c19=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/qapi-code-gen.txt=0D M qapi/pragma.json=0D M scripts/qapi/expr.py=0D M scripts/qapi/parser.py=0D M scripts/qapi/source.py=0D M tests/qapi-schema/qapi-schema-test.json=0D M tests/qapi-schema/qapi-schema-test.out=0D M tests/unit/test-qmp-cmds.c=0D =0D Log Message:=0D -----------=0D qapi: Enforce command naming rules=0D =0D Command names should be lower-case. Enforce this. Fix the fixable=0D offenders (all in tests/), and add the remainder to pragma=0D command-name-exceptions.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-25-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: e75d4225b76842ec899f25e8ff39b070119f033f=0D https://github.com/qemu/qemu/commit/e75d4225b76842ec899f25e8ff39b07= 0119f033f=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D R tests/qapi-schema/args-name-clash.err=0D R tests/qapi-schema/args-name-clash.json=0D R tests/qapi-schema/args-name-clash.out=0D M tests/qapi-schema/meson.build=0D A tests/qapi-schema/struct-member-name-clash.err=0D A tests/qapi-schema/struct-member-name-clash.json=0D A tests/qapi-schema/struct-member-name-clash.out=0D =0D Log Message:=0D -----------=0D tests/qapi-schema: Switch member name clash test to struct=0D =0D Test args-name-clash covers command parameter name clash. This=0D effectively covers struct member name clash as well. The next commit=0D will make parameter name clash impossible. Convert args-name-clash=0D from testing command to testing a struct, and rename it to=0D struct-member-name-clash.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-26-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D [Commit message typo fixed]=0D =0D =0D Commit: 5aceeac04de50e3a9d5c2a965379324659a94be0=0D https://github.com/qemu/qemu/commit/5aceeac04de50e3a9d5c2a965379324= 659a94be0=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/qapi-code-gen.txt=0D M qapi/pragma.json=0D M qga/qapi-schema.json=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/qapi-schema-test.json=0D M tests/qapi-schema/qapi-schema-test.out=0D M tests/qapi-schema/struct-member-name-clash.err=0D M tests/qapi-schema/struct-member-name-clash.json=0D =0D Log Message:=0D -----------=0D qapi: Enforce struct member naming rules=0D =0D Struct members, including command arguments, event data, and union=0D inline base members, should use '-', not '_'. Enforce this. Fix the=0D fixable offenders (all in tests/), and add the remainder to pragma=0D member-name-exceptions.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-27-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: 407efbf9e776ade8e8d09b778851834f91b225a1=0D https://github.com/qemu/qemu/commit/407efbf9e776ade8e8d09b778851834= f91b225a1=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M qapi/pragma.json=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/enum-clash-member.err=0D M tests/qapi-schema/enum-clash-member.json=0D =0D Log Message:=0D -----------=0D qapi: Enforce enum member naming rules=0D =0D Enum members should use '-', not '_'. Enforce this. Fix the fixable=0D offenders (all in tests/), and add the remainder to pragma=0D member-name-exceptions.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-28-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D =0D =0D Commit: d83b47646ec2bdf4f7be9c2078f1bcbbb0544b2e=0D https://github.com/qemu/qemu/commit/d83b47646ec2bdf4f7be9c2078f1bcb= bb0544b2e=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M scripts/qapi/expr.py=0D M tests/qapi-schema/alternate-clash.err=0D M tests/qapi-schema/alternate-clash.json=0D M tests/qapi-schema/qapi-schema-test.json=0D M tests/qapi-schema/qapi-schema-test.out=0D M tests/qapi-schema/union-clash-branches.err=0D M tests/qapi-schema/union-clash-branches.json=0D =0D Log Message:=0D -----------=0D qapi: Enforce union and alternate branch naming rules=0D =0D Union branch names should use '-', not '_'. Enforce this. The only=0D offenders are in tests/. Fix them.=0D =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323094025.3569441-29-armbru@redhat.com>=0D Reviewed-by: Eric Blake =0D [Commit message typo fixed]=0D =0D =0D Commit: bdabafc6836edc0f34732cac473899cb4e77a296=0D https://github.com/qemu/qemu/commit/bdabafc6836edc0f34732cac473899c= b4e77a296=0D Author: Markus Armbruster =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M block/monitor/block-hmp-cmds.c=0D M blockdev.c=0D M hmp-commands.hx=0D M qapi/block-core.json=0D M qapi/pragma.json=0D =0D Log Message:=0D -----------=0D block: Remove monitor command block_passwd=0D =0D Command block_passwd always fails since=0D =0D Commit c01c214b69 "block: remove all encryption handling APIs"=0D (v2.10.0) turned block_passwd into a stub that always fails, and=0D hardcoded encryption_key_missing to false in query-named-block-nodes=0D and query-block.=0D =0D Commit ad1324e044 "block: remove 'encryption_key_missing' flag from=0D QAPI" just landed. Complete the cleanup job: remove block_passwd.=0D =0D Cc: Daniel P. Berrang=C3=A9 =0D Signed-off-by: Markus Armbruster =0D Message-Id: <20210323101951.3686029-1-armbru@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D =0D =0D Commit: 266469947161aa10b1d36843580d369d5aa38589=0D https://github.com/qemu/qemu/commit/266469947161aa10b1d36843580d369= d5aa38589=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M block/monitor/block-hmp-cmds.c=0D M blockdev.c=0D M docs/devel/qapi-code-gen.txt=0D M hmp-commands.hx=0D M qapi/block-core.json=0D M qapi/pragma.json=0D M qga/qapi-schema.json=0D M scripts/qapi/common.py=0D M scripts/qapi/expr.py=0D M scripts/qapi/parser.py=0D M scripts/qapi/schema.py=0D M scripts/qapi/source.py=0D M tests/qapi-schema/alternate-clash.err=0D M tests/qapi-schema/alternate-clash.json=0D M tests/qapi-schema/args-member-case.err=0D R tests/qapi-schema/args-name-clash.err=0D R tests/qapi-schema/args-name-clash.json=0D R tests/qapi-schema/args-name-clash.out=0D M tests/qapi-schema/doc-bad-union-member.json=0D M tests/qapi-schema/doc-good.json=0D M tests/qapi-schema/doc-good.out=0D M tests/qapi-schema/doc-good.txt=0D M tests/qapi-schema/doc-invalid-return.json=0D M tests/qapi-schema/double-type.err=0D M tests/qapi-schema/double-type.json=0D M tests/qapi-schema/enum-clash-member.err=0D M tests/qapi-schema/enum-clash-member.json=0D M tests/qapi-schema/enum-member-case.err=0D M tests/qapi-schema/enum-member-case.json=0D M tests/qapi-schema/event-case.err=0D M tests/qapi-schema/event-case.json=0D M tests/qapi-schema/event-case.out=0D M tests/qapi-schema/event-member-invalid-dict.err=0D M tests/qapi-schema/event-member-invalid-dict.json=0D M tests/qapi-schema/features-deprecated-type.err=0D M tests/qapi-schema/features-deprecated-type.json=0D M tests/qapi-schema/flat-union-inline-invalid-dict.json=0D R tests/qapi-schema/flat-union-inline.err=0D R tests/qapi-schema/flat-union-inline.json=0D R tests/qapi-schema/flat-union-inline.out=0D M tests/qapi-schema/flat-union-no-base.err=0D M tests/qapi-schema/flat-union-no-base.json=0D M tests/qapi-schema/meson.build=0D M tests/qapi-schema/nested-struct-data-invalid-dict.err=0D M tests/qapi-schema/nested-struct-data-invalid-dict.json=0D M tests/qapi-schema/nested-struct-data.json=0D R tests/qapi-schema/pragma-doc-required-crap.err=0D R tests/qapi-schema/pragma-doc-required-crap.json=0D R tests/qapi-schema/pragma-doc-required-crap.out=0D R tests/qapi-schema/pragma-name-case-whitelist-crap.err=0D R tests/qapi-schema/pragma-name-case-whitelist-crap.json=0D R tests/qapi-schema/pragma-name-case-whitelist-crap.out=0D R tests/qapi-schema/pragma-returns-whitelist-crap.err=0D R tests/qapi-schema/pragma-returns-whitelist-crap.json=0D R tests/qapi-schema/pragma-returns-whitelist-crap.out=0D A tests/qapi-schema/pragma-value-not-bool.err=0D A tests/qapi-schema/pragma-value-not-bool.json=0D A tests/qapi-schema/pragma-value-not-bool.out=0D A tests/qapi-schema/pragma-value-not-list-of-str.err=0D A tests/qapi-schema/pragma-value-not-list-of-str.json=0D A tests/qapi-schema/pragma-value-not-list-of-str.out=0D A tests/qapi-schema/pragma-value-not-list.err=0D A tests/qapi-schema/pragma-value-not-list.json=0D A tests/qapi-schema/pragma-value-not-list.out=0D M tests/qapi-schema/qapi-schema-test.json=0D M tests/qapi-schema/qapi-schema-test.out=0D R tests/qapi-schema/redefined-builtin.err=0D R tests/qapi-schema/redefined-builtin.json=0D R tests/qapi-schema/redefined-builtin.out=0D A tests/qapi-schema/redefined-predefined.err=0D A tests/qapi-schema/redefined-predefined.json=0D A tests/qapi-schema/redefined-predefined.out=0D M tests/qapi-schema/redefined-type.err=0D M tests/qapi-schema/redefined-type.json=0D M tests/qapi-schema/reserved-member-u.err=0D M tests/qapi-schema/reserved-member-u.json=0D A tests/qapi-schema/returns-bad-type.err=0D A tests/qapi-schema/returns-bad-type.json=0D A tests/qapi-schema/returns-bad-type.out=0D R tests/qapi-schema/returns-whitelist.err=0D R tests/qapi-schema/returns-whitelist.json=0D R tests/qapi-schema/returns-whitelist.out=0D M tests/qapi-schema/struct-data-invalid.err=0D M tests/qapi-schema/struct-data-invalid.json=0D M tests/qapi-schema/struct-member-invalid-dict.err=0D M tests/qapi-schema/struct-member-invalid-dict.json=0D M tests/qapi-schema/struct-member-invalid.err=0D M tests/qapi-schema/struct-member-invalid.json=0D A tests/qapi-schema/struct-member-name-clash.err=0D A tests/qapi-schema/struct-member-name-clash.json=0D A tests/qapi-schema/struct-member-name-clash.out=0D A tests/qapi-schema/type-case.err=0D A tests/qapi-schema/type-case.json=0D A tests/qapi-schema/type-case.out=0D M tests/qapi-schema/union-branch-case.err=0D M tests/qapi-schema/union-clash-branches.err=0D M tests/qapi-schema/union-clash-branches.json=0D M tests/qapi-schema/unknown-expr-key.err=0D M tests/qapi-schema/unknown-expr-key.json=0D M tests/unit/test-qmp-cmds.c=0D M tests/unit/test-qmp-event.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2021-03-23'= into staging=0D =0D QAPI patches patches for 2021-03-23=0D =0D # gpg: Signature made Tue 23 Mar 2021 21:37:53 GMT=0D # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918= 653=0D # gpg: issuer "armbru@redhat.com"=0D # gpg: Good signature from "Markus Armbruster " [full]= =0D # gpg: aka "Markus Armbruster " [ful= l]=0D # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 = 8653=0D =0D * remotes/armbru/tags/pull-qapi-2021-03-23: (29 commits)=0D block: Remove monitor command block_passwd=0D qapi: Enforce union and alternate branch naming rules=0D qapi: Enforce enum member naming rules=0D qapi: Enforce struct member naming rules=0D tests/qapi-schema: Switch member name clash test to struct=0D qapi: Enforce command naming rules=0D qapi: Enforce feature naming rules=0D qapi: Prepare for rejecting underscore in command and member names=0D tests-qmp-cmds: Drop unused and incorrect qmp_TestIfCmd()=0D qapi/pragma: Streamline comments on member-name-exceptions=0D qapi: Rename pragma *-whitelist to *-exceptions=0D tests/qapi-schema: Rename returns-whitelist to returns-bad-type=0D tests/qapi-schema: Rename pragma-*-crap to pragma-value-not-*=0D qapi: Factor out QAPISchemaParser._check_pragma_list_of_str()=0D tests/qapi-schema: Rename redefined-builtin to redefined-predefined=0D qapi: Enforce type naming rules=0D qapi: Enforce event naming rules=0D qapi: Consistently permit any case in downstream prefixes=0D qapi: Move uppercase rejection to check_name_lower()=0D qapi: Rework name checking in preparation of stricter checking=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/1a4d83b5643e...266469947161= =0D From MAILER-DAEMON Tue Mar 23 19:53:08 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lOqpg-0002s9-DE for mharc-qemu-commits@gnu.org; Tue, 23 Mar 2021 19:53:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:47056) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOqpf-0002rN-8j for qemu-commits@nongnu.org; Tue, 23 Mar 2021 19:53:07 -0400 Received: from out-18.smtp.github.com ([192.30.252.201]:59597 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOqpd-0006YW-8D for qemu-commits@nongnu.org; Tue, 23 Mar 2021 19:53:06 -0400 Received: from github.com (hubbernetes-node-9bee3b4.va3-iad.github.net [10.48.110.37]) by smtp.github.com (Postfix) with ESMTPA id 6A81B3407F4 for ; Tue, 23 Mar 2021 16:53:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616543584; bh=z9GzjPt6vEbTTKrTj2hjXXAjAReuD2AgawF3nN+ExXg=; h=Date:From:To:Subject:From; b=utTQjHoPX8yBBBuCJqda82w5MCVRWeyYH+jjpzzyxGaPD/eDpSWm1lPAht5sFrDJ7 50d6EGRnpwtwEX8xfFgb+VJ1bCosWsjhMwk0/hu1UDaJS1eJqpbiI/iLDEznea1/EE R9DJvp0+ZIQMZsQQNkt3k3dhMPkUpU2kRDEnEGk4= Date: Tue, 23 Mar 2021 16:53:04 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] a29acc: crypto: add reload for QCryptoTLSCredsClass X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Mar 2021 23:53:07 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: a29acc9c318781b59063091b895773fc6cbe96e7=0D https://github.com/qemu/qemu/commit/a29acc9c318781b59063091b895773f= c6cbe96e7=0D Author: Zihao Chang =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M crypto/tlscredsx509.c=0D M include/crypto/tlscreds.h=0D =0D Log Message:=0D -----------=0D crypto: add reload for QCryptoTLSCredsClass=0D =0D This patch adds reload interface for QCryptoTLSCredsClass and implements=0D= the interface for QCryptoTLSCredsX509.=0D =0D Signed-off-by: Zihao Chang =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210316075845.1476-2-changzihao1@huawei.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 1f08e3415120637cad7f540d9ceb4dba3136dbdd=0D https://github.com/qemu/qemu/commit/1f08e3415120637cad7f540d9ceb4db= a3136dbdd=0D Author: Zihao Chang =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M include/ui/console.h=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D vnc: support reload x509 certificates for vnc=0D =0D This patch add vnc_display_reload_certs() to support=0D update x509 certificates.=0D =0D Signed-off-by: Zihao Chang =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210316075845.1476-3-changzihao1@huawei.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 9cc07651655ee86eca41059f5ead8c4e5607c734=0D https://github.com/qemu/qemu/commit/9cc07651655ee86eca41059f5ead8c4= e5607c734=0D Author: Zihao Chang =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M monitor/qmp-cmds.c=0D M qapi/ui.json=0D =0D Log Message:=0D -----------=0D qmp: add new qmp display-reload=0D =0D This patch provides a new qmp to reload display configuration=0D without restart VM, but only reloading the vnc tls certificates=0D is implemented.=0D Example:=0D {"execute": "display-reload", "arguments":{"type": "vnc", "tls-certs": tr= ue}}=0D =0D Signed-off-by: Zihao Chang =0D Message-Id: <20210316075845.1476-4-changzihao1@huawei.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 181b4bbf610c9126f499e2c516fb9b2a880468b8=0D https://github.com/qemu/qemu/commit/181b4bbf610c9126f499e2c516fb9b2= a880468b8=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M include/ui/console.h=0D =0D Log Message:=0D -----------=0D include/ui/console.h: Delete is_surface_bgr()=0D =0D The function is_surface_bgr() is no longer used anywhere,=0D so we can delete it.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210314163927.1184-1-peter.maydell@linaro.org>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 40c503079ffcb5394be2b407e817de6104db9cfc=0D https://github.com/qemu/qemu/commit/40c503079ffcb5394be2b407e817de6= 104db9cfc=0D Author: Gerd Hoffmann =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M hw/display/edid-generate.c=0D =0D Log Message:=0D -----------=0D edid: prefer standard timings=0D =0D Windows guests using the "Basic Display Adapter" don't parse the=0D "Established timings III" block. They also don't parse any edid=0D extension.=0D =0D So prefer the "Standard Timings" block to store the display resolutions=0D= in edid_fill_modes(). Also reorder the mode list, so more exotic=0D resolutions (specifically the ones which are not supported by vgabios)=0D= are moved down and the remaining ones have a better chance to get one of=0D= the eight slots in the "Standard Timings" block.=0D =0D Signed-off-by: Gerd Hoffmann =0D Message-Id: <20210316143812.2363588-6-kraxel@redhat.com>=0D =0D =0D Commit: 67c1115edd98f388ca89dd38322ea3fadf034523=0D https://github.com/qemu/qemu/commit/67c1115edd98f388ca89dd38322ea3f= adf034523=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M crypto/tlscredsx509.c=0D M hw/display/edid-generate.c=0D M include/crypto/tlscreds.h=0D M include/ui/console.h=0D M monitor/qmp-cmds.c=0D M qapi/ui.json=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kraxel/tags/ui-20210323-pull-requ= est' into staging=0D =0D fixes for 6.0=0D =0D # gpg: Signature made Tue 23 Mar 2021 15:36:06 GMT=0D # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87= 138=0D # gpg: Good signature from "Gerd Hoffmann (work) " [fu= ll]=0D # gpg: aka "Gerd Hoffmann " [full]=0D # gpg: aka "Gerd Hoffmann (private) " [= full]=0D # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 = 7138=0D =0D * remotes/kraxel/tags/ui-20210323-pull-request:=0D edid: prefer standard timings=0D include/ui/console.h: Delete is_surface_bgr()=0D qmp: add new qmp display-reload=0D vnc: support reload x509 certificates for vnc=0D crypto: add reload for QCryptoTLSCredsClass=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/266469947161...67c1115edd98= =0D From MAILER-DAEMON Wed Mar 24 07:15:31 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lP1U0-0001nk-33 for mharc-qemu-commits@gnu.org; Wed, 24 Mar 2021 07:15:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50558) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP1To-0001mo-9j for qemu-commits@nongnu.org; Wed, 24 Mar 2021 07:15:20 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:56969 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP1Te-0001VO-0L for qemu-commits@nongnu.org; Wed, 24 Mar 2021 07:15:12 -0400 Received: from github.com (hubbernetes-node-0b7c8c1.va3-iad.github.net [10.48.100.67]) by smtp.github.com (Postfix) with ESMTPA id BAF895C0094 for ; Wed, 24 Mar 2021 04:15:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616584504; bh=ltC7r6T0rGWrp2IMNJEybh+WqUAOQJSZ+8XcgUA9LUk=; h=Date:From:To:Subject:From; b=Vqi+fUfLGZXZ7hcuK7uAlC5CwNgd4RaUFAeT2I3BDEHbLLEomE98rqWx2hT4vSvWK EX/59ZCtXrolwuTPRbM8+u03fK6BIlzm3ekCph3+MLDwKs2aF76DEsBPaK+loqNYK8 yYHVyfVNGeNrX0fzhfdr0khdrR7WU4Ja0Mm9JdVw= Date: Wed, 24 Mar 2021 04:15:04 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] a29acc: crypto: add reload for QCryptoTLSCredsClass X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Mar 2021 11:15:20 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: a29acc9c318781b59063091b895773fc6cbe96e7=0D https://github.com/qemu/qemu/commit/a29acc9c318781b59063091b895773f= c6cbe96e7=0D Author: Zihao Chang =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M crypto/tlscredsx509.c=0D M include/crypto/tlscreds.h=0D =0D Log Message:=0D -----------=0D crypto: add reload for QCryptoTLSCredsClass=0D =0D This patch adds reload interface for QCryptoTLSCredsClass and implements=0D= the interface for QCryptoTLSCredsX509.=0D =0D Signed-off-by: Zihao Chang =0D Acked-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210316075845.1476-2-changzihao1@huawei.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 1f08e3415120637cad7f540d9ceb4dba3136dbdd=0D https://github.com/qemu/qemu/commit/1f08e3415120637cad7f540d9ceb4db= a3136dbdd=0D Author: Zihao Chang =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M include/ui/console.h=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D vnc: support reload x509 certificates for vnc=0D =0D This patch add vnc_display_reload_certs() to support=0D update x509 certificates.=0D =0D Signed-off-by: Zihao Chang =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210316075845.1476-3-changzihao1@huawei.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 9cc07651655ee86eca41059f5ead8c4e5607c734=0D https://github.com/qemu/qemu/commit/9cc07651655ee86eca41059f5ead8c4= e5607c734=0D Author: Zihao Chang =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M monitor/qmp-cmds.c=0D M qapi/ui.json=0D =0D Log Message:=0D -----------=0D qmp: add new qmp display-reload=0D =0D This patch provides a new qmp to reload display configuration=0D without restart VM, but only reloading the vnc tls certificates=0D is implemented.=0D Example:=0D {"execute": "display-reload", "arguments":{"type": "vnc", "tls-certs": tr= ue}}=0D =0D Signed-off-by: Zihao Chang =0D Message-Id: <20210316075845.1476-4-changzihao1@huawei.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 181b4bbf610c9126f499e2c516fb9b2a880468b8=0D https://github.com/qemu/qemu/commit/181b4bbf610c9126f499e2c516fb9b2= a880468b8=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M include/ui/console.h=0D =0D Log Message:=0D -----------=0D include/ui/console.h: Delete is_surface_bgr()=0D =0D The function is_surface_bgr() is no longer used anywhere,=0D so we can delete it.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210314163927.1184-1-peter.maydell@linaro.org>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 40c503079ffcb5394be2b407e817de6104db9cfc=0D https://github.com/qemu/qemu/commit/40c503079ffcb5394be2b407e817de6= 104db9cfc=0D Author: Gerd Hoffmann =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M hw/display/edid-generate.c=0D =0D Log Message:=0D -----------=0D edid: prefer standard timings=0D =0D Windows guests using the "Basic Display Adapter" don't parse the=0D "Established timings III" block. They also don't parse any edid=0D extension.=0D =0D So prefer the "Standard Timings" block to store the display resolutions=0D= in edid_fill_modes(). Also reorder the mode list, so more exotic=0D resolutions (specifically the ones which are not supported by vgabios)=0D= are moved down and the remaining ones have a better chance to get one of=0D= the eight slots in the "Standard Timings" block.=0D =0D Signed-off-by: Gerd Hoffmann =0D Message-Id: <20210316143812.2363588-6-kraxel@redhat.com>=0D =0D =0D Commit: 67c1115edd98f388ca89dd38322ea3fadf034523=0D https://github.com/qemu/qemu/commit/67c1115edd98f388ca89dd38322ea3f= adf034523=0D Author: Peter Maydell =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M crypto/tlscredsx509.c=0D M hw/display/edid-generate.c=0D M include/crypto/tlscreds.h=0D M include/ui/console.h=0D M monitor/qmp-cmds.c=0D M qapi/ui.json=0D M ui/vnc.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kraxel/tags/ui-20210323-pull-requ= est' into staging=0D =0D fixes for 6.0=0D =0D # gpg: Signature made Tue 23 Mar 2021 15:36:06 GMT=0D # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87= 138=0D # gpg: Good signature from "Gerd Hoffmann (work) " [fu= ll]=0D # gpg: aka "Gerd Hoffmann " [full]=0D # gpg: aka "Gerd Hoffmann (private) " [= full]=0D # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 = 7138=0D =0D * remotes/kraxel/tags/ui-20210323-pull-request:=0D edid: prefer standard timings=0D include/ui/console.h: Delete is_surface_bgr()=0D qmp: add new qmp display-reload=0D vnc: support reload x509 certificates for vnc=0D crypto: add reload for QCryptoTLSCredsClass=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/266469947161...67c1115edd98= =0D From MAILER-DAEMON Wed Mar 24 07:22:47 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lP1b5-0005NN-ED for mharc-qemu-commits@gnu.org; Wed, 24 Mar 2021 07:22:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51914) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP1b4-0005ND-53 for qemu-commits@nongnu.org; Wed, 24 Mar 2021 07:22:46 -0400 Received: from out-21.smtp.github.com ([192.30.252.204]:35743 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP1b1-00060r-F3 for qemu-commits@nongnu.org; Wed, 24 Mar 2021 07:22:45 -0400 Received: from github.com (hubbernetes-node-1f6166e.ac4-iad.github.net [10.52.200.63]) by smtp.github.com (Postfix) with ESMTPA id D0E535208FE for ; Wed, 24 Mar 2021 04:22:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616584962; bh=yU4DptQe7HE/kdo37SBUVZ2HzWFzUa0ctSkvfbhjgqo=; h=Date:From:To:Subject:From; b=HduQdEeApjAnZUfp/i/3iIThISu3gsPBlbI7OssXHAdvxYE/y/akaplr4bRl4/vPI G8ezb/8Hzju8Z9dJbmXgstVC4TpynVFDgzIMILjxKRLsN+me4okKfpvDn5tyH5H0Q4 MVJJrCTnMvqERgc1qrUiQaQ06Ufh/Sw7INVlgSw4= Date: Wed, 24 Mar 2021 04:22:42 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 15c4e8: tcg: Do not set guard pages on the rx portion of c... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Mar 2021 11:22:46 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 15c4e8fe44e34eee4a13135eeb121b3b26e4cd1b=0D https://github.com/qemu/qemu/commit/15c4e8fe44e34eee4a13135eeb121b3= b26e4cd1b=0D Author: Richard Henderson =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tcg/tcg.c=0D =0D Log Message:=0D -----------=0D tcg: Do not set guard pages on the rx portion of code_gen_buffer=0D =0D The rw portion of the buffer is the only one in which overruns=0D can be generated. Allow the rx portion to be more completely=0D covered by huge pages.=0D =0D Signed-off-by: Richard Henderson =0D Tested-by: Roman Bolshakov =0D Reviewed-by: Roman Bolshakov =0D Message-Id: <20210320165720.1813545-2-richard.henderson@linaro.org>=0D =0D =0D Commit: c118881ee607dcac661b89893de07cbcbaeb304c=0D https://github.com/qemu/qemu/commit/c118881ee607dcac661b89893de07cb= cbaeb304c=0D Author: Richard Henderson =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tcg/tcg.c=0D =0D Log Message:=0D -----------=0D tcg: Workaround macOS 11.2 mprotect bug=0D =0D There's a change in mprotect() behaviour [1] in the latest macOS=0D on M1 and it's not yet clear if it's going to be fixed by Apple.=0D =0D As a short-term fix, ignore failures setting up the guard pages.=0D =0D [1] https://gist.github.com/hikalium/75ae822466ee4da13cbbe486498a191f=0D =0D Signed-off-by: Richard Henderson =0D Tested-by: Roman Bolshakov =0D Reviewed-by: Roman Bolshakov =0D Buglink: https://bugs.launchpad.net/qemu/+bug/1914849=0D Message-Id: <20210320165720.1813545-3-richard.henderson@linaro.org>=0D =0D =0D Commit: 6670d4d0e38249323df755a92ffdf04f2c6b7894=0D https://github.com/qemu/qemu/commit/6670d4d0e38249323df755a92ffdf04= f2c6b7894=0D Author: Richard Henderson =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D R exec-vary.c=0D M meson.build=0D A page-vary.c=0D =0D Log Message:=0D -----------=0D exec: Rename exec-vary.c as page-vary.c=0D =0D exec-vary.c is about variable page size handling,=0D rename it page-vary.c. Currently this file is target=0D specific (built once for each target), comment this.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210322112427.4045204-2-f4bug@amsat.org>=0D [rth: Update MAINTAINERS]=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 27eb9d65ff5121ed11979dd57d9ec2b6c2315c01=0D https://github.com/qemu/qemu/commit/27eb9d65ff5121ed11979dd57d9ec2b= 6c2315c01=0D Author: Richard Henderson =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M include/exec/cpu-all.h=0D A include/exec/page-vary.h=0D =0D Log Message:=0D -----------=0D exec: Extract 'page-vary.h' header=0D =0D In the next commit we will extract the generic code out of=0D page-vary.c, only keeping the target specific code. Both=0D files will use the same TargetPageBits structure, so make=0D its declaration in a shared header.=0D =0D As the common header can not use target specific types,=0D use a uint64_t to hold the page mask value, and add a=0D cast back to target_long in the TARGET_PAGE_MASK definitions.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210322112427.4045204-3-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 44b99a6d5f24afcd8476d0d2701e1ca4ab9b35c1=0D https://github.com/qemu/qemu/commit/44b99a6d5f24afcd8476d0d2701e1ca= 4ab9b35c1=0D Author: Richard Henderson =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M configure=0D M include/exec/cpu-all.h=0D M include/exec/page-vary.h=0D M meson.build=0D A page-vary-common.c=0D M page-vary.c=0D =0D Log Message:=0D -----------=0D exec: Build page-vary-common.c with -fno-lto=0D =0D In bbc17caf81f, we used an alias attribute to allow target_page=0D to be declared const, and yet be initialized late.=0D =0D This fails when using LTO with several versions of gcc.=0D The compiler looks through the alias and decides that the const=0D variable is statically initialized to zero, then propagates that=0D zero to many uses of the variable.=0D =0D This can be avoided by compiling one object file with -fno-lto.=0D In this way, any initializer cannot be seen, and the constant=0D propagation does not occur.=0D =0D Since we are certain to have this separate compilation unit, we=0D can drop the alias attribute as well. We simply have differing=0D declarations for target_page in different compilation units.=0D Drop the use of init_target_page, and drop the configure detection=0D for CONFIG_ATTRIBUTE_ALIAS.=0D =0D In order to change the compilation flags for a file with meson,=0D we must use a static_library. This runs into specific_ss, where=0D we would need to create many static_library instances.=0D =0D Fix this by splitting page-vary.c: the page-vary-common.c part is=0D compiled once as a static_library, while the page-vary.c part is=0D left in specific_ss in order to handle the target-specific value=0D of TARGET_PAGE_BITS_MIN.=0D =0D Reported-by: Gavin Shan =0D Signed-off-by: Richard Henderson =0D Message-Id: <20210321211534.2101231-1-richard.henderson@linaro.org>=0D [PMD: Fix typo in subject, split original patch in 3]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Gavin Shan =0D Message-Id: <20210322112427.4045204-4-f4bug@amsat.org>=0D [rth: Update MAINTAINERS]=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 01874b15d36e3f9a3506c47941a92ccf8d8bed98=0D https://github.com/qemu/qemu/commit/01874b15d36e3f9a3506c47941a92cc= f8d8bed98=0D Author: Peter Maydell =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M configure=0D R exec-vary.c=0D M include/exec/cpu-all.h=0D A include/exec/page-vary.h=0D M meson.build=0D A page-vary-common.c=0D A page-vary.c=0D M tcg/tcg.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20210323' into = staging=0D =0D Workaround for macos mprotect=0D Workaround for target_page vs -flto=0D =0D # gpg: Signature made Wed 24 Mar 2021 01:40:12 GMT=0D # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E2= 15F=0D # gpg: issuer "richard.henderson@linaro.org"=0D # gpg: Good signature from "Richard Henderson " [full]=0D # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E = 215F=0D =0D * remotes/rth/tags/pull-tcg-20210323:=0D exec: Build page-vary-common.c with -fno-lto=0D exec: Extract 'page-vary.h' header=0D exec: Rename exec-vary.c as page-vary.c=0D tcg: Workaround macOS 11.2 mprotect bug=0D tcg: Do not set guard pages on the rx portion of code_gen_buffer=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/67c1115edd98...01874b15d36e= =0D From MAILER-DAEMON Wed Mar 24 09:22:54 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lP3TK-0004zj-95 for mharc-qemu-commits@gnu.org; Wed, 24 Mar 2021 09:22:54 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34194) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP3TI-0004vX-LS for qemu-commits@nongnu.org; Wed, 24 Mar 2021 09:22:52 -0400 Received: from out-19.smtp.github.com ([192.30.252.202]:55099) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP3T9-0000Hx-2q for qemu-commits@nongnu.org; Wed, 24 Mar 2021 09:22:51 -0400 Received: from github.com (hubbernetes-node-72afee8.va3-iad.github.net [10.48.17.21]) by smtp.github.com (Postfix) with ESMTPA id 2819AE0578 for ; Wed, 24 Mar 2021 06:22:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616592162; bh=nN7gvyOGqTkXPQZYDZVk/MObmdEH09e+jObLi+dNrOw=; h=Date:From:To:Subject:From; b=FeW0ptoMAoHUafAAf4E+AyDXI5yLHoVyR8vhxSpRy6pIWTlZ5cC1vXHoB7vyEAUyj RrOLLgIdt0lnYKeeY2uZ9+kI5u4nkAIvcEt72fsIxwb081x1zEDP+hqDMVkQpM3iCa aSOC/wkLgqv/b+QlmjjvxRuPIK5AO9bDiJ9tLyKU= Date: Wed, 24 Mar 2021 06:22:42 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.202; envelope-from=noreply@github.com; helo=out-19.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 15c4e8: tcg: Do not set guard pages on the rx portion of c... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Mar 2021 13:22:53 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 15c4e8fe44e34eee4a13135eeb121b3b26e4cd1b=0D https://github.com/qemu/qemu/commit/15c4e8fe44e34eee4a13135eeb121b3= b26e4cd1b=0D Author: Richard Henderson =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tcg/tcg.c=0D =0D Log Message:=0D -----------=0D tcg: Do not set guard pages on the rx portion of code_gen_buffer=0D =0D The rw portion of the buffer is the only one in which overruns=0D can be generated. Allow the rx portion to be more completely=0D covered by huge pages.=0D =0D Signed-off-by: Richard Henderson =0D Tested-by: Roman Bolshakov =0D Reviewed-by: Roman Bolshakov =0D Message-Id: <20210320165720.1813545-2-richard.henderson@linaro.org>=0D =0D =0D Commit: c118881ee607dcac661b89893de07cbcbaeb304c=0D https://github.com/qemu/qemu/commit/c118881ee607dcac661b89893de07cb= cbaeb304c=0D Author: Richard Henderson =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M tcg/tcg.c=0D =0D Log Message:=0D -----------=0D tcg: Workaround macOS 11.2 mprotect bug=0D =0D There's a change in mprotect() behaviour [1] in the latest macOS=0D on M1 and it's not yet clear if it's going to be fixed by Apple.=0D =0D As a short-term fix, ignore failures setting up the guard pages.=0D =0D [1] https://gist.github.com/hikalium/75ae822466ee4da13cbbe486498a191f=0D =0D Signed-off-by: Richard Henderson =0D Tested-by: Roman Bolshakov =0D Reviewed-by: Roman Bolshakov =0D Buglink: https://bugs.launchpad.net/qemu/+bug/1914849=0D Message-Id: <20210320165720.1813545-3-richard.henderson@linaro.org>=0D =0D =0D Commit: 6670d4d0e38249323df755a92ffdf04f2c6b7894=0D https://github.com/qemu/qemu/commit/6670d4d0e38249323df755a92ffdf04= f2c6b7894=0D Author: Richard Henderson =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D R exec-vary.c=0D M meson.build=0D A page-vary.c=0D =0D Log Message:=0D -----------=0D exec: Rename exec-vary.c as page-vary.c=0D =0D exec-vary.c is about variable page size handling,=0D rename it page-vary.c. Currently this file is target=0D specific (built once for each target), comment this.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210322112427.4045204-2-f4bug@amsat.org>=0D [rth: Update MAINTAINERS]=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 27eb9d65ff5121ed11979dd57d9ec2b6c2315c01=0D https://github.com/qemu/qemu/commit/27eb9d65ff5121ed11979dd57d9ec2b= 6c2315c01=0D Author: Richard Henderson =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M include/exec/cpu-all.h=0D A include/exec/page-vary.h=0D =0D Log Message:=0D -----------=0D exec: Extract 'page-vary.h' header=0D =0D In the next commit we will extract the generic code out of=0D page-vary.c, only keeping the target specific code. Both=0D files will use the same TargetPageBits structure, so make=0D its declaration in a shared header.=0D =0D As the common header can not use target specific types,=0D use a uint64_t to hold the page mask value, and add a=0D cast back to target_long in the TARGET_PAGE_MASK definitions.=0D =0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210322112427.4045204-3-f4bug@amsat.org>=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 44b99a6d5f24afcd8476d0d2701e1ca4ab9b35c1=0D https://github.com/qemu/qemu/commit/44b99a6d5f24afcd8476d0d2701e1ca= 4ab9b35c1=0D Author: Richard Henderson =0D Date: 2021-03-23 (Tue, 23 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M configure=0D M include/exec/cpu-all.h=0D M include/exec/page-vary.h=0D M meson.build=0D A page-vary-common.c=0D M page-vary.c=0D =0D Log Message:=0D -----------=0D exec: Build page-vary-common.c with -fno-lto=0D =0D In bbc17caf81f, we used an alias attribute to allow target_page=0D to be declared const, and yet be initialized late.=0D =0D This fails when using LTO with several versions of gcc.=0D The compiler looks through the alias and decides that the const=0D variable is statically initialized to zero, then propagates that=0D zero to many uses of the variable.=0D =0D This can be avoided by compiling one object file with -fno-lto.=0D In this way, any initializer cannot be seen, and the constant=0D propagation does not occur.=0D =0D Since we are certain to have this separate compilation unit, we=0D can drop the alias attribute as well. We simply have differing=0D declarations for target_page in different compilation units.=0D Drop the use of init_target_page, and drop the configure detection=0D for CONFIG_ATTRIBUTE_ALIAS.=0D =0D In order to change the compilation flags for a file with meson,=0D we must use a static_library. This runs into specific_ss, where=0D we would need to create many static_library instances.=0D =0D Fix this by splitting page-vary.c: the page-vary-common.c part is=0D compiled once as a static_library, while the page-vary.c part is=0D left in specific_ss in order to handle the target-specific value=0D of TARGET_PAGE_BITS_MIN.=0D =0D Reported-by: Gavin Shan =0D Signed-off-by: Richard Henderson =0D Message-Id: <20210321211534.2101231-1-richard.henderson@linaro.org>=0D [PMD: Fix typo in subject, split original patch in 3]=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Tested-by: Gavin Shan =0D Message-Id: <20210322112427.4045204-4-f4bug@amsat.org>=0D [rth: Update MAINTAINERS]=0D Signed-off-by: Richard Henderson =0D =0D =0D Commit: 01874b15d36e3f9a3506c47941a92ccf8d8bed98=0D https://github.com/qemu/qemu/commit/01874b15d36e3f9a3506c47941a92cc= f8d8bed98=0D Author: Peter Maydell =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M configure=0D R exec-vary.c=0D M include/exec/cpu-all.h=0D A include/exec/page-vary.h=0D M meson.build=0D A page-vary-common.c=0D A page-vary.c=0D M tcg/tcg.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20210323' into = staging=0D =0D Workaround for macos mprotect=0D Workaround for target_page vs -flto=0D =0D # gpg: Signature made Wed 24 Mar 2021 01:40:12 GMT=0D # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E2= 15F=0D # gpg: issuer "richard.henderson@linaro.org"=0D # gpg: Good signature from "Richard Henderson " [full]=0D # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E = 215F=0D =0D * remotes/rth/tags/pull-tcg-20210323:=0D exec: Build page-vary-common.c with -fno-lto=0D exec: Extract 'page-vary.h' header=0D exec: Rename exec-vary.c as page-vary.c=0D tcg: Workaround macOS 11.2 mprotect bug=0D tcg: Do not set guard pages on the rx portion of code_gen_buffer=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/67c1115edd98...01874b15d36e= =0D From MAILER-DAEMON Wed Mar 24 10:34:20 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lP4aR-0001FR-SV for mharc-qemu-commits@gnu.org; Wed, 24 Mar 2021 10:34:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52644) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP4aQ-0001Au-I3 for qemu-commits@nongnu.org; Wed, 24 Mar 2021 10:34:18 -0400 Received: from out-20.smtp.github.com ([192.30.252.203]:35993) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP4aM-0000i6-FV for qemu-commits@nongnu.org; Wed, 24 Mar 2021 10:34:17 -0400 Received: from github.com (hubbernetes-node-2bb7979.va3-iad.github.net [10.48.100.62]) by smtp.github.com (Postfix) with ESMTPA id DBAEAE093E for ; Wed, 24 Mar 2021 07:34:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616596453; bh=Ro7N4yM2mXPF1L58Rfg/FdSA4fg4kK1xocaQEcEXaUQ=; h=Date:From:To:Subject:From; b=E4X8SymGkJ+Wx9oJ01fW8Y8Jc+TAloeCOGx6zjKCFHm+jwnA9isIHPNm0FcRUv4iK FAZ/teSgkURvWaMD8m4OZDJ5QvP0xPUb8kXmwabqXXaOMjb9VOTrdRman7SJMiPUym XrDAVA1pfKdej0YJ2aihVGjliNN2fq+VcmhURaa4= Date: Wed, 24 Mar 2021 07:34:13 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.203; envelope-from=noreply@github.com; helo=out-20.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] b30df2: scripts/kernel-doc: strip QEMU_ from function defi... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Mar 2021 14:34:18 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: b30df2751e581ea24999ff2263df99208b8e3ed3=0D https://github.com/qemu/qemu/commit/b30df2751e581ea24999ff2263df992= 08b8e3ed3=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M scripts/kernel-doc=0D =0D Log Message:=0D -----------=0D scripts/kernel-doc: strip QEMU_ from function definitions=0D =0D Some packaged versions of Sphinx (fedora33/alpine so far) have issues=0D with the annotated C code that kernel-doc spits out. Without knowing=0D about things like QEMU_PLUGIN_EXPORT it chokes trying to understand=0D the code. Evidently this is a problem for the kernel as well as the=0D long stream of regex substitutions we add to in this patch can attest.=0D= =0D Fortunately we have a fairly common format for all our compiler=0D shenanigans as applied to functions so lets just filter them all out.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210323165308.15244-2-alex.bennee@linaro.org>=0D =0D =0D Commit: ca955bd726d49a0194b68fd43ccd0f92fdea71ec=0D https://github.com/qemu/qemu/commit/ca955bd726d49a0194b68fd43ccd0f9= 2fdea71ec=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/tcg-plugins.rst=0D =0D Log Message:=0D -----------=0D docs/devel: include the plugin API information from the headers=0D =0D We have kerneldoc tags for the headers so we might as well extract=0D them into our developer documentation whilst we are at it.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Aaron Lindsay =0D Message-Id: <20210323165308.15244-3-alex.bennee@linaro.org>=0D =0D =0D Commit: 9fed69e1f621623b3e153fc7c9bdcd50434e6b92=0D https://github.com/qemu/qemu/commit/9fed69e1f621623b3e153fc7c9bdcd5= 0434e6b92=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/style.rst=0D =0D Log Message:=0D -----------=0D docs/devel: expand style section of memory management=0D =0D This aims to provide a bit more guidance for those who take on one of=0D our "clean up memory allocation" bite-sized tasks.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210323165308.15244-4-alex.bennee@linaro.org>=0D =0D =0D Commit: 320d0bca94b4650c8fe6b02c6f24ad461f47eed8=0D https://github.com/qemu/qemu/commit/320d0bca94b4650c8fe6b02c6f24ad4= 61f47eed8=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tools/virtiofsd/fuse_lowlevel.c=0D =0D Log Message:=0D -----------=0D tools/virtiofsd: include --socket-group in help=0D =0D I confused myself wandering if this had been merged by looking at the=0D help output. It seems fuse_opt doesn't automagically add to help=0D output so lets do it now.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Connor Kuehl =0D Reviewed-by: Stefan Hajnoczi =0D Updates: f6698f2b03 ("tools/virtiofsd: add support for --socket-group")=0D= Message-Id: <20210323165308.15244-5-alex.bennee@linaro.org>=0D =0D =0D Commit: 3539d84df15a29bb72d6d1eb2c39908681056d51=0D https://github.com/qemu/qemu/commit/3539d84df15a29bb72d6d1eb2c39908= 681056d51=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M tests/tcg/Makefile.target=0D M tests/tcg/aarch64/Makefile.target=0D A tests/tcg/aarch64/semicall.h=0D M tests/tcg/arm/Makefile.target=0D M tests/tcg/arm/semicall.h=0D R tests/tcg/arm/semiconsole.c=0D R tests/tcg/arm/semihosting.c=0D M tests/tcg/multiarch/Makefile.target=0D A tests/tcg/multiarch/arm-compat-semi/semiconsole.c=0D A tests/tcg/multiarch/arm-compat-semi/semihosting.c=0D A tests/tcg/riscv64/semicall.h=0D =0D Log Message:=0D -----------=0D semihosting: move semihosting tests to multiarch=0D =0D It may be arm-compat-semihosting but more than one architecture uses=0D it so lets move the tests into the multiarch area. We gate it on the=0D feature and split the semicall.h header between the arches.=0D =0D Also clean-up a bit of the Makefile messing about to one common set of=0D= runners.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210323165308.15244-6-alex.bennee@linaro.org>=0D =0D =0D Commit: 3960ca5b3ef6854ef50ef540fe9cf47d94f27704=0D https://github.com/qemu/qemu/commit/3960ca5b3ef6854ef50ef540fe9cf47= d94f27704=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M semihosting/arm-compat-semi.c=0D =0D Log Message:=0D -----------=0D semihosting/arm-compat-semi: unify GET/SET_ARG helpers=0D =0D >>>From the semihosting point of view what we want to know is the current= =0D mode of the processor. Unify this into a single helper and allow us to=0D= use the same GET/SET_ARG helpers for the rest of the code. Having the=0D helper will also be useful later.=0D =0D Note: we aren't currently testing riscv32 due to missing toolchain for=0D= check-tcg tests.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Peter Maydell =0D Reviewed-by: Keith Packard =0D Message-Id: <20210323165308.15244-7-alex.bennee@linaro.org>=0D =0D =0D Commit: 35e3f029a966845e090dc8b295312751524df967=0D https://github.com/qemu/qemu/commit/35e3f029a966845e090dc8b29531275= 1524df967=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M semihosting/arm-compat-semi.c=0D =0D Log Message:=0D -----------=0D semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO=0D= =0D As per the spec:=0D =0D the PARAMETER REGISTER contains the address of a pointer to a=0D four-field data block.=0D =0D So we need to follow arg0 and place the results of SYS_HEAPINFO there.=0D= =0D Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces t= o use CPUState *")=0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Peter Maydell =0D Cc: Bug 1915925 <1915925@bugs.launchpad.net>=0D Cc: Keith Packard =0D Bug: https://bugs.launchpad.net/bugs/1915925=0D Message-Id: <20210323165308.15244-8-alex.bennee@linaro.org>=0D =0D =0D Commit: 7967d1da7af01c49661241c47708caa6dec78adb=0D https://github.com/qemu/qemu/commit/7967d1da7af01c49661241c47708caa= 6dec78adb=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M linux-user/riscv/cpu_loop.c=0D =0D Log Message:=0D -----------=0D linux-user/riscv: initialise the TaskState heap/stack info=0D =0D Arguably the target_cpu_copy_regs function for each architecture is=0D misnamed as a number of the architectures also take the opportunity to=0D= fill out the TaskState structure. This could arguably be factored out=0D into common code but that would require a wider audit of the=0D architectures. For now just replicate for riscv so we can correctly=0D report semihosting information for SYS_HEAPINFO.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Acked-by: Alistair Francis =0D Message-Id: <20210323165308.15244-9-alex.bennee@linaro.org>=0D =0D =0D Commit: 4593f4d7fa4460d082417cb50d7e5b49dad88f7e=0D https://github.com/qemu/qemu/commit/4593f4d7fa4460d082417cb50d7e5b4= 9dad88f7e=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tests/tcg/multiarch/arm-compat-semi/semihosting.c=0D =0D Log Message:=0D -----------=0D tests/tcg: add HeapInfo checking to semihosting test=0D =0D Query the SYS_HEAPINFO semicall and do some basic verification of the=0D information via libc calls.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210323165308.15244-10-alex.bennee@linaro.org>=0D =0D =0D Commit: 65aff82076a9bbfdf70b1256c68c2f53b123e222=0D https://github.com/qemu/qemu/commit/65aff82076a9bbfdf70b1256c68c2f5= 3b123e222=0D Author: Thomas Huth =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Merge the trace-backend testing into other jobs=0D =0D Our gitlab-ci got quite slow in the past weeks, due to the immense amount= =0D of jobs that we have, so we should try to reduce the number of jobs.=0D There is no real good reason for having separate jobs just to test the=0D= trace backends, we can do this just fine in other jobs, too.=0D =0D Signed-off-by: Thomas Huth =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Wainer dos Santos Moschetta =0D Reviewed-by: Willian Rampazzo =0D Message-Id: <20210319095726.45965-1-thuth@redhat.com>=0D Message-Id: <20210323165308.15244-11-alex.bennee@linaro.org>=0D =0D =0D Commit: bceac54752d20eb99013bec854db70b3e2154ef5=0D https://github.com/qemu/qemu/commit/bceac54752d20eb99013bec854db70b= 3e2154ef5=0D Author: Thomas Huth =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M configure=0D =0D Log Message:=0D -----------=0D configure: Don't use the __atomic_*_16 functions for testing 128-bit su= pport=0D =0D The test for 128-bit atomics is causing trouble with FreeBSD 12.2 and=0D --enable-werror:=0D =0D cc -Werror -fPIE -DPIE -std=3Dgnu99 -Wall -m64 -mcx16 -D_GNU_SOURCE -D_F= ILE_OFFSET_BITS=3D64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-= decls -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -= fno-common -fwrapv -Wold-style-definition -Wtype-limits -Wformat-security= -Wformat-y2k -Winit-self -Wignored-qualifiers -Wempty-body -Wnested-exte= rns -Wendif-labels -Wexpansion-to-defined -Wno-initializer-overrides -Wno= -missing-include-dirs -Wno-shift-negative-value -Wno-string-plus-int -Wno= -typedef-redefinition -Wno-tautological-type-limit-compare -fstack-protec= tor-strong -o config-temp/qemu-conf.exe config-temp/qemu-conf.c -pie -Wl,= -z,relro -Wl,-z,now -m64 -fstack-protector-strong=0D config-temp/qemu-conf.c:4:7: error: implicit declaration of function '__= atomic_load_16' is invalid in C99 [-Werror,-Wimplicit-function-declaratio= n]=0D y =3D __atomic_load_16(&x, 0);=0D ^=0D config-temp/qemu-conf.c:5:3: error: implicit declaration of function '__= atomic_store_16' is invalid in C99 [-Werror,-Wimplicit-function-declarati= on]=0D __atomic_store_16(&x, y, 0);=0D ^=0D config-temp/qemu-conf.c:5:3: note: did you mean '__atomic_load_16'?=0D config-temp/qemu-conf.c:4:7: note: '__atomic_load_16' declared here=0D y =3D __atomic_load_16(&x, 0);=0D ^=0D config-temp/qemu-conf.c:6:3: error: implicit declaration of function '__= atomic_compare_exchange_16' is invalid in C99 [-Werror,-Wimplicit-functio= n-declaration]=0D __atomic_compare_exchange_16(&x, &y, x, 0, 0, 0);=0D ^=0D 3 errors generated.=0D =0D Looking for they way we are using atomic functions in QEMU, we are not=0D= using these functions with the _16 suffix anyway. Switch to the same=0D functions that we use in the include/qemu/atomic.h header.=0D =0D Signed-off-by: Thomas Huth =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210317110512.583747-2-thuth@redhat.com>=0D Message-Id: <20210323165308.15244-12-alex.bennee@linaro.org>=0D =0D =0D Commit: e5b024b93047db9126b382cbad49b70eea912dd6=0D https://github.com/qemu/qemu/commit/e5b024b93047db9126b382cbad49b70= eea912dd6=0D Author: Thomas Huth =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M .cirrus.yml=0D =0D Log Message:=0D -----------=0D cirrus.yml: Update the FreeBSD task to version 12.2=0D =0D FreeBSD version 12.1 is out of service now, and the task in the=0D Cirrus-CI is failing. Update to 12.2 to get it working again.=0D Unfortunately, there is a bug in libtasn1 that triggers with the=0D new version of Clang that is used there (see this thread for details:=0D https://lists.gnu.org/archive/html/qemu-devel/2021-02/msg00739.html ),=0D= so we have to disable gnutls for now to make it work again. We can=0D enable it later again once libtasn1 has been fixed in FreeBSD.=0D =0D Signed-off-by: Thomas Huth =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210319101402.48871-1-thuth@redhat.com>=0D Message-Id: <20210323165308.15244-13-alex.bennee@linaro.org>=0D =0D =0D Commit: 061d79097c080722e359db7c0d9cddc006cfb14d=0D https://github.com/qemu/qemu/commit/061d79097c080722e359db7c0d9cddc= 006cfb14d=0D Author: Eric Blake =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/test-cutils.c=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D utils: Tighter tests for qemu_strtosz=0D =0D Our tests were not validating the return value in all cases, nor was=0D it guaranteeing our documented claim that 'res' is unchanged on error.=0D= For that matter, it wasn't as thorough as the existing tests for=0D qemu_strtoi() and friends for proving that endptr and res are sanely=0D set. Enhancing the test found one case where we violated our=0D documentation: namely, when failing with EINVAL when endptr is NULL,=0D we shouldn't modify res.=0D =0D Signed-off-by: Eric Blake =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210317143325.2165821-2-eblake@redhat.com>=0D Message-Id: <20210323165308.15244-14-alex.bennee@linaro.org>=0D =0D =0D Commit: 6162f7dafef51b44c5700ac3f82ff682faafe6c2=0D https://github.com/qemu/qemu/commit/6162f7dafef51b44c5700ac3f82ff68= 2faafe6c2=0D Author: Eric Blake =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/test-cutils.c=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D utils: Work around mingw strto*l bug with 0x=0D =0D Mingw recognizes that "0x" has value 0 without setting errno, but=0D fails to advance endptr to the trailing garbage 'x'. This in turn=0D showed up in our recent testsuite additions for qemu_strtosz (commit=0D 1657ba44b4 utils: Enhance testsuite for do_strtosz()); adjust our=0D remaining tests to show that we now work around this windows bug.=0D =0D This patch intentionally fails check-syntax for use of strtol.=0D =0D Signed-off-by: Eric Blake =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210317143325.2165821-3-eblake@redhat.com>=0D Message-Id: <20210323165308.15244-15-alex.bennee@linaro.org>=0D =0D =0D Commit: 9737c8bce932b760fc82929eebf3e8d3a26b1ce3=0D https://github.com/qemu/qemu/commit/9737c8bce932b760fc82929eebf3e8d= 3a26b1ce3=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab: extend timeouts for CFI builds=0D =0D These builds are running very close to the default build limit and as=0D they are already pared down the only other option is to extend the=0D timeout a little to give some breathing room.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210323165308.15244-16-alex.bennee@linaro.org>=0D =0D =0D Commit: 203adb43fc9d47a8cfa368c327d886cfddfae682=0D https://github.com/qemu/qemu/commit/203adb43fc9d47a8cfa368c327d886c= fddfae682=0D Author: Laurent Vivier =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M include/sysemu/arch_init.h=0D M softmmu/qdev-monitor.c=0D =0D Log Message:=0D -----------=0D qdev: define list of archs with virtio-pci or virtio-ccw=0D =0D This is used to define virtio-*-pci and virtio-*-ccw aliases=0D rather than substracting the CCW architecture from all the others.=0D =0D Signed-off-by: Laurent Vivier =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Cornelia Huck =0D Message-Id: <20210319202335.2397060-2-laurent@vivier.eu>=0D Message-Id: <20210323165308.15244-17-alex.bennee@linaro.org>=0D =0D =0D Commit: 4c5806a56b9dc2683d518e477d0a648ab7469722=0D https://github.com/qemu/qemu/commit/4c5806a56b9dc2683d518e477d0a648= ab7469722=0D Author: Laurent Vivier =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M include/sysemu/arch_init.h=0D M softmmu/qdev-monitor.c=0D =0D Log Message:=0D -----------=0D m68k: add the virtio devices aliases=0D =0D Similarly to 5f629d943cb0 ("s390x: fix s390 virtio aliases"),=0D define the virtio aliases.=0D =0D This allows to start machines with virtio devices without=0D knowledge of the implementation type.=0D =0D For instance, we can use "-device virtio-scsi" on=0D m68k, s390x or PC, and the device will be respectively=0D "virtio-scsi-device", "virtio-scsi-ccw" or "virtio-scsi-pci".=0D =0D This already exists for s390x and -ccw interfaces, add them=0D for m68k and MMIO (-device) interfaces.=0D =0D Signed-off-by: Laurent Vivier =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Cornelia Huck =0D Message-Id: <20210319202335.2397060-3-laurent@vivier.eu>=0D Message-Id: <20210323165308.15244-18-alex.bennee@linaro.org>=0D =0D =0D Commit: 9db1d3a2be9bfeb5ef3459a636e7545bf8f9b81b=0D https://github.com/qemu/qemu/commit/9db1d3a2be9bfeb5ef3459a636e7545= bf8f9b81b=0D Author: Laurent Vivier =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M blockdev.c=0D =0D Log Message:=0D -----------=0D blockdev: with -drive if=3Dvirtio, use generic virtio-blk=0D =0D Rather than checking if the machine is an s390x to use virtio-blk-ccw=0D instead of virtio-blk-pci, use the alias virtio-blk that is set to=0D the expected target.=0D =0D This also enables the use of virtio-blk-device for targets without=0D PCI or CCW.=0D =0D Signed-off-by: Laurent Vivier =0D Signed-off-by: Alex Benn=C3=A9e =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Acked-by: Markus Armbruster =0D Message-Id: <20210319202335.2397060-4-laurent@vivier.eu>=0D Message-Id: <20210323165308.15244-19-alex.bennee@linaro.org>=0D =0D =0D Commit: 22329f0d2963515e031584d21a03d3585b19cbf9=0D https://github.com/qemu/qemu/commit/22329f0d2963515e031584d21a03d35= 85b19cbf9=0D Author: Laurent Vivier =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/040=0D M tests/qemu-iotests/051=0D M tests/qemu-iotests/051.out=0D M tests/qemu-iotests/051.pc.out=0D M tests/qemu-iotests/068=0D M tests/qemu-iotests/093=0D M tests/qemu-iotests/139=0D M tests/qemu-iotests/182=0D M tests/qemu-iotests/238=0D M tests/qemu-iotests/240=0D M tests/qemu-iotests/257=0D M tests/qemu-iotests/307=0D M tests/qemu-iotests/iotests.py=0D =0D Log Message:=0D -----------=0D iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182"=0D =0D Commit f1d5516ab583 introduces a test in some iotests to check if=0D the machine is a s390-ccw-virtio and to select virtio-*-ccw rather=0D than virtio-*-pci.=0D =0D We don't need that because QEMU already provides aliases to use the corre= ct=0D virtio interface according to the machine type.=0D =0D This patch removes all virtio-*-pci and virtio-*-ccw to use virtio-*=0D instead and remove get_virtio_scsi_device().=0D This also enables virtio-mmio devices (virtio-*-device)=0D =0D Signed-off-by: Laurent Vivier =0D Signed-off-by: Alex Benn=C3=A9e =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Cornelia Huck =0D Message-Id: <20210319202335.2397060-5-laurent@vivier.eu>=0D Message-Id: <20210323165308.15244-20-alex.bennee@linaro.org>=0D =0D =0D Commit: 7033f1fd1c6eff6c7ec11642b8a9f2f3ad19129e=0D https://github.com/qemu/qemu/commit/7033f1fd1c6eff6c7ec11642b8a9f2f= 3ad19129e=0D Author: Laurent Vivier =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/testenv.py=0D =0D Log Message:=0D -----------=0D iotests: test m68k with the virt machine=0D =0D This allows to cover the virtio tests with a 32bit big-endian=0D virtio-mmio machine.=0D =0D Signed-off-by: Laurent Vivier =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Cornelia Huck =0D Message-Id: <20210319202335.2397060-6-laurent@vivier.eu>=0D Message-Id: <20210323165308.15244-21-alex.bennee@linaro.org>=0D =0D =0D Commit: 359a85627057bdae7bbe3aa664d03e019df6a886=0D https://github.com/qemu/qemu/commit/359a85627057bdae7bbe3aa664d03e0= 19df6a886=0D Author: Laurent Vivier =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/127=0D M tests/qemu-iotests/256=0D M tests/qemu-iotests/common.rc=0D M tests/qemu-iotests/iotests.py=0D =0D Log Message:=0D -----------=0D iotests: iothreads need ioeventfd=0D =0D And ioeventfd are only available with virtio-scsi-pci or virtio-scsi-ccw,= =0D use the alias but add a rule to require virtio-scsi-pci or virtio-scsi-cc= w=0D for the tests that use iothreads.=0D =0D Signed-off-by: Laurent Vivier =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210319202335.2397060-7-laurent@vivier.eu>=0D Message-Id: <20210323165308.15244-22-alex.bennee@linaro.org>=0D =0D =0D Commit: a9eb2df27f117bbac9f370bf8cb79532005f19c2=0D https://github.com/qemu/qemu/commit/a9eb2df27f117bbac9f370bf8cb7953= 2005f19c2=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.d/crossbuilds.yml=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab: default to not building the documentation=0D =0D In d0f26e68a0 ("gitlab: force enable docs build in Fedora, Ubuntu,=0D Debian") we made sure we can build the documents on more than one=0D system. However we don't want to build documents all the time as it's=0D a waste of cycles (and energy). So lets reduce the total amount of=0D documentation we build while still keeping coverage of at least one=0D build on each supported target.=0D =0D Fixes: a8a3abe0b3 ("gitlab: move docs and tools build across from Travis"= )=0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210323165308.15244-23-alex.bennee@linaro.org>=0D =0D =0D Commit: f0b6a6a1a94cfbba87db98dd2edbc29b30e54f76=0D https://github.com/qemu/qemu/commit/f0b6a6a1a94cfbba87db98dd2edbc29= b30e54f76=0D Author: Peter Maydell =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M .cirrus.yml=0D M .gitlab-ci.d/crossbuilds.yml=0D M .gitlab-ci.yml=0D M MAINTAINERS=0D M blockdev.c=0D M configure=0D M docs/devel/style.rst=0D M docs/devel/tcg-plugins.rst=0D M include/sysemu/arch_init.h=0D M linux-user/riscv/cpu_loop.c=0D M scripts/kernel-doc=0D M semihosting/arm-compat-semi.c=0D M softmmu/qdev-monitor.c=0D M tests/qemu-iotests/040=0D M tests/qemu-iotests/051=0D M tests/qemu-iotests/051.out=0D M tests/qemu-iotests/051.pc.out=0D M tests/qemu-iotests/068=0D M tests/qemu-iotests/093=0D M tests/qemu-iotests/127=0D M tests/qemu-iotests/139=0D M tests/qemu-iotests/182=0D M tests/qemu-iotests/238=0D M tests/qemu-iotests/240=0D M tests/qemu-iotests/256=0D M tests/qemu-iotests/257=0D M tests/qemu-iotests/307=0D M tests/qemu-iotests/common.rc=0D M tests/qemu-iotests/iotests.py=0D M tests/qemu-iotests/testenv.py=0D M tests/tcg/Makefile.target=0D M tests/tcg/aarch64/Makefile.target=0D A tests/tcg/aarch64/semicall.h=0D M tests/tcg/arm/Makefile.target=0D M tests/tcg/arm/semicall.h=0D R tests/tcg/arm/semiconsole.c=0D R tests/tcg/arm/semihosting.c=0D M tests/tcg/multiarch/Makefile.target=0D A tests/tcg/multiarch/arm-compat-semi/semiconsole.c=0D A tests/tcg/multiarch/arm-compat-semi/semihosting.c=0D A tests/tcg/riscv64/semicall.h=0D M tests/unit/test-cutils.c=0D M tools/virtiofsd/fuse_lowlevel.c=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/stsquad/tags/pull-6.0-rc0-fixed-2= 40321-1' into staging=0D =0D Various fixes for 6.0:=0D =0D - include kernel-doc API reference for plugins=0D - fix semihosting SYS_HEAPINFO=0D - various tweaks to improve CI runtime=0D - more stroz fixes=0D - fix iotest CI regressions=0D =0D # gpg: Signature made Wed 24 Mar 2021 14:28:24 GMT=0D # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2= A44=0D # gpg: Good signature from "Alex Benn=C3=A9e (Master Work Key) " [full]=0D # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E = 2A44=0D =0D * remotes/stsquad/tags/pull-6.0-rc0-fixed-240321-1: (22 commits)=0D gitlab: default to not building the documentation=0D iotests: iothreads need ioeventfd=0D iotests: test m68k with the virt machine=0D iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182"=0D blockdev: with -drive if=3Dvirtio, use generic virtio-blk=0D m68k: add the virtio devices aliases=0D qdev: define list of archs with virtio-pci or virtio-ccw=0D gitlab: extend timeouts for CFI builds=0D utils: Work around mingw strto*l bug with 0x=0D utils: Tighter tests for qemu_strtosz=0D cirrus.yml: Update the FreeBSD task to version 12.2=0D configure: Don't use the __atomic_*_16 functions for testing 128-bit su= pport=0D gitlab-ci.yml: Merge the trace-backend testing into other jobs=0D tests/tcg: add HeapInfo checking to semihosting test=0D linux-user/riscv: initialise the TaskState heap/stack info=0D semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO=0D= semihosting/arm-compat-semi: unify GET/SET_ARG helpers=0D semihosting: move semihosting tests to multiarch=0D tools/virtiofsd: include --socket-group in help=0D docs/devel: expand style section of memory management=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/01874b15d36e...f0b6a6a1a94c= =0D From MAILER-DAEMON Wed Mar 24 13:42:00 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lP7W3-0006tT-39 for mharc-qemu-commits@gnu.org; Wed, 24 Mar 2021 13:41:59 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33030) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP7Vr-0006pt-OG for qemu-commits@nongnu.org; Wed, 24 Mar 2021 13:41:52 -0400 Received: from out-26.smtp.github.com ([192.30.252.209]:50273 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP7Vl-0001J4-Rf for qemu-commits@nongnu.org; Wed, 24 Mar 2021 13:41:47 -0400 Received: from github.com (hubbernetes-node-f76f347.ash1-iad.github.net [10.56.116.30]) by smtp.github.com (Postfix) with ESMTPA id DE3FE5E0917 for ; Wed, 24 Mar 2021 10:41:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616607698; bh=M5jQe3+EsoX4g9sFlgrHlC7Q8lptPMx025ftGgz5Rlo=; h=Date:From:To:Subject:From; b=AlhlaP0APdRos/jZedqEyKFZm6iEEx9wDbsaIzvXZ0n5TTUsy54N85/CA9BSWRELc HqV4k2h7L7NmONmPnWx8ao9njsDVi5kvGqYFV7SMMelM8KWAtoSI2F5RfX3AIBa5/h sw1DN/BNjqXr/6sJo3tqgc+f4ETjlBRWG21dUgn8= Date: Wed, 24 Mar 2021 10:41:38 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] b30df2: scripts/kernel-doc: strip QEMU_ from function defi... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Mar 2021 17:41:53 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: b30df2751e581ea24999ff2263df99208b8e3ed3=0D https://github.com/qemu/qemu/commit/b30df2751e581ea24999ff2263df992= 08b8e3ed3=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M scripts/kernel-doc=0D =0D Log Message:=0D -----------=0D scripts/kernel-doc: strip QEMU_ from function definitions=0D =0D Some packaged versions of Sphinx (fedora33/alpine so far) have issues=0D with the annotated C code that kernel-doc spits out. Without knowing=0D about things like QEMU_PLUGIN_EXPORT it chokes trying to understand=0D the code. Evidently this is a problem for the kernel as well as the=0D long stream of regex substitutions we add to in this patch can attest.=0D= =0D Fortunately we have a fairly common format for all our compiler=0D shenanigans as applied to functions so lets just filter them all out.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210323165308.15244-2-alex.bennee@linaro.org>=0D =0D =0D Commit: ca955bd726d49a0194b68fd43ccd0f92fdea71ec=0D https://github.com/qemu/qemu/commit/ca955bd726d49a0194b68fd43ccd0f9= 2fdea71ec=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/tcg-plugins.rst=0D =0D Log Message:=0D -----------=0D docs/devel: include the plugin API information from the headers=0D =0D We have kerneldoc tags for the headers so we might as well extract=0D them into our developer documentation whilst we are at it.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Aaron Lindsay =0D Message-Id: <20210323165308.15244-3-alex.bennee@linaro.org>=0D =0D =0D Commit: 9fed69e1f621623b3e153fc7c9bdcd50434e6b92=0D https://github.com/qemu/qemu/commit/9fed69e1f621623b3e153fc7c9bdcd5= 0434e6b92=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/style.rst=0D =0D Log Message:=0D -----------=0D docs/devel: expand style section of memory management=0D =0D This aims to provide a bit more guidance for those who take on one of=0D our "clean up memory allocation" bite-sized tasks.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210323165308.15244-4-alex.bennee@linaro.org>=0D =0D =0D Commit: 320d0bca94b4650c8fe6b02c6f24ad461f47eed8=0D https://github.com/qemu/qemu/commit/320d0bca94b4650c8fe6b02c6f24ad4= 61f47eed8=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tools/virtiofsd/fuse_lowlevel.c=0D =0D Log Message:=0D -----------=0D tools/virtiofsd: include --socket-group in help=0D =0D I confused myself wandering if this had been merged by looking at the=0D help output. It seems fuse_opt doesn't automagically add to help=0D output so lets do it now.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Connor Kuehl =0D Reviewed-by: Stefan Hajnoczi =0D Updates: f6698f2b03 ("tools/virtiofsd: add support for --socket-group")=0D= Message-Id: <20210323165308.15244-5-alex.bennee@linaro.org>=0D =0D =0D Commit: 3539d84df15a29bb72d6d1eb2c39908681056d51=0D https://github.com/qemu/qemu/commit/3539d84df15a29bb72d6d1eb2c39908= 681056d51=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M tests/tcg/Makefile.target=0D M tests/tcg/aarch64/Makefile.target=0D A tests/tcg/aarch64/semicall.h=0D M tests/tcg/arm/Makefile.target=0D M tests/tcg/arm/semicall.h=0D R tests/tcg/arm/semiconsole.c=0D R tests/tcg/arm/semihosting.c=0D M tests/tcg/multiarch/Makefile.target=0D A tests/tcg/multiarch/arm-compat-semi/semiconsole.c=0D A tests/tcg/multiarch/arm-compat-semi/semihosting.c=0D A tests/tcg/riscv64/semicall.h=0D =0D Log Message:=0D -----------=0D semihosting: move semihosting tests to multiarch=0D =0D It may be arm-compat-semihosting but more than one architecture uses=0D it so lets move the tests into the multiarch area. We gate it on the=0D feature and split the semicall.h header between the arches.=0D =0D Also clean-up a bit of the Makefile messing about to one common set of=0D= runners.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Message-Id: <20210323165308.15244-6-alex.bennee@linaro.org>=0D =0D =0D Commit: 3960ca5b3ef6854ef50ef540fe9cf47d94f27704=0D https://github.com/qemu/qemu/commit/3960ca5b3ef6854ef50ef540fe9cf47= d94f27704=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M semihosting/arm-compat-semi.c=0D =0D Log Message:=0D -----------=0D semihosting/arm-compat-semi: unify GET/SET_ARG helpers=0D =0D >>>From the semihosting point of view what we want to know is the current= =0D mode of the processor. Unify this into a single helper and allow us to=0D= use the same GET/SET_ARG helpers for the rest of the code. Having the=0D helper will also be useful later.=0D =0D Note: we aren't currently testing riscv32 due to missing toolchain for=0D= check-tcg tests.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Peter Maydell =0D Reviewed-by: Keith Packard =0D Message-Id: <20210323165308.15244-7-alex.bennee@linaro.org>=0D =0D =0D Commit: 35e3f029a966845e090dc8b295312751524df967=0D https://github.com/qemu/qemu/commit/35e3f029a966845e090dc8b29531275= 1524df967=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M semihosting/arm-compat-semi.c=0D =0D Log Message:=0D -----------=0D semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO=0D= =0D As per the spec:=0D =0D the PARAMETER REGISTER contains the address of a pointer to a=0D four-field data block.=0D =0D So we need to follow arg0 and place the results of SYS_HEAPINFO there.=0D= =0D Fixes: 3c37cfe0b1 ("semihosting: Change internal common-semi interfaces t= o use CPUState *")=0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Peter Maydell =0D Cc: Bug 1915925 <1915925@bugs.launchpad.net>=0D Cc: Keith Packard =0D Bug: https://bugs.launchpad.net/bugs/1915925=0D Message-Id: <20210323165308.15244-8-alex.bennee@linaro.org>=0D =0D =0D Commit: 7967d1da7af01c49661241c47708caa6dec78adb=0D https://github.com/qemu/qemu/commit/7967d1da7af01c49661241c47708caa= 6dec78adb=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M linux-user/riscv/cpu_loop.c=0D =0D Log Message:=0D -----------=0D linux-user/riscv: initialise the TaskState heap/stack info=0D =0D Arguably the target_cpu_copy_regs function for each architecture is=0D misnamed as a number of the architectures also take the opportunity to=0D= fill out the TaskState structure. This could arguably be factored out=0D into common code but that would require a wider audit of the=0D architectures. For now just replicate for riscv so we can correctly=0D report semihosting information for SYS_HEAPINFO.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Acked-by: Alistair Francis =0D Message-Id: <20210323165308.15244-9-alex.bennee@linaro.org>=0D =0D =0D Commit: 4593f4d7fa4460d082417cb50d7e5b49dad88f7e=0D https://github.com/qemu/qemu/commit/4593f4d7fa4460d082417cb50d7e5b4= 9dad88f7e=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tests/tcg/multiarch/arm-compat-semi/semihosting.c=0D =0D Log Message:=0D -----------=0D tests/tcg: add HeapInfo checking to semihosting test=0D =0D Query the SYS_HEAPINFO semicall and do some basic verification of the=0D information via libc calls.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210323165308.15244-10-alex.bennee@linaro.org>=0D =0D =0D Commit: 65aff82076a9bbfdf70b1256c68c2f53b123e222=0D https://github.com/qemu/qemu/commit/65aff82076a9bbfdf70b1256c68c2f5= 3b123e222=0D Author: Thomas Huth =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab-ci.yml: Merge the trace-backend testing into other jobs=0D =0D Our gitlab-ci got quite slow in the past weeks, due to the immense amount= =0D of jobs that we have, so we should try to reduce the number of jobs.=0D There is no real good reason for having separate jobs just to test the=0D= trace backends, we can do this just fine in other jobs, too.=0D =0D Signed-off-by: Thomas Huth =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Wainer dos Santos Moschetta =0D Reviewed-by: Willian Rampazzo =0D Message-Id: <20210319095726.45965-1-thuth@redhat.com>=0D Message-Id: <20210323165308.15244-11-alex.bennee@linaro.org>=0D =0D =0D Commit: bceac54752d20eb99013bec854db70b3e2154ef5=0D https://github.com/qemu/qemu/commit/bceac54752d20eb99013bec854db70b= 3e2154ef5=0D Author: Thomas Huth =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M configure=0D =0D Log Message:=0D -----------=0D configure: Don't use the __atomic_*_16 functions for testing 128-bit su= pport=0D =0D The test for 128-bit atomics is causing trouble with FreeBSD 12.2 and=0D --enable-werror:=0D =0D cc -Werror -fPIE -DPIE -std=3Dgnu99 -Wall -m64 -mcx16 -D_GNU_SOURCE -D_F= ILE_OFFSET_BITS=3D64 -D_LARGEFILE_SOURCE -Wstrict-prototypes -Wredundant-= decls -Wundef -Wwrite-strings -Wmissing-prototypes -fno-strict-aliasing -= fno-common -fwrapv -Wold-style-definition -Wtype-limits -Wformat-security= -Wformat-y2k -Winit-self -Wignored-qualifiers -Wempty-body -Wnested-exte= rns -Wendif-labels -Wexpansion-to-defined -Wno-initializer-overrides -Wno= -missing-include-dirs -Wno-shift-negative-value -Wno-string-plus-int -Wno= -typedef-redefinition -Wno-tautological-type-limit-compare -fstack-protec= tor-strong -o config-temp/qemu-conf.exe config-temp/qemu-conf.c -pie -Wl,= -z,relro -Wl,-z,now -m64 -fstack-protector-strong=0D config-temp/qemu-conf.c:4:7: error: implicit declaration of function '__= atomic_load_16' is invalid in C99 [-Werror,-Wimplicit-function-declaratio= n]=0D y =3D __atomic_load_16(&x, 0);=0D ^=0D config-temp/qemu-conf.c:5:3: error: implicit declaration of function '__= atomic_store_16' is invalid in C99 [-Werror,-Wimplicit-function-declarati= on]=0D __atomic_store_16(&x, y, 0);=0D ^=0D config-temp/qemu-conf.c:5:3: note: did you mean '__atomic_load_16'?=0D config-temp/qemu-conf.c:4:7: note: '__atomic_load_16' declared here=0D y =3D __atomic_load_16(&x, 0);=0D ^=0D config-temp/qemu-conf.c:6:3: error: implicit declaration of function '__= atomic_compare_exchange_16' is invalid in C99 [-Werror,-Wimplicit-functio= n-declaration]=0D __atomic_compare_exchange_16(&x, &y, x, 0, 0, 0);=0D ^=0D 3 errors generated.=0D =0D Looking for they way we are using atomic functions in QEMU, we are not=0D= using these functions with the _16 suffix anyway. Switch to the same=0D functions that we use in the include/qemu/atomic.h header.=0D =0D Signed-off-by: Thomas Huth =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Richard Henderson =0D Acked-by: Paolo Bonzini =0D Message-Id: <20210317110512.583747-2-thuth@redhat.com>=0D Message-Id: <20210323165308.15244-12-alex.bennee@linaro.org>=0D =0D =0D Commit: e5b024b93047db9126b382cbad49b70eea912dd6=0D https://github.com/qemu/qemu/commit/e5b024b93047db9126b382cbad49b70= eea912dd6=0D Author: Thomas Huth =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M .cirrus.yml=0D =0D Log Message:=0D -----------=0D cirrus.yml: Update the FreeBSD task to version 12.2=0D =0D FreeBSD version 12.1 is out of service now, and the task in the=0D Cirrus-CI is failing. Update to 12.2 to get it working again.=0D Unfortunately, there is a bug in libtasn1 that triggers with the=0D new version of Clang that is used there (see this thread for details:=0D https://lists.gnu.org/archive/html/qemu-devel/2021-02/msg00739.html ),=0D= so we have to disable gnutls for now to make it work again. We can=0D enable it later again once libtasn1 has been fixed in FreeBSD.=0D =0D Signed-off-by: Thomas Huth =0D Signed-off-by: Alex Benn=C3=A9e =0D Message-Id: <20210319101402.48871-1-thuth@redhat.com>=0D Message-Id: <20210323165308.15244-13-alex.bennee@linaro.org>=0D =0D =0D Commit: 061d79097c080722e359db7c0d9cddc006cfb14d=0D https://github.com/qemu/qemu/commit/061d79097c080722e359db7c0d9cddc= 006cfb14d=0D Author: Eric Blake =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/test-cutils.c=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D utils: Tighter tests for qemu_strtosz=0D =0D Our tests were not validating the return value in all cases, nor was=0D it guaranteeing our documented claim that 'res' is unchanged on error.=0D= For that matter, it wasn't as thorough as the existing tests for=0D qemu_strtoi() and friends for proving that endptr and res are sanely=0D set. Enhancing the test found one case where we violated our=0D documentation: namely, when failing with EINVAL when endptr is NULL,=0D we shouldn't modify res.=0D =0D Signed-off-by: Eric Blake =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210317143325.2165821-2-eblake@redhat.com>=0D Message-Id: <20210323165308.15244-14-alex.bennee@linaro.org>=0D =0D =0D Commit: 6162f7dafef51b44c5700ac3f82ff682faafe6c2=0D https://github.com/qemu/qemu/commit/6162f7dafef51b44c5700ac3f82ff68= 2faafe6c2=0D Author: Eric Blake =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/test-cutils.c=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D utils: Work around mingw strto*l bug with 0x=0D =0D Mingw recognizes that "0x" has value 0 without setting errno, but=0D fails to advance endptr to the trailing garbage 'x'. This in turn=0D showed up in our recent testsuite additions for qemu_strtosz (commit=0D 1657ba44b4 utils: Enhance testsuite for do_strtosz()); adjust our=0D remaining tests to show that we now work around this windows bug.=0D =0D This patch intentionally fails check-syntax for use of strtol.=0D =0D Signed-off-by: Eric Blake =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210317143325.2165821-3-eblake@redhat.com>=0D Message-Id: <20210323165308.15244-15-alex.bennee@linaro.org>=0D =0D =0D Commit: 9737c8bce932b760fc82929eebf3e8d3a26b1ce3=0D https://github.com/qemu/qemu/commit/9737c8bce932b760fc82929eebf3e8d= 3a26b1ce3=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab: extend timeouts for CFI builds=0D =0D These builds are running very close to the default build limit and as=0D they are already pared down the only other option is to extend the=0D timeout a little to give some breathing room.=0D =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Thomas Huth =0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-Id: <20210323165308.15244-16-alex.bennee@linaro.org>=0D =0D =0D Commit: 203adb43fc9d47a8cfa368c327d886cfddfae682=0D https://github.com/qemu/qemu/commit/203adb43fc9d47a8cfa368c327d886c= fddfae682=0D Author: Laurent Vivier =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M include/sysemu/arch_init.h=0D M softmmu/qdev-monitor.c=0D =0D Log Message:=0D -----------=0D qdev: define list of archs with virtio-pci or virtio-ccw=0D =0D This is used to define virtio-*-pci and virtio-*-ccw aliases=0D rather than substracting the CCW architecture from all the others.=0D =0D Signed-off-by: Laurent Vivier =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Cornelia Huck =0D Message-Id: <20210319202335.2397060-2-laurent@vivier.eu>=0D Message-Id: <20210323165308.15244-17-alex.bennee@linaro.org>=0D =0D =0D Commit: 4c5806a56b9dc2683d518e477d0a648ab7469722=0D https://github.com/qemu/qemu/commit/4c5806a56b9dc2683d518e477d0a648= ab7469722=0D Author: Laurent Vivier =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M include/sysemu/arch_init.h=0D M softmmu/qdev-monitor.c=0D =0D Log Message:=0D -----------=0D m68k: add the virtio devices aliases=0D =0D Similarly to 5f629d943cb0 ("s390x: fix s390 virtio aliases"),=0D define the virtio aliases.=0D =0D This allows to start machines with virtio devices without=0D knowledge of the implementation type.=0D =0D For instance, we can use "-device virtio-scsi" on=0D m68k, s390x or PC, and the device will be respectively=0D "virtio-scsi-device", "virtio-scsi-ccw" or "virtio-scsi-pci".=0D =0D This already exists for s390x and -ccw interfaces, add them=0D for m68k and MMIO (-device) interfaces.=0D =0D Signed-off-by: Laurent Vivier =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Cornelia Huck =0D Message-Id: <20210319202335.2397060-3-laurent@vivier.eu>=0D Message-Id: <20210323165308.15244-18-alex.bennee@linaro.org>=0D =0D =0D Commit: 9db1d3a2be9bfeb5ef3459a636e7545bf8f9b81b=0D https://github.com/qemu/qemu/commit/9db1d3a2be9bfeb5ef3459a636e7545= bf8f9b81b=0D Author: Laurent Vivier =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M blockdev.c=0D =0D Log Message:=0D -----------=0D blockdev: with -drive if=3Dvirtio, use generic virtio-blk=0D =0D Rather than checking if the machine is an s390x to use virtio-blk-ccw=0D instead of virtio-blk-pci, use the alias virtio-blk that is set to=0D the expected target.=0D =0D This also enables the use of virtio-blk-device for targets without=0D PCI or CCW.=0D =0D Signed-off-by: Laurent Vivier =0D Signed-off-by: Alex Benn=C3=A9e =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Acked-by: Markus Armbruster =0D Message-Id: <20210319202335.2397060-4-laurent@vivier.eu>=0D Message-Id: <20210323165308.15244-19-alex.bennee@linaro.org>=0D =0D =0D Commit: 22329f0d2963515e031584d21a03d3585b19cbf9=0D https://github.com/qemu/qemu/commit/22329f0d2963515e031584d21a03d35= 85b19cbf9=0D Author: Laurent Vivier =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/040=0D M tests/qemu-iotests/051=0D M tests/qemu-iotests/051.out=0D M tests/qemu-iotests/051.pc.out=0D M tests/qemu-iotests/068=0D M tests/qemu-iotests/093=0D M tests/qemu-iotests/139=0D M tests/qemu-iotests/182=0D M tests/qemu-iotests/238=0D M tests/qemu-iotests/240=0D M tests/qemu-iotests/257=0D M tests/qemu-iotests/307=0D M tests/qemu-iotests/iotests.py=0D =0D Log Message:=0D -----------=0D iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182"=0D =0D Commit f1d5516ab583 introduces a test in some iotests to check if=0D the machine is a s390-ccw-virtio and to select virtio-*-ccw rather=0D than virtio-*-pci.=0D =0D We don't need that because QEMU already provides aliases to use the corre= ct=0D virtio interface according to the machine type.=0D =0D This patch removes all virtio-*-pci and virtio-*-ccw to use virtio-*=0D instead and remove get_virtio_scsi_device().=0D This also enables virtio-mmio devices (virtio-*-device)=0D =0D Signed-off-by: Laurent Vivier =0D Signed-off-by: Alex Benn=C3=A9e =0D Tested-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Cornelia Huck =0D Message-Id: <20210319202335.2397060-5-laurent@vivier.eu>=0D Message-Id: <20210323165308.15244-20-alex.bennee@linaro.org>=0D =0D =0D Commit: 7033f1fd1c6eff6c7ec11642b8a9f2f3ad19129e=0D https://github.com/qemu/qemu/commit/7033f1fd1c6eff6c7ec11642b8a9f2f= 3ad19129e=0D Author: Laurent Vivier =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/testenv.py=0D =0D Log Message:=0D -----------=0D iotests: test m68k with the virt machine=0D =0D This allows to cover the virtio tests with a 32bit big-endian=0D virtio-mmio machine.=0D =0D Signed-off-by: Laurent Vivier =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Cornelia Huck =0D Message-Id: <20210319202335.2397060-6-laurent@vivier.eu>=0D Message-Id: <20210323165308.15244-21-alex.bennee@linaro.org>=0D =0D =0D Commit: 359a85627057bdae7bbe3aa664d03e019df6a886=0D https://github.com/qemu/qemu/commit/359a85627057bdae7bbe3aa664d03e0= 19df6a886=0D Author: Laurent Vivier =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M tests/qemu-iotests/127=0D M tests/qemu-iotests/256=0D M tests/qemu-iotests/common.rc=0D M tests/qemu-iotests/iotests.py=0D =0D Log Message:=0D -----------=0D iotests: iothreads need ioeventfd=0D =0D And ioeventfd are only available with virtio-scsi-pci or virtio-scsi-ccw,= =0D use the alias but add a rule to require virtio-scsi-pci or virtio-scsi-cc= w=0D for the tests that use iothreads.=0D =0D Signed-off-by: Laurent Vivier =0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210319202335.2397060-7-laurent@vivier.eu>=0D Message-Id: <20210323165308.15244-22-alex.bennee@linaro.org>=0D =0D =0D Commit: a9eb2df27f117bbac9f370bf8cb79532005f19c2=0D https://github.com/qemu/qemu/commit/a9eb2df27f117bbac9f370bf8cb7953= 2005f19c2=0D Author: Alex Benn=C3=A9e =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M .gitlab-ci.d/crossbuilds.yml=0D M .gitlab-ci.yml=0D =0D Log Message:=0D -----------=0D gitlab: default to not building the documentation=0D =0D In d0f26e68a0 ("gitlab: force enable docs build in Fedora, Ubuntu,=0D Debian") we made sure we can build the documents on more than one=0D system. However we don't want to build documents all the time as it's=0D a waste of cycles (and energy). So lets reduce the total amount of=0D documentation we build while still keeping coverage of at least one=0D build on each supported target.=0D =0D Fixes: a8a3abe0b3 ("gitlab: move docs and tools build across from Travis"= )=0D Signed-off-by: Alex Benn=C3=A9e =0D Reviewed-by: Willian Rampazzo =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210323165308.15244-23-alex.bennee@linaro.org>=0D =0D =0D Commit: f0b6a6a1a94cfbba87db98dd2edbc29b30e54f76=0D https://github.com/qemu/qemu/commit/f0b6a6a1a94cfbba87db98dd2edbc29= b30e54f76=0D Author: Peter Maydell =0D Date: 2021-03-24 (Wed, 24 Mar 2021)=0D =0D Changed paths:=0D M .cirrus.yml=0D M .gitlab-ci.d/crossbuilds.yml=0D M .gitlab-ci.yml=0D M MAINTAINERS=0D M blockdev.c=0D M configure=0D M docs/devel/style.rst=0D M docs/devel/tcg-plugins.rst=0D M include/sysemu/arch_init.h=0D M linux-user/riscv/cpu_loop.c=0D M scripts/kernel-doc=0D M semihosting/arm-compat-semi.c=0D M softmmu/qdev-monitor.c=0D M tests/qemu-iotests/040=0D M tests/qemu-iotests/051=0D M tests/qemu-iotests/051.out=0D M tests/qemu-iotests/051.pc.out=0D M tests/qemu-iotests/068=0D M tests/qemu-iotests/093=0D M tests/qemu-iotests/127=0D M tests/qemu-iotests/139=0D M tests/qemu-iotests/182=0D M tests/qemu-iotests/238=0D M tests/qemu-iotests/240=0D M tests/qemu-iotests/256=0D M tests/qemu-iotests/257=0D M tests/qemu-iotests/307=0D M tests/qemu-iotests/common.rc=0D M tests/qemu-iotests/iotests.py=0D M tests/qemu-iotests/testenv.py=0D M tests/tcg/Makefile.target=0D M tests/tcg/aarch64/Makefile.target=0D A tests/tcg/aarch64/semicall.h=0D M tests/tcg/arm/Makefile.target=0D M tests/tcg/arm/semicall.h=0D R tests/tcg/arm/semiconsole.c=0D R tests/tcg/arm/semihosting.c=0D M tests/tcg/multiarch/Makefile.target=0D A tests/tcg/multiarch/arm-compat-semi/semiconsole.c=0D A tests/tcg/multiarch/arm-compat-semi/semihosting.c=0D A tests/tcg/riscv64/semicall.h=0D M tests/unit/test-cutils.c=0D M tools/virtiofsd/fuse_lowlevel.c=0D M util/cutils.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/stsquad/tags/pull-6.0-rc0-fixed-2= 40321-1' into staging=0D =0D Various fixes for 6.0:=0D =0D - include kernel-doc API reference for plugins=0D - fix semihosting SYS_HEAPINFO=0D - various tweaks to improve CI runtime=0D - more stroz fixes=0D - fix iotest CI regressions=0D =0D # gpg: Signature made Wed 24 Mar 2021 14:28:24 GMT=0D # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2= A44=0D # gpg: Good signature from "Alex Benn=C3=A9e (Master Work Key) " [full]=0D # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E = 2A44=0D =0D * remotes/stsquad/tags/pull-6.0-rc0-fixed-240321-1: (22 commits)=0D gitlab: default to not building the documentation=0D iotests: iothreads need ioeventfd=0D iotests: test m68k with the virt machine=0D iotests: Revert "iotests: use -ccw on s390x for 040, 139, and 182"=0D blockdev: with -drive if=3Dvirtio, use generic virtio-blk=0D m68k: add the virtio devices aliases=0D qdev: define list of archs with virtio-pci or virtio-ccw=0D gitlab: extend timeouts for CFI builds=0D utils: Work around mingw strto*l bug with 0x=0D utils: Tighter tests for qemu_strtosz=0D cirrus.yml: Update the FreeBSD task to version 12.2=0D configure: Don't use the __atomic_*_16 functions for testing 128-bit su= pport=0D gitlab-ci.yml: Merge the trace-backend testing into other jobs=0D tests/tcg: add HeapInfo checking to semihosting test=0D linux-user/riscv: initialise the TaskState heap/stack info=0D semihosting/arm-compat-semi: don't use SET_ARG to report SYS_HEAPINFO=0D= semihosting/arm-compat-semi: unify GET/SET_ARG helpers=0D semihosting: move semihosting tests to multiarch=0D tools/virtiofsd: include --socket-group in help=0D docs/devel: expand style section of memory management=0D ...=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/01874b15d36e...f0b6a6a1a94c= =0D From MAILER-DAEMON Wed Mar 24 13:47:37 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lP7bV-0001MH-M2 for mharc-qemu-commits@gnu.org; Wed, 24 Mar 2021 13:47:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34796) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP7bS-0001Ix-RM for qemu-commits@nongnu.org; Wed, 24 Mar 2021 13:47:35 -0400 Received: from out-26.smtp.github.com ([192.30.252.209]:59425 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP7bN-0004C8-1u for qemu-commits@nongnu.org; Wed, 24 Mar 2021 13:47:34 -0400 Received: from github.com (hubbernetes-node-48df57d.ash1-iad.github.net [10.56.116.38]) by smtp.github.com (Postfix) with ESMTPA id BFCAB5E093C for ; Wed, 24 Mar 2021 10:47:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616608047; bh=gkzK7I9+Yaen/oqGJi0MKGyb2pr7BLcjtAm4fbu+81c=; h=Date:From:To:Subject:From; b=rPD/VOp7EOVlBFEQEiZdBoyzI77ZYYfPxpJgoMARGWBY4sQOnB5nZ4wNXKdzGQbnI OTgqJXsiwFxxVHmTLhSCowEllf79tLGb842pBN8PGsvlvyQWV3CTRUONmYYoemV15K wyYm1fgqvg/k7UWr6jtd+fOxgRpF2gXVFiLXl3j4= Date: Wed, 24 Mar 2021 10:47:27 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 4290b4: migration/block-dirty-bitmap: make incoming disabl... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Mar 2021 17:47:35 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 4290b4834c4ffb9633a9851a9b932a147fcac928 https://github.com/qemu/qemu/commit/4290b4834c4ffb9633a9851a9b932a147fcac928 Author: Vladimir Sementsov-Ogievskiy Date: 2021-03-24 (Wed, 24 Mar 2021) Changed paths: M migration/block-dirty-bitmap.c Log Message: ----------- migration/block-dirty-bitmap: make incoming disabled bitmaps busy Incoming enabled bitmaps are busy, because we do bdrv_dirty_bitmap_create_successor() for them. But disabled bitmaps being migrated are not marked busy, and user can remove them during the incoming migration. Then we may crash in cancel_incoming_locked() when try to remove the bitmap that was already removed by user, like this: #0 qemu_mutex_lock_impl (mutex=0x5593d88c50d1, file=0x559680554b20 "../block/dirty-bitmap.c", line=64) at ../util/qemu-thread-posix.c:77 #1 bdrv_dirty_bitmaps_lock (bs=0x5593d88c0ee9) at ../block/dirty-bitmap.c:64 #2 bdrv_release_dirty_bitmap (bitmap=0x5596810e9570) at ../block/dirty-bitmap.c:362 #3 cancel_incoming_locked (s=0x559680be8208 ) at ../migration/block-dirty-bitmap.c:918 #4 dirty_bitmap_load (f=0x559681d02b10, opaque=0x559680be81e0 , version_id=1) at ../migration/block-dirty-bitmap.c:1194 #5 vmstate_load (f=0x559681d02b10, se=0x559680fb5810) at ../migration/savevm.c:908 #6 qemu_loadvm_section_part_end (f=0x559681d02b10, mis=0x559680fb4a30) at ../migration/savevm.c:2473 #7 qemu_loadvm_state_main (f=0x559681d02b10, mis=0x559680fb4a30) at ../migration/savevm.c:2626 #8 postcopy_ram_listen_thread (opaque=0x0) at ../migration/savevm.c:1871 #9 qemu_thread_start (args=0x5596817ccd10) at ../util/qemu-thread-posix.c:521 #10 start_thread () at /lib64/libpthread.so.0 #11 clone () at /lib64/libc.so.6 Note bs pointer taken from bitmap: it's definitely bad aligned. That's because we are in use after free, bitmap is already freed. So, let's make disabled bitmaps (being migrated) busy during incoming migration. Signed-off-by: Vladimir Sementsov-Ogievskiy Signed-off-by: Stefan Hajnoczi Message-Id: <20210322094906.5079-2-vsementsov@virtuozzo.com> Commit: 3460fd7f3959d1fa7bcc255796844aa261c805a4 https://github.com/qemu/qemu/commit/3460fd7f3959d1fa7bcc255796844aa261c805a4 Author: Vladimir Sementsov-Ogievskiy Date: 2021-03-24 (Wed, 24 Mar 2021) Changed paths: M tests/qemu-iotests/tests/migrate-bitmaps-postcopy-test Log Message: ----------- migrate-bitmaps-postcopy-test: check that we can't remove in-flight bitmaps Check that we can't remove bitmaps being migrated on destination vm. The new check proves that previous commit helps. Signed-off-by: Vladimir Sementsov-Ogievskiy Signed-off-by: Stefan Hajnoczi Message-Id: <20210322094906.5079-3-vsementsov@virtuozzo.com> Commit: 51c6bde2743b1d76f381537085d282258194e07d https://github.com/qemu/qemu/commit/51c6bde2743b1d76f381537085d282258194e07d Author: Peter Maydell Date: 2021-03-24 (Wed, 24 Mar 2021) Changed paths: M migration/block-dirty-bitmap.c M tests/qemu-iotests/tests/migrate-bitmaps-postcopy-test Log Message: ----------- Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging Pull request This dirty bitmap fix solves a crash that can be triggered in the destination QEMU process during live migration. # gpg: Signature made Wed 24 Mar 2021 14:51:31 GMT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi " [full] # gpg: aka "Stefan Hajnoczi " [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha-gitlab/tags/block-pull-request: migrate-bitmaps-postcopy-test: check that we can't remove in-flight bitmaps migration/block-dirty-bitmap: make incoming disabled bitmaps busy Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/f0b6a6a1a94c...51c6bde2743b From MAILER-DAEMON Wed Mar 24 15:54:23 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lP9aA-0001nC-UT for mharc-qemu-commits@gnu.org; Wed, 24 Mar 2021 15:54:22 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34628) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP9a9-0001n2-4v for qemu-commits@nongnu.org; Wed, 24 Mar 2021 15:54:21 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:53889) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP9a6-00084n-DN for qemu-commits@nongnu.org; Wed, 24 Mar 2021 15:54:20 -0400 Received: from github.com (hubbernetes-node-26b0cf8.ash1-iad.github.net [10.56.109.78]) by smtp.github.com (Postfix) with ESMTPA id AC4749006FF for ; Wed, 24 Mar 2021 12:54:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616615657; bh=8dTPiS4o1ygRnI69h9oWF8004mlg7EWNFjdZgKbjqUI=; h=Date:From:To:Subject:From; b=cEeyymxpD31tqQwwcl0BmCgnfgooKF+KP9AUJBkVpnK+y89DVpoLLTnF2jwxvuRa7 JugcOBZ48zg7Sh+9EWlYM+zq+VWm27ESE1VWt3BKniGT5k1UXn9XSnVnldEnxcZlui 4+MZhYcvqVOwjtbRNkxDiHxRbWYnaf3UTuH1yNw4= Date: Wed, 24 Mar 2021 12:54:17 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 9e2e9f: Update version for v6.0.0-rc0 release X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Mar 2021 19:54:21 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 9e2e9fe3df9f539f8b6941ceb96d25355fdae47e https://github.com/qemu/qemu/commit/9e2e9fe3df9f539f8b6941ceb96d25355fdae47e Author: Peter Maydell Date: 2021-03-24 (Wed, 24 Mar 2021) Changed paths: M VERSION Log Message: ----------- Update version for v6.0.0-rc0 release Signed-off-by: Peter Maydell From MAILER-DAEMON Wed Mar 24 15:54:24 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lP9aC-0001oX-4z for mharc-qemu-commits@gnu.org; Wed, 24 Mar 2021 15:54:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:34644) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP9aA-0001nG-V1 for qemu-commits@nongnu.org; Wed, 24 Mar 2021 15:54:22 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:52279) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lP9a7-00085o-JN for qemu-commits@nongnu.org; Wed, 24 Mar 2021 15:54:22 -0400 Received: from github.com (hubbernetes-node-81da910.ash1-iad.github.net [10.56.101.65]) by smtp.github.com (Postfix) with ESMTPA id E365A900731 for ; Wed, 24 Mar 2021 12:54:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616615658; bh=iqALQ2EsnhHcU5tHv6zxqZmll3QDTqfCHcSFK37s28U=; h=Date:From:To:Subject:From; b=mGbUtiB7kg6O0167kv4dq6LdMnSGRPlYn2TvUjZyyPdMhF9N464sqxQSlIwtmTEs3 jHo9LUGk7EjNOLWG8fkWXTuwn1R5XGqTb7DMiOYupqz0PPIr0UKcA+dXrkYqSVSXSF whrh4JF0YOe+QriG9zu+0IYp7f1MO4ygj4RNzSjk= Date: Wed, 24 Mar 2021 12:54:18 -0700 From: Paolo Bonzini To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -29 X-Spam_score: -3.0 X-Spam_bar: --- X-Spam_report: (-3.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PYZOR_CHECK=1.392, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, TVD_SPACE_RATIO=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 24 Mar 2021 19:54:23 -0000 Branch: refs/tags/v6.0.0-rc0 Home: https://github.com/qemu/qemu From MAILER-DAEMON Thu Mar 25 12:34:55 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lPSwh-0007e7-C6 for mharc-qemu-commits@gnu.org; Thu, 25 Mar 2021 12:34:55 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59048) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lPSwf-0007aK-28 for qemu-commits@nongnu.org; Thu, 25 Mar 2021 12:34:53 -0400 Received: from out-22.smtp.github.com ([192.30.252.205]:52155 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lPSwd-0004o2-0U for qemu-commits@nongnu.org; Thu, 25 Mar 2021 12:34:52 -0400 Received: from github.com (hubbernetes-node-55c360f.ac4-iad.github.net [10.52.207.66]) by smtp.github.com (Postfix) with ESMTPA id 473EF56010F for ; Thu, 25 Mar 2021 09:34:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616690090; bh=8OO0BJLiGrJ1mtJfHtU4M5xUHwYGI6qZY83vng8/f5w=; h=Date:From:To:Subject:From; b=gfbJk8+D1Gw7dOP0dB12lCqzP/RfyznMOLWc3z+HDILBY2RZJFP5fnv9lhRwWWelm 5eq9kSXjF9nJGguM7tR25Nvwp7yIDCJtZZAxC3JfpDOeIGqsi+zo1DH3He4zJQK2j5 4dmdBFgMBvqJAXPEm+bwZnFbW54QK0c+7QwsXaXs= Date: Thu, 25 Mar 2021 09:34:50 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.205; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 63ad23: Merge remote-tracking branch 'remotes/stefanha-git... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Mar 2021 16:34:53 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 63ad23fa240bb7cdbf6d0440c5670cc7935032b0 https://github.com/qemu/qemu/commit/63ad23fa240bb7cdbf6d0440c5670cc7935032b0 Author: Peter Maydell Date: 2021-03-25 (Thu, 25 Mar 2021) Changed paths: M migration/block-dirty-bitmap.c M tests/qemu-iotests/tests/migrate-bitmaps-postcopy-test Log Message: ----------- Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging Pull request This dirty bitmap fix solves a crash that can be triggered in the destination QEMU process during live migration. # gpg: Signature made Wed 24 Mar 2021 14:51:31 GMT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi " [full] # gpg: aka "Stefan Hajnoczi " [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha-gitlab/tags/block-pull-request: migrate-bitmaps-postcopy-test: check that we can't remove in-flight bitmaps migration/block-dirty-bitmap: make incoming disabled bitmaps busy Signed-off-by: Peter Maydell From MAILER-DAEMON Fri Mar 26 06:22:41 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lPjc1-00039R-Am for mharc-qemu-commits@gnu.org; Fri, 26 Mar 2021 06:22:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58322) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lPjby-00037c-Ka for qemu-commits@nongnu.org; Fri, 26 Mar 2021 06:22:39 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:48467) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lPjbu-0001df-SM for qemu-commits@nongnu.org; Fri, 26 Mar 2021 06:22:37 -0400 Received: from github.com (hubbernetes-node-1b47257.ash1-iad.github.net [10.56.110.71]) by smtp.github.com (Postfix) with ESMTPA id 11FCD900DBB for ; Fri, 26 Mar 2021 03:22:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616754154; bh=/vqLrKUi8CNmVR44BD8Oo1oJ+J6lvcZ8Fhx5iTKIBeQ=; h=Date:From:To:Subject:From; b=wWhg7V4N1sQ86YDsBqfghyuz31Q1D4p3queJMpx8a7DBhbQ4juU7mxddgsnA6GKyb Ug+rcqp9H4RfngIW3uDyTht4q7Za2JqvPR+TZBGJUg38Hr/KiVTP3j5cX7cudrEVKL D/vTZ+27J9vJObLAtoMaHuBnHXY2PFuHrtbJ3fsc= Date: Fri, 26 Mar 2021 03:22:34 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 4290b4: migration/block-dirty-bitmap: make incoming disabl... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Mar 2021 10:22:39 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 4290b4834c4ffb9633a9851a9b932a147fcac928 https://github.com/qemu/qemu/commit/4290b4834c4ffb9633a9851a9b932a147fcac928 Author: Vladimir Sementsov-Ogievskiy Date: 2021-03-24 (Wed, 24 Mar 2021) Changed paths: M migration/block-dirty-bitmap.c Log Message: ----------- migration/block-dirty-bitmap: make incoming disabled bitmaps busy Incoming enabled bitmaps are busy, because we do bdrv_dirty_bitmap_create_successor() for them. But disabled bitmaps being migrated are not marked busy, and user can remove them during the incoming migration. Then we may crash in cancel_incoming_locked() when try to remove the bitmap that was already removed by user, like this: #0 qemu_mutex_lock_impl (mutex=0x5593d88c50d1, file=0x559680554b20 "../block/dirty-bitmap.c", line=64) at ../util/qemu-thread-posix.c:77 #1 bdrv_dirty_bitmaps_lock (bs=0x5593d88c0ee9) at ../block/dirty-bitmap.c:64 #2 bdrv_release_dirty_bitmap (bitmap=0x5596810e9570) at ../block/dirty-bitmap.c:362 #3 cancel_incoming_locked (s=0x559680be8208 ) at ../migration/block-dirty-bitmap.c:918 #4 dirty_bitmap_load (f=0x559681d02b10, opaque=0x559680be81e0 , version_id=1) at ../migration/block-dirty-bitmap.c:1194 #5 vmstate_load (f=0x559681d02b10, se=0x559680fb5810) at ../migration/savevm.c:908 #6 qemu_loadvm_section_part_end (f=0x559681d02b10, mis=0x559680fb4a30) at ../migration/savevm.c:2473 #7 qemu_loadvm_state_main (f=0x559681d02b10, mis=0x559680fb4a30) at ../migration/savevm.c:2626 #8 postcopy_ram_listen_thread (opaque=0x0) at ../migration/savevm.c:1871 #9 qemu_thread_start (args=0x5596817ccd10) at ../util/qemu-thread-posix.c:521 #10 start_thread () at /lib64/libpthread.so.0 #11 clone () at /lib64/libc.so.6 Note bs pointer taken from bitmap: it's definitely bad aligned. That's because we are in use after free, bitmap is already freed. So, let's make disabled bitmaps (being migrated) busy during incoming migration. Signed-off-by: Vladimir Sementsov-Ogievskiy Signed-off-by: Stefan Hajnoczi Message-Id: <20210322094906.5079-2-vsementsov@virtuozzo.com> Commit: 3460fd7f3959d1fa7bcc255796844aa261c805a4 https://github.com/qemu/qemu/commit/3460fd7f3959d1fa7bcc255796844aa261c805a4 Author: Vladimir Sementsov-Ogievskiy Date: 2021-03-24 (Wed, 24 Mar 2021) Changed paths: M tests/qemu-iotests/tests/migrate-bitmaps-postcopy-test Log Message: ----------- migrate-bitmaps-postcopy-test: check that we can't remove in-flight bitmaps Check that we can't remove bitmaps being migrated on destination vm. The new check proves that previous commit helps. Signed-off-by: Vladimir Sementsov-Ogievskiy Signed-off-by: Stefan Hajnoczi Message-Id: <20210322094906.5079-3-vsementsov@virtuozzo.com> Commit: 63ad23fa240bb7cdbf6d0440c5670cc7935032b0 https://github.com/qemu/qemu/commit/63ad23fa240bb7cdbf6d0440c5670cc7935032b0 Author: Peter Maydell Date: 2021-03-25 (Thu, 25 Mar 2021) Changed paths: M migration/block-dirty-bitmap.c M tests/qemu-iotests/tests/migrate-bitmaps-postcopy-test Log Message: ----------- Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request' into staging Pull request This dirty bitmap fix solves a crash that can be triggered in the destination QEMU process during live migration. # gpg: Signature made Wed 24 Mar 2021 14:51:31 GMT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi " [full] # gpg: aka "Stefan Hajnoczi " [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha-gitlab/tags/block-pull-request: migrate-bitmaps-postcopy-test: check that we can't remove in-flight bitmaps migration/block-dirty-bitmap: make incoming disabled bitmaps busy Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/9e2e9fe3df9f...63ad23fa240b From MAILER-DAEMON Fri Mar 26 08:59:44 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lPm40-00077z-BQ for mharc-qemu-commits@gnu.org; Fri, 26 Mar 2021 08:59:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:32876) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lPm3y-00075q-LR for qemu-commits@nongnu.org; Fri, 26 Mar 2021 08:59:42 -0400 Received: from out-19.smtp.github.com ([192.30.252.202]:54717) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lPm3u-0000fd-77 for qemu-commits@nongnu.org; Fri, 26 Mar 2021 08:59:41 -0400 Received: from github.com (hubbernetes-node-b3e07bb.va3-iad.github.net [10.48.112.54]) by smtp.github.com (Postfix) with ESMTPA id 56002E0409 for ; Fri, 26 Mar 2021 05:59:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616763576; bh=tGnkD83kXmAIwHPthAd/7dZKVbg1LRCi52P52qteF2s=; h=Date:From:To:Subject:From; b=s9+OnVzX5O7A/o8FRadxy4XNG1yF+WajdnN+k/eCbnGPqnzFyJVwJRsXoQFjZBZwA Cabd4MZobmOX+eSoiUAj8YLj8CKO5c9aGEb2pJrno574LN8LtWEFaFka0vjDKlixTf EOEB4cZILV/+wNPU7P0dWEkGb+k6HQbTeEndI8ic= Date: Fri, 26 Mar 2021 05:59:36 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.202; envelope-from=noreply@github.com; helo=out-19.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] d2aea7: usb: Remove "-usbdevice ccid" X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Mar 2021 12:59:42 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: d2aea775d4ab1a3d8fb92587881dc6fa55819f62=0D https://github.com/qemu/qemu/commit/d2aea775d4ab1a3d8fb92587881dc6f= a55819f62=0D Author: Thomas Huth =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M docs/system/removed-features.rst=0D M hw/usb/dev-smartcard-reader.c=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D usb: Remove "-usbdevice ccid"=0D =0D "-usbdevice ccid" was not documented and -usbdevice itself was marked=0D as deprecated before QEMU v6.0. And searching for "-usbdevice ccid"=0D in the internet does not show any useful results, so likely nobody=0D was using the ccid device via the -usbdevice option. Remove it now.=0D =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210311092829.1479051-1-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 0c27b9c5687fd276e26c3a95ca6d89f792fc7a1c=0D https://github.com/qemu/qemu/commit/0c27b9c5687fd276e26c3a95ca6d89f= 792fc7a1c=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M contrib/vhost-user-gpu/meson.build=0D M contrib/vhost-user-gpu/virgl.c=0D =0D Log Message:=0D -----------=0D vhost-user-gpu: glFlush before notifying clients=0D =0D For similar reasons as commit 3af1671852 ("spice: flush on GL update=0D before notifying client"), vhost-user-gpu must ensure the GL state is=0D flushed before sharing its rendering result.=0D =0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210312100108.2706195-3-marcandre.lureau@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 96ee096a1332086285c98d92f750ea0c3cb32564=0D https://github.com/qemu/qemu/commit/96ee096a1332086285c98d92f750ea0= c3cb32564=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M contrib/vhost-user-gpu/vhost-user-gpu.c=0D M contrib/vhost-user-gpu/vugbm.c=0D M contrib/vhost-user-gpu/vugbm.h=0D =0D Log Message:=0D -----------=0D vhost-user-gpu: fix vugbm_device_init fallback=0D =0D vugbm implements GBM device wrapping, udmabuf and memory fallback.=0D However, the fallback/detection logic is flawed, as if "/dev/udmabuf"=0D failed to be opened, it will not initialize vugbm and crash later.=0D =0D Rework the vugbm_device_init() logic to initialize correctly in all=0D cases.=0D =0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210312100108.2706195-4-marcandre.lureau@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 59be75e7d8693b953c072487b1fb6cef2b7bb41a=0D https://github.com/qemu/qemu/commit/59be75e7d8693b953c072487b1fb6ce= f2b7bb41a=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M contrib/vhost-user-gpu/vhost-user-gpu.c=0D =0D Log Message:=0D -----------=0D vhost-user-gpu: fix cursor move/update=0D =0D "move" is incorrectly initialized.=0D =0D Fix it by using a switch statement and also treating unknown commands=0D with a fallback.=0D =0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210312100108.2706195-5-marcandre.lureau@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 2da6e36b3390501b1e3f549a87a58871be447a94=0D https://github.com/qemu/qemu/commit/2da6e36b3390501b1e3f549a87a5887= 1be447a94=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/hcd-ehci-sysbus.c=0D =0D Log Message:=0D -----------=0D hw/usb/hcd-ehci-sysbus: Free USBPacket on instance finalize()=0D =0D When building with --enable-sanitizers we get:=0D =0D Direct leak of 32 byte(s) in 2 object(s) allocated from:=0D #0 0x5618479ec7cf in malloc (qemu-system-aarch64+0x233b7cf)=0D #1 0x7f675745f958 in g_malloc (/lib64/libglib-2.0.so.0+0x58958)=0D #2 0x561847f02ca2 in usb_packet_init hw/usb/core.c:531:5=0D #3 0x561848df4df4 in usb_ehci_init hw/usb/hcd-ehci.c:2575:5=0D #4 0x561847c119ac in ehci_sysbus_init hw/usb/hcd-ehci-sysbus.c:73:5= =0D #5 0x56184a5bdab8 in object_init_with_type qom/object.c:375:9=0D #6 0x56184a5bd955 in object_init_with_type qom/object.c:371:9=0D #7 0x56184a5a2bda in object_initialize_with_type qom/object.c:517:5= =0D #8 0x56184a5a24d5 in object_initialize qom/object.c:536:5=0D #9 0x56184a5a2f6c in object_initialize_child_with_propsv qom/object= .c:566:5=0D #10 0x56184a5a2e60 in object_initialize_child_with_props qom/object= .c:549:10=0D #11 0x56184a5a3a1e in object_initialize_child_internal qom/object.c= :603:5=0D #12 0x561849542d18 in npcm7xx_init hw/arm/npcm7xx.c:427:5=0D =0D Similarly to commit d710e1e7bd3 ("usb: ehci: fix memory leak in=0D ehci"), fix by calling usb_ehci_finalize() to free the USBPacket.=0D =0D Fixes: 7341ea075c0=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210323183701.281152-1-f4bug@amsat.org>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: d4c603d7be2e4173252c5b55e62d30ddd26edaca=0D https://github.com/qemu/qemu/commit/d4c603d7be2e4173252c5b55e62d30d= dd26edaca=0D Author: Gerd Hoffmann =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M include/hw/s390x/css.h=0D M include/hw/s390x/s390_flic.h=0D M target/s390x/cpu.h=0D =0D Log Message:=0D -----------=0D s390x: move S390_ADAPTER_SUPPRESSIBLE=0D =0D The definition S390_ADAPTER_SUPPRESSIBLE was moved to "cpu.h", per=0D suggestion of Thomas Huth. From interface design perspective, IMHO, not=0D= a good thing as it belongs to the public interface of=0D css_register_io_adapters(). We did this because CONFIG_KVM requeires=0D NEED_CPU_H and Thomas, and other commenters did not like the=0D consequences of that.=0D =0D Moving the interrupt related declarations to s390_flic.h was suggested=0D= by Cornelia Huck.=0D =0D Signed-off-by: Halil Pasic =0D Signed-off-by: Gerd Hoffmann =0D Reviewed-by: Halil Pasic =0D Tested-by: Halil Pasic =0D Message-Id: <20210317095622.2839895-2-kraxel@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 2dd9d8cfb4f3bd30d9cdfc2edba5cb7ee5917f4b=0D https://github.com/qemu/qemu/commit/2dd9d8cfb4f3bd30d9cdfc2edba5cb7= ee5917f4b=0D Author: Gerd Hoffmann =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/virtio-ccw.c=0D M hw/s390x/virtio-ccw.h=0D =0D Log Message:=0D -----------=0D s390x: add have_virtio_ccw=0D =0D Introduce a symbol which can be used to prevent ccw modules=0D being loaded into system emulators without ccw support.=0D =0D Signed-off-by: Gerd Hoffmann =0D Reviewed-by: Halil Pasic =0D Tested-by: Halil Pasic =0D Message-Id: <20210317095622.2839895-3-kraxel@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: adcf33a504de29feb720736051dc32889314c9e6=0D https://github.com/qemu/qemu/commit/adcf33a504de29feb720736051dc328= 89314c9e6=0D Author: Gerd Hoffmann =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/meson.build=0D M hw/s390x/virtio-ccw-gpu.c=0D M util/module.c=0D =0D Log Message:=0D -----------=0D s390x: modularize virtio-gpu-ccw=0D =0D Since the virtio-gpu-ccw device depends on the hw-display-virtio-gpu=0D module, which provides the type virtio-gpu-device, packaging the=0D hw-display-virtio-gpu module as a separate package that may or may not=0D= be installed along with the qemu package leads to problems. Namely if=0D the hw-display-virtio-gpu is absent, qemu continues to advertise=0D virtio-gpu-ccw, but it aborts not only when one attempts using=0D virtio-gpu-ccw, but also when libvirtd's capability probing tries=0D to instantiate the type to introspect it.=0D =0D Let us thus introduce a module named hw-s390x-virtio-gpu-ccw that=0D is going to provide the virtio-gpu-ccw device. The hw-s390x prefix=0D was chosen because it is not a portable device.=0D =0D With virtio-gpu-ccw built as a module, the correct way to package a=0D modularized qemu is to require that hw-display-virtio-gpu must be=0D installed whenever the module hw-s390x-virtio-gpu-ccw.=0D =0D Signed-off-by: Halil Pasic =0D Signed-off-by: Gerd Hoffmann =0D Reviewed-by: Halil Pasic =0D Tested-by: Halil Pasic =0D Message-Id: <20210317095622.2839895-4-kraxel@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: db0b034185824ac33e1a85ba62ab2030eb17b00d=0D https://github.com/qemu/qemu/commit/db0b034185824ac33e1a85ba62ab203= 0eb17b00d=0D Author: Thomas Huth =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/hcd-ehci.c=0D =0D Log Message:=0D -----------=0D hw/usb/hcd-ehci: Fix crash when showing help of EHCI devices=0D =0D QEMU crashes with certain targets when trying to show the help=0D output of EHCI devices:=0D =0D $ ./qemu-system-aarch64 -device ich9-usb-ehci1,help=0D qemu-system-aarch64: ../../devel/qemu/softmmu/physmem.c:1154: phys_sectio= n_add:=0D Assertion `map->sections_nb < TARGET_PAGE_SIZE' failed.=0D Aborted (core dumped)=0D =0D This happens because the device is doing things at "instance_init" time=0D= that should be done at "realize" time instead. So move the related code=0D= to the realize() function instead. (NB: This now also matches the=0D memory_region_del_subregion() calls which are done in usb_ehci_unrealize(= ),=0D and not during finalize()).=0D =0D Suggested-by: Richard Henderson =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210326095155.1994604-1-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 7b9a3c9f94bcac23c534bc9f42a9e914b433b299=0D https://github.com/qemu/qemu/commit/7b9a3c9f94bcac23c534bc9f42a9e91= 4b433b299=0D Author: Peter Maydell =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M contrib/vhost-user-gpu/meson.build=0D M contrib/vhost-user-gpu/vhost-user-gpu.c=0D M contrib/vhost-user-gpu/virgl.c=0D M contrib/vhost-user-gpu/vugbm.c=0D M contrib/vhost-user-gpu/vugbm.h=0D M docs/system/removed-features.rst=0D M hw/s390x/meson.build=0D M hw/s390x/virtio-ccw-gpu.c=0D M hw/s390x/virtio-ccw.c=0D M hw/s390x/virtio-ccw.h=0D M hw/usb/dev-smartcard-reader.c=0D M hw/usb/hcd-ehci-sysbus.c=0D M hw/usb/hcd-ehci.c=0D M include/hw/s390x/css.h=0D M include/hw/s390x/s390_flic.h=0D M qemu-options.hx=0D M target/s390x/cpu.h=0D M util/module.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kraxel/tags/fixes-20210326-pull-r= equest' into staging=0D =0D fixes for usb, virtio-gpu and vhost-gpu=0D =0D # gpg: Signature made Fri 26 Mar 2021 12:49:14 GMT=0D # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87= 138=0D # gpg: Good signature from "Gerd Hoffmann (work) " [fu= ll]=0D # gpg: aka "Gerd Hoffmann " [full]=0D # gpg: aka "Gerd Hoffmann (private) " [= full]=0D # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 = 7138=0D =0D * remotes/kraxel/tags/fixes-20210326-pull-request:=0D hw/usb/hcd-ehci: Fix crash when showing help of EHCI devices=0D s390x: modularize virtio-gpu-ccw=0D s390x: add have_virtio_ccw=0D s390x: move S390_ADAPTER_SUPPRESSIBLE=0D hw/usb/hcd-ehci-sysbus: Free USBPacket on instance finalize()=0D vhost-user-gpu: fix cursor move/update=0D vhost-user-gpu: fix vugbm_device_init fallback=0D vhost-user-gpu: glFlush before notifying clients=0D usb: Remove "-usbdevice ccid"=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/63ad23fa240b...7b9a3c9f94bc= =0D From MAILER-DAEMON Fri Mar 26 13:51:51 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lPqcf-0000Oz-TM for mharc-qemu-commits@gnu.org; Fri, 26 Mar 2021 13:51:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49100) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lPqcZ-0000OB-Rq for qemu-commits@nongnu.org; Fri, 26 Mar 2021 13:51:45 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:59975 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lPqcV-0005hD-4E for qemu-commits@nongnu.org; Fri, 26 Mar 2021 13:51:43 -0400 Received: from github.com (hubbernetes-node-ba4ed82.va3-iad.github.net [10.48.16.63]) by smtp.github.com (Postfix) with ESMTPA id CCB2F5C00A6 for ; Fri, 26 Mar 2021 10:51:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616781097; bh=EqbfzlOJ5H/Kll8HCTIE0bRGWkrxuBvL47w8aTsO6Ms=; h=Date:From:To:Subject:From; b=k/+Rl8P+WnWPeqNP8L0L7qjk0NhMSPzGfBIfG2Bvi/wIRGg8MauJO0ecFiS9MEKWr zve9BB5sE4t8vWx1XX9AjIOi8z/fSnuJooFJD9I8fEoWicVpb7JZwKk5LMikctqMG6 dlxqPoIk3BBMWcc6WkuAXCfuHSqRX+f7eerkWCaE= Date: Fri, 26 Mar 2021 10:51:37 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] d2aea7: usb: Remove "-usbdevice ccid" X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Mar 2021 17:51:45 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: d2aea775d4ab1a3d8fb92587881dc6fa55819f62=0D https://github.com/qemu/qemu/commit/d2aea775d4ab1a3d8fb92587881dc6f= a55819f62=0D Author: Thomas Huth =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M docs/system/removed-features.rst=0D M hw/usb/dev-smartcard-reader.c=0D M qemu-options.hx=0D =0D Log Message:=0D -----------=0D usb: Remove "-usbdevice ccid"=0D =0D "-usbdevice ccid" was not documented and -usbdevice itself was marked=0D as deprecated before QEMU v6.0. And searching for "-usbdevice ccid"=0D in the internet does not show any useful results, so likely nobody=0D was using the ccid device via the -usbdevice option. Remove it now.=0D =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210311092829.1479051-1-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 0c27b9c5687fd276e26c3a95ca6d89f792fc7a1c=0D https://github.com/qemu/qemu/commit/0c27b9c5687fd276e26c3a95ca6d89f= 792fc7a1c=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M contrib/vhost-user-gpu/meson.build=0D M contrib/vhost-user-gpu/virgl.c=0D =0D Log Message:=0D -----------=0D vhost-user-gpu: glFlush before notifying clients=0D =0D For similar reasons as commit 3af1671852 ("spice: flush on GL update=0D before notifying client"), vhost-user-gpu must ensure the GL state is=0D flushed before sharing its rendering result.=0D =0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210312100108.2706195-3-marcandre.lureau@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 96ee096a1332086285c98d92f750ea0c3cb32564=0D https://github.com/qemu/qemu/commit/96ee096a1332086285c98d92f750ea0= c3cb32564=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M contrib/vhost-user-gpu/vhost-user-gpu.c=0D M contrib/vhost-user-gpu/vugbm.c=0D M contrib/vhost-user-gpu/vugbm.h=0D =0D Log Message:=0D -----------=0D vhost-user-gpu: fix vugbm_device_init fallback=0D =0D vugbm implements GBM device wrapping, udmabuf and memory fallback.=0D However, the fallback/detection logic is flawed, as if "/dev/udmabuf"=0D failed to be opened, it will not initialize vugbm and crash later.=0D =0D Rework the vugbm_device_init() logic to initialize correctly in all=0D cases.=0D =0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210312100108.2706195-4-marcandre.lureau@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 59be75e7d8693b953c072487b1fb6cef2b7bb41a=0D https://github.com/qemu/qemu/commit/59be75e7d8693b953c072487b1fb6ce= f2b7bb41a=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M contrib/vhost-user-gpu/vhost-user-gpu.c=0D =0D Log Message:=0D -----------=0D vhost-user-gpu: fix cursor move/update=0D =0D "move" is incorrectly initialized.=0D =0D Fix it by using a switch statement and also treating unknown commands=0D with a fallback.=0D =0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210312100108.2706195-5-marcandre.lureau@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 2da6e36b3390501b1e3f549a87a58871be447a94=0D https://github.com/qemu/qemu/commit/2da6e36b3390501b1e3f549a87a5887= 1be447a94=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/hcd-ehci-sysbus.c=0D =0D Log Message:=0D -----------=0D hw/usb/hcd-ehci-sysbus: Free USBPacket on instance finalize()=0D =0D When building with --enable-sanitizers we get:=0D =0D Direct leak of 32 byte(s) in 2 object(s) allocated from:=0D #0 0x5618479ec7cf in malloc (qemu-system-aarch64+0x233b7cf)=0D #1 0x7f675745f958 in g_malloc (/lib64/libglib-2.0.so.0+0x58958)=0D #2 0x561847f02ca2 in usb_packet_init hw/usb/core.c:531:5=0D #3 0x561848df4df4 in usb_ehci_init hw/usb/hcd-ehci.c:2575:5=0D #4 0x561847c119ac in ehci_sysbus_init hw/usb/hcd-ehci-sysbus.c:73:5= =0D #5 0x56184a5bdab8 in object_init_with_type qom/object.c:375:9=0D #6 0x56184a5bd955 in object_init_with_type qom/object.c:371:9=0D #7 0x56184a5a2bda in object_initialize_with_type qom/object.c:517:5= =0D #8 0x56184a5a24d5 in object_initialize qom/object.c:536:5=0D #9 0x56184a5a2f6c in object_initialize_child_with_propsv qom/object= .c:566:5=0D #10 0x56184a5a2e60 in object_initialize_child_with_props qom/object= .c:549:10=0D #11 0x56184a5a3a1e in object_initialize_child_internal qom/object.c= :603:5=0D #12 0x561849542d18 in npcm7xx_init hw/arm/npcm7xx.c:427:5=0D =0D Similarly to commit d710e1e7bd3 ("usb: ehci: fix memory leak in=0D ehci"), fix by calling usb_ehci_finalize() to free the USBPacket.=0D =0D Fixes: 7341ea075c0=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Thomas Huth =0D Message-Id: <20210323183701.281152-1-f4bug@amsat.org>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: d4c603d7be2e4173252c5b55e62d30ddd26edaca=0D https://github.com/qemu/qemu/commit/d4c603d7be2e4173252c5b55e62d30d= dd26edaca=0D Author: Gerd Hoffmann =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M include/hw/s390x/css.h=0D M include/hw/s390x/s390_flic.h=0D M target/s390x/cpu.h=0D =0D Log Message:=0D -----------=0D s390x: move S390_ADAPTER_SUPPRESSIBLE=0D =0D The definition S390_ADAPTER_SUPPRESSIBLE was moved to "cpu.h", per=0D suggestion of Thomas Huth. From interface design perspective, IMHO, not=0D= a good thing as it belongs to the public interface of=0D css_register_io_adapters(). We did this because CONFIG_KVM requeires=0D NEED_CPU_H and Thomas, and other commenters did not like the=0D consequences of that.=0D =0D Moving the interrupt related declarations to s390_flic.h was suggested=0D= by Cornelia Huck.=0D =0D Signed-off-by: Halil Pasic =0D Signed-off-by: Gerd Hoffmann =0D Reviewed-by: Halil Pasic =0D Tested-by: Halil Pasic =0D Message-Id: <20210317095622.2839895-2-kraxel@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 2dd9d8cfb4f3bd30d9cdfc2edba5cb7ee5917f4b=0D https://github.com/qemu/qemu/commit/2dd9d8cfb4f3bd30d9cdfc2edba5cb7= ee5917f4b=0D Author: Gerd Hoffmann =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/virtio-ccw.c=0D M hw/s390x/virtio-ccw.h=0D =0D Log Message:=0D -----------=0D s390x: add have_virtio_ccw=0D =0D Introduce a symbol which can be used to prevent ccw modules=0D being loaded into system emulators without ccw support.=0D =0D Signed-off-by: Gerd Hoffmann =0D Reviewed-by: Halil Pasic =0D Tested-by: Halil Pasic =0D Message-Id: <20210317095622.2839895-3-kraxel@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: adcf33a504de29feb720736051dc32889314c9e6=0D https://github.com/qemu/qemu/commit/adcf33a504de29feb720736051dc328= 89314c9e6=0D Author: Gerd Hoffmann =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M hw/s390x/meson.build=0D M hw/s390x/virtio-ccw-gpu.c=0D M util/module.c=0D =0D Log Message:=0D -----------=0D s390x: modularize virtio-gpu-ccw=0D =0D Since the virtio-gpu-ccw device depends on the hw-display-virtio-gpu=0D module, which provides the type virtio-gpu-device, packaging the=0D hw-display-virtio-gpu module as a separate package that may or may not=0D= be installed along with the qemu package leads to problems. Namely if=0D the hw-display-virtio-gpu is absent, qemu continues to advertise=0D virtio-gpu-ccw, but it aborts not only when one attempts using=0D virtio-gpu-ccw, but also when libvirtd's capability probing tries=0D to instantiate the type to introspect it.=0D =0D Let us thus introduce a module named hw-s390x-virtio-gpu-ccw that=0D is going to provide the virtio-gpu-ccw device. The hw-s390x prefix=0D was chosen because it is not a portable device.=0D =0D With virtio-gpu-ccw built as a module, the correct way to package a=0D modularized qemu is to require that hw-display-virtio-gpu must be=0D installed whenever the module hw-s390x-virtio-gpu-ccw.=0D =0D Signed-off-by: Halil Pasic =0D Signed-off-by: Gerd Hoffmann =0D Reviewed-by: Halil Pasic =0D Tested-by: Halil Pasic =0D Message-Id: <20210317095622.2839895-4-kraxel@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: db0b034185824ac33e1a85ba62ab2030eb17b00d=0D https://github.com/qemu/qemu/commit/db0b034185824ac33e1a85ba62ab203= 0eb17b00d=0D Author: Thomas Huth =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M hw/usb/hcd-ehci.c=0D =0D Log Message:=0D -----------=0D hw/usb/hcd-ehci: Fix crash when showing help of EHCI devices=0D =0D QEMU crashes with certain targets when trying to show the help=0D output of EHCI devices:=0D =0D $ ./qemu-system-aarch64 -device ich9-usb-ehci1,help=0D qemu-system-aarch64: ../../devel/qemu/softmmu/physmem.c:1154: phys_sectio= n_add:=0D Assertion `map->sections_nb < TARGET_PAGE_SIZE' failed.=0D Aborted (core dumped)=0D =0D This happens because the device is doing things at "instance_init" time=0D= that should be done at "realize" time instead. So move the related code=0D= to the realize() function instead. (NB: This now also matches the=0D memory_region_del_subregion() calls which are done in usb_ehci_unrealize(= ),=0D and not during finalize()).=0D =0D Suggested-by: Richard Henderson =0D Signed-off-by: Thomas Huth =0D Message-Id: <20210326095155.1994604-1-thuth@redhat.com>=0D Signed-off-by: Gerd Hoffmann =0D =0D =0D Commit: 7b9a3c9f94bcac23c534bc9f42a9e914b433b299=0D https://github.com/qemu/qemu/commit/7b9a3c9f94bcac23c534bc9f42a9e91= 4b433b299=0D Author: Peter Maydell =0D Date: 2021-03-26 (Fri, 26 Mar 2021)=0D =0D Changed paths:=0D M contrib/vhost-user-gpu/meson.build=0D M contrib/vhost-user-gpu/vhost-user-gpu.c=0D M contrib/vhost-user-gpu/virgl.c=0D M contrib/vhost-user-gpu/vugbm.c=0D M contrib/vhost-user-gpu/vugbm.h=0D M docs/system/removed-features.rst=0D M hw/s390x/meson.build=0D M hw/s390x/virtio-ccw-gpu.c=0D M hw/s390x/virtio-ccw.c=0D M hw/s390x/virtio-ccw.h=0D M hw/usb/dev-smartcard-reader.c=0D M hw/usb/hcd-ehci-sysbus.c=0D M hw/usb/hcd-ehci.c=0D M include/hw/s390x/css.h=0D M include/hw/s390x/s390_flic.h=0D M qemu-options.hx=0D M target/s390x/cpu.h=0D M util/module.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/kraxel/tags/fixes-20210326-pull-r= equest' into staging=0D =0D fixes for usb, virtio-gpu and vhost-gpu=0D =0D # gpg: Signature made Fri 26 Mar 2021 12:49:14 GMT=0D # gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87= 138=0D # gpg: Good signature from "Gerd Hoffmann (work) " [fu= ll]=0D # gpg: aka "Gerd Hoffmann " [full]=0D # gpg: aka "Gerd Hoffmann (private) " [= full]=0D # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 = 7138=0D =0D * remotes/kraxel/tags/fixes-20210326-pull-request:=0D hw/usb/hcd-ehci: Fix crash when showing help of EHCI devices=0D s390x: modularize virtio-gpu-ccw=0D s390x: add have_virtio_ccw=0D s390x: move S390_ADAPTER_SUPPRESSIBLE=0D hw/usb/hcd-ehci-sysbus: Free USBPacket on instance finalize()=0D vhost-user-gpu: fix cursor move/update=0D vhost-user-gpu: fix vugbm_device_init fallback=0D vhost-user-gpu: glFlush before notifying clients=0D usb: Remove "-usbdevice ccid"=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/63ad23fa240b...7b9a3c9f94bc= =0D From MAILER-DAEMON Sun Mar 28 14:50:44 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lQaUm-0006sr-4o for mharc-qemu-commits@gnu.org; Sun, 28 Mar 2021 14:50:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57128) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lQaUj-0006n0-V3 for qemu-commits@nongnu.org; Sun, 28 Mar 2021 14:50:41 -0400 Received: from out-21.smtp.github.com ([192.30.252.204]:42959 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lQaUd-00036c-53 for qemu-commits@nongnu.org; Sun, 28 Mar 2021 14:50:41 -0400 Received: from github.com (hubbernetes-node-f040e1d.ac4-iad.github.net [10.52.201.73]) by smtp.github.com (Postfix) with ESMTPA id 71BBB520569 for ; Sun, 28 Mar 2021 11:50:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1616957430; bh=R9X2I91zqyCtOI13qGnrTt0MO3s2gL3AMVeUKxmCjsc=; h=Date:From:To:Subject:From; b=tTdHFeQT9PYc8iq5zd2psRuvkU/jNGt2d8hylM7I6+/9jtf79YhEC60mD/QDPZ9mH G/X7lOP2x2Xu1CzSId0UQog4vZx9MlChRLNwYE9cCw+pfccDbkswyuj83L0j2PPdKv anCPlA9u7TyaOktZl8fXuEAvYN/qjQ+te6UB+lCk= Date: Sun, 28 Mar 2021 11:50:30 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 23fff7: linux-user/s390x: Use the guest pointer for the si... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 28 Mar 2021 18:50:42 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 23fff7a17f47420797ac6480147941612152a9ad https://github.com/qemu/qemu/commit/23fff7a17f47420797ac6480147941612152a9ad Author: Andreas Krebbel Date: 2021-03-25 (Thu, 25 Mar 2021) Changed paths: M linux-user/s390x/signal.c Log Message: ----------- linux-user/s390x: Use the guest pointer for the sigreturn stub When setting up the pointer for the sigreturn stub in the return address register (r14) we currently use the host frame address instead of the guest frame address. Note: This only caused problems if Qemu has been built with --disable-pie (as it is in distros nowadays). Otherwise guest_base defaults to 0 hiding the actual problem. Signed-off-by: Andreas Krebbel Reviewed-by: Laurent Vivier Reviewed-by: Richard Henderson Message-Id: <20210324185128.63971-1-krebbel@linux.ibm.com> Signed-off-by: Laurent Vivier Commit: 4a1e6bce2308b720d79d5ea0a3d24501c89bd80c https://github.com/qemu/qemu/commit/4a1e6bce2308b720d79d5ea0a3d24501c89bd80c Author: Zach Reizner Date: 2021-03-27 (Sat, 27 Mar 2021) Changed paths: M linux-user/syscall.c Log Message: ----------- linux-user: allow NULL msg in recvfrom The kernel allows a NULL msg in recvfrom so that he size of the next message may be queried before allocating a correctly sized buffer. This change allows the syscall translator to pass along the NULL msg pointer instead of returning early with EFAULT. Signed-off-by: Zach Reizner Reviewed-by: Laurent Vivier Message-Id: Signed-off-by: Laurent Vivier Commit: ec2e6e016d24bd429792d08cf607e4c5350dcdaa https://github.com/qemu/qemu/commit/ec2e6e016d24bd429792d08cf607e4c5350dcdaa Author: Peter Maydell Date: 2021-03-28 (Sun, 28 Mar 2021) Changed paths: M linux-user/s390x/signal.c M linux-user/syscall.c Log Message: ----------- Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.0-pull-request' into staging linux-user pull request 20210328 - Fix recvfrom with NULL msg - Fix sigreturn address on s390x # gpg: Signature made Sun 28 Mar 2021 17:05:45 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier " [full] # gpg: aka "Laurent Vivier " [full] # gpg: aka "Laurent Vivier (Red Hat) " [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-6.0-pull-request: linux-user: allow NULL msg in recvfrom linux-user/s390x: Use the guest pointer for the sigreturn stub Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/7b9a3c9f94bc...ec2e6e016d24 From MAILER-DAEMON Mon Mar 29 07:20:39 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lQpwk-0000Ma-Eo for mharc-qemu-commits@gnu.org; Mon, 29 Mar 2021 07:20:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48844) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lQpwb-0000Ls-GT for qemu-commits@nongnu.org; Mon, 29 Mar 2021 07:20:33 -0400 Received: from out-25.smtp.github.com ([192.30.252.208]:54765 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lQpwV-0006Yj-Bc for qemu-commits@nongnu.org; Mon, 29 Mar 2021 07:20:28 -0400 Received: from github.com (hubbernetes-node-7ed27e3.ash1-iad.github.net [10.56.115.39]) by smtp.github.com (Postfix) with ESMTPA id B8160840504 for ; Mon, 29 Mar 2021 04:20:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617016819; bh=nNtOg/h8Ym+uhml1RXW+ucxdrTEj0zUQoGoPSY1TPRI=; h=Date:From:To:Subject:From; b=W+naM1XxqE1Shtbc73N4JwUhZBGhWUrDh4RewTjOgnful/MtUgABjBJhTKE4OngE3 YeJ+EIgvHA4YngHi5M5bp1wSbFUXiBGiLxOZ8TPZ/XStVg+pHq3klqIzjCoGbHupG1 fTJdUJfxtjpcp25COtg0BZGtQ5M0JePzz5a2EY4M= Date: Mon, 29 Mar 2021 04:20:19 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 23fff7: linux-user/s390x: Use the guest pointer for the si... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 29 Mar 2021 11:20:34 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 23fff7a17f47420797ac6480147941612152a9ad https://github.com/qemu/qemu/commit/23fff7a17f47420797ac6480147941612152a9ad Author: Andreas Krebbel Date: 2021-03-25 (Thu, 25 Mar 2021) Changed paths: M linux-user/s390x/signal.c Log Message: ----------- linux-user/s390x: Use the guest pointer for the sigreturn stub When setting up the pointer for the sigreturn stub in the return address register (r14) we currently use the host frame address instead of the guest frame address. Note: This only caused problems if Qemu has been built with --disable-pie (as it is in distros nowadays). Otherwise guest_base defaults to 0 hiding the actual problem. Signed-off-by: Andreas Krebbel Reviewed-by: Laurent Vivier Reviewed-by: Richard Henderson Message-Id: <20210324185128.63971-1-krebbel@linux.ibm.com> Signed-off-by: Laurent Vivier Commit: 4a1e6bce2308b720d79d5ea0a3d24501c89bd80c https://github.com/qemu/qemu/commit/4a1e6bce2308b720d79d5ea0a3d24501c89bd80c Author: Zach Reizner Date: 2021-03-27 (Sat, 27 Mar 2021) Changed paths: M linux-user/syscall.c Log Message: ----------- linux-user: allow NULL msg in recvfrom The kernel allows a NULL msg in recvfrom so that he size of the next message may be queried before allocating a correctly sized buffer. This change allows the syscall translator to pass along the NULL msg pointer instead of returning early with EFAULT. Signed-off-by: Zach Reizner Reviewed-by: Laurent Vivier Message-Id: Signed-off-by: Laurent Vivier Commit: ec2e6e016d24bd429792d08cf607e4c5350dcdaa https://github.com/qemu/qemu/commit/ec2e6e016d24bd429792d08cf607e4c5350dcdaa Author: Peter Maydell Date: 2021-03-28 (Sun, 28 Mar 2021) Changed paths: M linux-user/s390x/signal.c M linux-user/syscall.c Log Message: ----------- Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.0-pull-request' into staging linux-user pull request 20210328 - Fix recvfrom with NULL msg - Fix sigreturn address on s390x # gpg: Signature made Sun 28 Mar 2021 17:05:45 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier " [full] # gpg: aka "Laurent Vivier " [full] # gpg: aka "Laurent Vivier (Red Hat) " [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-6.0-pull-request: linux-user: allow NULL msg in recvfrom linux-user/s390x: Use the guest pointer for the sigreturn stub Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/7b9a3c9f94bc...ec2e6e016d24 From MAILER-DAEMON Mon Mar 29 07:52:18 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lQqRN-0002hm-VV for mharc-qemu-commits@gnu.org; Mon, 29 Mar 2021 07:52:17 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:55420) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lQqRL-0002fm-VO for qemu-commits@nongnu.org; Mon, 29 Mar 2021 07:52:16 -0400 Received: from out-26.smtp.github.com ([192.30.252.209]:60067 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lQqRG-0007iB-Mu for qemu-commits@nongnu.org; Mon, 29 Mar 2021 07:52:14 -0400 Received: from github.com (hubbernetes-node-519e374.ash1-iad.github.net [10.56.22.65]) by smtp.github.com (Postfix) with ESMTPA id 0BC075E0094 for ; Mon, 29 Mar 2021 04:52:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617018729; bh=y0voWtfDc26IPWWD4AZXayhg6y7K1sCfyToNtiPrpok=; h=Date:From:To:Subject:From; b=2VOWUkIpd/Z9Lgslkd0r9+0xehQkR0uCXHek0Ra0nfyEAtKNRk3TQrC8inKYzVwgm MQ1Cb1xVDC3q5xfd10yXqxU4QsETaYGVKr+U3uvsfVEAtsBZyMvVRjkLieUw9coinV U94ivhDeUD99HPj45OJnG2bL76ul3apYdVieJtuc= Date: Mon, 29 Mar 2021 04:52:09 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.209; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] c3c6f6: util: fix use-after-free in module_load_one X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 29 Mar 2021 11:52:16 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: c3c6f66b292ba9b62cc01f0535e38d57107c727c=0D https://github.com/qemu/qemu/commit/c3c6f66b292ba9b62cc01f0535e38d5= 7107c727c=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-27 (Sat, 27 Mar 2021)=0D =0D Changed paths:=0D M util/module.c=0D =0D Log Message:=0D -----------=0D util: fix use-after-free in module_load_one=0D =0D g_hash_table_add always retains ownership of the pointer passed in as=0D the key. Its return status merely indicates whether the added entry was=0D= new, or replaced an existing entry. Thus key must never be freed after=0D= this method returns.=0D =0D Spotted by ASAN:=0D =0D =3D=3D2407186=3D=3DERROR: AddressSanitizer: heap-use-after-free on addres= s 0x6020003ac4f0 at pc 0x7ffff766659c bp 0x7fffffffd1d0 sp 0x7fffffffc980= =0D READ of size 1 at 0x6020003ac4f0 thread T0=0D #0 0x7ffff766659b (/lib64/libasan.so.6+0x8a59b)=0D #1 0x7ffff6bfa843 in g_str_equal ../glib/ghash.c:2303=0D #2 0x7ffff6bf8167 in g_hash_table_lookup_node ../glib/ghash.c:493=0D #3 0x7ffff6bf9b78 in g_hash_table_insert_internal ../glib/ghash.c:159= 8=0D #4 0x7ffff6bf9c32 in g_hash_table_add ../glib/ghash.c:1689=0D #5 0x5555596caad4 in module_load_one ../util/module.c:233=0D #6 0x5555596ca949 in module_load_one ../util/module.c:225=0D #7 0x5555596ca949 in module_load_one ../util/module.c:225=0D #8 0x5555596cbdf4 in module_load_qom_all ../util/module.c:349=0D =0D Typical C bug...=0D =0D Fixes: 90629122d2e ("module: use g_hash_table_add()")=0D Cc: qemu-stable@nongnu.org=0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Message-Id: <20210316134456.3243102-1-marcandre.lureau@redhat.com>=0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D =0D =0D Commit: 7d1dd9c47321d84bfa23db01b7f7e21f5058b22c=0D https://github.com/qemu/qemu/commit/7d1dd9c47321d84bfa23db01b7f7e21= f5058b22c=0D Author: Priyankar Jain =0D Date: 2021-03-27 (Sat, 27 Mar 2021)=0D =0D Changed paths:=0D M backends/dbus-vmstate.c=0D =0D Log Message:=0D -----------=0D dbus-vmstate: Increase the size of input stream buffer used during load= =0D =0D This commit fixes an issue where migration is failing in the load phase=0D= because of a false alarm about data unavailability.=0D =0D Following is the error received when the amount of data to be transferred= =0D exceeds the default buffer size setup by G_BUFFERED_INPUT_STREAM(4KiB),=0D= even when the maximum data size supported by this backend is 1MiB=0D (DBUS_VMSTATE_SIZE_LIMIT):=0D =0D dbus_vmstate_post_load: Invalid vmstate size: 4364=0D qemu-kvm: error while loading state for instance 0x0 of device 'dbus-vm= state/dbus-vmstate'=0D =0D This commit sets the size of the input stream buffer used during load to=0D= DBUS_VMSTATE_SIZE_LIMIT which is the maximum amount of data a helper can=0D= send during save phase.=0D Secondly, this commit makes sure that the input stream buffer is loaded b= efore=0D checking the size of the data available in it, rectifying the false alarm= about=0D data unavailability.=0D =0D Fixes: 5010cec2bc87 ("Add dbus-vmstate object")=0D Signed-off-by: Priyankar Jain =0D Message-Id: =0D [ Modified printf format for gsize ]=0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D =0D =0D Commit: cadadb4464dbdbd612985a02022b687f0ef98ddb=0D https://github.com/qemu/qemu/commit/cadadb4464dbdbd612985a02022b687= f0ef98ddb=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-27 (Sat, 27 Mar 2021)=0D =0D Changed paths:=0D R docs/_templates/editpage.html=0D M docs/conf.py=0D R docs/devel/_templates/editpage.html=0D R docs/interop/_templates/editpage.html=0D M docs/meson.build=0D R docs/specs/_templates/editpage.html=0D A docs/sphinx-static/theme_overrides.css=0D R docs/system/_templates/editpage.html=0D R docs/tools/_templates/editpage.html=0D R docs/user/_templates/editpage.html=0D M tests/docker/dockerfiles/alpine.docker=0D M tests/docker/dockerfiles/debian10.docker=0D M tests/docker/dockerfiles/fedora.docker=0D M tests/docker/dockerfiles/ubuntu.docker=0D M tests/docker/dockerfiles/ubuntu1804.docker=0D M tests/docker/dockerfiles/ubuntu2004.docker=0D =0D Log Message:=0D -----------=0D sphinx: adopt kernel readthedoc theme=0D =0D The default "alabaster" sphinx theme has a couple shortcomings:=0D - the navbar moves along the page=0D - the search bar is not always at the same place=0D - it lacks some contrast and colours=0D =0D The "rtd" theme from readthedocs.org is a popular third party theme used=0D= notably by the kernel, with a custom style sheet. I like it better,=0D perhaps others do too. It also simplifies the "Edit on Gitlab" links.=0D =0D Tweak a bit the custom theme to match qemu.org style, use the=0D QEMU logo, and favicon etc.=0D =0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D Tested-by: Bin Meng =0D Message-Id: <20210323115328.4146052-1-marcandre.lureau@redhat.com>=0D Reviewed-by: John Snow =0D =0D =0D Commit: 79b35718563a1a52f476bb87ffb2b1c2601c6bde=0D https://github.com/qemu/qemu/commit/79b35718563a1a52f476bb87ffb2b1c= 2601c6bde=0D Author: Marc-Andr=C3=A9 Lureau =0D Date: 2021-03-27 (Sat, 27 Mar 2021)=0D =0D Changed paths:=0D M docs/devel/index.rst=0D M docs/interop/index.rst=0D M docs/specs/index.rst=0D M docs/system/index.rst=0D M docs/tools/index.rst=0D M docs/user/index.rst=0D =0D Log Message:=0D -----------=0D docs: simplify each section title=0D =0D Now that we merged into one doc, it makes the nav looks nicer.=0D =0D Signed-off-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20210323074704.4078381-1-marcandre.lureau@redhat.com>=0D Reviewed-by: Daniel P. Berrang=C3=A9 =0D Reviewed-by: John Snow =0D =0D =0D Commit: 4485084a4456591b17f03169bcaca6c29b1ca8ca=0D https://github.com/qemu/qemu/commit/4485084a4456591b17f03169bcaca6c= 29b1ca8ca=0D Author: Lukas Straub =0D Date: 2021-03-27 (Sat, 27 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M chardev/char-socket.c=0D M include/qemu/yank.h=0D M migration/channel.c=0D M migration/meson.build=0D M migration/multifd.c=0D M migration/qemu-file-channel.c=0D A migration/yank_functions.c=0D A migration/yank_functions.h=0D M stubs/yank.c=0D M util/yank.c=0D =0D Log Message:=0D -----------=0D yank: Remove dependency on qiochannel=0D =0D Remove dependency on qiochannel by removing yank_generic_iochannel and=0D= letting migration and chardev use their own yank function for=0D iochannel.=0D =0D Signed-off-by: Lukas Straub =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <20ff143fc2db23e27cd41d38043e481376c9cec1.1616521341.git.luka= sstraub2@web.de>=0D =0D =0D Commit: 463bac02bf701f466586846ff16cf6d3f3581e11=0D https://github.com/qemu/qemu/commit/463bac02bf701f466586846ff16cf6d= 3f3581e11=0D Author: Lukas Straub =0D Date: 2021-03-27 (Sat, 27 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M stubs/meson.build=0D R stubs/yank.c=0D M util/meson.build=0D =0D Log Message:=0D -----------=0D yank: Always link full yank code=0D =0D Yank now only depends on util and can be always linked in. Also remove=0D= the stubs as they are not needed anymore.=0D =0D Signed-off-by: Lukas Straub =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Message-Id: <997aa12a28c555d8a3b7a363b3bda5c3cf1821ba.1616521341.git.luka= sstraub2@web.de>=0D =0D =0D Commit: 97446946d96749fc8a111b694b718fbd4cb128c1=0D https://github.com/qemu/qemu/commit/97446946d96749fc8a111b694b718fb= d4cb128c1=0D Author: Lukas Straub =0D Date: 2021-03-27 (Sat, 27 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D =0D Log Message:=0D -----------=0D chardev/char.c: Move object_property_try_add_child out of chardev_new=0D= =0D Move object_property_try_add_child out of chardev_new into it's=0D callers. This is a preparation for the next patches to fix yank=0D with the chardev-change case.=0D =0D Signed-off-by: Lukas Straub =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Tested-by: Li Zhang =0D Message-Id: =0D =0D =0D Commit: 3ef6717694af2f8b6624561215e9c022fbd6d8cf=0D https://github.com/qemu/qemu/commit/3ef6717694af2f8b6624561215e9c02= 2fbd6d8cf=0D Author: Lukas Straub =0D Date: 2021-03-27 (Sat, 27 Mar 2021)=0D =0D Changed paths:=0D M chardev/char.c=0D =0D Log Message:=0D -----------=0D chardev/char.c: Always pass id to chardev_new=0D =0D Always pass the id to chardev_new, since it is needed to register=0D the yank instance for the chardev. Also, after checking that=0D nothing calls chardev_new with id=3DNULL, assert() that id!=3DNULL.=0D =0D This fixes a crash when using chardev-change to change a chardev=0D to chardev-socket, which attempts to register a yank instance.=0D This in turn tries to dereference the NULL-pointer.=0D =0D Signed-off-by: Lukas Straub =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Tested-by: Li Zhang =0D Message-Id: <3e669b6c160aa7278e37c4d95e0445574f96c7b7.1616794852.git.luka= sstraub2@web.de>=0D =0D =0D Commit: 4a22b8d272ae76df7e4f90f30de813371af38c7d=0D https://github.com/qemu/qemu/commit/4a22b8d272ae76df7e4f90f30de8133= 71af38c7d=0D Author: Lukas Straub =0D Date: 2021-03-27 (Sat, 27 Mar 2021)=0D =0D Changed paths:=0D M chardev/char-socket.c=0D M chardev/char.c=0D M include/chardev/char.h=0D =0D Log Message:=0D -----------=0D chardev: Fix yank with the chardev-change case=0D =0D When changing from chardev-socket (which supports yank) to=0D chardev-socket again, it fails, because the new chardev attempts=0D to register a new yank instance. This in turn fails, as there=0D still is the yank instance from the current chardev. Also,=0D the old chardev shouldn't unregister the yank instance when it=0D is freed.=0D =0D To fix this, now the new chardev only registers a yank instance if=0D the current chardev doesn't support yank and thus hasn't registered=0D one already. Also, when the old chardev is freed, it now only=0D unregisters the yank instance if the new chardev doesn't need it.=0D =0D If the initialization of the new chardev fails, it still has=0D chr->handover_yank_instance set and won't unregister the yank=0D instance when it is freed.=0D =0D s->registered_yank is always true here, as chardev-change only works=0D on user-visible chardevs and those are guraranteed to register a=0D yank instance as they are initialized via=0D chardev_new()=0D qemu_char_open()=0D cc->open() (qmp_chardev_open_socket()).=0D =0D Signed-off-by: Lukas Straub =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Tested-by: Li Zhang =0D Message-Id: <9637888d7591d2971975188478bb707299a1dc04.1616794852.git.luka= sstraub2@web.de>=0D =0D =0D Commit: f57d44b452e11d8b7c9743476c30a8d0f80926de=0D https://github.com/qemu/qemu/commit/f57d44b452e11d8b7c9743476c30a8d= 0f80926de=0D Author: Lukas Straub =0D Date: 2021-03-27 (Sat, 27 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M tests/unit/meson.build=0D A tests/unit/test-yank.c=0D =0D Log Message:=0D -----------=0D tests: Add tests for yank with the chardev-change case=0D =0D Add tests for yank with the chardev-change case.=0D =0D Signed-off-by: Lukas Straub =0D Reviewed-by: Marc-Andr=C3=A9 Lureau =0D Tested-by: Li Zhang =0D Message-Id: <7c2f1ddcaa1c97462cb0b834d5aa7368283aa67d.1616794852.git.luka= sstraub2@web.de>=0D =0D =0D Commit: 5b1ddcbd0c5ee1260017c0248f54ea559eec51b9=0D https://github.com/qemu/qemu/commit/5b1ddcbd0c5ee1260017c0248f54ea5= 59eec51b9=0D Author: Peter Maydell =0D Date: 2021-03-29 (Mon, 29 Mar 2021)=0D =0D Changed paths:=0D M MAINTAINERS=0D M backends/dbus-vmstate.c=0D M chardev/char-socket.c=0D M chardev/char.c=0D R docs/_templates/editpage.html=0D M docs/conf.py=0D R docs/devel/_templates/editpage.html=0D M docs/devel/index.rst=0D R docs/interop/_templates/editpage.html=0D M docs/interop/index.rst=0D M docs/meson.build=0D R docs/specs/_templates/editpage.html=0D M docs/specs/index.rst=0D A docs/sphinx-static/theme_overrides.css=0D R docs/system/_templates/editpage.html=0D M docs/system/index.rst=0D R docs/tools/_templates/editpage.html=0D M docs/tools/index.rst=0D R docs/user/_templates/editpage.html=0D M docs/user/index.rst=0D M include/chardev/char.h=0D M include/qemu/yank.h=0D M migration/channel.c=0D M migration/meson.build=0D M migration/multifd.c=0D M migration/qemu-file-channel.c=0D A migration/yank_functions.c=0D A migration/yank_functions.h=0D M stubs/meson.build=0D R stubs/yank.c=0D M tests/docker/dockerfiles/alpine.docker=0D M tests/docker/dockerfiles/debian10.docker=0D M tests/docker/dockerfiles/fedora.docker=0D M tests/docker/dockerfiles/ubuntu.docker=0D M tests/docker/dockerfiles/ubuntu1804.docker=0D M tests/docker/dockerfiles/ubuntu2004.docker=0D M tests/unit/meson.build=0D A tests/unit/test-yank.c=0D M util/meson.build=0D M util/module.c=0D M util/yank.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/marcandre/tags/for-6.0-pull-reque= st' into staging=0D =0D For 6.0 misc patches under my radar.=0D =0D Peter, let me know if you would rather split that PR.=0D =0D # gpg: Signature made Sun 28 Mar 2021 19:44:40 BST=0D # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969= CE5=0D # gpg: issuer "marcandre.lureau@redhat.com"=0D # gpg: Good signature from "Marc-Andr=C3=A9 Lureau " [full]=0D # gpg: aka "Marc-Andr=C3=A9 Lureau " [full]=0D # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 = 9CE5=0D =0D * remotes/marcandre/tags/for-6.0-pull-request:=0D tests: Add tests for yank with the chardev-change case=0D chardev: Fix yank with the chardev-change case=0D chardev/char.c: Always pass id to chardev_new=0D chardev/char.c: Move object_property_try_add_child out of chardev_new=0D= yank: Always link full yank code=0D yank: Remove dependency on qiochannel=0D docs: simplify each section title=0D sphinx: adopt kernel readthedoc theme=0D dbus-vmstate: Increase the size of input stream buffer used during load= =0D util: fix use-after-free in module_load_one=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/ec2e6e016d24...5b1ddcbd0c5e= =0D From MAILER-DAEMON Mon Mar 29 13:45:53 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lQvxY-0004oN-Po for mharc-qemu-commits@gnu.org; Mon, 29 Mar 2021 13:45:53 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40486) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lQvxX-0004nT-I2 for qemu-commits@nongnu.org; Mon, 29 Mar 2021 13:45:51 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:34107 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lQvxV-00043P-NC for qemu-commits@nongnu.org; Mon, 29 Mar 2021 13:45:51 -0400 Received: from github.com (hubbernetes-node-14dd63f.va3-iad.github.net [10.48.204.49]) by smtp.github.com (Postfix) with ESMTPA id 197FF5C0625 for ; Mon, 29 Mar 2021 10:45:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617039949; bh=02Kdw2az2QUlNgVja4mXTQWECdy3LIle+QLoBL/PZh4=; h=Date:From:To:Subject:From; b=vzsFVamVokiKIu+EOpcTRamluo3BWyyH8xJYuGoUSOdllScaWRVLeZPP3Ng/41qAn +OjCpiPdPY56G+1+MfRt+yLXENiSNaMFV4B+YtB3F2pnwEXUAZErM6K4y3un9bMBP6 /K5WPsDPC9+okj8GWxzatTAACb6ppfgVGAulFlRI= Date: Mon, 29 Mar 2021 10:45:49 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 956135: hw/block/nvme: fix resource leak in nvme_dif_rw X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 29 Mar 2021 17:45:51 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 9561353ddc35215141adf181d4d8f6f0d9655cc0 https://github.com/qemu/qemu/commit/9561353ddc35215141adf181d4d8f6f0d9655cc0 Author: Klaus Jensen Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M hw/block/nvme-dif.c Log Message: ----------- hw/block/nvme: fix resource leak in nvme_dif_rw If nvme_map_dptr() fails, nvme_dif_rw() will leak the bounce context. Fix this by using the same error handling as everywhere else in the function. Reported-by: Coverity (CID 1451080) Fixes: 146f720c5563 ("hw/block/nvme: end-to-end data protection") Signed-off-by: Klaus Jensen Reviewed-by: Gollu Appalanaidu Commit: 3a69cadbef7af23a566dbe2400043c247c3d50ca https://github.com/qemu/qemu/commit/3a69cadbef7af23a566dbe2400043c247c3d50ca Author: Klaus Jensen Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M hw/block/nvme.c Log Message: ----------- hw/block/nvme: fix ref counting in nvme_format_ns Max noticed that since blk_aio_pwrite_zeroes() may invoke the callback before returning, the callbacks will never see *count == 0 and thus never free the count variable or decrement num_formats causing a CQE to never be posted. Coverity (CID 1451082) also picked up on the fact that count would not be free'ed if the namespace was of zero size. Fix both of these issues by explicitly checking *count and finalize for the given namespace if --(*count) is zero. Enqueing a CQE if there are no AIOs outstanding after this case is already handled by nvme_format() by inspecting *num_formats. Reported-by: Max Reitz Reported-by: Coverity (CID 1451082) Fixes: dc04d25e2f3f ("hw/block/nvme: add support for the format nvm command") Signed-off-by: Klaus Jensen Reviewed-by: Gollu Appalanaidu Commit: 7993b0f83fe5c3f8555e79781d5d098f99751a94 https://github.com/qemu/qemu/commit/7993b0f83fe5c3f8555e79781d5d098f99751a94 Author: Peter Maydell Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M hw/block/nvme-dif.c M hw/block/nvme.c Log Message: ----------- Merge remote-tracking branch 'remotes/nvme/tags/nvme-fixes-for-6.0-pull-request' into staging emulated nvme fixes # gpg: Signature made Mon 29 Mar 2021 18:03:30 BST # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9 # gpg: Good signature from "Klaus Jensen " [unknown] # gpg: aka "Klaus Jensen " [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838 # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9 * remotes/nvme/tags/nvme-fixes-for-6.0-pull-request: hw/block/nvme: fix ref counting in nvme_format_ns hw/block/nvme: fix resource leak in nvme_dif_rw Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/5b1ddcbd0c5e...7993b0f83fe5 From MAILER-DAEMON Tue Mar 30 08:09:09 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lRDBF-0005t7-Ch for mharc-qemu-commits@gnu.org; Tue, 30 Mar 2021 08:09:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:51260) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRDBE-0005s9-BA for qemu-commits@nongnu.org; Tue, 30 Mar 2021 08:09:08 -0400 Received: from out-21.smtp.github.com ([192.30.252.204]:54813 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRDBB-0002yM-AZ for qemu-commits@nongnu.org; Tue, 30 Mar 2021 08:09:08 -0400 Received: from github.com (hubbernetes-node-4bb05bd.ac4-iad.github.net [10.52.205.61]) by smtp.github.com (Postfix) with ESMTPA id 938E15208E5 for ; Tue, 30 Mar 2021 05:09:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617106144; bh=xfSS0vWjWkH4GjDkR706TqaqHCkKe+Zk7nQQiJcPE3I=; h=Date:From:To:Subject:From; b=TJ5d5IBvyOLtFGS2cugg6qf00JQ7XnKoA4X2vReQnrFJv3tQTShWBNr1yPZfSC7B4 K4t3i4RhPmdpQXIRKWN1lOf8/MTpDerz34Lh5nZV7NYtxMOZIZcAZGwmWcA66mntKx ZxdoPkjyLkvZNfhvqqYElEsU7mZVzbWjaVpzAaxQ= Date: Tue, 30 Mar 2021 05:09:04 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 956135: hw/block/nvme: fix resource leak in nvme_dif_rw X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Mar 2021 12:09:08 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 9561353ddc35215141adf181d4d8f6f0d9655cc0 https://github.com/qemu/qemu/commit/9561353ddc35215141adf181d4d8f6f0d9655cc0 Author: Klaus Jensen Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M hw/block/nvme-dif.c Log Message: ----------- hw/block/nvme: fix resource leak in nvme_dif_rw If nvme_map_dptr() fails, nvme_dif_rw() will leak the bounce context. Fix this by using the same error handling as everywhere else in the function. Reported-by: Coverity (CID 1451080) Fixes: 146f720c5563 ("hw/block/nvme: end-to-end data protection") Signed-off-by: Klaus Jensen Reviewed-by: Gollu Appalanaidu Commit: 3a69cadbef7af23a566dbe2400043c247c3d50ca https://github.com/qemu/qemu/commit/3a69cadbef7af23a566dbe2400043c247c3d50ca Author: Klaus Jensen Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M hw/block/nvme.c Log Message: ----------- hw/block/nvme: fix ref counting in nvme_format_ns Max noticed that since blk_aio_pwrite_zeroes() may invoke the callback before returning, the callbacks will never see *count == 0 and thus never free the count variable or decrement num_formats causing a CQE to never be posted. Coverity (CID 1451082) also picked up on the fact that count would not be free'ed if the namespace was of zero size. Fix both of these issues by explicitly checking *count and finalize for the given namespace if --(*count) is zero. Enqueing a CQE if there are no AIOs outstanding after this case is already handled by nvme_format() by inspecting *num_formats. Reported-by: Max Reitz Reported-by: Coverity (CID 1451082) Fixes: dc04d25e2f3f ("hw/block/nvme: add support for the format nvm command") Signed-off-by: Klaus Jensen Reviewed-by: Gollu Appalanaidu Commit: 7993b0f83fe5c3f8555e79781d5d098f99751a94 https://github.com/qemu/qemu/commit/7993b0f83fe5c3f8555e79781d5d098f99751a94 Author: Peter Maydell Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M hw/block/nvme-dif.c M hw/block/nvme.c Log Message: ----------- Merge remote-tracking branch 'remotes/nvme/tags/nvme-fixes-for-6.0-pull-request' into staging emulated nvme fixes # gpg: Signature made Mon 29 Mar 2021 18:03:30 BST # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9 # gpg: Good signature from "Klaus Jensen " [unknown] # gpg: aka "Klaus Jensen " [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838 # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9 * remotes/nvme/tags/nvme-fixes-for-6.0-pull-request: hw/block/nvme: fix ref counting in nvme_format_ns hw/block/nvme: fix resource leak in nvme_dif_rw Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/ec2e6e016d24...7993b0f83fe5 From MAILER-DAEMON Tue Mar 30 09:07:39 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lRE5r-00078m-A6 for mharc-qemu-commits@gnu.org; Tue, 30 Mar 2021 09:07:39 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36672) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRE5p-00078a-GK for qemu-commits@nongnu.org; Tue, 30 Mar 2021 09:07:37 -0400 Received: from out-24.smtp.github.com ([192.30.252.207]:39781) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRE5m-0001pj-FN for qemu-commits@nongnu.org; Tue, 30 Mar 2021 09:07:36 -0400 Received: from github.com (hubbernetes-node-b9a4977.ac4-iad.github.net [10.52.205.48]) by smtp.github.com (Postfix) with ESMTPA id 6897560050F for ; Tue, 30 Mar 2021 06:07:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617109652; bh=wDRTxTOLxXIyUm9lNZYopBf/vToa1dYBZ6ZUtYqsXD0=; h=Date:From:To:Subject:From; b=aEtgY5EOg9tNOBay5HyRDXTpczSgnJJI/TnM7nOD6JlVJ94EXgMUhQw5KUgZwqFdC OeEc7Rsvt6pjNyrxZyoQ0bgGY/oKxPXgkbKUb7iZTzEQ3nYkG7n9pgQ5qhfBV+yszL JfRU0uL6Wp0WfO9PfHLz/fXPYQWDH3fCSA6nSa6Y= Date: Tue, 30 Mar 2021 06:07:32 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.207; envelope-from=noreply@github.com; helo=out-24.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 93d8d1: iotests: Fix typo in iotest 051 X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Mar 2021 13:07:37 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 93d8d1293b7ebda45f07849cfc9698715c5748d6 https://github.com/qemu/qemu/commit/93d8d1293b7ebda45f07849cfc9698715c5748d6 Author: Tao Xu Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M tests/qemu-iotests/051 M tests/qemu-iotests/051.pc.out Log Message: ----------- iotests: Fix typo in iotest 051 There is an typo in iotest 051, correct it. Signed-off-by: Tao Xu Message-Id: <20210324084321.90952-1-tao3.xu@intel.com> Signed-off-by: Max Reitz Commit: c00316e9b2abc75dcf5c8ba5608e35c2f4ec7983 https://github.com/qemu/qemu/commit/c00316e9b2abc75dcf5c8ba5608e35c2f4ec7983 Author: Connor Kuehl Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M tests/qemu-iotests/051.out Log Message: ----------- iotests: fix 051.out expected output after error text touchups A patch was recently applied that touched up some error messages that pertained to key names like 'node-name'. The trouble is it only updated tests/qemu-iotests/051.pc.out and not tests/qemu-iotests/051.out as well. Do that now. Fixes: 785ec4b1b9 ("block: Clarify error messages pertaining to 'node-name'") Signed-off-by: Connor Kuehl Message-Id: <20210318200949.1387703-2-ckuehl@redhat.com> Tested-by: Christian Borntraeger Reviewed-by: John Snow Signed-off-by: Max Reitz Commit: d751448d4fe904d82db52d454fe85534992d167a https://github.com/qemu/qemu/commit/d751448d4fe904d82db52d454fe85534992d167a Author: Max Reitz Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M tests/qemu-iotests/116.out Log Message: ----------- iotests/116: Fix reference output 15ce94a68ca ("block/qed: bdrv_qed_do_open: deal with errp") has improved the qed driver's error reporting, though sadly did not add a test for it. The good news are: There already is such a test, namely 116. The bad news are: Its reference output was not adjusted, and so now it fails. Let's fix the reference output, which has the nice side effect of demonstrating 15ce94a68ca's improvements. Fixes: 15ce94a68ca6730466c565c3d29971aab3087bf1 ("block/qed: bdrv_qed_do_open: deal with errp") Signed-off-by: Max Reitz Message-Id: <20210326141419.156831-1-mreitz@redhat.com> Commit: ad0ce642799c15e3e5783bfcad60450c3f5687e1 https://github.com/qemu/qemu/commit/ad0ce642799c15e3e5783bfcad60450c3f5687e1 Author: Pavel Dovgalyuk Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M block/qcow2.c Log Message: ----------- qcow2: use external virtual timers Regular virtual timers are used to emulate timings related to vCPU and peripheral states. QCOW2 uses timers to clean the cache. These timers should have external flag. In the opposite case they affect the execution and it can't be recorded and replayed. This patch adds external flag to the timer for qcow2 cache clean. Signed-off-by: Pavel Dovgalyuk Reviewed-by: Paolo Bonzini Message-Id: <161700516327.1141158.8366564693714562536.stgit@pasha-ThinkPad-X280> Signed-off-by: Max Reitz Commit: 6d7bb95180b9313c8deb65671e65174205b1fd83 https://github.com/qemu/qemu/commit/6d7bb95180b9313c8deb65671e65174205b1fd83 Author: Max Reitz Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M tests/qemu-iotests/046 M tests/qemu-iotests/046.out Log Message: ----------- iotests/046: Filter request length For its concurrent requests, 046 has always filtered the offset, probably because concurrent requests may settle in any order. However, it did not filter the request length, and so if requests with different lengths settle in an unexpected order (notably the longer request before the shorter request), the test fails (for no good reason). Filter the length, too. Signed-off-by: Max Reitz Message-Id: <20200918153323.108932-1-mreitz@redhat.com> Commit: 53431b9086b2832ca1aeff0c55e186e9ed79bd11 https://github.com/qemu/qemu/commit/53431b9086b2832ca1aeff0c55e186e9ed79bd11 Author: Max Reitz Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M block/mirror.c Log Message: ----------- block/mirror: Fix mirror_top's permissions mirror_top currently shares all permissions, and takes only the WRITE permission (if some parent has taken that permission, too). That is wrong, though; mirror_top is a filter, so it should take permissions like any other filter does. For example, if the parent needs CONSISTENT_READ, we need to take that, too, and if it cannot share the WRITE permission, we cannot share it either. The exception is when mirror_top is used for active commit, where we cannot take CONSISTENT_READ (because it is deliberately unshared above the base node) and where we must share WRITE (so that it is shared for all images in the backing chain, so the mirror job can take it for the target BB). Signed-off-by: Max Reitz Message-Id: <20210211172242.146671-2-mreitz@redhat.com> Reviewed-by: Eric Blake Reviewed-by: Vladimir Sementsov-Ogievskiy Commit: 220222a0fecf0fbd9f49633abef552dd019ab9cd https://github.com/qemu/qemu/commit/220222a0fecf0fbd9f49633abef552dd019ab9cd Author: Max Reitz Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M docs/tools/qemu-storage-daemon.rst M storage-daemon/qemu-storage-daemon.c Log Message: ----------- qsd: Document FUSE exports Implementing FUSE exports required no changes to the storage daemon, so we forgot to document them there. Considering that both NBD and vhost-user-blk exports are documented in its man page (and NBD exports in its --help text), we should probably do the same for FUSE. Signed-off-by: Max Reitz Message-Id: <20210217115844.62661-1-mreitz@redhat.com> Reviewed-by: Eric Blake Commit: 484108293d94d80acd5a2f4332eaea5e2605947a https://github.com/qemu/qemu/commit/484108293d94d80acd5a2f4332eaea5e2605947a Author: Max Reitz Date: 2021-03-30 (Tue, 30 Mar 2021) Changed paths: M block/qcow2.c M tests/qemu-iotests/244.out Log Message: ----------- qcow2: Force preallocation with data-file-raw Setting the qcow2 data-file-raw bit means that you can ignore the qcow2 metadata when reading from the external data file. It does not mean that you have to ignore it, though. Therefore, the data read must be the same regardless of whether you interpret the metadata or whether you ignore it, and thus the L1/L2 tables must all be present and give a 1:1 mapping. This patch changes 244's output: First, the qcow2 file is larger right after creation, because of metadata preallocation. Second, the qemu-img map output changes: Everything that was not explicitly discarded or zeroed is now a data area. Signed-off-by: Max Reitz Message-Id: <20210326145509.163455-2-mreitz@redhat.com> Reviewed-by: Eric Blake Commit: 2ec7e8a94668efccf7f45634584cfa19a83fc553 https://github.com/qemu/qemu/commit/2ec7e8a94668efccf7f45634584cfa19a83fc553 Author: Max Reitz Date: 2021-03-30 (Tue, 30 Mar 2021) Changed paths: M tests/qemu-iotests/244 M tests/qemu-iotests/244.out Log Message: ----------- iotests/244: Test preallocation for data-file-raw Three test cases: (1) Adding a qcow2 (metadata) file to an existing data file, see whether we can read the existing data through the qcow2 image. (2) Append data to the data file, grow the qcow2 image accordingly, see whether we can read the new data through the qcow2 image. (3) At runtime, add a backing image to a freshly created qcow2 image with an external data file (with data-file-raw). Reading data from the qcow2 image must return the same result as reading data from the data file, so everything in the backing image must be ignored. (This did not use to be the case, because without the L2 tables preallocated, all clusters would appear as unallocated, and so the qcow2 driver would fall through to the backing file.) Signed-off-by: Max Reitz Message-Id: <20210326145509.163455-3-mreitz@redhat.com> Reviewed-by: Eric Blake Commit: 4a0ba67c77a425436e867fcbb8c513b44d7e7d6e https://github.com/qemu/qemu/commit/4a0ba67c77a425436e867fcbb8c513b44d7e7d6e Author: Peter Maydell Date: 2021-03-30 (Tue, 30 Mar 2021) Changed paths: M block/mirror.c M block/qcow2.c M docs/tools/qemu-storage-daemon.rst M storage-daemon/qemu-storage-daemon.c M tests/qemu-iotests/046 M tests/qemu-iotests/046.out M tests/qemu-iotests/051 M tests/qemu-iotests/051.out M tests/qemu-iotests/051.pc.out M tests/qemu-iotests/116.out M tests/qemu-iotests/244 M tests/qemu-iotests/244.out Log Message: ----------- Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2021-03-30' into staging Block patches for 6.0-rc1: - Mark the qcow2 cache clean timer as external to fix record/replay - Fix the mirror filter node's permissions so that an external process cannot grab an image while it is used as the mirror source - Add documentation about FUSE exports to the storage daemon - When creating a qcow2 image with the data-file-raw option, all metadata structures should be preallocated - iotest fixes # gpg: Signature made Tue 30 Mar 2021 13:38:40 BST # gpg: using RSA key 91BEB60A30DB3E8857D11829F407DB0061D5CF40 # gpg: issuer "mreitz@redhat.com" # gpg: Good signature from "Max Reitz " [full] # Primary key fingerprint: 91BE B60A 30DB 3E88 57D1 1829 F407 DB00 61D5 CF40 * remotes/maxreitz/tags/pull-block-2021-03-30: iotests/244: Test preallocation for data-file-raw qcow2: Force preallocation with data-file-raw qsd: Document FUSE exports block/mirror: Fix mirror_top's permissions iotests/046: Filter request length qcow2: use external virtual timers iotests/116: Fix reference output iotests: fix 051.out expected output after error text touchups iotests: Fix typo in iotest 051 Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/7993b0f83fe5...4a0ba67c77a4 From MAILER-DAEMON Tue Mar 30 11:35:36 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lRGP2-0000w3-3d for mharc-qemu-commits@gnu.org; Tue, 30 Mar 2021 11:35:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36988) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRGP0-0000tX-92 for qemu-commits@nongnu.org; Tue, 30 Mar 2021 11:35:34 -0400 Received: from out-28.smtp.github.com ([192.30.252.211]:55453) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRGOx-0006tf-1d for qemu-commits@nongnu.org; Tue, 30 Mar 2021 11:35:33 -0400 Received: from github.com (hubbernetes-node-83a3702.ash1-iad.github.net [10.56.115.21]) by smtp.github.com (Postfix) with ESMTPA id 53C0C900800 for ; Tue, 30 Mar 2021 08:35:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617118530; bh=f5zQo8R94YD2EUqWIXJ8WxqkzZVveqIWX8ALDp7kwOE=; h=Date:From:To:Subject:From; b=oa3cIvynvtKK/E6Ba/k8nP5A66wSnMqve6s2PxlrVnRLe2nfC4rduIxIh2k/CBK6/ y+xTCxSeh/sIiMFs9Pvh9eB/X/7Z9Dcfbq5th3IjZJoKLOHmgbNoQ7A8YBpTIjMBr5 a5fQgGJxHm9tBCw69l06raFVZifUX03y2urCoL7E= Date: Tue, 30 Mar 2021 08:35:30 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.211; envelope-from=noreply@github.com; helo=out-28.smtp.github.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 93d8d1: iotests: Fix typo in iotest 051 X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Mar 2021 15:35:34 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 93d8d1293b7ebda45f07849cfc9698715c5748d6 https://github.com/qemu/qemu/commit/93d8d1293b7ebda45f07849cfc9698715c5748d6 Author: Tao Xu Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M tests/qemu-iotests/051 M tests/qemu-iotests/051.pc.out Log Message: ----------- iotests: Fix typo in iotest 051 There is an typo in iotest 051, correct it. Signed-off-by: Tao Xu Message-Id: <20210324084321.90952-1-tao3.xu@intel.com> Signed-off-by: Max Reitz Commit: c00316e9b2abc75dcf5c8ba5608e35c2f4ec7983 https://github.com/qemu/qemu/commit/c00316e9b2abc75dcf5c8ba5608e35c2f4ec7983 Author: Connor Kuehl Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M tests/qemu-iotests/051.out Log Message: ----------- iotests: fix 051.out expected output after error text touchups A patch was recently applied that touched up some error messages that pertained to key names like 'node-name'. The trouble is it only updated tests/qemu-iotests/051.pc.out and not tests/qemu-iotests/051.out as well. Do that now. Fixes: 785ec4b1b9 ("block: Clarify error messages pertaining to 'node-name'") Signed-off-by: Connor Kuehl Message-Id: <20210318200949.1387703-2-ckuehl@redhat.com> Tested-by: Christian Borntraeger Reviewed-by: John Snow Signed-off-by: Max Reitz Commit: d751448d4fe904d82db52d454fe85534992d167a https://github.com/qemu/qemu/commit/d751448d4fe904d82db52d454fe85534992d167a Author: Max Reitz Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M tests/qemu-iotests/116.out Log Message: ----------- iotests/116: Fix reference output 15ce94a68ca ("block/qed: bdrv_qed_do_open: deal with errp") has improved the qed driver's error reporting, though sadly did not add a test for it. The good news are: There already is such a test, namely 116. The bad news are: Its reference output was not adjusted, and so now it fails. Let's fix the reference output, which has the nice side effect of demonstrating 15ce94a68ca's improvements. Fixes: 15ce94a68ca6730466c565c3d29971aab3087bf1 ("block/qed: bdrv_qed_do_open: deal with errp") Signed-off-by: Max Reitz Message-Id: <20210326141419.156831-1-mreitz@redhat.com> Commit: ad0ce642799c15e3e5783bfcad60450c3f5687e1 https://github.com/qemu/qemu/commit/ad0ce642799c15e3e5783bfcad60450c3f5687e1 Author: Pavel Dovgalyuk Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M block/qcow2.c Log Message: ----------- qcow2: use external virtual timers Regular virtual timers are used to emulate timings related to vCPU and peripheral states. QCOW2 uses timers to clean the cache. These timers should have external flag. In the opposite case they affect the execution and it can't be recorded and replayed. This patch adds external flag to the timer for qcow2 cache clean. Signed-off-by: Pavel Dovgalyuk Reviewed-by: Paolo Bonzini Message-Id: <161700516327.1141158.8366564693714562536.stgit@pasha-ThinkPad-X280> Signed-off-by: Max Reitz Commit: 6d7bb95180b9313c8deb65671e65174205b1fd83 https://github.com/qemu/qemu/commit/6d7bb95180b9313c8deb65671e65174205b1fd83 Author: Max Reitz Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M tests/qemu-iotests/046 M tests/qemu-iotests/046.out Log Message: ----------- iotests/046: Filter request length For its concurrent requests, 046 has always filtered the offset, probably because concurrent requests may settle in any order. However, it did not filter the request length, and so if requests with different lengths settle in an unexpected order (notably the longer request before the shorter request), the test fails (for no good reason). Filter the length, too. Signed-off-by: Max Reitz Message-Id: <20200918153323.108932-1-mreitz@redhat.com> Commit: 53431b9086b2832ca1aeff0c55e186e9ed79bd11 https://github.com/qemu/qemu/commit/53431b9086b2832ca1aeff0c55e186e9ed79bd11 Author: Max Reitz Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M block/mirror.c Log Message: ----------- block/mirror: Fix mirror_top's permissions mirror_top currently shares all permissions, and takes only the WRITE permission (if some parent has taken that permission, too). That is wrong, though; mirror_top is a filter, so it should take permissions like any other filter does. For example, if the parent needs CONSISTENT_READ, we need to take that, too, and if it cannot share the WRITE permission, we cannot share it either. The exception is when mirror_top is used for active commit, where we cannot take CONSISTENT_READ (because it is deliberately unshared above the base node) and where we must share WRITE (so that it is shared for all images in the backing chain, so the mirror job can take it for the target BB). Signed-off-by: Max Reitz Message-Id: <20210211172242.146671-2-mreitz@redhat.com> Reviewed-by: Eric Blake Reviewed-by: Vladimir Sementsov-Ogievskiy Commit: 220222a0fecf0fbd9f49633abef552dd019ab9cd https://github.com/qemu/qemu/commit/220222a0fecf0fbd9f49633abef552dd019ab9cd Author: Max Reitz Date: 2021-03-29 (Mon, 29 Mar 2021) Changed paths: M docs/tools/qemu-storage-daemon.rst M storage-daemon/qemu-storage-daemon.c Log Message: ----------- qsd: Document FUSE exports Implementing FUSE exports required no changes to the storage daemon, so we forgot to document them there. Considering that both NBD and vhost-user-blk exports are documented in its man page (and NBD exports in its --help text), we should probably do the same for FUSE. Signed-off-by: Max Reitz Message-Id: <20210217115844.62661-1-mreitz@redhat.com> Reviewed-by: Eric Blake Commit: 484108293d94d80acd5a2f4332eaea5e2605947a https://github.com/qemu/qemu/commit/484108293d94d80acd5a2f4332eaea5e2605947a Author: Max Reitz Date: 2021-03-30 (Tue, 30 Mar 2021) Changed paths: M block/qcow2.c M tests/qemu-iotests/244.out Log Message: ----------- qcow2: Force preallocation with data-file-raw Setting the qcow2 data-file-raw bit means that you can ignore the qcow2 metadata when reading from the external data file. It does not mean that you have to ignore it, though. Therefore, the data read must be the same regardless of whether you interpret the metadata or whether you ignore it, and thus the L1/L2 tables must all be present and give a 1:1 mapping. This patch changes 244's output: First, the qcow2 file is larger right after creation, because of metadata preallocation. Second, the qemu-img map output changes: Everything that was not explicitly discarded or zeroed is now a data area. Signed-off-by: Max Reitz Message-Id: <20210326145509.163455-2-mreitz@redhat.com> Reviewed-by: Eric Blake Commit: 2ec7e8a94668efccf7f45634584cfa19a83fc553 https://github.com/qemu/qemu/commit/2ec7e8a94668efccf7f45634584cfa19a83fc553 Author: Max Reitz Date: 2021-03-30 (Tue, 30 Mar 2021) Changed paths: M tests/qemu-iotests/244 M tests/qemu-iotests/244.out Log Message: ----------- iotests/244: Test preallocation for data-file-raw Three test cases: (1) Adding a qcow2 (metadata) file to an existing data file, see whether we can read the existing data through the qcow2 image. (2) Append data to the data file, grow the qcow2 image accordingly, see whether we can read the new data through the qcow2 image. (3) At runtime, add a backing image to a freshly created qcow2 image with an external data file (with data-file-raw). Reading data from the qcow2 image must return the same result as reading data from the data file, so everything in the backing image must be ignored. (This did not use to be the case, because without the L2 tables preallocated, all clusters would appear as unallocated, and so the qcow2 driver would fall through to the backing file.) Signed-off-by: Max Reitz Message-Id: <20210326145509.163455-3-mreitz@redhat.com> Reviewed-by: Eric Blake Commit: 4a0ba67c77a425436e867fcbb8c513b44d7e7d6e https://github.com/qemu/qemu/commit/4a0ba67c77a425436e867fcbb8c513b44d7e7d6e Author: Peter Maydell Date: 2021-03-30 (Tue, 30 Mar 2021) Changed paths: M block/mirror.c M block/qcow2.c M docs/tools/qemu-storage-daemon.rst M storage-daemon/qemu-storage-daemon.c M tests/qemu-iotests/046 M tests/qemu-iotests/046.out M tests/qemu-iotests/051 M tests/qemu-iotests/051.out M tests/qemu-iotests/051.pc.out M tests/qemu-iotests/116.out M tests/qemu-iotests/244 M tests/qemu-iotests/244.out Log Message: ----------- Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2021-03-30' into staging Block patches for 6.0-rc1: - Mark the qcow2 cache clean timer as external to fix record/replay - Fix the mirror filter node's permissions so that an external process cannot grab an image while it is used as the mirror source - Add documentation about FUSE exports to the storage daemon - When creating a qcow2 image with the data-file-raw option, all metadata structures should be preallocated - iotest fixes # gpg: Signature made Tue 30 Mar 2021 13:38:40 BST # gpg: using RSA key 91BEB60A30DB3E8857D11829F407DB0061D5CF40 # gpg: issuer "mreitz@redhat.com" # gpg: Good signature from "Max Reitz " [full] # Primary key fingerprint: 91BE B60A 30DB 3E88 57D1 1829 F407 DB00 61D5 CF40 * remotes/maxreitz/tags/pull-block-2021-03-30: iotests/244: Test preallocation for data-file-raw qcow2: Force preallocation with data-file-raw qsd: Document FUSE exports block/mirror: Fix mirror_top's permissions iotests/046: Filter request length qcow2: use external virtual timers iotests/116: Fix reference output iotests: fix 051.out expected output after error text touchups iotests: Fix typo in iotest 051 Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/7993b0f83fe5...4a0ba67c77a4 From MAILER-DAEMON Tue Mar 30 11:43:07 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lRGWJ-0003FO-Ae for mharc-qemu-commits@gnu.org; Tue, 30 Mar 2021 11:43:07 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39716) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRGWH-0003Ei-LU for qemu-commits@nongnu.org; Tue, 30 Mar 2021 11:43:05 -0400 Received: from out-21.smtp.github.com ([192.30.252.204]:50131 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRGWE-0002rO-Ek for qemu-commits@nongnu.org; Tue, 30 Mar 2021 11:43:05 -0400 Received: from github.com (hubbernetes-node-9dc8368.ac4-iad.github.net [10.52.125.51]) by smtp.github.com (Postfix) with ESMTPA id 9CD17520564 for ; Tue, 30 Mar 2021 08:42:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617118979; bh=mVYJeW4eOqamS3CaCKOq0MmduWQ5G7O/DFj2DUymBLQ=; h=Date:From:To:Subject:From; b=p4AcLsReS0RUTIVs9TGX0vU0CzEdCT8/Xb385VSe+0oVAj8MGugYOv/zMWptw0A2F phpi4PxD+jmUUPy/y9MwWbbfgZm8MMBsxIoEVYCwQT/kNr7mtxa/nICFd3JR9Gbj9Q dnM6fPEl1wllU7z1MLzqX+mdS3+QJgEo5qY2ZlOg= Date: Tue, 30 Mar 2021 08:42:59 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] a62ee0: net/npcm7xx_emc.c: Fix handling of receiving packe... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Mar 2021 15:43:05 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: a62ee00aa063b8fa27076ec5100b2475fcd677ed=0D https://github.com/qemu/qemu/commit/a62ee00aa063b8fa27076ec5100b247= 5fcd677ed=0D Author: Doug Evans =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M hw/net/npcm7xx_emc.c=0D M tests/qtest/npcm7xx_emc-test.c=0D =0D Log Message:=0D -----------=0D net/npcm7xx_emc.c: Fix handling of receiving packets when RSDR not set=0D= =0D Turning REG_MCMDR_RXON is enough to start receiving packets.=0D =0D Signed-off-by: Doug Evans =0D Message-id: 20210319195044.741821-1-dje@google.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: c8aaa24537cb87ebe5a2a6a1ea9cfff337e98bb4=0D https://github.com/qemu/qemu/commit/c8aaa24537cb87ebe5a2a6a1ea9cfff= 337e98bb4=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M hw/display/xlnx_dp.c=0D =0D Log Message:=0D -----------=0D hw/display/xlnx_dp: Free FIFOs adding xlnx_dp_finalize()=0D =0D When building with --enable-sanitizers we get:=0D =0D Direct leak of 16 byte(s) in 1 object(s) allocated from:=0D #0 0x5618479ec7cf in malloc (qemu-system-aarch64+0x233b7cf)=0D #1 0x7f675745f958 in g_malloc (/lib64/libglib-2.0.so.0+0x58958)=0D #2 0x561847c2dcc9 in xlnx_dp_init hw/display/xlnx_dp.c:1259:5=0D #3 0x56184a5bdab8 in object_init_with_type qom/object.c:375:9=0D #4 0x56184a5a2bda in object_initialize_with_type qom/object.c:517:5= =0D #5 0x56184a5a24d5 in object_initialize qom/object.c:536:5=0D #6 0x56184a5a2f6c in object_initialize_child_with_propsv qom/object= .c:566:5=0D #7 0x56184a5a2e60 in object_initialize_child_with_props qom/object.= c:549:10=0D #8 0x56184a5a3a1e in object_initialize_child_internal qom/object.c:= 603:5=0D #9 0x5618495aa431 in xlnx_zynqmp_init hw/arm/xlnx-zynqmp.c:273:5=0D= =0D The RX/TX FIFOs are created in xlnx_dp_init(), add xlnx_dp_finalize()=0D to destroy them.=0D =0D Fixes: 58ac482a66d ("introduce xlnx-dp")=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Alistair Francis =0D Message-id: 20210323182958.277654-1-f4bug@amsat.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 6c1bd93954cbdd70d8bdcd67b1f01d759747d895=0D https://github.com/qemu/qemu/commit/6c1bd93954cbdd70d8bdcd67b1f01d7= 59747d895=0D Author: Zenghui Yu =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/smmuv3-internal.h=0D =0D Log Message:=0D -----------=0D hw/arm/smmuv3: Drop unused CDM_VALID() and is_cd_valid()=0D =0D They were introduced in commit 9bde7f0674fe ("hw/arm/smmuv3: Implement=0D= translate callback") but never actually used. Drop them.=0D =0D Signed-off-by: Zenghui Yu =0D Acked-by: Eric Auger =0D Message-id: 20210325142702.790-1-yuzenghui@huawei.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: f7fb73b8cdd3f77e26f9fcff8cf24ff1b58d200f=0D https://github.com/qemu/qemu/commit/f7fb73b8cdd3f77e26f9fcff8cf24ff= 1b58d200f=0D Author: Peter Maydell =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.h=0D M target/arm/cpu64.c=0D M target/arm/cpu_tcg.c=0D M target/arm/helper.c=0D M target/arm/kvm64.c=0D =0D Log Message:=0D -----------=0D target/arm: Make number of counters in PMCR follow the CPU=0D =0D Currently we give all the v7-and-up CPUs a PMU with 4 counters. This=0D means that we don't provide the 6 counters that are required by the=0D Arm BSA (Base System Architecture) specification if the CPU supports=0D the Virtualization extensions.=0D =0D Instead of having a single PMCR_NUM_COUNTERS, make each CPU type=0D specify the PMCR reset value (obtained from the appropriate TRM), and=0D use the 'N' field of that value to define the number of counters=0D provided.=0D =0D This means that we now supply 6 counters for Cortex-A53, A57, A72,=0D A15 and A9 as well as '-cpu max'; Cortex-A7 and A8 stay at 4; and=0D Cortex-R5 goes down to 3.=0D =0D Note that because we now use the PMCR reset value of the specific=0D implementation, we no longer set the LC bit out of reset. This has=0D an UNKNOWN value out of reset for all cores with any AArch32 support,=0D so guest software should be setting it anyway if it wants it.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Marcin Juszkiewicz =0D Message-id: 20210311165947.27470-1-peter.maydell@linaro.org=0D Reviewed-by: Richard Henderson =0D =0D =0D Commit: b9e3f1579a4b06fc63dfa8cdb68df1c58eeb0cf1=0D https://github.com/qemu/qemu/commit/b9e3f1579a4b06fc63dfa8cdb68df1c= 58eeb0cf1=0D Author: Peter Maydell =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/renesas_tmr.c=0D =0D Log Message:=0D -----------=0D hw/timer/renesas_tmr: Add default-case asserts in read_tcnt()=0D =0D In commit 81b3ddaf8772ec we fixed a use of uninitialized data=0D in read_tcnt(). However this change wasn't enough to placate=0D Coverity, which is not smart enough to see that if we read a=0D 2 bit field and then handle cases 0, 1, 2 and 3 then there cannot=0D be a flow of execution through the switch default. Add explicit=0D default cases which assert that they can't be reached, which=0D should help silence Coverity.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210319162458.13760-1-peter.maydell@linaro.org=0D =0D =0D Commit: b471d5549188d01730131a322c4d154585ba1e60=0D https://github.com/qemu/qemu/commit/b471d5549188d01730131a322c4d154= 585ba1e60=0D Author: Peter Maydell =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/smmuv3-internal.h=0D M hw/display/xlnx_dp.c=0D M hw/net/npcm7xx_emc.c=0D M hw/timer/renesas_tmr.c=0D M target/arm/cpu.h=0D M target/arm/cpu64.c=0D M target/arm/cpu_tcg.c=0D M target/arm/helper.c=0D M target/arm/kvm64.c=0D M tests/qtest/npcm7xx_emc-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10330' into staging=0D =0D * net/npcm7xx_emc.c: Fix handling of receiving packets when RSDR not set= =0D * hw/display/xlnx_dp: Free FIFOs adding xlnx_dp_finalize()=0D * hw/arm/smmuv3: Drop unused CDM_VALID() and is_cd_valid()=0D * target/arm: Make number of counters in PMCR follow the CPU=0D * hw/timer/renesas_tmr: Add default-case asserts in read_tcnt()=0D =0D # gpg: Signature made Tue 30 Mar 2021 14:23:33 BST=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210330:=0D hw/timer/renesas_tmr: Add default-case asserts in read_tcnt()=0D target/arm: Make number of counters in PMCR follow the CPU=0D hw/arm/smmuv3: Drop unused CDM_VALID() and is_cd_valid()=0D hw/display/xlnx_dp: Free FIFOs adding xlnx_dp_finalize()=0D net/npcm7xx_emc.c: Fix handling of receiving packets when RSDR not set=0D= =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/4a0ba67c77a4...b471d5549188= =0D From MAILER-DAEMON Tue Mar 30 13:14:33 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lRHwn-0006Xz-57 for mharc-qemu-commits@gnu.org; Tue, 30 Mar 2021 13:14:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36484) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRHwl-0006Wj-VU for qemu-commits@nongnu.org; Tue, 30 Mar 2021 13:14:31 -0400 Received: from out-18.smtp.github.com ([192.30.252.201]:51943 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRHwa-0001VB-9f for qemu-commits@nongnu.org; Tue, 30 Mar 2021 13:14:31 -0400 Received: from github.com (hubbernetes-node-bfc6d7a.va3-iad.github.net [10.48.200.21]) by smtp.github.com (Postfix) with ESMTPA id 5D780340C3F for ; Tue, 30 Mar 2021 10:14:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617124458; bh=RXgtBE7BbPCcjWwD6ihNETjbOSR+AIgs6vMqlbQqcBo=; h=Date:From:To:Subject:From; b=R5LrOST0r94Ryg4LCq3yd69wXt3fz4xb9auah4JWh5HGougElJtpTZeQixUqSKxhH krAarRr/RfdqADUkSeBSukdNUPdX59KrgnWuIRIE9qrZ6x32xELMPWwh8SY3t3TGp7 p2tZ3/sZV0hQMFFkKcP2LTLaSn/qs2uZCHMNd9BA= Date: Tue, 30 Mar 2021 10:14:18 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] a62ee0: net/npcm7xx_emc.c: Fix handling of receiving packe... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Mar 2021 17:14:32 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: a62ee00aa063b8fa27076ec5100b2475fcd677ed=0D https://github.com/qemu/qemu/commit/a62ee00aa063b8fa27076ec5100b247= 5fcd677ed=0D Author: Doug Evans =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M hw/net/npcm7xx_emc.c=0D M tests/qtest/npcm7xx_emc-test.c=0D =0D Log Message:=0D -----------=0D net/npcm7xx_emc.c: Fix handling of receiving packets when RSDR not set=0D= =0D Turning REG_MCMDR_RXON is enough to start receiving packets.=0D =0D Signed-off-by: Doug Evans =0D Message-id: 20210319195044.741821-1-dje@google.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: c8aaa24537cb87ebe5a2a6a1ea9cfff337e98bb4=0D https://github.com/qemu/qemu/commit/c8aaa24537cb87ebe5a2a6a1ea9cfff= 337e98bb4=0D Author: Philippe Mathieu-Daud=C3=A9 =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M hw/display/xlnx_dp.c=0D =0D Log Message:=0D -----------=0D hw/display/xlnx_dp: Free FIFOs adding xlnx_dp_finalize()=0D =0D When building with --enable-sanitizers we get:=0D =0D Direct leak of 16 byte(s) in 1 object(s) allocated from:=0D #0 0x5618479ec7cf in malloc (qemu-system-aarch64+0x233b7cf)=0D #1 0x7f675745f958 in g_malloc (/lib64/libglib-2.0.so.0+0x58958)=0D #2 0x561847c2dcc9 in xlnx_dp_init hw/display/xlnx_dp.c:1259:5=0D #3 0x56184a5bdab8 in object_init_with_type qom/object.c:375:9=0D #4 0x56184a5a2bda in object_initialize_with_type qom/object.c:517:5= =0D #5 0x56184a5a24d5 in object_initialize qom/object.c:536:5=0D #6 0x56184a5a2f6c in object_initialize_child_with_propsv qom/object= .c:566:5=0D #7 0x56184a5a2e60 in object_initialize_child_with_props qom/object.= c:549:10=0D #8 0x56184a5a3a1e in object_initialize_child_internal qom/object.c:= 603:5=0D #9 0x5618495aa431 in xlnx_zynqmp_init hw/arm/xlnx-zynqmp.c:273:5=0D= =0D The RX/TX FIFOs are created in xlnx_dp_init(), add xlnx_dp_finalize()=0D to destroy them.=0D =0D Fixes: 58ac482a66d ("introduce xlnx-dp")=0D Signed-off-by: Philippe Mathieu-Daud=C3=A9 =0D Reviewed-by: Alistair Francis =0D Message-id: 20210323182958.277654-1-f4bug@amsat.org=0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: 6c1bd93954cbdd70d8bdcd67b1f01d759747d895=0D https://github.com/qemu/qemu/commit/6c1bd93954cbdd70d8bdcd67b1f01d7= 59747d895=0D Author: Zenghui Yu =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/smmuv3-internal.h=0D =0D Log Message:=0D -----------=0D hw/arm/smmuv3: Drop unused CDM_VALID() and is_cd_valid()=0D =0D They were introduced in commit 9bde7f0674fe ("hw/arm/smmuv3: Implement=0D= translate callback") but never actually used. Drop them.=0D =0D Signed-off-by: Zenghui Yu =0D Acked-by: Eric Auger =0D Message-id: 20210325142702.790-1-yuzenghui@huawei.com=0D Reviewed-by: Peter Maydell =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: f7fb73b8cdd3f77e26f9fcff8cf24ff1b58d200f=0D https://github.com/qemu/qemu/commit/f7fb73b8cdd3f77e26f9fcff8cf24ff= 1b58d200f=0D Author: Peter Maydell =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M target/arm/cpu.h=0D M target/arm/cpu64.c=0D M target/arm/cpu_tcg.c=0D M target/arm/helper.c=0D M target/arm/kvm64.c=0D =0D Log Message:=0D -----------=0D target/arm: Make number of counters in PMCR follow the CPU=0D =0D Currently we give all the v7-and-up CPUs a PMU with 4 counters. This=0D means that we don't provide the 6 counters that are required by the=0D Arm BSA (Base System Architecture) specification if the CPU supports=0D the Virtualization extensions.=0D =0D Instead of having a single PMCR_NUM_COUNTERS, make each CPU type=0D specify the PMCR reset value (obtained from the appropriate TRM), and=0D use the 'N' field of that value to define the number of counters=0D provided.=0D =0D This means that we now supply 6 counters for Cortex-A53, A57, A72,=0D A15 and A9 as well as '-cpu max'; Cortex-A7 and A8 stay at 4; and=0D Cortex-R5 goes down to 3.=0D =0D Note that because we now use the PMCR reset value of the specific=0D implementation, we no longer set the LC bit out of reset. This has=0D an UNKNOWN value out of reset for all cores with any AArch32 support,=0D so guest software should be setting it anyway if it wants it.=0D =0D Signed-off-by: Peter Maydell =0D Tested-by: Marcin Juszkiewicz =0D Message-id: 20210311165947.27470-1-peter.maydell@linaro.org=0D Reviewed-by: Richard Henderson =0D =0D =0D Commit: b9e3f1579a4b06fc63dfa8cdb68df1c58eeb0cf1=0D https://github.com/qemu/qemu/commit/b9e3f1579a4b06fc63dfa8cdb68df1c= 58eeb0cf1=0D Author: Peter Maydell =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M hw/timer/renesas_tmr.c=0D =0D Log Message:=0D -----------=0D hw/timer/renesas_tmr: Add default-case asserts in read_tcnt()=0D =0D In commit 81b3ddaf8772ec we fixed a use of uninitialized data=0D in read_tcnt(). However this change wasn't enough to placate=0D Coverity, which is not smart enough to see that if we read a=0D 2 bit field and then handle cases 0, 1, 2 and 3 then there cannot=0D be a flow of execution through the switch default. Add explicit=0D default cases which assert that they can't be reached, which=0D should help silence Coverity.=0D =0D Signed-off-by: Peter Maydell =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Message-id: 20210319162458.13760-1-peter.maydell@linaro.org=0D =0D =0D Commit: b471d5549188d01730131a322c4d154585ba1e60=0D https://github.com/qemu/qemu/commit/b471d5549188d01730131a322c4d154= 585ba1e60=0D Author: Peter Maydell =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M hw/arm/smmuv3-internal.h=0D M hw/display/xlnx_dp.c=0D M hw/net/npcm7xx_emc.c=0D M hw/timer/renesas_tmr.c=0D M target/arm/cpu.h=0D M target/arm/cpu64.c=0D M target/arm/cpu_tcg.c=0D M target/arm/helper.c=0D M target/arm/kvm64.c=0D M tests/qtest/npcm7xx_emc-test.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-202= 10330' into staging=0D =0D * net/npcm7xx_emc.c: Fix handling of receiving packets when RSDR not set= =0D * hw/display/xlnx_dp: Free FIFOs adding xlnx_dp_finalize()=0D * hw/arm/smmuv3: Drop unused CDM_VALID() and is_cd_valid()=0D * target/arm: Make number of counters in PMCR follow the CPU=0D * hw/timer/renesas_tmr: Add default-case asserts in read_tcnt()=0D =0D # gpg: Signature made Tue 30 Mar 2021 14:23:33 BST=0D # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360= CDE=0D # gpg: issuer "peter.maydell@linaro.org"=0D # gpg: Good signature from "Peter Maydell " [ul= timate]=0D # gpg: aka "Peter Maydell " [ultimate= ]=0D # gpg: aka "Peter Maydell " [ultimate]=0D # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 = 0CDE=0D =0D * remotes/pmaydell/tags/pull-target-arm-20210330:=0D hw/timer/renesas_tmr: Add default-case asserts in read_tcnt()=0D target/arm: Make number of counters in PMCR follow the CPU=0D hw/arm/smmuv3: Drop unused CDM_VALID() and is_cd_valid()=0D hw/display/xlnx_dp: Free FIFOs adding xlnx_dp_finalize()=0D net/npcm7xx_emc.c: Fix handling of receiving packets when RSDR not set=0D= =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/4a0ba67c77a4...b471d5549188= =0D From MAILER-DAEMON Tue Mar 30 13:20:35 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lRI2c-0001b1-DT for mharc-qemu-commits@gnu.org; Tue, 30 Mar 2021 13:20:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39066) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRI2W-0001Wl-9S for qemu-commits@nongnu.org; Tue, 30 Mar 2021 13:20:28 -0400 Received: from out-21.smtp.github.com ([192.30.252.204]:32851 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRI2J-0003xV-0N for qemu-commits@nongnu.org; Tue, 30 Mar 2021 13:20:27 -0400 Received: from github.com (hubbernetes-node-76eefbb.ac4-iad.github.net [10.52.207.52]) by smtp.github.com (Postfix) with ESMTPA id DD5D55207FB for ; Tue, 30 Mar 2021 10:20:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617124813; bh=wb5+uY7Rrcu4u2qYHIQl3wWwdsimCoRWUCh3kcLYSu0=; h=Date:From:To:Subject:From; b=RlvxHKllhpC7MXRCSJZpiORw/DK1idNRr/ENeFDYAC9CvKOZ0dk/hcIh4DRZ2IudP xuS/5ZbK/pFyIQRoVsVZ8hj1Wo8Ntkcc+s10dP4DCJ3n/FtGshoIkvcsdj8FSXc8SC dSnUoGN877F/UbDxFtWKDDE8Z/uRt23Mgs5Igfs4= Date: Tue, 30 Mar 2021 10:20:13 -0700 From: Paolo Bonzini To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -56 X-Spam_score: -5.7 X-Spam_bar: ----- X-Spam_report: (-5.7 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, PYZOR_CHECK=1.392, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, TVD_SPACE_RATIO=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Mar 2021 17:20:28 -0000 Branch: refs/tags/v6.0.0-rc1 Home: https://github.com/qemu/qemu From MAILER-DAEMON Tue Mar 30 13:20:42 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lRI2k-0001gs-6r for mharc-qemu-commits@gnu.org; Tue, 30 Mar 2021 13:20:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:39036) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRI2U-0001W7-S0 for qemu-commits@nongnu.org; Tue, 30 Mar 2021 13:20:28 -0400 Received: from out-18.smtp.github.com ([192.30.252.201]:44337 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRI2M-0003xN-Br for qemu-commits@nongnu.org; Tue, 30 Mar 2021 13:20:26 -0400 Received: from github.com (hubbernetes-node-9fef8bb.va3-iad.github.net [10.48.103.44]) by smtp.github.com (Postfix) with ESMTPA id A9839340D2C for ; Tue, 30 Mar 2021 10:20:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617124812; bh=GwLjpdLnVPxC2geW3BNPkPlzG0OMB0SUCViem4rnh2o=; h=Date:From:To:Subject:From; b=LyK8uqvfiO+6Q8SvwXDY8O0qsmQ+lUhNXF3opBiHPZT1Ur9nGIwH5XdDAPEmovTLF eXF3KR+BnBMrBT1acBPVcrdiNG/ND83XHJ82x02katONb/IWtJik8nsEYXeJnCbBUq jnvReYwFUCpi8cf0Q6fqxJK7iifhpDBSSbVx7fkg= Date: Tue, 30 Mar 2021 10:20:12 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.201; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 6d40ce: Update version for v6.0.0-rc1 release X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 30 Mar 2021 17:20:28 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 6d40ce00c1166c317e298ad82ecf10e650c4f87d https://github.com/qemu/qemu/commit/6d40ce00c1166c317e298ad82ecf10e650c4f87d Author: Peter Maydell Date: 2021-03-30 (Tue, 30 Mar 2021) Changed paths: M VERSION Log Message: ----------- Update version for v6.0.0-rc1 release Signed-off-by: Peter Maydell From MAILER-DAEMON Wed Mar 31 05:45:33 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lRXPp-0006Ov-6G for mharc-qemu-commits@gnu.org; Wed, 31 Mar 2021 05:45:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49836) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRXPn-0006NC-0C for qemu-commits@nongnu.org; Wed, 31 Mar 2021 05:45:31 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:43629 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRXPi-0005dc-Lm for qemu-commits@nongnu.org; Wed, 31 Mar 2021 05:45:30 -0400 Received: from github.com (hubbernetes-node-024967c.va3-iad.github.net [10.48.209.64]) by smtp.github.com (Postfix) with ESMTPA id 707C55C074E for ; Wed, 31 Mar 2021 02:45:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617183925; bh=8TVAIgo45YQsooUq40fdQpIQEAgp88l50lKoN19CGkA=; h=Date:From:To:Subject:From; b=ao8xREvfLNUlK0PtlJMdoj2FQ5p/fa4jUz4ayiR+Da3u51QEGFv0z1FBvKP7s0Zyq 0FKsdk618xrtfSFL1TeNyB4+0z6RdikdtDGQ4oO6eURyrwcYxGlxTE+tZDe9fdOdZA VKnb3YXUv3D7oKN+vACxQ4FHAiqUXmQMyZrv/Lwo= Date: Wed, 31 Mar 2021 02:45:25 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 13e340: linux-user: NETLINK_LIST_MEMBERSHIPS: Allow bad pt... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 Mar 2021 09:45:31 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 13e340c886679fb17df02a35e7d82cb8beb6e9f4=0D https://github.com/qemu/qemu/commit/13e340c886679fb17df02a35e7d82cb= 8beb6e9f4=0D Author: Fr=C3=A9d=C3=A9ric Fortier =0D Date: 2021-03-29 (Mon, 29 Mar 2021)=0D =0D Changed paths:=0D M linux-user/syscall.c=0D =0D Log Message:=0D -----------=0D linux-user: NETLINK_LIST_MEMBERSHIPS: Allow bad ptr if its length is 0=0D= =0D getsockopt(fd, SOL_NETLINK, NETLINK_LIST_MEMBERSHIPS, *optval, *optlen)=0D= syscall allows optval to be NULL/invalid if optlen points to a size of=0D= zero. This allows userspace to query the length of the array they should=0D= use to get the full membership list before allocating memory for said=0D list, then re-calling getsockopt with proper optval/optlen arguments.=0D =0D Notable users of this pattern include systemd-networkd, which in the=0D (albeit old) version 237 tested, cannot start without this fix.=0D =0D Signed-off-by: Fr=C3=A9d=C3=A9ric Fortier =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210328180135.88449-1-frf@ghgsat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: 6d40ce00c1166c317e298ad82ecf10e650c4f87d=0D https://github.com/qemu/qemu/commit/6d40ce00c1166c317e298ad82ecf10e= 650c4f87d=0D Author: Peter Maydell =0D Date: 2021-03-30 (Tue, 30 Mar 2021)=0D =0D Changed paths:=0D M VERSION=0D =0D Log Message:=0D -----------=0D Update version for v6.0.0-rc1 release=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Commit: b307a3174ffc293d4af9a0f03d9f78ae63327157=0D https://github.com/qemu/qemu/commit/b307a3174ffc293d4af9a0f03d9f78a= e63327157=0D Author: Peter Maydell =0D Date: 2021-03-31 (Wed, 31 Mar 2021)=0D =0D Changed paths:=0D M linux-user/syscall.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.0-p= ull-request' into staging=0D =0D linux-user Pull request 20210330=0D =0D Fix NETLINK_LIST_MEMBERSHIPS with NULL/invalid pointer and 0 length=0D =0D # gpg: Signature made Tue 30 Mar 2021 15:38:35 BST=0D # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FB= E3C=0D # gpg: issuer "laurent@vivier.eu"=0D # gpg: Good signature from "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier (Red Hat) = " [full]=0D # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F = BE3C=0D =0D * remotes/vivier2/tags/linux-user-for-6.0-pull-request:=0D linux-user: NETLINK_LIST_MEMBERSHIPS: Allow bad ptr if its length is 0=0D= =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/b471d5549188...b307a3174ffc= =0D From MAILER-DAEMON Wed Mar 31 08:14:35 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lRZk3-00056H-Hd for mharc-qemu-commits@gnu.org; Wed, 31 Mar 2021 08:14:35 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:57686) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRZk1-00055K-AT for qemu-commits@nongnu.org; Wed, 31 Mar 2021 08:14:33 -0400 Received: from out-27.smtp.github.com ([192.30.252.210]:48131) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRZjz-00019y-3X for qemu-commits@nongnu.org; Wed, 31 Mar 2021 08:14:32 -0400 Received: from github.com (hubbernetes-node-30c8c15.ash1-iad.github.net [10.56.122.44]) by smtp.github.com (Postfix) with ESMTPA id 4E4D9900510 for ; Wed, 31 Mar 2021 05:14:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617192870; bh=KortlE9FQ3ASwxg3hOmCw6hs6rHwiVq0/8Bc9Y6r+28=; h=Date:From:To:Subject:From; b=fD1wRDxhPi9AEz6KsxtssDzfgaObUEZGai5FicuTQ15FcoHqJNww/3AlIZ0Y2npKJ FDGFD6IIwgOKjh+0JlOAOoDtxgLy4V4HEKr3xGVrIadgwsrgrEFb/dG+tT+SW+BIBu e++Mr0xKaXX/8lz6MVKEo9sqcQV0HFC4W36aNw+g= Date: Wed, 31 Mar 2021 05:14:30 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.210; envelope-from=noreply@github.com; helo=out-27.smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 13e340: linux-user: NETLINK_LIST_MEMBERSHIPS: Allow bad pt... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 Mar 2021 12:14:33 -0000 Branch: refs/heads/master=0D Home: https://github.com/qemu/qemu=0D Commit: 13e340c886679fb17df02a35e7d82cb8beb6e9f4=0D https://github.com/qemu/qemu/commit/13e340c886679fb17df02a35e7d82cb= 8beb6e9f4=0D Author: Fr=C3=A9d=C3=A9ric Fortier =0D Date: 2021-03-29 (Mon, 29 Mar 2021)=0D =0D Changed paths:=0D M linux-user/syscall.c=0D =0D Log Message:=0D -----------=0D linux-user: NETLINK_LIST_MEMBERSHIPS: Allow bad ptr if its length is 0=0D= =0D getsockopt(fd, SOL_NETLINK, NETLINK_LIST_MEMBERSHIPS, *optval, *optlen)=0D= syscall allows optval to be NULL/invalid if optlen points to a size of=0D= zero. This allows userspace to query the length of the array they should=0D= use to get the full membership list before allocating memory for said=0D list, then re-calling getsockopt with proper optval/optlen arguments.=0D =0D Notable users of this pattern include systemd-networkd, which in the=0D (albeit old) version 237 tested, cannot start without this fix.=0D =0D Signed-off-by: Fr=C3=A9d=C3=A9ric Fortier =0D Reviewed-by: Laurent Vivier =0D Message-Id: <20210328180135.88449-1-frf@ghgsat.com>=0D Signed-off-by: Laurent Vivier =0D =0D =0D Commit: b307a3174ffc293d4af9a0f03d9f78ae63327157=0D https://github.com/qemu/qemu/commit/b307a3174ffc293d4af9a0f03d9f78a= e63327157=0D Author: Peter Maydell =0D Date: 2021-03-31 (Wed, 31 Mar 2021)=0D =0D Changed paths:=0D M linux-user/syscall.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.0-p= ull-request' into staging=0D =0D linux-user Pull request 20210330=0D =0D Fix NETLINK_LIST_MEMBERSHIPS with NULL/invalid pointer and 0 length=0D =0D # gpg: Signature made Tue 30 Mar 2021 15:38:35 BST=0D # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FB= E3C=0D # gpg: issuer "laurent@vivier.eu"=0D # gpg: Good signature from "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier " [full]=0D= # gpg: aka "Laurent Vivier (Red Hat) = " [full]=0D # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F = BE3C=0D =0D * remotes/vivier2/tags/linux-user-for-6.0-pull-request:=0D linux-user: NETLINK_LIST_MEMBERSHIPS: Allow bad ptr if its length is 0=0D= =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/6d40ce00c116...b307a3174ffc= =0D From MAILER-DAEMON Wed Mar 31 08:20:00 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lRZpI-0007Ay-4o for mharc-qemu-commits@gnu.org; Wed, 31 Mar 2021 08:20:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59030) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRZpG-00077M-Cr for qemu-commits@nongnu.org; Wed, 31 Mar 2021 08:19:58 -0400 Received: from out-21.smtp.github.com ([192.30.252.204]:33331 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRZpD-0004O4-Lg for qemu-commits@nongnu.org; Wed, 31 Mar 2021 08:19:57 -0400 Received: from github.com (hubbernetes-node-b354b5c.ac4-iad.github.net [10.52.210.33]) by smtp.github.com (Postfix) with ESMTPA id 6BBEB520A5B for ; Wed, 31 Mar 2021 05:19:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617193194; bh=6YmjdUn53+DYiEwbcwwvX521rxRfdc1wfKUhkz2PP04=; h=Date:From:To:Subject:From; b=EjvlpY3SfPYayUjVe5yZ8v1KjUlKvewUiwNSetPmAh9ZVHIkCehjXrCLO4eT3Qm+s 21AkAmqlG8fz6CU4vlct7Zh8xQAJ3FtW5660vcWf/691UtlX1vdF9VCF5F3BnLMqrs dlZSZjIXbE1dn/IFnfvpz7Zs0po8p1VuFuIrzHLo= Date: Wed, 31 Mar 2021 05:19:54 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.204; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 093256: hw/ppc: e500: Add missing #address-cells and #size... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 Mar 2021 12:19:58 -0000 Branch: refs/heads/staging Home: https://github.com/qemu/qemu Commit: 093256789aaec8b9e84b620a4334adcea5992223 https://github.com/qemu/qemu/commit/093256789aaec8b9e84b620a4334adcea5992223 Author: Bin Meng Date: 2021-03-31 (Wed, 31 Mar 2021) Changed paths: M hw/ppc/e500.c Log Message: ----------- hw/ppc: e500: Add missing #address-cells and #size-cells in the eTSEC node Per devicetree spec v0.3 [1] chapter 2.3.5: The #address-cells and #size-cells properties are not inherited from ancestors in the devicetree. They shall be explicitly defined. If missing, a client program should assume a default value of 2 for #address-cells, and a value of 1 for #size-cells. These properties are currently missing, causing the property of the queue-group subnode to be incorrectly parsed using default values. [1] https://github.com/devicetree-org/devicetree-specification/releases/download/v0.3/devicetree-specification-v0.3.pdf Fixes: fdfb7f2cdb2d ("e500: Add support for eTSEC in device tree") Signed-off-by: Bin Meng Message-Id: <20210311081608.66891-1-bmeng.cn@gmail.com> Signed-off-by: David Gibson Commit: 9cbcfb5924b9a8295e7a103941135eb75c9deb93 https://github.com/qemu/qemu/commit/9cbcfb5924b9a8295e7a103941135eb75c9deb93 Author: Greg Kurz Date: 2021-03-31 (Wed, 31 Mar 2021) Changed paths: M target/ppc/kvm.c Log Message: ----------- target/ppc/kvm: Cache timebase frequency Each vCPU core exposes its timebase frequency in the DT. When running under KVM, this means parsing /proc/cpuinfo in order to get the timebase frequency of the host CPU. The parsing appears to slow down the boot quite a bit with higher number of cores: # of cores seconds spent in spapr_dt_cpus() 8 0.550122 16 1.342375 32 2.850316 64 5.922505 96 9.109224 128 12.245504 256 24.957236 384 37.389113 The timebase frequency of the host CPU is identical for all cores and it is an invariant for the VM lifetime. Cache it instead of doing the same expensive parsing again and again. Rename kvmppc_get_tbfreq() to kvmppc_get_tbfreq_procfs() and rename the 'retval' variable to make it clear it is used as fallback only. Come up with a new version of kvmppc_get_tbfreq() that calls kvmppc_get_tbfreq_procfs() only once and keep the value in a static. Zero is certainly not a valid value for the timebase frequency. Treat atoi() returning zero as another parsing error and return the fallback value instead. This allows kvmppc_get_tbfreq() to use zero as an indicator that kvmppc_get_tbfreq_procfs() hasn't been called yet. With this patch applied: 384 0.518382 Signed-off-by: Greg Kurz Message-Id: <161600382766.1780699.6787739229984093959.stgit@bahia.lan> Signed-off-by: David Gibson Commit: df2d7ca7744156aac0e05ab47bc8623654c1346a https://github.com/qemu/qemu/commit/df2d7ca7744156aac0e05ab47bc8623654c1346a Author: Greg Kurz Date: 2021-03-31 (Wed, 31 Mar 2021) Changed paths: M hw/ppc/spapr.c Log Message: ----------- spapr: Assert DIMM unplug state in spapr_memory_unplug() spapr_memory_unplug() is the last step of the hot unplug sequence. It is indirectly called by: spapr_lmb_release() hotplug_handler_unplug() and spapr_lmb_release() already buys us that DIMM unplug state is present : it gets restored with spapr_recover_pending_dimm_state() if missing. g_assert() that spapr_pending_dimm_unplugs_find() cannot return NULL in spapr_memory_unplug() to make this clear and silence Coverity. Fixes: Coverity CID 1450767 Signed-off-by: Greg Kurz Message-Id: <161562021166.948373.15092876234470478331.stgit@bahia.lan> Reviewed-by: Daniel Henrique Barboza Signed-off-by: David Gibson Commit: a40888bad602706abb0e726f96a9ea580d591de5 https://github.com/qemu/qemu/commit/a40888bad602706abb0e726f96a9ea580d591de5 Author: Alexey Kardashevskiy Date: 2021-03-31 (Wed, 31 Mar 2021) Changed paths: M include/hw/ppc/spapr.h Log Message: ----------- spapr: Fix typo in the patb_entry comment There is no H_REGISTER_PROCESS_TABLE, it is H_REGISTER_PROC_TBL handler for which is still called h_register_process_table() though. Signed-off-by: Alexey Kardashevskiy Message-Id: <20210225032335.64245-1-aik@ozlabs.ru> Reviewed-by: Daniel Henrique Barboza Signed-off-by: David Gibson Commit: 611ac0a60fdcc7422bf42ef9b467abf4fdbea1a2 https://github.com/qemu/qemu/commit/611ac0a60fdcc7422bf42ef9b467abf4fdbea1a2 Author: Bin Meng Date: 2021-03-31 (Wed, 31 Mar 2021) Changed paths: M hw/net/fsl_etsec/rings.c Log Message: ----------- hw/net: fsl_etsec: Tx padding length should exclude CRC As the comment of tx_padding_and_crc() says: "Never add CRC in QEMU", min_frame_len should excluce CRC, so it should be 60 instead of 64. Signed-off-by: Bin Meng Message-Id: <20210316081505.72898-1-bmeng.cn@gmail.com> Signed-off-by: David Gibson Commit: 6ee55e1d10c25c2f6bf5ce2084ad2327e17affa5 https://github.com/qemu/qemu/commit/6ee55e1d10c25c2f6bf5ce2084ad2327e17affa5 Author: Peter Maydell Date: 2021-03-31 (Wed, 31 Mar 2021) Changed paths: M hw/net/fsl_etsec/rings.c M hw/ppc/e500.c M hw/ppc/spapr.c M include/hw/ppc/spapr.h M target/ppc/kvm.c Log Message: ----------- Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20210331' into staging ppc patch queue for 2021-03-31 Here's another set of patches for the ppc target and associated machine types. I'd hoped to send this closer to the hard freeze, but got caught up for some time chasing what looked like a strange regression, before finally concluding it was due to unrelated failures on the CI. This is just a handful of fairly straightforward fixes, plus one performance improvement that's simple and beneficial enough that I'm considering it a "performance bug fix". # gpg: Signature made Wed 31 Mar 2021 07:22:17 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson " [full] # gpg: aka "David Gibson (Red Hat) " [full] # gpg: aka "David Gibson (ozlabs.org) " [full] # gpg: aka "David Gibson (kernel.org) " [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.0-20210331: hw/net: fsl_etsec: Tx padding length should exclude CRC spapr: Fix typo in the patb_entry comment spapr: Assert DIMM unplug state in spapr_memory_unplug() target/ppc/kvm: Cache timebase frequency hw/ppc: e500: Add missing #address-cells and #size-cells in the eTSEC node Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/b307a3174ffc...6ee55e1d10c2 From MAILER-DAEMON Wed Mar 31 11:38:57 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lRcvo-0002Ez-VR for mharc-qemu-commits@gnu.org; Wed, 31 Mar 2021 11:38:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53958) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRcvn-0002Bl-PB for qemu-commits@nongnu.org; Wed, 31 Mar 2021 11:38:55 -0400 Received: from out-25.smtp.github.com ([192.30.252.208]:53475 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRcvk-00060v-8x for qemu-commits@nongnu.org; Wed, 31 Mar 2021 11:38:55 -0400 Received: from github.com (hubbernetes-node-05799de.ash1-iad.github.net [10.56.110.70]) by smtp.github.com (Postfix) with ESMTPA id A296E84037B for ; Wed, 31 Mar 2021 08:38:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617205131; bh=jj7Fy81CQJQ8bHDJxS+qglG9ISd2TzuHFssDI69lf+E=; h=Date:From:To:Subject:From; b=p5+U/8iWIiLZ9cXGQe1OugyRzxRpzgoZ94sNLjjfxoYk5Q+WFI/gQh6qVMRjxhj1B JcQvP4lFDE975y2L63wqdpSdEfMeJLVAtMV8NAsW5MOoavjH7YZxoea1uvCVkwqpAa eE9jZEsdJJp6rzc+HTFLV+/UnN3EG/gOc682C/Mk= Date: Wed, 31 Mar 2021 08:38:51 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.208; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 093256: hw/ppc: e500: Add missing #address-cells and #size... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 Mar 2021 15:38:56 -0000 Branch: refs/heads/master Home: https://github.com/qemu/qemu Commit: 093256789aaec8b9e84b620a4334adcea5992223 https://github.com/qemu/qemu/commit/093256789aaec8b9e84b620a4334adcea5992223 Author: Bin Meng Date: 2021-03-31 (Wed, 31 Mar 2021) Changed paths: M hw/ppc/e500.c Log Message: ----------- hw/ppc: e500: Add missing #address-cells and #size-cells in the eTSEC node Per devicetree spec v0.3 [1] chapter 2.3.5: The #address-cells and #size-cells properties are not inherited from ancestors in the devicetree. They shall be explicitly defined. If missing, a client program should assume a default value of 2 for #address-cells, and a value of 1 for #size-cells. These properties are currently missing, causing the property of the queue-group subnode to be incorrectly parsed using default values. [1] https://github.com/devicetree-org/devicetree-specification/releases/download/v0.3/devicetree-specification-v0.3.pdf Fixes: fdfb7f2cdb2d ("e500: Add support for eTSEC in device tree") Signed-off-by: Bin Meng Message-Id: <20210311081608.66891-1-bmeng.cn@gmail.com> Signed-off-by: David Gibson Commit: 9cbcfb5924b9a8295e7a103941135eb75c9deb93 https://github.com/qemu/qemu/commit/9cbcfb5924b9a8295e7a103941135eb75c9deb93 Author: Greg Kurz Date: 2021-03-31 (Wed, 31 Mar 2021) Changed paths: M target/ppc/kvm.c Log Message: ----------- target/ppc/kvm: Cache timebase frequency Each vCPU core exposes its timebase frequency in the DT. When running under KVM, this means parsing /proc/cpuinfo in order to get the timebase frequency of the host CPU. The parsing appears to slow down the boot quite a bit with higher number of cores: # of cores seconds spent in spapr_dt_cpus() 8 0.550122 16 1.342375 32 2.850316 64 5.922505 96 9.109224 128 12.245504 256 24.957236 384 37.389113 The timebase frequency of the host CPU is identical for all cores and it is an invariant for the VM lifetime. Cache it instead of doing the same expensive parsing again and again. Rename kvmppc_get_tbfreq() to kvmppc_get_tbfreq_procfs() and rename the 'retval' variable to make it clear it is used as fallback only. Come up with a new version of kvmppc_get_tbfreq() that calls kvmppc_get_tbfreq_procfs() only once and keep the value in a static. Zero is certainly not a valid value for the timebase frequency. Treat atoi() returning zero as another parsing error and return the fallback value instead. This allows kvmppc_get_tbfreq() to use zero as an indicator that kvmppc_get_tbfreq_procfs() hasn't been called yet. With this patch applied: 384 0.518382 Signed-off-by: Greg Kurz Message-Id: <161600382766.1780699.6787739229984093959.stgit@bahia.lan> Signed-off-by: David Gibson Commit: df2d7ca7744156aac0e05ab47bc8623654c1346a https://github.com/qemu/qemu/commit/df2d7ca7744156aac0e05ab47bc8623654c1346a Author: Greg Kurz Date: 2021-03-31 (Wed, 31 Mar 2021) Changed paths: M hw/ppc/spapr.c Log Message: ----------- spapr: Assert DIMM unplug state in spapr_memory_unplug() spapr_memory_unplug() is the last step of the hot unplug sequence. It is indirectly called by: spapr_lmb_release() hotplug_handler_unplug() and spapr_lmb_release() already buys us that DIMM unplug state is present : it gets restored with spapr_recover_pending_dimm_state() if missing. g_assert() that spapr_pending_dimm_unplugs_find() cannot return NULL in spapr_memory_unplug() to make this clear and silence Coverity. Fixes: Coverity CID 1450767 Signed-off-by: Greg Kurz Message-Id: <161562021166.948373.15092876234470478331.stgit@bahia.lan> Reviewed-by: Daniel Henrique Barboza Signed-off-by: David Gibson Commit: a40888bad602706abb0e726f96a9ea580d591de5 https://github.com/qemu/qemu/commit/a40888bad602706abb0e726f96a9ea580d591de5 Author: Alexey Kardashevskiy Date: 2021-03-31 (Wed, 31 Mar 2021) Changed paths: M include/hw/ppc/spapr.h Log Message: ----------- spapr: Fix typo in the patb_entry comment There is no H_REGISTER_PROCESS_TABLE, it is H_REGISTER_PROC_TBL handler for which is still called h_register_process_table() though. Signed-off-by: Alexey Kardashevskiy Message-Id: <20210225032335.64245-1-aik@ozlabs.ru> Reviewed-by: Daniel Henrique Barboza Signed-off-by: David Gibson Commit: 611ac0a60fdcc7422bf42ef9b467abf4fdbea1a2 https://github.com/qemu/qemu/commit/611ac0a60fdcc7422bf42ef9b467abf4fdbea1a2 Author: Bin Meng Date: 2021-03-31 (Wed, 31 Mar 2021) Changed paths: M hw/net/fsl_etsec/rings.c Log Message: ----------- hw/net: fsl_etsec: Tx padding length should exclude CRC As the comment of tx_padding_and_crc() says: "Never add CRC in QEMU", min_frame_len should excluce CRC, so it should be 60 instead of 64. Signed-off-by: Bin Meng Message-Id: <20210316081505.72898-1-bmeng.cn@gmail.com> Signed-off-by: David Gibson Commit: 6ee55e1d10c25c2f6bf5ce2084ad2327e17affa5 https://github.com/qemu/qemu/commit/6ee55e1d10c25c2f6bf5ce2084ad2327e17affa5 Author: Peter Maydell Date: 2021-03-31 (Wed, 31 Mar 2021) Changed paths: M hw/net/fsl_etsec/rings.c M hw/ppc/e500.c M hw/ppc/spapr.c M include/hw/ppc/spapr.h M target/ppc/kvm.c Log Message: ----------- Merge remote-tracking branch 'remotes/dg-gitlab/tags/ppc-for-6.0-20210331' into staging ppc patch queue for 2021-03-31 Here's another set of patches for the ppc target and associated machine types. I'd hoped to send this closer to the hard freeze, but got caught up for some time chasing what looked like a strange regression, before finally concluding it was due to unrelated failures on the CI. This is just a handful of fairly straightforward fixes, plus one performance improvement that's simple and beneficial enough that I'm considering it a "performance bug fix". # gpg: Signature made Wed 31 Mar 2021 07:22:17 BST # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson " [full] # gpg: aka "David Gibson (Red Hat) " [full] # gpg: aka "David Gibson (ozlabs.org) " [full] # gpg: aka "David Gibson (kernel.org) " [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dg-gitlab/tags/ppc-for-6.0-20210331: hw/net: fsl_etsec: Tx padding length should exclude CRC spapr: Fix typo in the patb_entry comment spapr: Assert DIMM unplug state in spapr_memory_unplug() target/ppc/kvm: Cache timebase frequency hw/ppc: e500: Add missing #address-cells and #size-cells in the eTSEC node Signed-off-by: Peter Maydell Compare: https://github.com/qemu/qemu/compare/b307a3174ffc...6ee55e1d10c2 From MAILER-DAEMON Wed Mar 31 11:44:48 2021 Received: from list by lists.gnu.org with archive (Exim 4.90_1) id 1lRd1U-0007Ty-P5 for mharc-qemu-commits@gnu.org; Wed, 31 Mar 2021 11:44:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:58442) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRd1S-0007OV-Ui for qemu-commits@nongnu.org; Wed, 31 Mar 2021 11:44:46 -0400 Received: from out-17.smtp.github.com ([192.30.252.200]:48709 helo=smtp.github.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lRd1N-0001FJ-4y for qemu-commits@nongnu.org; Wed, 31 Mar 2021 11:44:45 -0400 Received: from github.com (hubbernetes-node-5b3283b.va3-iad.github.net [10.48.201.76]) by smtp.github.com (Postfix) with ESMTPA id ED9145C0762 for ; Wed, 31 Mar 2021 08:44:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=github.com; s=pf2014; t=1617205479; bh=BWi5z9mzzUkhAaj5Ik1V8Cl2K0rEaui9TbToLDEyjAQ=; h=Date:From:To:Subject:From; b=qOc62jy9hX2VQ/T+WDDRO0VvL8WOZ+5mrRwttf1VosdsfMmBVZNFrngmZV5WfOzmD fLYYiKLp40T6GSIjidN/NvK0uiJTlYO1zuLYJ4y/cKtC702xhqEaLEHcYUbT2IJywI eYDkE+ZK7lVTcOj8n+SHU7/68n/r6pVUrp+SlzR0= Date: Wed, 31 Mar 2021 08:44:39 -0700 From: Peter Maydell To: qemu-commits@nongnu.org Message-ID: Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-GitHub-Recipient-Address: qemu-commits@nongnu.org X-Auto-Response-Suppress: All Received-SPF: pass client-ip=192.30.252.200; envelope-from=noreply@github.com; helo=smtp.github.com X-Spam_score_int: -70 X-Spam_score: -7.1 X-Spam_bar: ------- X-Spam_report: (-7.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Subject: [Qemu-commits] [qemu/qemu] 574b83: block/vdi: When writing new bmap entry fails, don'... X-BeenThere: qemu-commits@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 Mar 2021 15:44:47 -0000 Branch: refs/heads/staging=0D Home: https://github.com/qemu/qemu=0D Commit: 574b8304cfcc314adb615bb1fd4b159a59ab0441=0D https://github.com/qemu/qemu/commit/574b8304cfcc314adb615bb1fd4b159= a59ab0441=0D Author: David Edmondson =0D Date: 2021-03-31 (Wed, 31 Mar 2021)=0D =0D Changed paths:=0D M block/vdi.c=0D =0D Log Message:=0D -----------=0D block/vdi: When writing new bmap entry fails, don't leak the buffer=0D =0D If a new bitmap entry is allocated, requiring the entire block to be=0D written, avoiding leaking the buffer allocated for the block should=0D the write fail.=0D =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: David Edmondson =0D Signed-off-by: Paolo Bonzini =0D Acked-by: Max Reitz =0D Message-id: 20210325112941.365238-2-pbonzini@redhat.com=0D Message-Id: <20210309144015.557477-2-david.edmondson@oracle.com>=0D Acked-by: Max Reitz =0D Signed-off-by: Paolo Bonzini =0D Signed-off-by: Stefan Hajnoczi =0D =0D =0D Commit: 07ee2ab4fd0147edb64ba88e55407dd9d6656175=0D https://github.com/qemu/qemu/commit/07ee2ab4fd0147edb64ba88e55407dd= 9d6656175=0D Author: David Edmondson =0D Date: 2021-03-31 (Wed, 31 Mar 2021)=0D =0D Changed paths:=0D M block/vdi.c=0D =0D Log Message:=0D -----------=0D block/vdi: Don't assume that blocks are larger than VdiHeader=0D =0D Given that the block size is read from the header of the VDI file, a=0D wide variety of sizes might be seen. Rather than re-using a block=0D sized memory region when writing the VDI header, allocate an=0D appropriately sized buffer.=0D =0D Signed-off-by: David Edmondson =0D Signed-off-by: Paolo Bonzini =0D Acked-by: Max Reitz =0D Message-id: 20210325112941.365238-3-pbonzini@redhat.com=0D Message-Id: <20210309144015.557477-3-david.edmondson@oracle.com>=0D Acked-by: Max Reitz =0D Signed-off-by: Paolo Bonzini =0D Signed-off-by: Stefan Hajnoczi =0D =0D =0D Commit: 2f6ef0393b54383c204d4d6aa5b8eec2bcad566f=0D https://github.com/qemu/qemu/commit/2f6ef0393b54383c204d4d6aa5b8eec= 2bcad566f=0D Author: David Edmondson =0D Date: 2021-03-31 (Wed, 31 Mar 2021)=0D =0D Changed paths:=0D M util/qemu-coroutine-lock.c=0D =0D Log Message:=0D -----------=0D coroutine-lock: Store the coroutine in the CoWaitRecord only once=0D =0D When taking the slow path for mutex acquisition, set the coroutine=0D value in the CoWaitRecord in push_waiter(), rather than both there and=0D= in the caller.=0D =0D Reviewed-by: Paolo Bonzini =0D Reviewed-by: Philippe Mathieu-Daud=C3=A9 =0D Signed-off-by: David Edmondson =0D Signed-off-by: Paolo Bonzini =0D Message-id: 20210325112941.365238-4-pbonzini@redhat.com=0D Message-Id: <20210309144015.557477-4-david.edmondson@oracle.com>=0D Signed-off-by: Paolo Bonzini =0D Signed-off-by: Stefan Hajnoczi =0D =0D =0D Commit: 050de36b13f7a841b7805391bca44f36370e86e4=0D https://github.com/qemu/qemu/commit/050de36b13f7a841b7805391bca44f3= 6370e86e4=0D Author: Paolo Bonzini =0D Date: 2021-03-31 (Wed, 31 Mar 2021)=0D =0D Changed paths:=0D M include/qemu/coroutine.h=0D M util/qemu-coroutine-lock.c=0D =0D Log Message:=0D -----------=0D coroutine-lock: Reimplement CoRwlock to fix downgrade bug=0D =0D An invariant of the current rwlock is that if multiple coroutines hold a=0D= reader lock, all must be runnable. The unlock implementation relies on=0D= this, choosing to wake a single coroutine when the final read lock=0D holder exits the critical section, assuming that it will wake a=0D coroutine attempting to acquire a write lock.=0D =0D The downgrade implementation violates this assumption by creating a=0D read lock owning coroutine that is exclusively runnable - any other=0D coroutines that are waiting to acquire a read lock are *not* made=0D runnable when the write lock holder converts its ownership to read=0D only.=0D =0D More in general, the old implementation had lots of other fairness bugs.=0D= The root cause of the bugs was that CoQueue would wake up readers even=0D= if there were pending writers, and would wake up writers even if there=0D= were readers. In that case, the coroutine would go back to sleep *at=0D the end* of the CoQueue, losing its place at the head of the line.=0D =0D To fix this, keep the queue of waiters explicitly in the CoRwlock=0D instead of using CoQueue, and store for each whether it is a=0D potential reader or a writer. This way, downgrade can look at the=0D first queued coroutines and wake it only if it is a reader, causing=0D all other readers in line to be released in turn.=0D =0D Reported-by: David Edmondson =0D Reviewed-by: David Edmondson =0D Signed-off-by: Paolo Bonzini =0D Message-id: 20210325112941.365238-5-pbonzini@redhat.com=0D Signed-off-by: Stefan Hajnoczi =0D =0D =0D Commit: 25bc2daed0482732a2dd258dde4386f505582fa9=0D https://github.com/qemu/qemu/commit/25bc2daed0482732a2dd258dde4386f= 505582fa9=0D Author: Paolo Bonzini =0D Date: 2021-03-31 (Wed, 31 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/test-coroutine.c=0D =0D Log Message:=0D -----------=0D test-coroutine: Add rwlock upgrade test=0D =0D Test that rwlock upgrade is fair, and that readers go back to sleep if=0D= a writer is in line.=0D =0D Signed-off-by: Paolo Bonzini =0D Message-id: 20210325112941.365238-6-pbonzini@redhat.com=0D Signed-off-by: Stefan Hajnoczi =0D =0D =0D Commit: b6489ac06695e257ea0a9841364577e247fdee30=0D https://github.com/qemu/qemu/commit/b6489ac06695e257ea0a9841364577e= 247fdee30=0D Author: David Edmondson =0D Date: 2021-03-31 (Wed, 31 Mar 2021)=0D =0D Changed paths:=0D M tests/unit/test-coroutine.c=0D =0D Log Message:=0D -----------=0D test-coroutine: Add rwlock downgrade test=0D =0D Test that downgrading an rwlock does not result in a failure to=0D schedule coroutines queued on the rwlock.=0D =0D The diagram associated with test_co_rwlock_downgrade() describes the=0D intended behaviour, but what was observed previously corresponds to:=0D =0D | c1 | c2 | c3 | c4 |=0D |--------+------------+------------+----------|=0D | rdlock | | | |=0D | yield | | | |=0D | | wrlock | | |=0D | | | | |=0D | | | rdlock | |=0D | | | | |=0D | | | | wrlock |=0D | | | | |=0D | unlock | | | |=0D | yield | | | |=0D | | | | |=0D | | downgrade | | |=0D | | ... | | |=0D | | unlock | | |=0D | | | | |=0D | | | | |=0D =0D This results in a failure...=0D =0D ERROR:../tests/test-coroutine.c:369:test_co_rwlock_downgrade: assertion f= ailed: (c3_done)=0D Bail out! ERROR:../tests/test-coroutine.c:369:test_co_rwlock_downgrade: a= ssertion failed: (c3_done)=0D =0D ...as a result of the c3 coroutine failing to run to completion.=0D =0D Signed-off-by: David Edmondson =0D Signed-off-by: Paolo Bonzini =0D Message-id: 20210325112941.365238-7-pbonzini@redhat.com=0D Message-Id: <20210309144015.557477-5-david.edmondson@oracle.com>=0D Signed-off-by: Paolo Bonzini =0D Signed-off-by: Stefan Hajnoczi =0D =0D =0D Commit: 1bd16067b652cce41a9214d0c62c73d5b45ab4b1=0D https://github.com/qemu/qemu/commit/1bd16067b652cce41a9214d0c62c73d= 5b45ab4b1=0D Author: Peter Maydell =0D Date: 2021-03-31 (Wed, 31 Mar 2021)=0D =0D Changed paths:=0D M block/vdi.c=0D M include/qemu/coroutine.h=0D M tests/unit/test-coroutine.c=0D M util/qemu-coroutine-lock.c=0D =0D Log Message:=0D -----------=0D Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-r= equest' into staging=0D =0D Pull request=0D =0D A fix for VDI image files and more generally for CoRwlock.=0D =0D # gpg: Signature made Wed 31 Mar 2021 10:50:39 BST=0D # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB7= 3C8=0D # gpg: Good signature from "Stefan Hajnoczi " [full]= =0D # gpg: aka "Stefan Hajnoczi " [full]=0D= # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB = 73C8=0D =0D * remotes/stefanha-gitlab/tags/block-pull-request:=0D test-coroutine: Add rwlock downgrade test=0D test-coroutine: Add rwlock upgrade test=0D coroutine-lock: Reimplement CoRwlock to fix downgrade bug=0D coroutine-lock: Store the coroutine in the CoWaitRecord only once=0D block/vdi: Don't assume that blocks are larger than VdiHeader=0D block/vdi: When writing new bmap entry fails, don't leak the buffer=0D =0D Signed-off-by: Peter Maydell =0D =0D =0D Compare: https://github.com/qemu/qemu/compare/6ee55e1d10c2...1bd16067b652= =0D