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RE: extrq wrong operand?
From: |
Ekanathan, Saravanan |
Subject: |
RE: extrq wrong operand? |
Date: |
Mon, 15 Apr 2013 05:28:44 +0000 |
Hi Tom Horsley,
Binutils and AMD manual looks ok.
PFB, the snippet from "AMD64 Architecture Programmer's Manual - Volume 3:
General-Purpose and System Instructions" (Page 22 under Instruction Encoding):
......
Note that the addressing mode mod = 11b is a register-direct mode, that is, the
operand is contained in
the specified register, while the modes mod = [00b:10b] specify different
addressing modes for a
memory-based operand.
For mod = 11b, the register containing the operand is specified by the r/m
field. For the other modes
(mod = [00b:10b]), the mod and r/m fields are combined to specify the
addressing mode for the
memory-based operand. Most are register-indirect addressing modes meaning that
the address of the
memory-based operand is contained in the register specified by r/m. For these
register-indirect modes,
mod = 01b and mod = 10b include an offset encoded in the displacement field of
the instruction.
.....
Regards,
Saravanan.
-----Original Message-----
From: address@hidden [mailto:address@hidden On Behalf Of Tom Horsley
Sent: Thursday, April 11, 2013 8:12 PM
To: address@hidden
Subject: extrq wrong operand?
If I'm reading the AMD manuals correctly, the extrq instruction has one form
with operands described in the table as Vdq,Ib,Ib.
The V in Vdq is described as being the ModRM reg field. If I disassemble an
example with objdump, I see this:
objdump: 40356c: 66 0f 78 c1 02 04 extrq $0x4,$0x2,%xmm1
modrm byte is 0xc1
mod = 3
reg = 0
rm = 1
So objdump seems to be picking %xmm1 from the rm field, not the reg field.
Are the binutils busted, or are the AMD manuals busted?
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