[Bug gas/23647] ARM: Incorrect optimization of pseudo instruxtion ldr rx,=0 for -mcpu=cortex-m0plus

[tnfchris at sourceware dot org]

https://sourceware.org/bugzilla/show_bug.cgi?id=23647

Tamar Christina <tnfchris at sourceware dot org> changed:

           What    |Removed                     |Added
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                 CC|                            |tnfchris at sourceware dot org

--- Comment #1 from Tamar Christina <tnfchris at sourceware dot org> ---
Hi Johan,

I don't seem to be able to reproduce this, do you happen to pass any other
command-line to the compiler or in-line directives to the assembly file?

The only way I get it to produce the wrong code is by specifying
`-march=armv7-m` which would be incorrect for the Cortex-M0+ anyway.

I've tried both with normal upstream GCC, gas and with the Arm Embedded 2018-q2
update.

/d/t/t/arm-embeddded ./gcc-arm-none-eabi-7-2018-q2-update/bin/arm-none-eabi-gcc
test.s -c -o a.out -mcpu=cortex-m0plus;
./gcc-arm-none-eabi-7-2018-q2-update/bin/arm-none-eabi-objdump -dr a.out

a.out:     file format elf32-littlearm


Disassembly of section .text:

00000000 <Reset_Handler>:
   0:   b672            cpsid   i
   2:   4901            ldr     r1, [pc, #4]    ; (8 <Reset_Handler+0x8>)
   4:   4a00            ldr     r2, [pc, #0]    ; (8 <Reset_Handler+0x8>)
   6:   4b00            ldr     r3, [pc, #0]    ; (8 <Reset_Handler+0x8>)
   8:   00000000        .word   0x00000000

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