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Re: [PATCH v2 gnumach] smp: Rearrange IPI sending mechanism


From: Almudena Garcia
Subject: Re: [PATCH v2 gnumach] smp: Rearrange IPI sending mechanism
Date: Sun, 11 Feb 2024 12:03:08 +0000

The ASSERT and DEASSERT, if I remember well, if a part of SIPI algorithm. I 
think that I extracted it from the Intel manuals. Or maybe from OSDev. 

El domingo 11 de febrero de 2024, Damien Zammit escribió:
> Wait for ICR then just assert the signal.
> No need for deassert.  This is how Linux and NetBSD does it.
> I couldn't find documentation on the correct method, however.
> ---
>  i386/i386/smp.c | 8 +-------
>  1 file changed, 1 insertion(+), 7 deletions(-)
> 
> diff --git a/i386/i386/smp.c b/i386/i386/smp.c
> index 05e9de67..a758eea3 100644
> --- a/i386/i386/smp.c
> +++ b/i386/i386/smp.c
> @@ -54,17 +54,11 @@ static void smp_send_ipi(unsigned apic_id, unsigned 
> vector)
>  
>      cpu_intr_save(&flags);
>  
> -    apic_send_ipi(NO_SHORTHAND, FIXED, PHYSICAL, ASSERT, EDGE, vector, 
> apic_id);
> -
>      do {
>          cpu_pause();
>      } while(lapic->icr_low.delivery_status == SEND_PENDING);
>  
> -    apic_send_ipi(NO_SHORTHAND, FIXED, PHYSICAL, DE_ASSERT, EDGE, vector, 
> apic_id);
> -
> -    do {
> -        cpu_pause();
> -    } while(lapic->icr_low.delivery_status == SEND_PENDING);
> +    apic_send_ipi(NO_SHORTHAND, FIXED, PHYSICAL, ASSERT, EDGE, vector, 
> apic_id);
>  
>      cpu_intr_restore(flags);
>  }
> -- 
> 2.43.0
> 
> 
> 
>

-- 
Enviado desde mi dispositivo Sailfish

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