Re: [Discuss-gnuradio] Re: Pulse-doppler RADAR wind profiler project and how to bypass interpolation, DAC filtering, etc.

[Martin DvH]

On Mon, 2009-02-23 at 19:43 +1100, Nick Withers wrote:
> Just resending as this didn't seem to get through to the list...
> 
> Presumably I must be subscribed to post?
> 
> On Tue, 2009-02-17 at 20:37 +1100, Nick Withers wrote:
> > Hi all,
> > 
> > I'm new to GNURadio / the USRP, but am working on a project, as part of
> > my honours for a Bachelor of Engineering degree, to implement a
> > pulse-doppler RADAR wind profiler (some information at
> > http://nickwithers.com/usrp-wind-profiler).
> > 
> > If anyone's interested, perhaps doing something similar, or with tips
> > they can offer off the top of their noggin I'd love to hear from you :-)
> > 
> > I'm basing my work off Johnathan Corgan's radar-mono code (thanks
> > Johnathan!) and have a couple of questions I was hoping someone could
> > point me in the right direction with (dare say I'll be getting referred
> > straight to the FAQ, it's all a bit overwhelming!).
> > 
> > I want, if possible, to bypass the DAC's interpolation, filtering etc.
> > (the chief reason being to avoid the 44 MHz upper-bound on signals I can
> > output from it (I'm using the Basic{T|R}X boards and aiming to work
> > around 70 MHz), see http://www.gnuradio.org/trac/wiki/UsrpFAQ/DUC
You could also use the first mirror frequency
When the DUC is set to 44 MHz you get a signal at 44 Mhz and a mirror at
128-44=84 Mhz. (second niquist zone)

84 Mhz is as low as you can go with this setup, but maybe 84 MHz is
close enough to 70 for you to use.

(You would need a bandfilter to only keep this "mirror")

Success,
Martin


> > (incidentally, I've done a crap job of finding supporting information in
> > the AD9862 data sheet)). Do I need to rewrite the C++ code (e.g.,
> > usrp/host/lib/legacy/usrp_standard.cc) if I want to continue to use
> > usrp_source_?() / usrp_sink_?() and such from Python? Any tips on how I
> > go about doing it? Can / should I just rewrite the DAC configuration
> > from within the FPGA when it's initialised?
> > 
> > Any tips appreciated!
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