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[Guile-commits] 231/437: Cosmetic removal of white spaces in end of line
From: |
Andy Wingo |
Subject: |
[Guile-commits] 231/437: Cosmetic removal of white spaces in end of lines. |
Date: |
Mon, 2 Jul 2018 05:14:27 -0400 (EDT) |
wingo pushed a commit to branch lightning
in repository guile.
commit c078a972b4f2985183132ac51e4407b6ecfe7d03
Author: pcpa <address@hidden>
Date: Sat Aug 10 11:38:43 2013 -0300
Cosmetic removal of white spaces in end of lines.
---
check/ccall.c | 2 +-
doc/Makefile.am | 2 +-
lib/jit_aarch64-fpu.c | 4 ++--
lib/jit_hppa-fpu.c | 2 +-
lib/jit_hppa.c | 4 ++--
lib/jit_ia64-cpu.c | 2 +-
lib/jit_ia64-fpu.c | 2 +-
lib/jit_mips-cpu.c | 4 ++--
lib/jit_sparc-cpu.c | 14 +++++++-------
lib/jit_x86-cpu.c | 2 +-
10 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/check/ccall.c b/check/ccall.c
index 14ae7cf..e454a32 100644
--- a/check/ccall.c
+++ b/check/ccall.c
@@ -702,7 +702,7 @@ main(int argc, char *argv[])
# define jit_extr_l(u, v) /**/
#endif
-#define strfy(n) #n
+#define strfy(n) #n
#define defi(T, N) \
n##T##N = jit_name(strfy(n##T##N));
\
jit_note("ccall.c", __LINE__); \
diff --git a/doc/Makefile.am b/doc/Makefile.am
index 462b69c..030f384 100644
--- a/doc/Makefile.am
+++ b/doc/Makefile.am
@@ -14,7 +14,7 @@
AM_CFLAGS = -I$(top_srcdir)/include -D_GNU_SOURCE
-info_TEXINFOS = lightning.texi
+info_TEXINFOS = lightning.texi
MOSTLYCLEANFILES = lightning.tmp
lightning_TEXINFOS = body.texi version.texi
diff --git a/lib/jit_aarch64-fpu.c b/lib/jit_aarch64-fpu.c
index fc94fd3..61557c7 100644
--- a/lib/jit_aarch64-fpu.c
+++ b/lib/jit_aarch64-fpu.c
@@ -592,7 +592,7 @@ _fbcci(jit_state_t *_jit, jit_int32_t cc,
reg = jit_get_reg(jit_class_fpr);
movi_f(rn(reg), i1);
w = fbccr(cc, i0, r0, rn(reg));
- jit_unget_reg(reg);
+ jit_unget_reg(reg);
return (w);
}
@@ -807,7 +807,7 @@ _dbcci(jit_state_t *_jit, jit_int32_t cc,
reg = jit_get_reg(jit_class_fpr);
movi_d(rn(reg), i1);
w = dbccr(cc, i0, r0, rn(reg));
- jit_unget_reg(reg);
+ jit_unget_reg(reg);
return (w);
}
diff --git a/lib/jit_hppa-fpu.c b/lib/jit_hppa-fpu.c
index 611e167..fc06df0 100644
--- a/lib/jit_hppa-fpu.c
+++ b/lib/jit_hppa-fpu.c
@@ -56,7 +56,7 @@ static void _f49_52(jit_state_t*,jit_int32_t,
jit_int32_t,jit_int32_t,jit_int32_t,
jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t,
jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t);
-#define f53(o,r1,r2,ta,ra,f,tm) _f53(_jit,o,r1,r2,ta,ra,f,tm)
+#define f53(o,r1,r2,ta,ra,f,tm) _f53(_jit,o,r1,r2,ta,ra,f,tm)
static void _f53(jit_state_t*,jit_int32_t,jit_int32_t,jit_int32_t,
jit_int32_t,jit_int32_t,jit_int32_t,jit_int32_t) maybe_unused;
#define f54(o,r1,r2,a,b,f,c,d,e,g,t) _f54(_jit,o,r1,r2,a,b,f,c,d,e,g,t)
diff --git a/lib/jit_hppa.c b/lib/jit_hppa.c
index f403c73..077ab54 100644
--- a/lib/jit_hppa.c
+++ b/lib/jit_hppa.c
@@ -1161,7 +1161,7 @@ memory prior to any attempts at prefetching it as an
instruction.
LDIL l%instr,rinstr
STW temp,r%instr(0,rinstr)
FDC r%instr(0,rinstr)
- SYNC
+ SYNC
FIC r%instr(rinstr)
SYNC
instr ...
@@ -1171,7 +1171,7 @@ This sequence assumes a uniprocessor system. In a
multiprocessor system,
software must ensure no processor is executing code which is in the process
of being modified.
*/
-
+
/*
Adapted from ffcall/trampoline/cache-hppa.c:__TR_clear_cache to
loop over addresses as it is unlikely from and to addresses would fit in
diff --git a/lib/jit_ia64-cpu.c b/lib/jit_ia64-cpu.c
index 2798898..d68175d 100644
--- a/lib/jit_ia64-cpu.c
+++ b/lib/jit_ia64-cpu.c
@@ -79,7 +79,7 @@
stop(); \
} while (0)
/* Record register was modified */
-#define SETREG(r0) jit_regset_setbit(&_jitc->regs, r0)
+#define SETREG(r0) jit_regset_setbit(&_jitc->regs, r0)
/* Avoid using constants in macros and code */
typedef enum {
diff --git a/lib/jit_ia64-fpu.c b/lib/jit_ia64-fpu.c
index c955afa..cf176b8 100644
--- a/lib/jit_ia64-fpu.c
+++ b/lib/jit_ia64-fpu.c
@@ -39,7 +39,7 @@
jit_regset_tstbit(&_jitc->regs, r2 + 128)) \
stop(); \
} while (0)
-#define SETFREG(r0) jit_regset_setbit(&_jitc->regs, r0 + 128)
+#define SETFREG(r0) jit_regset_setbit(&_jitc->regs, r0 + 128)
/* libm */
extern float sqrtf(float);
diff --git a/lib/jit_mips-cpu.c b/lib/jit_mips-cpu.c
index e41ba6a..d1c58b0 100644
--- a/lib/jit_mips-cpu.c
+++ b/lib/jit_mips-cpu.c
@@ -2821,7 +2821,7 @@ _prolog(jit_state_t *_jit, jit_node_t *node)
if (jit_regset_tstbit(&_jitc->function->regset, iregs[index]))
stxi(offset, _SP_REGNO, rn(iregs[index]));
}
- assert(offset >= sizeof(jit_word_t));
+ assert(offset >= sizeof(jit_word_t));
stxi(offset, _SP_REGNO, _RA_REGNO);
stxi(0, _SP_REGNO, _BP_REGNO);
movr(_BP_REGNO, _SP_REGNO);
@@ -2848,7 +2848,7 @@ _epilog(jit_state_t *_jit, jit_node_t *node)
if (jit_regset_tstbit(&_jitc->function->regset, iregs[index]))
ldxi(rn(iregs[index]), _SP_REGNO, offset);
}
- assert(offset >= sizeof(jit_word_t));
+ assert(offset >= sizeof(jit_word_t));
ldxi(_RA_REGNO, _SP_REGNO, offset);
ldxi(_BP_REGNO, _SP_REGNO, 0);
JR(_RA_REGNO);
diff --git a/lib/jit_sparc-cpu.c b/lib/jit_sparc-cpu.c
index 956840a..efced64 100644
--- a/lib/jit_sparc-cpu.c
+++ b/lib/jit_sparc-cpu.c
@@ -686,7 +686,7 @@ _f2r(jit_state_t *_jit,
v.rd.b = rd;
v.op2.b = op2;
v.imm22.b = imm22;
- ii(v.v);
+ ii(v.v);
}
static void
@@ -705,7 +705,7 @@ _f2b(jit_state_t *_jit,
v.cond.b = cond;
v.op2.b = op2;
v.disp22.b = disp22;
- ii(v.v);
+ ii(v.v);
}
static void
@@ -725,7 +725,7 @@ _f3r(jit_state_t *_jit, jit_int32_t op, jit_int32_t rd,
v.i.b = 0;
v.asi.b = 0;
v.rs2.b = rs2;
- ii(v.v);
+ ii(v.v);
}
static void
@@ -744,7 +744,7 @@ _f3i(jit_state_t *_jit, jit_int32_t op, jit_int32_t rd,
v.rs1.b = rs1;
v.i.b = 1;
v.simm13.b = simm13;
- ii(v.v);
+ ii(v.v);
}
static void
@@ -769,7 +769,7 @@ _f3t(jit_state_t *_jit, jit_int32_t cond,
v.asi.b = 0;
v.rs2.b = rs2_imm7;
}
- ii(v.v);
+ ii(v.v);
}
static void
@@ -790,7 +790,7 @@ _f3a(jit_state_t *_jit, jit_int32_t op, jit_int32_t rd,
v.i.b = 0;
v.asi.b = asi;
v.rs2.b = rs2;
- ii(v.v);
+ ii(v.v);
}
static void
@@ -801,7 +801,7 @@ _f1(jit_state_t *_jit, jit_int32_t op, jit_int32_t disp30)
assert(s30_p(disp30));
v.op.b = op;
v.disp30.b = disp30;
- ii(v.v);
+ ii(v.v);
}
static void
diff --git a/lib/jit_x86-cpu.c b/lib/jit_x86-cpu.c
index d518f71..c692d29 100644
--- a/lib/jit_x86-cpu.c
+++ b/lib/jit_x86-cpu.c
@@ -1792,7 +1792,7 @@ static void
_comr(jit_state_t *_jit, jit_int32_t r0, jit_int32_t r1)
{
movr(r0, r1);
- icomr(r0);
+ icomr(r0);
}
#if USE_INC_DEC
- [Guile-commits] 186/437: Add code to release all memory used by the jit state., (continued)
- [Guile-commits] 186/437: Add code to release all memory used by the jit state., Andy Wingo, 2018/07/02
- [Guile-commits] 137/437: Make mips backend compile on a qemu image., Andy Wingo, 2018/07/02
- [Guile-commits] 222/437: Correct build and pass all tests on Solaris x86., Andy Wingo, 2018/07/02
- [Guile-commits] 219/437: Remove redundancy in the hppa cache synchronization code., Andy Wingo, 2018/07/02
- [Guile-commits] 245/437: S390X: Correct values of float registers saved on stack., Andy Wingo, 2018/07/02
- [Guile-commits] 224/437: Correct mips o32 abi that was broken when adding n32 abi support., Andy Wingo, 2018/07/02
- [Guile-commits] 230/437: New s390x port built on the hercules emulator and fedora 16 image., Andy Wingo, 2018/07/02
- [Guile-commits] 234/437: GNU lightning 2.0.0 release, Andy Wingo, 2018/07/02
- [Guile-commits] 256/437: X86: %r12 may be used as an index register., Andy Wingo, 2018/07/02
- [Guile-commits] 229/437: Do not assume cast of nan or inf double to float always work., Andy Wingo, 2018/07/02
- [Guile-commits] 231/437: Cosmetic removal of white spaces in end of lines.,
Andy Wingo <=
- [Guile-commits] 232/437: Correct off by one bug on s390x subi., Andy Wingo, 2018/07/02
- [Guile-commits] 123/437: Revert change aliasing jit_movi_p to jit_movi_ul., Andy Wingo, 2018/07/02
- [Guile-commits] 248/437: Correct wrong example and mt unsafe code in the arm backend., Andy Wingo, 2018/07/02
- [Guile-commits] 236/437: Correct build and make check on gcc111 - AIX 7.1., Andy Wingo, 2018/07/02
- [Guile-commits] 237/437: Correct build and check on NetBSD amd64., Andy Wingo, 2018/07/02
- [Guile-commits] 213/437: Finish Itanium port, correcting remaining failing test cases., Andy Wingo, 2018/07/02
- [Guile-commits] 253/437: IA64: Correct some wrong checks value range checks., Andy Wingo, 2018/07/02
- [Guile-commits] 254/437: ARM: Correct build when disassembler is disabled., Andy Wingo, 2018/07/02
- [Guile-commits] 251/437: Add code to calculate code buffer size based on devel time information., Andy Wingo, 2018/07/02
- [Guile-commits] 144/437: Add new ldst variant test cases to check base/index register clobber., Andy Wingo, 2018/07/02