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From: | Paul Cercueil |
Subject: | Re: [PATCH 0/4] Misc patches |
Date: | Mon, 17 May 2021 19:58:54 +0100 |
Hi Paulo,Le lun., mai 17 2021 at 14:38:27 -0300, Paulo César Pereira de Andrade <paulo.cesar.pereira.de.andrade@gmail.com> a écrit :
Em qua., 28 de abr. de 2021 às 14:29, Paul Cercueil <paul@crapouillou.net> escreveu:Hi,Hi Paul,A Re-re-resend of various patches that I have locally and that shouldbenefit the project.Thanks! Just pushed most of the patches. Will review better the new bswapr patches and reconsider adding the _ui interfaces to 32 bit. The _ui were not added as at first it appeared to be better to have the programmer understanding what was going on, but requiring the check for word size, what might be done in some extra macro.
Great, thanks!I have some more patches queued to enhance the code generation for MIPS, I'll send them soon.
One thing I'd like to see is an automatic (or assisted) way for Lightning to fill delay slots. Right now I have a lot of delay slots filled with NOPs. I am not sure what would be the best way to do it though.
Another thing nice to have, would be conditional move instructions (move if zero/non-zero). I know for sure these are implemented in MIPS, ARM and Aarch64. I can send a patchset for these.
Finally, I am trying to write a backend for SH-2/4 processors. I am hitting a rock as the SH's FPU can be toggled between 32-bit mode and 64-bit mode, in which the registers are paired, so I have no idea how to properly handle that. My idea was to use one of these modes unconditionally, but then it fails to pass any test that involves the FPU. Any ideas?
Cheers, -Paul
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