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Re: [RFC PATCH] target/arm: update the cortex-a15 MIDR to latest rev
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [RFC PATCH] target/arm: update the cortex-a15 MIDR to latest rev |
Date: |
Tue, 6 Sep 2022 19:53:52 +0200 |
On Tue, Sep 6, 2022 at 7:23 PM Alex Bennée <alex.bennee@linaro.org> wrote:
>
> QEMU doesn't model micro-architectural details which includes most
> chip errata. The ARM_ERRATA_798181 work around in the Linux
> kernel (see erratum_a15_798181_init) currently detects QEMU's
> cortex-a15 as broken and triggers additional expensive TLB flushes as
> a result.
>
> Change the MIDR to report what the latest silicon would (r4p0) as well
> as setting the IMPDEF revidr bit to indicate these flushes are not
> needed. This cuts about 5s from my Debian kernel boot with the latest
> 6.0rc1 kernel (29s->24s).
>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> Cc: Arnd Bergmann <arnd@linaro.org>
> Cc: Anders Roxell <anders.roxell@linaro.org>
> ---
> target/arm/cpu_tcg.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>