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Re: [PATCH v2 36/66] target/arm: Reorg get_phys_addr_disabled
From: |
Peter Maydell |
Subject: |
Re: [PATCH v2 36/66] target/arm: Reorg get_phys_addr_disabled |
Date: |
Tue, 20 Sep 2022 17:21:33 +0100 |
On Mon, 22 Aug 2022 at 16:59, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Use a switch. Do not apply memattr or shareability for Stage2
> translations. Make sure to apply HCR_{DC,DCT} only to Regime_EL10,
> per the pseudocode in AArch64.S1DisabledOutput.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> + check_range:
I'm not super keen on this goto label lurking in the switch
statement -- I would rather we keep the "how do we decide the
memattr and shareability" logic separate from the
"which mmu_idxes do we need to do the range check on" logic.
The simple
if (mmu_idx != ARMMMUIdx_Stage2 && mmu_idx != ARMMMUIdx_Stage2_S) {
range check logic;
}
that we had before seems clearer to me than this use of gotos
and fall-throughs.
thanks
-- PMM
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Peter Maydell <=