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[PATCH v2 66/69] target/arm: Simplify fp_status indexing in mve_helper.c
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From: |
Peter Maydell |
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Subject: |
[PATCH v2 66/69] target/arm: Simplify fp_status indexing in mve_helper.c |
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Date: |
Sat, 1 Feb 2025 16:40:09 +0000 |
From: Richard Henderson <richard.henderson@linaro.org>
Select on index instead of pointer.
No functional change.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20250129013857.135256-16-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/mve_helper.c | 40 +++++++++++++------------------------
1 file changed, 14 insertions(+), 26 deletions(-)
diff --git a/target/arm/tcg/mve_helper.c b/target/arm/tcg/mve_helper.c
index 3763d71e20b..274003e2e5b 100644
--- a/target/arm/tcg/mve_helper.c
+++ b/target/arm/tcg/mve_helper.c
@@ -2814,8 +2814,7 @@ DO_VMAXMINA(vminaw, 4, int32_t, uint32_t, DO_MIN)
if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) { \
continue; \
} \
- fpst = (ESIZE == 2) ? &env->vfp.fp_status[FPST_STD_F16] : \
- &env->vfp.fp_status[FPST_STD]; \
+ fpst = &env->vfp.fp_status[ESIZE == 2 ? FPST_STD_F16 : FPST_STD]; \
if (!(mask & 1)) { \
/* We need the result but without updating flags */ \
scratch_fpst = *fpst; \
@@ -2888,8 +2887,7 @@ DO_2OP_FP_ALL(vminnma, minnuma)
r[e] = 0; \
continue; \
} \
- fpst = (ESIZE == 2) ? &env->vfp.fp_status[FPST_STD_F16] : \
- &env->vfp.fp_status[FPST_STD]; \
+ fpst = &env->vfp.fp_status[ESIZE == 2 ? FPST_STD_F16 : FPST_STD]; \
if (!(tm & 1)) { \
/* We need the result but without updating flags */ \
scratch_fpst = *fpst; \
@@ -2926,8 +2924,7 @@ DO_VCADD_FP(vfcadd270s, 4, float32, float32_add,
float32_sub)
if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) { \
continue; \
} \
- fpst = (ESIZE == 2) ? &env->vfp.fp_status[FPST_STD_F16] : \
- &env->vfp.fp_status[FPST_STD]; \
+ fpst = &env->vfp.fp_status[ESIZE == 2 ? FPST_STD_F16 : FPST_STD]; \
if (!(mask & 1)) { \
/* We need the result but without updating flags */ \
scratch_fpst = *fpst; \
@@ -2964,8 +2961,7 @@ DO_VFMA(vfmss, 4, float32, true)
if ((mask & MAKE_64BIT_MASK(0, ESIZE * 2)) == 0) { \
continue; \
} \
- fpst0 = (ESIZE == 2) ? &env->vfp.fp_status[FPST_STD_F16] : \
- &env->vfp.fp_status[FPST_STD]; \
+ fpst0 = &env->vfp.fp_status[ESIZE == 2 ? FPST_STD_F16 : FPST_STD];
\
fpst1 = fpst0; \
if (!(mask & 1)) { \
scratch_fpst = *fpst0; \
@@ -3049,8 +3045,7 @@ DO_VCMLA(vcmla270s, 4, float32, 3, DO_VCMLAS)
if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) { \
continue; \
} \
- fpst = (ESIZE == 2) ? &env->vfp.fp_status[FPST_STD_F16] : \
- &env->vfp.fp_status[FPST_STD]; \
+ fpst = &env->vfp.fp_status[ESIZE == 2 ? FPST_STD_F16 : FPST_STD]; \
if (!(mask & 1)) { \
/* We need the result but without updating flags */ \
scratch_fpst = *fpst; \
@@ -3084,8 +3079,7 @@ DO_2OP_FP_SCALAR_ALL(vfmul_scalar, mul)
if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) { \
continue; \
} \
- fpst = (ESIZE == 2) ? &env->vfp.fp_status[FPST_STD_F16] : \
- &env->vfp.fp_status[FPST_STD]; \
+ fpst = &env->vfp.fp_status[ESIZE == 2 ? FPST_STD_F16 : FPST_STD]; \
if (!(mask & 1)) { \
/* We need the result but without updating flags */ \
scratch_fpst = *fpst; \
@@ -3116,9 +3110,8 @@ DO_2OP_FP_ACC_SCALAR(vfmas_scalars, 4, float32,
DO_VFMAS_SCALARS)
unsigned e; \
TYPE *m = vm; \
TYPE ra = (TYPE)ra_in; \
- float_status *fpst = (ESIZE == 2) ? \
- &env->vfp.fp_status[FPST_STD_F16] : \
- &env->vfp.fp_status[FPST_STD]; \
+ float_status *fpst = \
+ &env->vfp.fp_status[ESIZE == 2 ? FPST_STD_F16 : FPST_STD]; \
for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) { \
if (mask & 1) { \
TYPE v = m[H##ESIZE(e)]; \
@@ -3168,8 +3161,7 @@ DO_FP_VMAXMINV(vminnmavs, 4, float32, true,
float32_minnum)
if ((mask & emask) == 0) { \
continue; \
} \
- fpst = (ESIZE == 2) ? &env->vfp.fp_status[FPST_STD_F16] : \
- &env->vfp.fp_status[FPST_STD]; \
+ fpst = &env->vfp.fp_status[ESIZE == 2 ? FPST_STD_F16 : FPST_STD]; \
if (!(mask & (1 << (e * ESIZE)))) { \
/* We need the result but without updating flags */ \
scratch_fpst = *fpst; \
@@ -3202,8 +3194,7 @@ DO_FP_VMAXMINV(vminnmavs, 4, float32, true,
float32_minnum)
if ((mask & emask) == 0) { \
continue; \
} \
- fpst = (ESIZE == 2) ? &env->vfp.fp_status[FPST_STD_F16] : \
- &env->vfp.fp_status[FPST_STD]; \
+ fpst = &env->vfp.fp_status[ESIZE == 2 ? FPST_STD_F16 : FPST_STD]; \
if (!(mask & (1 << (e * ESIZE)))) { \
/* We need the result but without updating flags */ \
scratch_fpst = *fpst; \
@@ -3267,8 +3258,7 @@ DO_VCMP_FP_BOTH(vfcmples, vfcmple_scalars, 4, float32,
!DO_GT32)
if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) { \
continue; \
} \
- fpst = (ESIZE == 2) ? &env->vfp.fp_status[FPST_STD_F16] : \
- &env->vfp.fp_status[FPST_STD]; \
+ fpst = &env->vfp.fp_status[ESIZE == 2 ? FPST_STD_F16 : FPST_STD]; \
if (!(mask & 1)) { \
/* We need the result but without updating flags */ \
scratch_fpst = *fpst; \
@@ -3300,9 +3290,8 @@ DO_VCVT_FIXED(vcvt_fu, 4, uint32_t,
helper_vfp_touls_round_to_zero)
unsigned e; \
float_status *fpst; \
float_status scratch_fpst; \
- float_status *base_fpst = (ESIZE == 2) ? \
- &env->vfp.fp_status[FPST_STD_F16] : \
- &env->vfp.fp_status[FPST_STD]; \
+ float_status *base_fpst = \
+ &env->vfp.fp_status[ESIZE == 2 ? FPST_STD_F16 : FPST_STD]; \
uint32_t prev_rmode = get_float_rounding_mode(base_fpst); \
set_float_rounding_mode(rmode, base_fpst); \
for (e = 0; e < 16 / ESIZE; e++, mask >>= ESIZE) { \
@@ -3427,8 +3416,7 @@ void HELPER(mve_vcvtt_hs)(CPUARMState *env, void *vd,
void *vm)
if ((mask & MAKE_64BIT_MASK(0, ESIZE)) == 0) { \
continue; \
} \
- fpst = (ESIZE == 2) ? &env->vfp.fp_status[FPST_STD_F16] : \
- &env->vfp.fp_status[FPST_STD]; \
+ fpst = &env->vfp.fp_status[ESIZE == 2 ? FPST_STD_F16 : FPST_STD]; \
if (!(mask & 1)) { \
/* We need the result but without updating flags */ \
scratch_fpst = *fpst; \
--
2.34.1
- [PATCH v2 49/69] target/arm: Handle FPCR.AH in FMLSL (by element and vector), (continued)
- [PATCH v2 49/69] target/arm: Handle FPCR.AH in FMLSL (by element and vector), Peter Maydell, 2025/02/01
- [PATCH v2 52/69] target/arm: Enable FEAT_AFP for '-cpu max', Peter Maydell, 2025/02/01
- [PATCH v2 50/69] target/arm: Handle FPCR.AH in SVE FMLSL (indexed), Peter Maydell, 2025/02/01
- [PATCH v2 54/69] target/arm: Implement increased precision FRECPE, Peter Maydell, 2025/02/01
- [PATCH v2 53/69] target/arm: Plumb FEAT_RPRES frecpe and frsqrte through to new helper, Peter Maydell, 2025/02/01
- [PATCH v2 51/69] target/arm: Handle FPCR.AH in SVE FMLSLB, FMLSLT (vectors), Peter Maydell, 2025/02/01
- [PATCH v2 59/69] target/arm: Remove standard_fp_status, Peter Maydell, 2025/02/01
- [PATCH v2 60/69] target/arm: Remove ah_fp_status_f16, Peter Maydell, 2025/02/01
- [PATCH v2 61/69] target/arm: Remove ah_fp_status, Peter Maydell, 2025/02/01
- [PATCH v2 62/69] target/arm: Remove fp_status_f16_a64, Peter Maydell, 2025/02/01
- [PATCH v2 66/69] target/arm: Simplify fp_status indexing in mve_helper.c,
Peter Maydell <=
- [PATCH v2 63/69] target/arm: Remove fp_status_f16_a32, Peter Maydell, 2025/02/01
- [PATCH v2 55/69] target/arm: Implement increased precision FRSQRTE, Peter Maydell, 2025/02/01
- [PATCH v2 56/69] target/arm: Enable FEAT_RPRES for -cpu max, Peter Maydell, 2025/02/01
- [PATCH v2 57/69] target/arm: Introduce CPUARMState.vfp.fp_status[], Peter Maydell, 2025/02/01
- [PATCH v2 68/69] target/arm: Read fz16 from env->vfp.fpcr, Peter Maydell, 2025/02/01
- [PATCH v2 69/69] target/arm: Sink fp_status and fpcr access into do_fmlal*, Peter Maydell, 2025/02/01
- [PATCH v2 58/69] target/arm: Remove standard_fp_status_f16, Peter Maydell, 2025/02/01
- [PATCH v2 64/69] target/arm: Remove fp_status_a64, Peter Maydell, 2025/02/01
- [PATCH v2 67/69] target/arm: Simplify DO_VFP_cmp in vfp_helper.c, Peter Maydell, 2025/02/01
- [PATCH v2 65/69] target/arm: Remove fp_status_a32, Peter Maydell, 2025/02/01