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Re: [PATCH v1 1/1] aspeed/soc: Support Non-maskable Interrupt for AST270


From: Cédric Le Goater
Subject: Re: [PATCH v1 1/1] aspeed/soc: Support Non-maskable Interrupt for AST2700
Date: Wed, 5 Feb 2025 08:30:54 +0100
User-agent: Mozilla Thunderbird

On 2/4/25 07:09, Jamin Lin wrote:
QEMU supports GICv3 Non-maskable Interrupt, adds to support Non-maskable
Interrupt for AST2700.

Reference:
https://github.com/qemu/qemu/commit/b36a32ead

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>


Applied to aspeed-next.

Thanks,

C.


---
  hw/arm/aspeed_ast27x0.c | 4 ++++
  1 file changed, 4 insertions(+)

diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index 4114e15ddd..361a054d46 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -470,6 +470,10 @@ static bool aspeed_soc_ast2700_gic_realize(DeviceState 
*dev, Error **errp)
                             qdev_get_gpio_in(cpudev, ARM_CPU_VIRQ));
          sysbus_connect_irq(gicbusdev, i + 3 * sc->num_cpus,
                             qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ));
+        sysbus_connect_irq(gicbusdev, i + 4 * sc->num_cpus,
+                           qdev_get_gpio_in(cpudev, ARM_CPU_NMI));
+        sysbus_connect_irq(gicbusdev, i + 5 * sc->num_cpus,
+                           qdev_get_gpio_in(cpudev, ARM_CPU_VINMI));
      }
return true;




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