On Thu, Feb 13, 2025 at 11:14:03AM +0100, Alexander Graf wrote:
I don't think so. The firmware driver knows this actually is normal ram
and can setup mappings and memory attributes accordingly. The situation
is a bit different from vga memory bars which are handled by pci bus
management which doesn't know anything about virtualization specifics.
Well, unless macos thinks it knows everything better and goes setup
uncached mappings ...
It's not only macOS. After SetVirtualAddressMap, the OS owns the virtual
address space of Runtime Services. So in theory it also owns cacheability
attributes of all mappings.
Hmm. Played around with the device memory approach a bit today. Looks
workable for both arm/sysbus and x86/isa. Problem is, if that does
leave any unsolved corner cases on the table it doesn't buy us much, and
the arm caching issues start to make me a bit nervous ...
So, maybe allowing pio data transfers is the better approach after all.
How do your patches pick the transfer mode? Is that dictated by the
host? Or is the guest free to choose? In case of the latter: How does
the guest decide what to do?