[Qemu-commits] [qemu/qemu] 5a558b: hw/arm/mps2-tz.c: fix RX/TX interrupts order

[Richard Henderson]

  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 5a558be93ad628e5bed6e0ee062870f49251725c
      
https://github.com/qemu/qemu/commit/5a558be93ad628e5bed6e0ee062870f49251725c
  Author: Marco Palumbi <Marco.Palumbi@tii.ae>
  Date:   2024-08-01 (Thu, 01 Aug 2024)

  Changed paths:
    M hw/arm/mps2-tz.c

  Log Message:
  -----------
  hw/arm/mps2-tz.c: fix RX/TX interrupts order

The order of the RX and TX interrupts are swapped.
This commit fixes the order as per the following documents:
 * https://developer.arm.com/documentation/dai0505/latest/
 * https://developer.arm.com/documentation/dai0521/latest/
 * https://developer.arm.com/documentation/dai0524/latest/
 * https://developer.arm.com/documentation/dai0547/latest/

Cc: qemu-stable@nongnu.org
Signed-off-by: Marco Palumbi <Marco.Palumbi@tii.ae>
Message-id: 20240730073123.72992-1-marco@palumbi.it
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 036144cff27ef2f97de7ffc0c1150f3779b94d58
      
https://github.com/qemu/qemu/commit/036144cff27ef2f97de7ffc0c1150f3779b94d58
  Author: Salil Mehta <salil.mehta@huawei.com>
  Date:   2024-08-01 (Thu, 01 Aug 2024)

  Changed paths:
    M accel/kvm/kvm-all.c

  Log Message:
  -----------
  accel/kvm/kvm-all: Fixes the missing break in vCPU unpark logic

Loop should exit prematurely on successfully finding out the parked vCPU (struct
KVMParkedVcpu) in the 'struct KVMState' maintained 'kvm_parked_vcpus' list of
parked vCPUs.

Fixes: Coverity CID 1558552
Fixes: 08c3286822 ("accel/kvm: Extract common KVM vCPU {creation,parking} code")
Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Gavin Shan <gshan@redhat.com>
Reviewed-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-id: 20240725145132.99355-1-salil.mehta@huawei.com
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Message-ID: <CAFEAcA-3_d1c7XSXWkFubD-LsW5c5i95e6xxV09r2C9yGtzcdA@mail.gmail.com>
Signed-off-by: Salil Mehta <salil.mehta@huawei.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 55f9f4ee018c5ccea81d8c8c586756d7711ae46f
      
https://github.com/qemu/qemu/commit/55f9f4ee018c5ccea81d8c8c586756d7711ae46f
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2024-08-01 (Thu, 01 Aug 2024)

  Changed paths:
    M target/arm/tcg/helper-sme.h
    M target/arm/tcg/sme_helper.c
    M target/arm/tcg/translate-sme.c

  Log Message:
  -----------
  target/arm: Handle denormals correctly for FMOPA (widening)

The FMOPA (widening) SME instruction takes pairs of half-precision
floating point values, widens them to single-precision, does a
two-way dot product and accumulates the results into a
single-precision destination.  We don't quite correctly handle the
FPCR bits FZ and FZ16 which control flushing of denormal inputs and
outputs.  This is because at the moment we pass a single float_status
value to the helper function, which then uses that configuration for
all the fp operations it does.  However, because the inputs to this
operation are float16 and the outputs are float32 we need to use the
fp_status_f16 for the float16 input widening but the normal fp_status
for everything else.  Otherwise we will apply the flushing control
FPCR.FZ16 to the 32-bit output rather than the FPCR.FZ control, and
incorrectly flush a denormal output to zero when we should not (or
vice-versa).

(In commit 207d30b5fdb5b we tried to fix the FZ handling but
didn't get it right, switching from "use FPCR.FZ for everything" to
"use FPCR.FZ16 for everything".)

Pass the CPU env to the sme_fmopa_h helper instead of an fp_status
pointer, and have the helper pass an extra fp_status into the
f16_dotadd() function so that we can use the right status for the
right parts of this operation.

Cc: qemu-stable@nongnu.org
Fixes: 207d30b5fdb5 ("target/arm: Use FPST_F16 for SME FMOPA (widening)")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2373
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5e8e4f098d872818aa9a138a171200068b81c8d1
      
https://github.com/qemu/qemu/commit/5e8e4f098d872818aa9a138a171200068b81c8d1
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2024-08-01 (Thu, 01 Aug 2024)

  Changed paths:
    M target/xtensa/exc_helper.c

  Log Message:
  -----------
  target/xtensa: Correct assert condition in handle_interrupt()

In commit ad18376b90c8101 we added an assert that the level value was
in-bounds for the array we're about to index into.  However, the
assert condition is wrong -- env->config->interrupt_vector is an
array of uint32_t, so we should bounds check the index against
ARRAY_SIZE(...), not against sizeof().

Resolves: Coverity CID 1507131
Fixes: ad18376b90c8101 ("target/xtensa: Assert that interrupt level is within 
bounds")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240731172246.3682311-1-peter.maydell@linaro.org


  Commit: 31669121a01a14732f57c49400bc239cf9fd505f
      
https://github.com/qemu/qemu/commit/31669121a01a14732f57c49400bc239cf9fd505f
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-08-02 (Fri, 02 Aug 2024)

  Changed paths:
    M accel/kvm/kvm-all.c
    M hw/arm/mps2-tz.c
    M target/arm/tcg/helper-sme.h
    M target/arm/tcg/sme_helper.c
    M target/arm/tcg/translate-sme.c
    M target/xtensa/exc_helper.c

  Log Message:
  -----------
  Merge tag 'pull-target-arm-20240801' of 
https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * hw/arm/mps2-tz.c: fix RX/TX interrupts order
 * accel/kvm/kvm-all: Fixes the missing break in vCPU unpark logic
 * target/arm: Handle denormals correctly for FMOPA (widening)
 * target/xtensa: Correct assert condition in handle_interrupt()

# -----BEGIN PGP SIGNATURE-----
#
# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmarmisZHHBldGVyLm1h
# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3uw4D/sGvG3uo4mncEm1DmXugj8E
# yUcnHsc6fTSP9gm0v65DmUY59+kDM9R+17STOFOhP1c851tEbv7HXQBAqI+fNoME
# 22yNxhKasWqPNOjy0XGakBDDTmMQpGUE1JcdUYc+pA9XMy+IxxkkfheedOmZ+OZ1
# r8vqzm9a2+vJLo1q00XlVrUajclXOduaRl9wKijRVcgAVtLbsdWuF3LCp6swt17O
# Zw1xARKz9nWnOQzZBWTo0VfDf53z5isaUZFNTA6XJUliBd7yxOEHHf5XM1t92Uw0
# Lilk7NWlvdpEh3EcCPdUd4UuZA+NhyK6IlZALSbWkf3BXImxslMWGVrxiWR/Zjoh
# YJzBbvtM+hP/gP+X6EzfQh/ycPoygrc9l2IwqhaIQ7ZwkukkCNs/HlcSc1JOWfLd
# ZmM7oybKRyDQ4pnc3YyqT597+sRJSUBFzss6Qy3SKqPMlhB4V+cPTV/QHV5O4xjo
# fdip3NVSSffcyiGZmwtTn0biWWUKqUubew8400gj3opbG8DGc2SyYB2vTQlEhJlp
# jm6AoA5tRdBxlLtNoG4VmZ5XlKCchoXiewImndDHHdSPPiKK9m99+JeqGegdDfLU
# 4jxv5LmMyb1MdM961yq3A4cKN0RKUwFpnrqc3DLGRu9eHBOlmfyG5vWNQafKf24r
# 4ZVUpCes0Y0rbsgbWq64+w==
# =fh2k
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 02 Aug 2024 12:22:35 AM AEST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" 
[full]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [unknown]

* tag 'pull-target-arm-20240801' of 
https://git.linaro.org/people/pmaydell/qemu-arm:
  target/xtensa: Correct assert condition in handle_interrupt()
  target/arm: Handle denormals correctly for FMOPA (widening)
  accel/kvm/kvm-all: Fixes the missing break in vCPU unpark logic
  hw/arm/mps2-tz.c: fix RX/TX interrupts order

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/5e25c93ccb8d...31669121a01a

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