[Qemu-commits] [qemu/qemu] 614606: Hexagon: fix F2_conv_* instructions for negative zero

[Richard Henderson]

  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 6146060a6891848f854b0ed1e46e020a6fdc77c2
      
https://github.com/qemu/qemu/commit/6146060a6891848f854b0ed1e46e020a6fdc77c2
  Author: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M target/hexagon/op_helper.c
    M tests/tcg/hexagon/usr.c

  Log Message:
  -----------
  Hexagon: fix F2_conv_* instructions for negative zero

The implementation for these instructions handles -0 as an invalid float
point value, whereas the Hexagon hardware considers it the same as +0
(which is valid). Let's fix that and add a regression test.

Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>


  Commit: 523e45ac5b881237bd03934751d44767e5716620
      
https://github.com/qemu/qemu/commit/523e45ac5b881237bd03934751d44767e5716620
  Author: Taylor Simpson <ltaylorsimpson@gmail.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M gdb-xml/hexagon-core.xml
    M target/hexagon/gdbstub.c

  Log Message:
  -----------
  Hexagon: lldb read/write predicate registers p0/p1/p2/p3

hexagon-core.xml only exposes register p3_0 which is an alias that
aggregates the predicate registers.  It is more convenient for users
to interact directly with the predicate registers.

Tested with lldb downloaded from this location
https://github.com/llvm/llvm-project/releases/download/llvmorg-18.1.4/clang+llvm-18.1.4-x86_64-linux-gnu-ubuntu-18.04.tar.xz

BEFORE:
(lldb) reg read p3_0
    p3_0 = 0x00000000
(lldb) reg read p0
error: Invalid register name 'p0'.
(lldb) reg write p1 0xf
error: Register not found for 'p1'.

AFTER:
(lldb) reg read p3_0
    p3_0 = 0x00000000
(lldb) reg read p0
      p0 = 0x00
(lldb) reg read -s 1
Predicate Registers:
        p0 = 0x00
        p1 = 0x00
        p2 = 0x00
        p3 = 0x00

(lldb) reg write p1 0xf
(lldb) reg read p3_0
    p3_0 = 0x00000f00
(lldb) reg write p3_0 0xff00ff00
(lldb) reg read -s 1
Predicate Registers:
        p0 = 0x00
        p1 = 0xff
        p2 = 0x00
        p3 = 0xff

Signed-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Reviewed-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Message-Id: <20240613182209.140082-1-ltaylorsimpson@gmail.com>
Signed-off-by: Brian Cain <bcain@quicinc.com>


  Commit: f51e30ff353c5c16ce9d68fe4072a89e7b19b454
      
https://github.com/qemu/qemu/commit/f51e30ff353c5c16ce9d68fe4072a89e7b19b454
  Author: Anton Johansson <anjo@rev.ng>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M target/hexagon/idef-parser/idef-parser.y

  Log Message:
  -----------
  target/hexagon/idef-parser: Remove self-assignment

The self assignment is clearly useless, and @1.last_column does not have
to be set for an expression with only a single token, so remove it.

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Anton Johansson <anjo@rev.ng>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230713120853.27023-1-anjo@rev.ng>
Signed-off-by: Brian Cain <bcain@quicinc.com>


  Commit: 2442cc6eeb8917ded564c8a71d903becaf4348cf
      
https://github.com/qemu/qemu/commit/2442cc6eeb8917ded564c8a71d903becaf4348cf
  Author: Brian Cain <bcain@quicinc.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M MAINTAINERS

  Log Message:
  -----------
  MAINTAINERS: Add my hexagon git tree

Add my git tree for hexagon.  Note that the branch is "hex-next" and not
"hex.next" as had been used previously.  But I'll keep the "hex.next" branch
in sync with "hex-next" until this commit lands to avoid confusion.

Signed-off-by: Brian Cain <bcain@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>


  Commit: 48ac9e885e47b12a7cbea5e093e3f2d0bff724f7
      
https://github.com/qemu/qemu/commit/48ac9e885e47b12a7cbea5e093e3f2d0bff724f7
  Author: Brian Cain <bcain@quicinc.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M target/hexagon/cpu-qom.h
    M target/hexagon/cpu.c

  Log Message:
  -----------
  target/hexagon: define a v66 CPU

For now, v66 behavior is the same as other CPUs.

Signed-off-by: Brian Cain <bcain@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>


  Commit: 47f3361a3af9d709218038a23b8907525310d2c3
      
https://github.com/qemu/qemu/commit/47f3361a3af9d709218038a23b8907525310d2c3
  Author: Brian Cain <bcain@quicinc.com>
  Date:   2024-08-07 (Wed, 07 Aug 2024)

  Changed paths:
    M target/hexagon/cpu.c

  Log Message:
  -----------
  target/hexagon: switch to dc set_props() list

Define a hexagon_cpu_properties list to match the idiom used
by other targets.

Signed-off-by: Brian Cain <bcain@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>


  Commit: 75c7f574035622798e9361a942bdfbb0af930f0e
      
https://github.com/qemu/qemu/commit/75c7f574035622798e9361a942bdfbb0af930f0e
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2024-08-08 (Thu, 08 Aug 2024)

  Changed paths:
    M MAINTAINERS
    M gdb-xml/hexagon-core.xml
    M target/hexagon/cpu-qom.h
    M target/hexagon/cpu.c
    M target/hexagon/gdbstub.c
    M target/hexagon/idef-parser/idef-parser.y
    M target/hexagon/op_helper.c
    M tests/tcg/hexagon/usr.c

  Log Message:
  -----------
  Merge tag 'pull-hex-20240807' of https://github.com/quic/qemu into staging

Hexagon updates: lldb preds, v66 CPU, F2_conv* fix

# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCgAdFiEEPWaq5HRZSCTIjOD4GlSvuOVkbDIFAma0PggACgkQGlSvuOVk
# bDK5wxAAnFin9dlEeoy4N0HOhF4l3+t0P47w0JhceL0ZXpyOb+aLDoVBaXCPSvys
# MOHUbBqDgtGoAE4GxfLvsPvaAE3HnvCwRQQmscALHKLB2M3ntb9uIDhxoodi+ehY
# X8fJ3+EqlKqRdp2fhOMf1hEvRn9SN2fXZ9uF9FvP2rZimrZdYC2Wc4wc8gQH4mlz
# DOibUNbRhitndpAZJaSoCPwGcse//39EG9fwR8PAsGoQf6g6abmwtvuh3HFOrSLD
# jYqX9wNfbilbntD1Mhsn9mbP/62fmgO/HO92PvSaShWkA6lOrdRm5q3EbZQA7qgM
# 95brcDqInj7pC0bLJ1fb1HwHq2QPUuGX+zuMB9finTn/87hu6uR2yf790UAQILKE
# w93FzenC+OeHJ9YytfCJMbKjW/L7eAamx0qkd+qazD1+bNERF8zBkzVfJs1u4K4A
# EbSKlW3wtlXDDm78Oz6Rk+Oq8Hz4AC6N9XSS/zhV8lrzcfyrgIdaTrr2/jYHpinh
# vENT19WSZBMthEKcsZc959igMFvM4GXUfob+3GIx8WlT0dt59fQZ8zRbizzDlKzp
# uK+Lwyds+UjgCUaDwdy9YGB1WaF14imDo79yho7EDCkDDjskMASCZxGmDgB939US
# 0ZBIU7gqqXBpzuMNF8yyCgowD61oRBwf9eVUyqS6B6hscbikSpo=
# =mizO
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 08 Aug 2024 01:39:52 PM AEST
# gpg:                using RSA key 3D66AAE474594824C88CE0F81A54AFB8E5646C32
# gpg: Good signature from "Brian Cain (QUIC) <quic_bcain@quicinc.com>" 
[unknown]
# gpg:                 aka "Brian Cain <bcain@kernel.org>" [unknown]
# gpg:                 aka "Brian Cain (QuIC) <bcain@quicinc.com>" [unknown]
# gpg:                 aka "Brian Cain (CAF) <bcain@codeaurora.org>" [unknown]
# gpg:                 aka "bcain" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6350 20F9 67A7 7164 79EF  49E0 175C 464E 541B 6D47
#      Subkey fingerprint: 3D66 AAE4 7459 4824 C88C  E0F8 1A54 AFB8 E564 6C32

* tag 'pull-hex-20240807' of https://github.com/quic/qemu:
  target/hexagon: switch to dc set_props() list
  target/hexagon: define a v66 CPU
  MAINTAINERS: Add my hexagon git tree
  target/hexagon/idef-parser: Remove self-assignment
  Hexagon: lldb read/write predicate registers p0/p1/p2/p3
  Hexagon: fix F2_conv_* instructions for negative zero

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/4c395ac42e55...75c7f5740356

To unsubscribe from these emails, change your notification settings at 
https://github.com/qemu/qemu/settings/notifications