[Qemu-devel] [PATCH 41/48] target-arm: fix neon vld1 single element to all lanes

[Riku Voipio]

From: Juha Riihimäki <address@hidden>

Signed-Off-By: Riku Voipio <address@hidden>
Signed-off-by: Juha Riihimäki <address@hidden>
---
 target-arm/translate.c |   13 +++++++++++--
 1 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 964baf5..de2ea92 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -3798,7 +3798,11 @@ static int disas_neon_ls_insn(CPUState * env, 
DisasContext *s, uint32_t insn)
             }
             size = (insn >> 6) & 3;
             nregs = ((insn >> 8) & 3) + 1;
-            stride = (insn & (1 << 5)) ? 2 : 1;
+            if (nregs == 1) {
+                stride = 0;
+            } else {
+                stride = (insn & (1 << 5)) ? 2 : 1;
+            }
             load_reg_var(s, addr, rn);
             for (reg = 0; reg < nregs; reg++) {
                 switch (size) {
@@ -3819,7 +3823,12 @@ static int disas_neon_ls_insn(CPUState * env, 
DisasContext *s, uint32_t insn)
                 default: /* Avoid compiler warnings.  */
                     abort();
                 }
-                tcg_gen_addi_i32(addr, addr, 1 << size);
+                if (stride && reg < nregs - 1) {
+                    tcg_gen_addi_i32(addr, addr, 1 << size);
+                } else if (!stride) {
+                    tcg_gen_st_i32(tmp, cpu_env, neon_reg_offset(rd + 1, 0));
+                    tcg_gen_st_i32(tmp, cpu_env, neon_reg_offset(rd + 1, 1));
+                }
                 tmp2 = new_tmp();
                 tcg_gen_mov_i32(tmp2, tmp);
                 neon_store_reg(rd, 0, tmp2);
-- 
1.6.5