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Re: [Qemu-devel] [PATCH 23/23] hw/arm/virt: Add board property to enable
From: |
Andrew Jones |
Subject: |
Re: [Qemu-devel] [PATCH 23/23] hw/arm/virt: Add board property to enable EL2 |
Date: |
Wed, 28 Dec 2016 14:14:52 +0100 |
User-agent: |
Mutt/1.6.0.1 (2016-04-01) |
On Tue, Dec 13, 2016 at 10:36:24AM +0000, Peter Maydell wrote:
> Add a board level property to the virt board which will
> enable EL2 on the CPU if the user asks for it. The
> default is not to provide EL2. If EL2 is enabled then
> we will use SMC as our PSCI conduit, and report the
> virtualization support in the GICv3 device tree node.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> hw/arm/virt.c | 45 +++++++++++++++++++++++++++++++++++++++++++--
> 1 file changed, 43 insertions(+), 2 deletions(-)
>
Reviewed-by: Andrew Jones <address@hidden>
- [Qemu-devel] [PATCH 19/23] hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update(), (continued)
- [Qemu-devel] [PATCH 19/23] hw/intc/arm_gicv3: Implement gicv3_cpuif_virt_update(), Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 21/23] hw/arm/virt: Support using SMC for PSCI, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 13/23] hw/intc/gicv3: Add defines for ICH system register fields, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 16/23] hw/intc/arm_gicv3: Implement ICV_ registers which are just accessors, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 17/23] hw/intc/arm_gicv3: Implement ICV_ HPPIR, DIR and RPR registers, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 15/23] hw/intc/arm_gicv3: Add accessors for ICH_ system registers, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 08/23] hw/intc/arm_gicv3: Add external IRQ lines for VIRQ and VFIQ, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 23/23] hw/arm/virt: Add board property to enable EL2, Peter Maydell, 2016/12/13
- Re: [Qemu-devel] [PATCH 23/23] hw/arm/virt: Add board property to enable EL2,
Andrew Jones <=
- [Qemu-devel] [PATCH 11/23] hw/arm/virt: Wire VIRQ, VFIQ, maintenance irq lines from GIC to CPU, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 10/23] target-arm: Expose output GPIO line for VCPU maintenance interrupt, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 07/23] hw/arm/virt: Don't incorrectly claim architectural timer to be edge-triggered, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 04/23] hw/arm/virt: add 2.9 machine type, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 02/23] hw/intc/arm_gicv3: Remove incorrect usage of fieldoffset, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 09/23] hw/intc/arm_gic: Add external IRQ lines for VIRQ and VFIQ, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 05/23] hw/arm/virt: Merge VirtBoardInfo and VirtMachineState, Peter Maydell, 2016/12/13
- [Qemu-devel] [PATCH 03/23] hw/intc/arm_gicv3: Don't signal Pending+Active interrupts to CPU, Peter Maydell, 2016/12/13