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Re: [Qemu-devel] [PATCH v4] sd: sdhci: mask transfer mode register value
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PATCH v4] sd: sdhci: mask transfer mode register value |
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Date: |
Tue, 14 Feb 2017 10:12:50 +0000 |
On 14 February 2017 at 06:22, P J P <address@hidden> wrote:
> From: Prasad J Pandit <address@hidden>
>
> In SDHCI protocol, the transfer mode register is defined
> to be of 6 bits. Mask its value with '0x0037' so that an
> invalid value could not be assigned.
>
> Signed-off-by: Prasad J Pandit <address@hidden>
What has happened to the other patches that were in this
patchset in v3 ?
thanks
-- PMM