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[Qemu-devel] [PULL 33/43] pc: move pcms->possible_cpus init out of pc_cp
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 33/43] pc: move pcms->possible_cpus init out of pc_cpus_init() |
Date: |
Wed, 22 Feb 2017 17:33:38 +1100 |
From: Igor Mammedov <address@hidden>
possible_cpus could be initialized earlier then cpu objects,
i.e. when -smp is parsed so move init code to possible_cpu_arch_ids()
interface func and do initialization on the first call.
it should help later with making -numa cpu/-smp parsing a machine state
properties.
Signed-off-by: Igor Mammedov <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/i386/pc.c | 35 ++++++++++++++++++++++++-----------
1 file changed, 24 insertions(+), 11 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 04c6e59..a187748 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1144,7 +1144,9 @@ void pc_cpus_init(PCMachineState *pcms)
ObjectClass *oc;
const char *typename;
gchar **model_pieces;
+ const CPUArchIdList *possible_cpus;
MachineState *machine = MACHINE(pcms);
+ MachineClass *mc = MACHINE_GET_CLASS(pcms);
/* init CPUs */
if (machine->cpu_model == NULL) {
@@ -1179,14 +1181,9 @@ void pc_cpus_init(PCMachineState *pcms)
* This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().
*/
pcms->apic_id_limit = x86_cpu_apic_id_from_index(max_cpus - 1) + 1;
- machine->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
- sizeof(CPUArchId) * max_cpus);
- for (i = 0; i < max_cpus; i++) {
- machine->possible_cpus->cpus[i].arch_id =
x86_cpu_apic_id_from_index(i);
- machine->possible_cpus->len++;
- if (i < smp_cpus) {
- pc_new_cpu(typename, x86_cpu_apic_id_from_index(i), &error_fatal);
- }
+ possible_cpus = mc->possible_cpu_arch_ids(machine);
+ for (i = 0; i < smp_cpus; i++) {
+ pc_new_cpu(typename, possible_cpus->cpus[i].arch_id, &error_fatal);
}
}
@@ -2254,10 +2251,26 @@ static unsigned pc_cpu_index_to_socket_id(unsigned
cpu_index)
return topo.pkg_id;
}
-static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *machine)
+static const CPUArchIdList *pc_possible_cpu_arch_ids(MachineState *ms)
{
- assert(machine->possible_cpus);
- return machine->possible_cpus;
+ int i;
+
+ if (ms->possible_cpus) {
+ /*
+ * make sure that max_cpus hasn't changed since the first use, i.e.
+ * -smp hasn't been parsed after it
+ */
+ assert(ms->possible_cpus->len == max_cpus);
+ return ms->possible_cpus;
+ }
+
+ ms->possible_cpus = g_malloc0(sizeof(CPUArchIdList) +
+ sizeof(CPUArchId) * max_cpus);
+ ms->possible_cpus->len = max_cpus;
+ for (i = 0; i < ms->possible_cpus->len; i++) {
+ ms->possible_cpus->cpus[i].arch_id = x86_cpu_apic_id_from_index(i);
+ }
+ return ms->possible_cpus;
}
static HotpluggableCPUList *pc_query_hotpluggable_cpus(MachineState *machine)
--
2.9.3
- [Qemu-devel] [PULL 08/43] hw/ppc/pnv: Remove superfluous "qemu" prefix from error strings, (continued)
- [Qemu-devel] [PULL 08/43] hw/ppc/pnv: Remove superfluous "qemu" prefix from error strings, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 17/43] target-ppc: add wait instruction, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 14/43] target-ppc: generate exception for copy/paste, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 04/43] ppc: implement xsrqpi[x] instruction, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 12/43] target-ppc: implement load atomic instruction, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 05/43] ppc: implement xsrqpxp instruction, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 02/43] spapr: move spapr_core_[foo]plug() callbacks close to machine code in spapr.c, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 07/43] ppc: implement xssubqp instruction, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 06/43] ppc: implement xssqrtqp instruction, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 11/43] spapr: fix off-by-one error in spapr_ovec_populate_dt(), David Gibson, 2017/02/22
- [Qemu-devel] [PULL 33/43] pc: move pcms->possible_cpus init out of pc_cpus_init(),
David Gibson <=
- [Qemu-devel] [PULL 24/43] softfloat: Add float128_to_uint32_round_to_zero(), David Gibson, 2017/02/22
- [Qemu-devel] [PULL 36/43] change CPUArchId.cpu type to Object*, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 13/43] target-ppc: implement store atomic instruction, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 26/43] target-ppc: Add xscvqpudz and xscvqpuwz instructions, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 15/43] target-ppc: add slbieg instruction, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 28/43] target/ppc/POWER9: Add ISAv3.00 MMU definition, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 23/43] softfloat: Add float128_to_uint64_round_to_zero(), David Gibson, 2017/02/22
- [Qemu-devel] [PULL 22/43] softfloat: Add round-to-odd rounding mode, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 20/43] ppc4xx: replace debug printf with trace points, David Gibson, 2017/02/22
- [Qemu-devel] [PULL 19/43] mac99: replace debug printf with trace points, David Gibson, 2017/02/22