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[Qemu-devel] [PATCH v2 07/11] target/ppc: use tcg ops for neg instructio
From: |
Nikunj A Dadhania |
Subject: |
[Qemu-devel] [PATCH v2 07/11] target/ppc: use tcg ops for neg instruction |
Date: |
Wed, 22 Feb 2017 14:59:44 +0530 |
Signed-off-by: Nikunj A Dadhania <address@hidden>
---
target/ppc/translate.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 74185ba..eecdfe9 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -1483,7 +1483,10 @@ static inline void gen_op_arith_neg(DisasContext *ctx,
bool compute_ov)
static void gen_neg(DisasContext *ctx)
{
- gen_op_arith_neg(ctx, 0);
+ tcg_gen_neg_tl(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rA(ctx->opcode)]);
+ if (unlikely(Rc(ctx->opcode))) {
+ gen_set_Rc0(ctx, cpu_gpr[rD(ctx->opcode)]);
+ }
}
static void gen_nego(DisasContext *ctx)
--
2.7.4
- Re: [Qemu-devel] [PATCH v2 01/11] target/ppc: move cpu_[read, write]_xer to cpu.c, (continued)
- [Qemu-devel] [PATCH v2 03/11] target/ppc: support for 32-bit carry and overflow, Nikunj A Dadhania, 2017/02/22
- [Qemu-devel] [PATCH v2 04/11] target/ppc: update ca32 in arithmetic add, Nikunj A Dadhania, 2017/02/22
- [Qemu-devel] [PATCH v2 05/11] target/ppc: update ca32 in arithmetic substract, Nikunj A Dadhania, 2017/02/22
- [Qemu-devel] [PATCH v2 07/11] target/ppc: use tcg ops for neg instruction,
Nikunj A Dadhania <=
- [Qemu-devel] [PATCH v2 02/11] target/ppc: optimize gen_write_xer(), Nikunj A Dadhania, 2017/02/22
- [Qemu-devel] [PATCH v2 06/11] target/ppc: update overflow flags for add/sub, Nikunj A Dadhania, 2017/02/22
- [Qemu-devel] [PATCH v2 08/11] target/ppc: update ov/ov32 for nego, Nikunj A Dadhania, 2017/02/22