[Qemu-devel] [PATCH v4 11/15] target/ppc: update OV/OV32 for mull[d, w] insns

[Nikunj A Dadhania]

For Multiply Word:
SO, OV, and OV32 bits reflects overflow of the 32-bit result

For Multiply DoubleWord:
SO, OV, and OV32 bits reflects overflow of the 64-bit result

Signed-off-by: Nikunj A Dadhania <address@hidden>
---
 target/ppc/translate.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index ea0a356..e1105e8 100644
--- a/target/ppc/translate.c
+++ b/target/ppc/translate.c
@@ -1365,7 +1365,7 @@ static void gen_mullwo(DisasContext *ctx)
     tcg_gen_sari_i32(t0, t0, 31);
     tcg_gen_setcond_i32(TCG_COND_NE, t0, t0, t1);
     tcg_gen_extu_i32_tl(ov, t0);
-    gen_op_update_ov_legacy(ov);
+    gen_op_update_ov(ctx, ov, ov);
     tcg_temp_free(ov);
 
     tcg_temp_free_i32(t0);
@@ -1428,7 +1428,7 @@ static void gen_mulldo(DisasContext *ctx)
 
     tcg_gen_sari_i64(t0, t0, 63);
     tcg_gen_setcond_i64(TCG_COND_NE, ov, t0, t1);
-    gen_op_update_ov_legacy(ov);
+    gen_op_update_ov(ctx, ov, ov);
     tcg_temp_free(ov);
 
     tcg_temp_free_i64(t0);
-- 
2.7.4