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Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree
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Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree |
Date: |
Wed, 27 Feb 2019 13:33:28 -0800 (PST) |
Patchew URL: https://patchew.org/QEMU/address@hidden/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
t [tag update] patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
7692ab0351 target/riscv: Remaining rvc insn reuse 32 bit translators
6f4cc4e269 target/riscv: Splice remaining compressed insn pairs for riscv32 vs
riscv64
8f1ab68947 target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
4b4347bfc3 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
58571f5a45 target/riscv: Convert @cs_2 insns to share translation functions
f5ce37eb3f target/riscv: Remove decode_RV32_64G()
ac20d18ca3 target/riscv: Remove gen_system()
69640cace7 target/riscv: Rename trans_arith to gen_arith
8958d96778 target/riscv: Remove manual decoding of RV32/64M insn
1b24c49640 target/riscv: Remove shift and slt insn manual decoding
fe39d1e690 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
643e94e33a target/riscv: Move gen_arith_imm() decoding into trans_* functions
b752855cca target/riscv: Remove manual decoding from gen_store()
8385908b09 target/riscv: Remove manual decoding from gen_load()
128aa73a84 target/riscv: Remove manual decoding from gen_branch()
28cfb5416c target/riscv: Remove gen_jalr()
26803d3402 target/riscv: Convert quadrant 2 of RVXC insns to decodetree
4fc0aab391 target/riscv: Convert quadrant 1 of RVXC insns to decodetree
57609e2bd5 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
ab2dfaf8cb target/riscv: Convert RV priv insns to decodetree
0fc0413abb target/riscv: Convert RV64D insns to decodetree
e1047cd9e8 target/riscv: Convert RV32D insns to decodetree
83a7091035 target/riscv: Convert RV64F insns to decodetree
acf9a69cae target/riscv: Convert RV32F insns to decodetree
cc15e79a60 target/riscv: Convert RV64A insns to decodetree
227b936e28 target/riscv: Convert RV32A insns to decodetree
6f4a70e32b target/riscv: Convert RVXM insns to decodetree
310acadeb9 target/riscv: Convert RVXI csr insns to decodetree
e1c5f910b7 target/riscv: Convert RVXI fence insns to decodetree
37277bdcfe target/riscv: Convert RVXI arithmetic insns to decodetree
8150475e72 target/riscv: Convert RV64I load/store insns to decodetree
efbd813cb7 target/riscv: Convert RV32I load/store insns to decodetree
dcd54e1ccd target/riscv: Convert RVXI branch insns to decodetree
1cb2803474 target/riscv: Activate decodetree and implemnt LUI & AUIPC
=== OUTPUT BEGIN ===
1/34 Checking commit 1cb280347411 (target/riscv: Activate decodetree and
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34:
new file mode 100644
ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1884:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);
total: 1 errors, 1 warnings, 125 lines checked
Patch 1/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
2/34 Checking commit dcd54e1ccd9b (target/riscv: Convert RVXI branch insns to
decodetree)
3/34 Checking commit efbd813cb73f (target/riscv: Convert RV32I load/store insns
to decodetree)
4/34 Checking commit 8150475e72cf (target/riscv: Convert RV64I load/store insns
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39:
new file mode 100644
total: 0 errors, 1 warnings, 76 lines checked
Patch 4/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
5/34 Checking commit 37277bdcfe46 (target/riscv: Convert RVXI arithmetic insns
to decodetree)
6/34 Checking commit e1c5f910b74e (target/riscv: Convert RVXI fence insns to
decodetree)
7/34 Checking commit 310acadeb98c (target/riscv: Convert RVXI csr insns to
decodetree)
8/34 Checking commit 6f4a70e32b1a (target/riscv: Convert RVXM insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48:
new file mode 100644
total: 0 errors, 1 warnings, 169 lines checked
Patch 8/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
9/34 Checking commit 227b936e28bd (target/riscv: Convert RV32A insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54:
new file mode 100644
total: 0 errors, 1 warnings, 199 lines checked
Patch 9/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/34 Checking commit cc15e79a6056 (target/riscv: Convert RV64A insns to
decodetree)
11/34 Checking commit acf9a69cae1a (target/riscv: Convert RV32F insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78:
new file mode 100644
total: 0 errors, 1 warnings, 442 lines checked
Patch 11/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
12/34 Checking commit 83a709103546 (target/riscv: Convert RV64F insns to
decodetree)
13/34 Checking commit e1047cd9e881 (target/riscv: Convert RV32D insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51:
new file mode 100644
total: 0 errors, 1 warnings, 398 lines checked
Patch 13/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
14/34 Checking commit 0fc0413abb21 (target/riscv: Convert RV64D insns to
decodetree)
15/34 Checking commit ab2dfaf8cbf5 (target/riscv: Convert RV priv insns to
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41:
new file mode 100644
total: 0 errors, 1 warnings, 214 lines checked
Patch 15/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
16/34 Checking commit 57609e2bd519 (target/riscv: Convert quadrant 0 of RVXC
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31:
new file mode 100644
ERROR: externs should be avoided in .c files
#251: FILE: target/riscv/translate.c:1072:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);
total: 1 errors, 1 warnings, 231 lines checked
Patch 16/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/34 Checking commit 4fc0aab391a2 (target/riscv: Convert quadrant 1 of RVXC
insns to decodetree)
18/34 Checking commit 26803d3402c8 (target/riscv: Convert quadrant 2 of RVXC
insns to decodetree)
19/34 Checking commit 28cfb5416cb0 (target/riscv: Remove gen_jalr())
20/34 Checking commit 128aa73a84e4 (target/riscv: Remove manual decoding from
gen_branch())
21/34 Checking commit 8385908b090c (target/riscv: Remove manual decoding from
gen_load())
22/34 Checking commit b752855cca08 (target/riscv: Remove manual decoding from
gen_store())
23/34 Checking commit 643e94e33ada (target/riscv: Move gen_arith_imm() decoding
into trans_* functions)
24/34 Checking commit fe39d1e69089 (target/riscv: make ADD/SUB/OR/XOR/AND insn
use arg lists)
25/34 Checking commit 1b24c496403c (target/riscv: Remove shift and slt insn
manual decoding)
26/34 Checking commit 8958d9677874 (target/riscv: Remove manual decoding of
RV32/64M insn)
27/34 Checking commit 69640cace762 (target/riscv: Rename trans_arith to
gen_arith)
28/34 Checking commit ac20d18ca34d (target/riscv: Remove gen_system())
29/34 Checking commit f5ce37eb3f79 (target/riscv: Remove decode_RV32_64G())
30/34 Checking commit 58571f5a453b (target/riscv: Convert @cs_2 insns to share
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42:
new file mode 100644
ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:548:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);
total: 1 errors, 1 warnings, 164 lines checked
Patch 30/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
31/34 Checking commit 4b4347bfc39b (target/riscv: Convert @cl_d, @cl_w, @cs_d,
@cs_w insns)
32/34 Checking commit 8f1ab689478a (target/riscv: Splice fsw_sd and flw_ld for
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28:
new file mode 100644
total: 0 errors, 1 warnings, 309 lines checked
Patch 32/34 has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
33/34 Checking commit 6f4cc4e269f6 (target/riscv: Splice remaining compressed
insn pairs for riscv32 vs riscv64)
34/34 Checking commit 7692ab035121 (target/riscv: Remaining rvc insn reuse 32
bit translators)
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [http://patchew.org/].
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- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, (continued)
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree,
no-reply <=
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27
- Re: [Qemu-devel] [PATCH v8 00/34] target/riscv: Convert to decodetree, no-reply, 2019/02/27