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[PULL 09/36] i.MX31: Fix bad printf format specifiers
From: |
Peter Maydell |
Subject: |
[PULL 09/36] i.MX31: Fix bad printf format specifiers |
Date: |
Thu, 10 Dec 2020 11:47:29 +0000 |
From: Alex Chen <alex.chen@huawei.com>
We should use printf format specifier "%u" instead of "%d" for
argument of type "unsigned int".
Reported-by: Euler Robot <euler.robot@huawei.com>
Signed-off-by: Alex Chen <alex.chen@huawei.com>
Message-id: 20201126111109.112238-3-alex.chen@huawei.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/misc/imx31_ccm.c | 14 +++++++-------
hw/misc/imx_ccm.c | 4 ++--
2 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/hw/misc/imx31_ccm.c b/hw/misc/imx31_ccm.c
index 6e246827ab6..ad30a4b2c0c 100644
--- a/hw/misc/imx31_ccm.c
+++ b/hw/misc/imx31_ccm.c
@@ -89,7 +89,7 @@ static const char *imx31_ccm_reg_name(uint32_t reg)
case IMX31_CCM_PDR2_REG:
return "PDR2";
default:
- sprintf(unknown, "[%d ?]", reg);
+ sprintf(unknown, "[%u ?]", reg);
return unknown;
}
}
@@ -120,7 +120,7 @@ static uint32_t imx31_ccm_get_pll_ref_clk(IMXCCMState *dev)
freq = CKIH_FREQ;
}
- DPRINTF("freq = %d\n", freq);
+ DPRINTF("freq = %u\n", freq);
return freq;
}
@@ -133,7 +133,7 @@ static uint32_t imx31_ccm_get_mpll_clk(IMXCCMState *dev)
freq = imx_ccm_calc_pll(s->reg[IMX31_CCM_MPCTL_REG],
imx31_ccm_get_pll_ref_clk(dev));
- DPRINTF("freq = %d\n", freq);
+ DPRINTF("freq = %u\n", freq);
return freq;
}
@@ -150,7 +150,7 @@ static uint32_t imx31_ccm_get_mcu_main_clk(IMXCCMState *dev)
freq = imx31_ccm_get_mpll_clk(dev);
}
- DPRINTF("freq = %d\n", freq);
+ DPRINTF("freq = %u\n", freq);
return freq;
}
@@ -163,7 +163,7 @@ static uint32_t imx31_ccm_get_hclk_clk(IMXCCMState *dev)
freq = imx31_ccm_get_mcu_main_clk(dev)
/ (1 + EXTRACT(s->reg[IMX31_CCM_PDR0_REG], MAX));
- DPRINTF("freq = %d\n", freq);
+ DPRINTF("freq = %u\n", freq);
return freq;
}
@@ -176,7 +176,7 @@ static uint32_t imx31_ccm_get_ipg_clk(IMXCCMState *dev)
freq = imx31_ccm_get_hclk_clk(dev)
/ (1 + EXTRACT(s->reg[IMX31_CCM_PDR0_REG], IPG));
- DPRINTF("freq = %d\n", freq);
+ DPRINTF("freq = %u\n", freq);
return freq;
}
@@ -201,7 +201,7 @@ static uint32_t imx31_ccm_get_clock_frequency(IMXCCMState
*dev, IMXClk clock)
break;
}
- DPRINTF("Clock = %d) = %d\n", clock, freq);
+ DPRINTF("Clock = %d) = %u\n", clock, freq);
return freq;
}
diff --git a/hw/misc/imx_ccm.c b/hw/misc/imx_ccm.c
index 52882071d3b..08a50ee4c8a 100644
--- a/hw/misc/imx_ccm.c
+++ b/hw/misc/imx_ccm.c
@@ -38,7 +38,7 @@ uint32_t imx_ccm_get_clock_frequency(IMXCCMState *dev, IMXClk
clock)
freq = klass->get_clock_frequency(dev, clock);
}
- DPRINTF("(clock = %d) = %d\n", clock, freq);
+ DPRINTF("(clock = %d) = %u\n", clock, freq);
return freq;
}
@@ -65,7 +65,7 @@ uint32_t imx_ccm_calc_pll(uint32_t pllreg, uint32_t base_freq)
freq = ((2 * (base_freq >> 10) * (mfi * mfd + mfn)) /
(mfd * pd)) << 10;
- DPRINTF("(pllreg = 0x%08x, base_freq = %d) = %d\n", pllreg, base_freq,
+ DPRINTF("(pllreg = 0x%08x, base_freq = %u) = %d\n", pllreg, base_freq,
freq);
return freq;
--
2.20.1
- [PULL 00/36] target-arm queue, Peter Maydell, 2020/12/10
- [PULL 03/36] xlnx-zynqmp: Connect Xilinx ZynqMP CAN controllers, Peter Maydell, 2020/12/10
- [PULL 06/36] sbsa-ref: allow to use Cortex-A53/57/72 cpus, Peter Maydell, 2020/12/10
- [PULL 01/36] hw/arm/smmuv3: Fix up L1STD_SPAN decoding, Peter Maydell, 2020/12/10
- [PULL 05/36] MAINTAINERS: Add maintainer entry for Xilinx ZynqMP CAN controller, Peter Maydell, 2020/12/10
- [PULL 04/36] tests/qtest: Introduce tests for Xilinx ZynqMP CAN controller, Peter Maydell, 2020/12/10
- [PULL 02/36] hw/net/can: Introduce Xilinx ZynqMP CAN controller, Peter Maydell, 2020/12/10
- [PULL 09/36] i.MX31: Fix bad printf format specifiers,
Peter Maydell <=
- [PULL 07/36] tests/qtest/npcm7xx_rng-test: dump random data on failure, Peter Maydell, 2020/12/10
- [PULL 14/36] target/arm: Don't clobber ID_PFR1.Security on M-profile cores, Peter Maydell, 2020/12/10
- [PULL 08/36] i.MX25: Fix bad printf format specifiers, Peter Maydell, 2020/12/10
- [PULL 10/36] i.MX6: Fix bad printf format specifiers, Peter Maydell, 2020/12/10
- [PULL 16/36] target/arm: Implement CLRM instruction, Peter Maydell, 2020/12/10
- [PULL 17/36] target/arm: Enforce M-profile VMRS/VMSR register restrictions, Peter Maydell, 2020/12/10
- [PULL 11/36] i.MX6ul: Fix bad printf format specifiers, Peter Maydell, 2020/12/10
- [PULL 13/36] target/arm: Implement v8.1M PXN extension, Peter Maydell, 2020/12/10
- [PULL 15/36] target/arm: Implement VSCCLRM insn, Peter Maydell, 2020/12/10
- [PULL 21/36] target/arm: Implement M-profile FPSCR_nzcvqc, Peter Maydell, 2020/12/10