[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 36/36] hw/arm/armv7m: Correct typo in QOM object name
From: |
Peter Maydell |
Subject: |
[PULL 36/36] hw/arm/armv7m: Correct typo in QOM object name |
Date: |
Thu, 10 Dec 2020 11:47:56 +0000 |
Correct a typo in the name we give the NVIC object.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20201119215617.29887-28-peter.maydell@linaro.org
---
hw/arm/armv7m.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index 944f261dd05..8224d4ade9f 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -136,7 +136,7 @@ static void armv7m_instance_init(Object *obj)
memory_region_init(&s->container, obj, "armv7m-container", UINT64_MAX);
- object_initialize_child(obj, "nvnic", &s->nvic, TYPE_NVIC);
+ object_initialize_child(obj, "nvic", &s->nvic, TYPE_NVIC);
object_property_add_alias(obj, "num-irq",
OBJECT(&s->nvic), "num-irq");
--
2.20.1
- [PULL 22/36] target/arm: Use new FPCR_NZCV_MASK constant, (continued)
- [PULL 22/36] target/arm: Use new FPCR_NZCV_MASK constant, Peter Maydell, 2020/12/10
- [PULL 19/36] target/arm: Move general-use constant expanders up in translate.c, Peter Maydell, 2020/12/10
- [PULL 18/36] target/arm: Refactor M-profile VMSR/VMRS handling, Peter Maydell, 2020/12/10
- [PULL 28/36] target/arm: Implement v8.1M REVIDR register, Peter Maydell, 2020/12/10
- [PULL 26/36] target/arm: For v8.1M, always clear R0-R3, R12, APSR, EPSR on exception entry, Peter Maydell, 2020/12/10
- [PULL 30/36] target/arm: Implement new v8.1M VLLDM and VLSTM encodings, Peter Maydell, 2020/12/10
- [PULL 34/36] target/arm: Implement M-profile "minimal RAS implementation", Peter Maydell, 2020/12/10
- [PULL 12/36] hw/intc/armv7m_nvic: Make all of system PPB range be RAZWI/BusFault, Peter Maydell, 2020/12/10
- [PULL 20/36] target/arm: Implement VLDR/VSTR system register, Peter Maydell, 2020/12/10
- [PULL 31/36] hw/intc/armv7m_nvic: Support v8.1M CCR.TRD bit, Peter Maydell, 2020/12/10
- [PULL 36/36] hw/arm/armv7m: Correct typo in QOM object name,
Peter Maydell <=
- [PULL 24/36] target/arm: Implement FPCXT_S fp system register, Peter Maydell, 2020/12/10
- [PULL 23/36] target/arm: Factor out preserve-fp-state from full_vfp_access_check(), Peter Maydell, 2020/12/10
- [PULL 27/36] target/arm: In v8.1M, don't set HFSR.FORCED on vector table fetch failures, Peter Maydell, 2020/12/10
- [PULL 29/36] target/arm: Implement new v8.1M NOCP check for exception return, Peter Maydell, 2020/12/10
- [PULL 32/36] target/arm: Implement CCR_S.TRD behaviour for SG insns, Peter Maydell, 2020/12/10
- [PULL 35/36] hw/intc/armv7m_nvic: Implement read/write for RAS register block, Peter Maydell, 2020/12/10
- [PULL 33/36] hw/intc/armv7m_nvic: Fix "return from inactive handler" check, Peter Maydell, 2020/12/10
- Re: [PULL 00/36] target-arm queue, Peter Maydell, 2020/12/10