Re: [PATCH v2 4/5] target/arm: add aarch64 ID register fields to cpu.h

[Laurent Desnogues]

On Tue, Dec 15, 2020 at 12:51 PM Leif Lindholm <leif@nuviainc.com> wrote:
>
> Add entries present in ARM DDI 0487F.c (August 2020).
>
> Signed-off-by: Leif Lindholm <leif@nuviainc.com>

Reviewed-by: Laurent Desnogues <laurent.desnogues@gmail.com>

Thanks,

Laurent

> ---
>  target/arm/cpu.h | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
>
> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
> index 90ba707b64..efa977eaca 100644
> --- a/target/arm/cpu.h
> +++ b/target/arm/cpu.h
> @@ -1895,6 +1895,9 @@ FIELD(ID_AA64ISAR1, GPI, 28, 4)
>  FIELD(ID_AA64ISAR1, FRINTTS, 32, 4)
>  FIELD(ID_AA64ISAR1, SB, 36, 4)
>  FIELD(ID_AA64ISAR1, SPECRES, 40, 4)
> +FIELD(ID_AA64ISAR1, BF16, 44, 4)
> +FIELD(ID_AA64ISAR1, DGH, 48, 4)
> +FIELD(ID_AA64ISAR1, I8MM, 52, 4)
>
>  FIELD(ID_AA64PFR0, EL0, 0, 4)
>  FIELD(ID_AA64PFR0, EL1, 4, 4)
> @@ -1905,11 +1908,18 @@ FIELD(ID_AA64PFR0, ADVSIMD, 20, 4)
>  FIELD(ID_AA64PFR0, GIC, 24, 4)
>  FIELD(ID_AA64PFR0, RAS, 28, 4)
>  FIELD(ID_AA64PFR0, SVE, 32, 4)
> +FIELD(ID_AA64PFR0, SEL2, 36, 4)
> +FIELD(ID_AA64PFR0, MPAM, 40, 4)
> +FIELD(ID_AA64PFR0, AMU, 44, 4)
> +FIELD(ID_AA64PFR0, DIT, 48, 4)
> +FIELD(ID_AA64PFR0, CSV2, 56, 4)
> +FIELD(ID_AA64PFR0, CSV3, 60, 4)
>
>  FIELD(ID_AA64PFR1, BT, 0, 4)
>  FIELD(ID_AA64PFR1, SSBS, 4, 4)
>  FIELD(ID_AA64PFR1, MTE, 8, 4)
>  FIELD(ID_AA64PFR1, RAS_FRAC, 12, 4)
> +FIELD(ID_AA64PFR1, MPAM_FRAC, 16, 4)
>
>  FIELD(ID_AA64MMFR0, PARANGE, 0, 4)
>  FIELD(ID_AA64MMFR0, ASIDBITS, 4, 4)
> @@ -1923,6 +1933,8 @@ FIELD(ID_AA64MMFR0, TGRAN16_2, 32, 4)
>  FIELD(ID_AA64MMFR0, TGRAN64_2, 36, 4)
>  FIELD(ID_AA64MMFR0, TGRAN4_2, 40, 4)
>  FIELD(ID_AA64MMFR0, EXS, 44, 4)
> +FIELD(ID_AA64MMFR0, FGT, 56, 4)
> +FIELD(ID_AA64MMFR0, ECV, 60, 4)
>
>  FIELD(ID_AA64MMFR1, HAFDBS, 0, 4)
>  FIELD(ID_AA64MMFR1, VMIDBITS, 4, 4)
> @@ -1932,6 +1944,8 @@ FIELD(ID_AA64MMFR1, LO, 16, 4)
>  FIELD(ID_AA64MMFR1, PAN, 20, 4)
>  FIELD(ID_AA64MMFR1, SPECSEI, 24, 4)
>  FIELD(ID_AA64MMFR1, XNX, 28, 4)
> +FIELD(ID_AA64MMFR1, TWED, 32, 4)
> +FIELD(ID_AA64MMFR1, ETS, 36, 4)
>
>  FIELD(ID_AA64MMFR2, CNP, 0, 4)
>  FIELD(ID_AA64MMFR2, UAO, 4, 4)
> @@ -1958,6 +1972,7 @@ FIELD(ID_AA64DFR0, CTX_CMPS, 28, 4)
>  FIELD(ID_AA64DFR0, PMSVER, 32, 4)
>  FIELD(ID_AA64DFR0, DOUBLELOCK, 36, 4)
>  FIELD(ID_AA64DFR0, TRACEFILT, 40, 4)
> +FIELD(ID_AA64DFR0, MTPMU, 48, 4)
>
>  FIELD(ID_DFR0, COPDBG, 0, 4)
>  FIELD(ID_DFR0, COPSDBG, 4, 4)
> --
> 2.20.1
>
>