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[PULL 17/20] hw/block/m25p80: Make Numonyx config field names more accur
From: |
Peter Maydell |
Subject: |
[PULL 17/20] hw/block/m25p80: Make Numonyx config field names more accurate |
Date: |
Tue, 15 Dec 2020 14:12:34 +0000 |
From: Joe Komlodi <joe.komlodi@xilinx.com>
The previous naming of the configuration registers made it sound like that if
the bits were set the settings would be enabled, while the opposite is true.
Signed-off-by: Joe Komlodi <komlodi@xilinx.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@xilinx.com>
Message-id: 1605568264-26376-2-git-send-email-komlodi@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/block/m25p80.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index d09a811767a..bad72538386 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -136,7 +136,7 @@ typedef struct FlashPartInfo {
#define VCFG_WRAP_SEQUENTIAL 0x2
#define NVCFG_XIP_MODE_DISABLED (7 << 9)
#define NVCFG_XIP_MODE_MASK (7 << 9)
-#define VCFG_XIP_MODE_ENABLED (1 << 3)
+#define VCFG_XIP_MODE_DISABLED (1 << 3)
#define CFG_DUMMY_CLK_LEN 4
#define NVCFG_DUMMY_CLK_POS 12
#define VCFG_DUMMY_CLK_POS 4
@@ -144,9 +144,9 @@ typedef struct FlashPartInfo {
#define EVCFG_VPP_ACCELERATOR (1 << 3)
#define EVCFG_RESET_HOLD_ENABLED (1 << 4)
#define NVCFG_DUAL_IO_MASK (1 << 2)
-#define EVCFG_DUAL_IO_ENABLED (1 << 6)
+#define EVCFG_DUAL_IO_DISABLED (1 << 6)
#define NVCFG_QUAD_IO_MASK (1 << 3)
-#define EVCFG_QUAD_IO_ENABLED (1 << 7)
+#define EVCFG_QUAD_IO_DISABLED (1 << 7)
#define NVCFG_4BYTE_ADDR_MASK (1 << 0)
#define NVCFG_LOWER_SEGMENT_MASK (1 << 1)
@@ -769,7 +769,7 @@ static void reset_memory(Flash *s)
s->volatile_cfg |= VCFG_WRAP_SEQUENTIAL;
if ((s->nonvolatile_cfg & NVCFG_XIP_MODE_MASK)
!= NVCFG_XIP_MODE_DISABLED) {
- s->volatile_cfg |= VCFG_XIP_MODE_ENABLED;
+ s->volatile_cfg |= VCFG_XIP_MODE_DISABLED;
}
s->volatile_cfg |= deposit32(s->volatile_cfg,
VCFG_DUMMY_CLK_POS,
@@ -784,10 +784,10 @@ static void reset_memory(Flash *s)
s->enh_volatile_cfg |= EVCFG_VPP_ACCELERATOR;
s->enh_volatile_cfg |= EVCFG_RESET_HOLD_ENABLED;
if (s->nonvolatile_cfg & NVCFG_DUAL_IO_MASK) {
- s->enh_volatile_cfg |= EVCFG_DUAL_IO_ENABLED;
+ s->enh_volatile_cfg |= EVCFG_DUAL_IO_DISABLED;
}
if (s->nonvolatile_cfg & NVCFG_QUAD_IO_MASK) {
- s->enh_volatile_cfg |= EVCFG_QUAD_IO_ENABLED;
+ s->enh_volatile_cfg |= EVCFG_QUAD_IO_DISABLED;
}
if (!(s->nonvolatile_cfg & NVCFG_4BYTE_ADDR_MASK)) {
s->four_bytes_address_mode = true;
--
2.20.1
- [PULL 07/20] target/nios2: Use deposit32() to update ipending register, (continued)
- [PULL 07/20] target/nios2: Use deposit32() to update ipending register, Peter Maydell, 2020/12/15
- [PULL 10/20] elf_ops.h: Don't truncate name of the ROM blobs we create, Peter Maydell, 2020/12/15
- [PULL 09/20] hw/core/loader.c: Improve reporting of ROM overlap errors, Peter Maydell, 2020/12/15
- [PULL 06/20] target/nios2: Move nios2_check_interrupts() into target/nios2, Peter Maydell, 2020/12/15
- [PULL 11/20] elf_ops.h: Be more verbose with ROM blob names, Peter Maydell, 2020/12/15
- [PULL 01/20] gdbstub: Correct misparsing of vCont C/S requests, Peter Maydell, 2020/12/15
- [PULL 15/20] arm: xlnx-versal: Connect usb to virt-versal, Peter Maydell, 2020/12/15
- [PULL 14/20] usb: xlnx-usb-subsystem: Add xilinx usb subsystem, Peter Maydell, 2020/12/15
- [PULL 13/20] usb: Add DWC3 model, Peter Maydell, 2020/12/15
- [PULL 16/20] hw/misc/zynq_slcr: Avoid #DIV/0! error, Peter Maydell, 2020/12/15
- [PULL 17/20] hw/block/m25p80: Make Numonyx config field names more accurate,
Peter Maydell <=
- [PULL 08/20] hw/core/loader.c: Track last-seen ROM in rom_check_and_register_reset(), Peter Maydell, 2020/12/15
- [PULL 12/20] usb: Add versal-usb2-ctrl-regs module, Peter Maydell, 2020/12/15
- [PULL 18/20] hw/block/m25p80: Fix when VCFG XIP bit is set for Numonyx, Peter Maydell, 2020/12/15
- [PULL 20/20] hw/block/m25p80: Fix Numonyx fast read dummy cycle count, Peter Maydell, 2020/12/15
[PULL 19/20] hw/block/m25p80: Check SPI mode before running some Numonyx commands, Peter Maydell, 2020/12/15
Re: [PULL 00/20] target-arm queue, Peter Maydell, 2020/12/15