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Re: [PATCH 3/3] target/arm: set ID_AA64ISAR0.TLB to 2 for max AARCH64 CP
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From: |
Richard Henderson |
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Subject: |
Re: [PATCH 3/3] target/arm: set ID_AA64ISAR0.TLB to 2 for max AARCH64 CPU type |
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Date: |
Tue, 15 Dec 2020 15:53:23 -0600 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 |
On 12/14/20 2:23 PM, Rebecca Cran wrote:
> +++ b/target/arm/cpu64.c
> @@ -620,6 +620,7 @@ static void aarch64_max_initfn(Object *obj)
> t = FIELD_DP64(t, ID_AA64ISAR0, DP, 1);
> t = FIELD_DP64(t, ID_AA64ISAR0, FHM, 1);
> t = FIELD_DP64(t, ID_AA64ISAR0, TS, 2); /* v8.5-CondM */
> + t = FIELD_DP64(t, ID_AA64ISAR0, TLB, 2);
> t = FIELD_DP64(t, ID_AA64ISAR0, RNDR, 1);
When the value is not 1, we have generally added a comment to clarify exactly
which extensions this covers. Though it's slightly annoying that F.c has
renamed all of the extensions.
With that added,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~