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[PATCH v7 8/9] hw/ssi: imx_spi: Correct the burst length > 32 bit transf
From: |
Philippe Mathieu-Daudé |
Subject: |
[PATCH v7 8/9] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic |
Date: |
Fri, 15 Jan 2021 16:30:48 +0100 |
From: Bin Meng <bin.meng@windriver.com>
For the ECSPIx_CONREG register BURST_LENGTH field, the manual says:
0x020 A SPI burst contains the 1 LSB in first word and all 32 bits in second
word.
0x021 A SPI burst contains the 2 LSB in first word and all 32 bits in second
word.
Current logic uses either s->burst_length or 32, whichever smaller,
to determine how many bits it should read from the tx fifo each time.
For example, for a 48 bit burst length, current logic transfers the
first 32 bit from the first word in the tx fifo, followed by a 16
bit from the second word in the tx fifo, which is wrong. The correct
logic should be: transfer the first 16 bit from the first word in
the tx fifo, followed by a 32 bit from the second word in the tx fifo.
With this change, SPI flash can be successfully probed by U-Boot on
imx6 sabrelite board.
=> sf probe
SF: Detected sst25vf016b with page size 256 Bytes, erase size 4 KiB, total 2
MiB
Fixes: c906a3a01582 ("i.MX: Add the Freescale SPI Controller")
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20210112145526.31095-6-bmeng.cn@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/ssi/imx_spi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ssi/imx_spi.c b/hw/ssi/imx_spi.c
index b79304d93d9..707defb8b3f 100644
--- a/hw/ssi/imx_spi.c
+++ b/hw/ssi/imx_spi.c
@@ -191,7 +191,7 @@ static void imx_spi_flush_txfifo(IMXSPIState *s)
DPRINTF("data tx:0x%08x\n", tx);
- tx_burst = MIN(s->burst_length, 32);
+ tx_burst = (s->burst_length % 32) ? : 32;
rx = 0;
--
2.26.2
- [PATCH v7 0/9] hw/ssi: imx_spi: Fix various bugs in the imx_spi model, Philippe Mathieu-Daudé, 2021/01/15
- [PATCH v7 1/9] hw/ssi: imx_spi: Use a macro for number of chip selects supported, Philippe Mathieu-Daudé, 2021/01/15
- [PATCH v7 2/9] hw/ssi: imx_spi: Remove pointless variable initialization, Philippe Mathieu-Daudé, 2021/01/15
- [PATCH v7 3/9] hw/ssi: imx_spi: Rework imx_spi_reset() to keep CONREG register value, Philippe Mathieu-Daudé, 2021/01/15
- [PATCH v7 4/9] hw/ssi: imx_spi: Rework imx_spi_read() to handle block disabled, Philippe Mathieu-Daudé, 2021/01/15
- [PATCH v7 5/9] hw/ssi: imx_spi: Rework imx_spi_write() to handle block disabled, Philippe Mathieu-Daudé, 2021/01/15
- [PATCH v7 6/9] hw/ssi: imx_spi: Disable chip selects when controller is disabled, Philippe Mathieu-Daudé, 2021/01/15
- [PATCH v7 7/9] hw/ssi: imx_spi: Round up the burst length to be multiple of 8, Philippe Mathieu-Daudé, 2021/01/15
- [PATCH v7 8/9] hw/ssi: imx_spi: Correct the burst length > 32 bit transfer logic,
Philippe Mathieu-Daudé <=
- [PATCH v7 9/9] hw/ssi: imx_spi: Correct tx and rx fifo endianness, Philippe Mathieu-Daudé, 2021/01/15
- Re: [PATCH v7 0/9] hw/ssi: imx_spi: Fix various bugs in the imx_spi model, Bin Meng, 2021/01/16