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[PULL 07/12] hw/misc/sifive_u_otp: handling the fails of blk_pread and b
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From: |
Alistair Francis |
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Subject: |
[PULL 07/12] hw/misc/sifive_u_otp: handling the fails of blk_pread and blk_pwrite |
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Date: |
Sun, 17 Jan 2021 13:53:58 -0800 |
From: Green Wan <green.wan@sifive.com>
Fix code coverage issues by checking return value and handling fail case
of blk_pread() and blk_pwrite(). Return default value 0xff if read fails.
Fixes: Coverity CID 1435959
Fixes: Coverity CID 1435960
Fixes: Coverity CID 1435961
Signed-off-by: Green Wan <green.wan@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20201104092900.21214-1-green.wan@sifive.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
hw/misc/sifive_u_otp.c | 31 +++++++++++++++++++++++--------
1 file changed, 23 insertions(+), 8 deletions(-)
diff --git a/hw/misc/sifive_u_otp.c b/hw/misc/sifive_u_otp.c
index 4401787a5c..f921c67644 100644
--- a/hw/misc/sifive_u_otp.c
+++ b/hw/misc/sifive_u_otp.c
@@ -63,8 +63,13 @@ static uint64_t sifive_u_otp_read(void *opaque, hwaddr addr,
unsigned int size)
if (s->blk) {
int32_t buf;
- blk_pread(s->blk, s->pa * SIFIVE_U_OTP_FUSE_WORD, &buf,
- SIFIVE_U_OTP_FUSE_WORD);
+ if (blk_pread(s->blk, s->pa * SIFIVE_U_OTP_FUSE_WORD, &buf,
+ SIFIVE_U_OTP_FUSE_WORD) < 0) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "read error index<%d>\n", s->pa);
+ return 0xff;
+ }
+
return buf;
}
@@ -161,8 +166,12 @@ static void sifive_u_otp_write(void *opaque, hwaddr addr,
/* write to backend */
if (s->blk) {
- blk_pwrite(s->blk, s->pa * SIFIVE_U_OTP_FUSE_WORD,
- &s->fuse[s->pa], SIFIVE_U_OTP_FUSE_WORD, 0);
+ if (blk_pwrite(s->blk, s->pa * SIFIVE_U_OTP_FUSE_WORD,
+ &s->fuse[s->pa], SIFIVE_U_OTP_FUSE_WORD,
+ 0) < 0) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "write error index<%d>\n", s->pa);
+ }
}
/* update written bit */
@@ -249,12 +258,18 @@ static void sifive_u_otp_reset(DeviceState *dev)
int index = SIFIVE_U_OTP_SERIAL_ADDR;
serial_data = s->serial;
- blk_pwrite(s->blk, index * SIFIVE_U_OTP_FUSE_WORD,
- &serial_data, SIFIVE_U_OTP_FUSE_WORD, 0);
+ if (blk_pwrite(s->blk, index * SIFIVE_U_OTP_FUSE_WORD,
+ &serial_data, SIFIVE_U_OTP_FUSE_WORD, 0) < 0) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "write error index<%d>\n", index);
+ }
serial_data = ~(s->serial);
- blk_pwrite(s->blk, (index + 1) * SIFIVE_U_OTP_FUSE_WORD,
- &serial_data, SIFIVE_U_OTP_FUSE_WORD, 0);
+ if (blk_pwrite(s->blk, (index + 1) * SIFIVE_U_OTP_FUSE_WORD,
+ &serial_data, SIFIVE_U_OTP_FUSE_WORD, 0) < 0) {
+ qemu_log_mask(LOG_GUEST_ERROR,
+ "write error index<%d>\n", index + 1);
+ }
}
/* Initialize write-once map */
--
2.29.2
- [PULL 00/12] riscv-to-apply queue, Alistair Francis, 2021/01/17
- [PULL 01/12] hw/block: m25p80: Don't write to flash if write is disabled, Alistair Francis, 2021/01/17
- [PULL 02/12] hw/block: m25p80: Implement AAI-WP command support for SST flashes, Alistair Francis, 2021/01/17
- [PULL 12/12] riscv: Pass RISCVHartArrayState by pointer, Alistair Francis, 2021/01/17
- [PULL 03/12] gdb: riscv: Add target description, Alistair Francis, 2021/01/17
- [PULL 06/12] hw/riscv: sifive_u: Use SIFIVE_U_CPU for mc->default_cpu_type, Alistair Francis, 2021/01/17
- [PULL 05/12] target/riscv/pmp: Raise exception if no PMP entry is configured, Alistair Francis, 2021/01/17
- [PULL 04/12] RISC-V: Place DTB at 3GB boundary instead of 4GB, Alistair Francis, 2021/01/17
- [PULL 09/12] target/riscv: Add CSR name in the CSR function table, Alistair Francis, 2021/01/17
- [PULL 07/12] hw/misc/sifive_u_otp: handling the fails of blk_pread and blk_pwrite,
Alistair Francis <=
- [PULL 10/12] target/riscv: Generate the GDB XML file for CSR registers dynamically, Alistair Francis, 2021/01/17
- [PULL 08/12] target/riscv: Make csr_ops[CSR_TABLE_SIZE] external, Alistair Francis, 2021/01/17
- [PULL 11/12] target/riscv: Remove built-in GDB XML files for CSRs, Alistair Francis, 2021/01/17
- Re: [PULL 00/12] riscv-to-apply queue, Peter Maydell, 2021/01/18