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[PATCH v3 03/12] hw/block/nvme: indicate CMB support through controller
From: |
Klaus Jensen |
Subject: |
[PATCH v3 03/12] hw/block/nvme: indicate CMB support through controller capabilities register |
Date: |
Tue, 19 Jan 2021 11:14:55 +0100 |
From: Andrzej Jakowski <andrzej.jakowski@linux.intel.com>
This patch sets CMBS bit in controller capabilities register when user
configures NVMe driver with CMB support, so capabilites are correctly
reported to guest OS.
Signed-off-by: Andrzej Jakowski <andrzej.jakowski@linux.intel.com>
Reviewed-by: Maxim Levitsky <mlevitsky@gmail.com>
Reviewed-by: Minwoo Im <minwoo.im.dev@gmail.com>
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
---
include/block/nvme.h | 10 +++++++---
hw/block/nvme.c | 1 +
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/include/block/nvme.h b/include/block/nvme.h
index 45b2678db1f0..86d7fc2f905c 100644
--- a/include/block/nvme.h
+++ b/include/block/nvme.h
@@ -36,6 +36,7 @@ enum NvmeCapShift {
CAP_MPSMIN_SHIFT = 48,
CAP_MPSMAX_SHIFT = 52,
CAP_PMR_SHIFT = 56,
+ CAP_CMB_SHIFT = 57,
};
enum NvmeCapMask {
@@ -49,6 +50,7 @@ enum NvmeCapMask {
CAP_MPSMIN_MASK = 0xf,
CAP_MPSMAX_MASK = 0xf,
CAP_PMR_MASK = 0x1,
+ CAP_CMB_MASK = 0x1,
};
#define NVME_CAP_MQES(cap) (((cap) >> CAP_MQES_SHIFT) & CAP_MQES_MASK)
@@ -78,9 +80,11 @@ enum NvmeCapMask {
#define NVME_CAP_SET_MPSMIN(cap, val) (cap |= (uint64_t)(val &
CAP_MPSMIN_MASK)\
<< CAP_MPSMIN_SHIFT)
#define NVME_CAP_SET_MPSMAX(cap, val) (cap |= (uint64_t)(val &
CAP_MPSMAX_MASK)\
- <<
CAP_MPSMAX_SHIFT)
-#define NVME_CAP_SET_PMRS(cap, val) (cap |= (uint64_t)(val & CAP_PMR_MASK)\
- << CAP_PMR_SHIFT)
+ << CAP_MPSMAX_SHIFT)
+#define NVME_CAP_SET_PMRS(cap, val) (cap |= (uint64_t)(val & CAP_PMR_MASK)
\
+ << CAP_PMR_SHIFT)
+#define NVME_CAP_SET_CMBS(cap, val) (cap |= (uint64_t)(val & CAP_CMB_MASK)
\
+ << CAP_CMB_SHIFT)
enum NvmeCapCss {
NVME_CAP_CSS_NVM = 1 << 0,
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 9a508df8d200..3168ba5114ed 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -4345,6 +4345,7 @@ static void nvme_init_ctrl(NvmeCtrl *n, PCIDevice
*pci_dev)
NVME_CAP_SET_CSS(n->bar.cap, NVME_CAP_CSS_CSI_SUPP);
NVME_CAP_SET_CSS(n->bar.cap, NVME_CAP_CSS_ADMIN_ONLY);
NVME_CAP_SET_MPSMAX(n->bar.cap, 4);
+ NVME_CAP_SET_CMBS(n->bar.cap, n->params.cmb_size_mb ? 1 : 0);
n->bar.vs = NVME_SPEC_VER;
n->bar.intmc = n->bar.intms = 0;
--
2.30.0
- [PATCH v3 00/12] hw/block/nvme: misc cmb/pmr patches and bump to v1.4, Klaus Jensen, 2021/01/19
- [PATCH v3 02/12] hw/block/nvme: fix 64 bit register hi/lo split writes, Klaus Jensen, 2021/01/19
- [PATCH v3 01/12] hw/block/nvme: add size to mmio read/write trace events, Klaus Jensen, 2021/01/19
- [PATCH v3 03/12] hw/block/nvme: indicate CMB support through controller capabilities register,
Klaus Jensen <=
- [PATCH v3 04/12] hw/block/nvme: move msix table and pba to BAR 0, Klaus Jensen, 2021/01/19
- [PATCH v3 05/12] hw/block/nvme: allow cmb and pmr to coexist, Klaus Jensen, 2021/01/19
- [PATCH v3 06/12] hw/block/nvme: rename PMR/CMB shift/mask fields, Klaus Jensen, 2021/01/19
- [PATCH v3 07/12] hw/block/nvme: remove redundant zeroing of PMR registers, Klaus Jensen, 2021/01/19
- [PATCH v3 08/12] hw/block/nvme: disable PMR at boot up, Klaus Jensen, 2021/01/19
- [PATCH v3 09/12] hw/block/nvme: add PMR RDS/WDS support, Klaus Jensen, 2021/01/19
- [PATCH v3 10/12] hw/block/nvme: move cmb logic to v1.4, Klaus Jensen, 2021/01/19