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Re: [PATCH v4 05/71] tcg/tci: Remove tci_read_r8


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH v4 05/71] tcg/tci: Remove tci_read_r8
Date: Fri, 19 Feb 2021 00:11:52 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0

On 2/17/21 9:19 PM, Richard Henderson wrote:
> Use explicit casts for ext8u opcodes, and allow truncation
> to happen with the store for st8 opcodes.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  tcg/tci.c | 23 +++++------------------
>  1 file changed, 5 insertions(+), 18 deletions(-)
> 
> diff --git a/tcg/tci.c b/tcg/tci.c
> index 1c667537fe..4ade0ccaf9 100644
> --- a/tcg/tci.c
> +++ b/tcg/tci.c
> @@ -78,11 +78,6 @@ static int32_t tci_read_reg32s(const tcg_target_ulong 
> *regs, TCGReg index)
>  }
>  #endif
>  
> -static uint8_t tci_read_reg8(const tcg_target_ulong *regs, TCGReg index)
> -{
> -    return (uint8_t)tci_read_reg(regs, index);
> -}
> -
>  static uint16_t tci_read_reg16(const tcg_target_ulong *regs, TCGReg index)
>  {
>      return (uint16_t)tci_read_reg(regs, index);
> @@ -169,14 +164,6 @@ tci_read_r(const tcg_target_ulong *regs, const uint8_t 
> **tb_ptr)
>      return value;
>  }
>  
> -/* Read indexed register (8 bit) from bytecode. */
> -static uint8_t tci_read_r8(const tcg_target_ulong *regs, const uint8_t 
> **tb_ptr)
> -{
> -    uint8_t value = tci_read_reg8(regs, **tb_ptr);
> -    *tb_ptr += 1;
> -    return value;
> -}
> -
>  #if TCG_TARGET_HAS_ext8s_i32 || TCG_TARGET_HAS_ext8s_i64
>  /* Read indexed register (8 bit signed) from bytecode. */
>  static int8_t tci_read_r8s(const tcg_target_ulong *regs, const uint8_t 
> **tb_ptr)
> @@ -533,7 +520,7 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState 
> *env,
>              tci_write_reg(regs, t0, *(uint32_t *)(t1 + t2));
>              break;
>          CASE_32_64(st8)
> -            t0 = tci_read_r8(regs, &tb_ptr);
> +            t0 = tci_read_r(regs, &tb_ptr);

No need for tb_ptr++ here?

>              t1 = tci_read_r(regs, &tb_ptr);
>              t2 = tci_read_s32(&tb_ptr);
>              *(uint8_t *)(t1 + t2) = t0;
> @@ -722,8 +709,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState 
> *env,
>  #if TCG_TARGET_HAS_ext8u_i32
>          case INDEX_op_ext8u_i32:
>              t0 = *tb_ptr++;
> -            t1 = tci_read_r8(regs, &tb_ptr);
> -            tci_write_reg(regs, t0, t1);
> +            t1 = tci_read_r(regs, &tb_ptr);
> +            tci_write_reg(regs, t0, (uint8_t)t1);
>              break;
>  #endif
>  #if TCG_TARGET_HAS_ext16u_i32
> @@ -916,8 +903,8 @@ uintptr_t QEMU_DISABLE_CFI tcg_qemu_tb_exec(CPUArchState 
> *env,
>  #if TCG_TARGET_HAS_ext8u_i64
>          case INDEX_op_ext8u_i64:
>              t0 = *tb_ptr++;
> -            t1 = tci_read_r8(regs, &tb_ptr);
> -            tci_write_reg(regs, t0, t1);
> +            t1 = tci_read_r(regs, &tb_ptr);
> +            tci_write_reg(regs, t0, (uint8_t)t1);
>              break;
>  #endif
>  #if TCG_TARGET_HAS_ext8s_i64
> 



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