Re: [PATCH v12 08/26] target/loongarch: Add fixed point atomic instruction translation

[Richard Henderson]

On 12/1/21 3:16 AM, Song Gao wrote:
> +static bool gen_am(DisasContext *ctx, arg_rrr *a,
> +                   void (*func)(TCGv, TCGv, TCGv, TCGArg, MemOp),
> +                   MemOp mop)
> +{
> +    TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
> +    TCGv addr = gpr_src(ctx, a->rj, EXT_NONE);
> +    TCGv val = gpr_src(ctx, a->rk, EXT_NONE);
> +
> +    if (a->rd != 0 && (a->rj == a->rd || a->rk == a->rd)) {
> +        qemu_log_mask(LOG_GUEST_ERROR,
> +                      "Warning: source register overlaps destination register"
> +                      "in atomic insn at pc=0x" TARGET_FMT_lx "\n",
> +                      ctx->base.pc_next - 4);
> +        return false;
> +    }
> +
> +    func(dest, addr, val, ctx->mem_idx, mop);
> +    gen_set_gpr(a->rd, dest, EXT_NONE);
> +
> +    return true;
> +}
> +
> +static bool gen_am_db(DisasContext *ctx, arg_rrr *a,
> +                      void (*func)(TCGv, TCGv, TCGv, TCGArg, MemOp),
> +                      MemOp mop)
> +{
> +    TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
> +    TCGv addr = gpr_src(ctx, a->rj, EXT_NONE);
> +    TCGv val = gpr_src(ctx, a->rk, EXT_NONE);
> +
> +    if (a->rd != 0 && (a->rj == a->rd || a->rk == a->rd)) {
> +        qemu_log_mask(LOG_GUEST_ERROR,
> +                      "Warning: source register overlaps destination register"
> +                      "in atomic insn at pc=0x" TARGET_FMT_lx "\n",
> +                      ctx->base.pc_next - 4);
> +        return false;
> +    }
> +
> +    func(dest, addr, val, ctx->mem_idx, mop);
> +    gen_set_gpr(a->rd, dest, EXT_NONE);
> +
> +    return true;
> +}

As I said before, gen_am_db may be removed, as it is identical to gen_am.


r~