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[PULL 027/101] target/ppc: Update float_invalid_op_addsub for new flags
From: |
Cédric Le Goater |
Subject: |
[PULL 027/101] target/ppc: Update float_invalid_op_addsub for new flags |
Date: |
Thu, 16 Dec 2021 21:25:00 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
Now that vxisi and vxsnan are computed directly by
softfloat, we don't need to recompute it via classes.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-9-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/fpu_helper.c | 38 ++++++++++++++------------------------
1 file changed, 14 insertions(+), 24 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index bb72715827c3..d8ad0250bccd 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -498,13 +498,12 @@ void helper_reset_fpstatus(CPUPPCState *env)
set_float_exception_flags(0, &env->fp_status);
}
-static void float_invalid_op_addsub(CPUPPCState *env, bool set_fpcc,
- uintptr_t retaddr, int classes)
+static void float_invalid_op_addsub(CPUPPCState *env, int flags,
+ bool set_fpcc, uintptr_t retaddr)
{
- if ((classes & ~is_neg) == is_inf) {
- /* Magnitude subtraction of infinities */
+ if (flags & float_flag_invalid_isi) {
float_invalid_op_vxisi(env, set_fpcc, retaddr);
- } else if (classes & is_snan) {
+ } else if (flags & float_flag_invalid_snan) {
float_invalid_op_vxsnan(env, retaddr);
}
}
@@ -513,12 +512,10 @@ static void float_invalid_op_addsub(CPUPPCState *env,
bool set_fpcc,
float64 helper_fadd(CPUPPCState *env, float64 arg1, float64 arg2)
{
float64 ret = float64_add(arg1, arg2, &env->fp_status);
- int status = get_float_exception_flags(&env->fp_status);
+ int flags = get_float_exception_flags(&env->fp_status);
- if (unlikely(status & float_flag_invalid)) {
- float_invalid_op_addsub(env, 1, GETPC(),
- float64_classify(arg1) |
- float64_classify(arg2));
+ if (unlikely(flags & float_flag_invalid)) {
+ float_invalid_op_addsub(env, flags, 1, GETPC());
}
return ret;
@@ -528,12 +525,10 @@ float64 helper_fadd(CPUPPCState *env, float64 arg1,
float64 arg2)
float64 helper_fsub(CPUPPCState *env, float64 arg1, float64 arg2)
{
float64 ret = float64_sub(arg1, arg2, &env->fp_status);
- int status = get_float_exception_flags(&env->fp_status);
+ int flags = get_float_exception_flags(&env->fp_status);
- if (unlikely(status & float_flag_invalid)) {
- float_invalid_op_addsub(env, 1, GETPC(),
- float64_classify(arg1) |
- float64_classify(arg2));
+ if (unlikely(flags & float_flag_invalid)) {
+ float_invalid_op_addsub(env, flags, 1, GETPC());
}
return ret;
@@ -1664,9 +1659,8 @@ void helper_##name(CPUPPCState *env, ppc_vsr_t *xt,
\
env->fp_status.float_exception_flags |= tstat.float_exception_flags; \
\
if (unlikely(tstat.float_exception_flags & float_flag_invalid)) { \
- float_invalid_op_addsub(env, sfprf, GETPC(), \
- tp##_classify(xa->fld) | \
- tp##_classify(xb->fld)); \
+ float_invalid_op_addsub(env, tstat.float_exception_flags, \
+ sfprf, GETPC()); \
} \
\
if (r2sp) { \
@@ -1708,9 +1702,7 @@ void helper_xsaddqp(CPUPPCState *env, uint32_t opcode,
env->fp_status.float_exception_flags |= tstat.float_exception_flags;
if (unlikely(tstat.float_exception_flags & float_flag_invalid)) {
- float_invalid_op_addsub(env, 1, GETPC(),
- float128_classify(xa->f128) |
- float128_classify(xb->f128));
+ float_invalid_op_addsub(env, tstat.float_exception_flags, 1, GETPC());
}
helper_compute_fprf_float128(env, t.f128);
@@ -3326,9 +3318,7 @@ void helper_xssubqp(CPUPPCState *env, uint32_t opcode,
env->fp_status.float_exception_flags |= tstat.float_exception_flags;
if (unlikely(tstat.float_exception_flags & float_flag_invalid)) {
- float_invalid_op_addsub(env, 1, GETPC(),
- float128_classify(xa->f128) |
- float128_classify(xb->f128));
+ float_invalid_op_addsub(env, tstat.float_exception_flags, 1, GETPC());
}
helper_compute_fprf_float128(env, t.f128);
--
2.31.1
- [PULL 003/101] target/ppc: Fixed call to deferred exception, (continued)
- [PULL 003/101] target/ppc: Fixed call to deferred exception, Cédric Le Goater, 2021/12/16
- [PULL 010/101] ivshmem-test.c: enable test_ivshmem_server for ppc64 arch, Cédric Le Goater, 2021/12/16
- [PULL 001/101] pseries: Update SLOF firmware image, Cédric Le Goater, 2021/12/16
- [PULL 002/101] hw/ppc/mac.h: Remove MAX_CPUS macro, Cédric Le Goater, 2021/12/16
- [PULL 009/101] ivshmem.c: change endianness to LITTLE_ENDIAN, Cédric Le Goater, 2021/12/16
- [PULL 012/101] docs: Minor updates on the powernv documentation., Cédric Le Goater, 2021/12/16
- [PULL 007/101] target/ppc: Implement Vector Extract Mask, Cédric Le Goater, 2021/12/16
- [PULL 005/101] target/ppc: ppc_store_fpscr doesn't update bits 0 to 28 and 52, Cédric Le Goater, 2021/12/16
- [PULL 004/101] test/tcg/ppc64le: test mtfsf, Cédric Le Goater, 2021/12/16
- [PULL 019/101] Link new ppc-spapr-hcalls.rst file to pseries.rst., Cédric Le Goater, 2021/12/16
- [PULL 027/101] target/ppc: Update float_invalid_op_addsub for new flags,
Cédric Le Goater <=
- [PULL 011/101] pci-host: Allow extended config space access for PowerNV PHB4 model, Cédric Le Goater, 2021/12/16
- [PULL 028/101] target/ppc: Update float_invalid_op_mul for new flags, Cédric Le Goater, 2021/12/16
- [PULL 025/101] softfloat: Add flag specific to convert non-nan to int, Cédric Le Goater, 2021/12/16
- [PULL 023/101] softfloat: Add flags specific to Inf / Inf and 0 / 0, Cédric Le Goater, 2021/12/16
- [PULL 014/101] docs/system/ppc/powernv.rst: document KVM support status, Cédric Le Goater, 2021/12/16
- [PULL 006/101] target/ppc: Implement Vector Expand Mask, Cédric Le Goater, 2021/12/16
- [PULL 026/101] softfloat: Add flag specific to signaling nans, Cédric Le Goater, 2021/12/16
- [PULL 008/101] target/ppc: Implement Vector Mask Move insns, Cédric Le Goater, 2021/12/16
- [PULL 018/101] docs: Rename ppc-spapr-hcalls.txt to ppc-spapr-hcalls.rst., Cédric Le Goater, 2021/12/16
- [PULL 015/101] ppc/pnv.c: fix "system-id" FDT when -uuid is set, Cédric Le Goater, 2021/12/16