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[PULL 053/101] target/ppc: Use helper_todouble/tosingle in helper_xststd
From: |
Cédric Le Goater |
Subject: |
[PULL 053/101] target/ppc: Use helper_todouble/tosingle in helper_xststdcsp |
Date: |
Thu, 16 Dec 2021 21:25:26 +0100 |
From: Richard Henderson <richard.henderson@linaro.org>
When computing the predicate "is this value currently formatted
for single precision", we do not want to round the value according
to the current rounding mode, nor perform a floating-point equality.
We want to see if the N bits that make up single-precision are the
only ones set within the register, and then a bitwise equality.
Fixes a bug in which a single-precision NaN is considered !SP,
because float64_eq(nan, nan) is always false.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211119160502.17432-35-richard.henderson@linaro.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
target/ppc/fpu_helper.c | 21 ++++++++++-----------
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index c955b20739ac..1e9a16154036 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/ppc/fpu_helper.c
@@ -3163,26 +3163,25 @@ void helper_xststdcsp(CPUPPCState *env, uint32_t
opcode, ppc_vsr_t *xb)
{
uint32_t dcmx, sign, exp;
uint32_t cc, match = 0, not_sp = 0;
+ float64 arg = xb->VsrD(0);
+ float64 arg_sp;
dcmx = DCMX(opcode);
- exp = (xb->VsrD(0) >> 52) & 0x7FF;
+ exp = (arg >> 52) & 0x7FF;
+ sign = float64_is_neg(arg);
- sign = float64_is_neg(xb->VsrD(0));
- if (float64_is_any_nan(xb->VsrD(0))) {
+ if (float64_is_any_nan(arg)) {
match = extract32(dcmx, 6, 1);
- } else if (float64_is_infinity(xb->VsrD(0))) {
+ } else if (float64_is_infinity(arg)) {
match = extract32(dcmx, 4 + !sign, 1);
- } else if (float64_is_zero(xb->VsrD(0))) {
+ } else if (float64_is_zero(arg)) {
match = extract32(dcmx, 2 + !sign, 1);
- } else if (float64_is_zero_or_denormal(xb->VsrD(0)) ||
- (exp > 0 && exp < 0x381)) {
+ } else if (float64_is_zero_or_denormal(arg) || (exp > 0 && exp < 0x381)) {
match = extract32(dcmx, 0 + !sign, 1);
}
- not_sp = !float64_eq(xb->VsrD(0),
- float32_to_float64(
- float64_to_float32(xb->VsrD(0), &env->fp_status),
- &env->fp_status), &env->fp_status);
+ arg_sp = helper_todouble(helper_tosingle(arg));
+ not_sp = arg != arg_sp;
cc = sign << CRF_LT_BIT | match << CRF_EQ_BIT | not_sp << CRF_SO_BIT;
env->fpscr &= ~FP_FPCC;
--
2.31.1
- [PULL 036/101] target/ppc: Clean up do_fri, (continued)
- [PULL 036/101] target/ppc: Clean up do_fri, Cédric Le Goater, 2021/12/16
- [PULL 056/101] target/ppc: Remove the software TLB model of 7450 CPUs, Cédric Le Goater, 2021/12/16
- [PULL 049/101] target/ppc: Add helpers for fadds, fsubs, fdivs, Cédric Le Goater, 2021/12/16
- [PULL 048/101] target/ppc: Add helper for fsqrts, Cédric Le Goater, 2021/12/16
- [PULL 051/101] target/ppc: Add helper for frsqrtes, Cédric Le Goater, 2021/12/16
- [PULL 046/101] softfloat: Add float64r32 arithmetic routines, Cédric Le Goater, 2021/12/16
- [PULL 055/101] target/ppc: Disable unused facilities in the e600 CPU, Cédric Le Goater, 2021/12/16
- [PULL 042/101] target/ppc: Use helper_todouble in do_frsp, Cédric Le Goater, 2021/12/16
- [PULL 052/101] target/ppc: Update fres to new flags and float64r32, Cédric Le Goater, 2021/12/16
- [PULL 061/101] ppc/ppc405: Change kernel load address, Cédric Le Goater, 2021/12/16
- [PULL 053/101] target/ppc: Use helper_todouble/tosingle in helper_xststdcsp,
Cédric Le Goater <=
- [PULL 068/101] ppc/ppc405: Remove flash support, Cédric Le Goater, 2021/12/16
- [PULL 077/101] target/ppc: fix xscvqpdp register access, Cédric Le Goater, 2021/12/16
- [PULL 038/101] target/ppc: Split out do_fmadd, Cédric Le Goater, 2021/12/16
- [PULL 040/101] target/ppc: Split out do_frsp, Cédric Le Goater, 2021/12/16
- [PULL 041/101] target/ppc: Update do_frsp for new flags, Cédric Le Goater, 2021/12/16
- [PULL 044/101] target/ppc: Update xsrqpi and xsrqpxp to new flags, Cédric Le Goater, 2021/12/16
- [PULL 045/101] target/ppc: Update fre to new flags, Cédric Le Goater, 2021/12/16
- [PULL 022/101] softfloat: Add flag specific to Inf * 0, Cédric Le Goater, 2021/12/16
- [PULL 032/101] target/ppc: Fix VXCVI return value, Cédric Le Goater, 2021/12/16
- [PULL 043/101] target/ppc: Update sqrt for new flags, Cédric Le Goater, 2021/12/16