[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PULL 073/101] ppc/ppc405: Fix bi_pci_enetaddr2 field in U-Boot board in
From: |
Cédric Le Goater |
Subject: |
[PULL 073/101] ppc/ppc405: Fix bi_pci_enetaddr2 field in U-Boot board information |
Date: |
Thu, 16 Dec 2021 21:25:46 +0100 |
The board information for the 405EP first appeared in commit 04f20795ac81
("Move PowerPC 405 specific definitions into a separate file ...")
An Ethernet address is a 6 byte number. Fix that.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20211206103712.1866296-14-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/ppc/ppc405.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/ppc405.h b/hw/ppc/ppc405.h
index 6fb8b41bbc77..83f156f585c8 100644
--- a/hw/ppc/ppc405.h
+++ b/hw/ppc/ppc405.h
@@ -57,7 +57,7 @@ struct ppc4xx_bd_info_t {
uint32_t bi_plb_busfreq;
uint32_t bi_pci_busfreq;
uint8_t bi_pci_enetaddr[6];
- uint32_t bi_pci_enetaddr2[6];
+ uint8_t bi_pci_enetaddr2[6]; /* PPC405EP specific */
uint32_t bi_opbfreq;
uint32_t bi_iic_fast[2];
};
--
2.31.1
- [PULL 080/101] Revert "target/ppc: Move SPR_DSISR setting to powerpc_excp", (continued)
- [PULL 080/101] Revert "target/ppc: Move SPR_DSISR setting to powerpc_excp", Cédric Le Goater, 2021/12/16
- [PULL 070/101] ppc/ppc405: Introduce ppc405_set_default_bootinfo(), Cédric Le Goater, 2021/12/16
- [PULL 078/101] target/ppc: move xscvqpdp to decodetree, Cédric Le Goater, 2021/12/16
- [PULL 065/101] ppc/ppc405: Drop flag parameter in ppc405_set_bootinfo(), Cédric Le Goater, 2021/12/16
- [PULL 081/101] target/ppc: introduce PMUEventType and PMU overflow timers, Cédric Le Goater, 2021/12/16
- [PULL 075/101] target/ppc: Fix xs{max, min}[cj]dp to use VSX registers, Cédric Le Goater, 2021/12/16
- [PULL 059/101] target/ppc: Set 601v exception model id, Cédric Le Goater, 2021/12/16
- [PULL 071/101] ppc/ppc405: Fix boot from kernel, Cédric Le Goater, 2021/12/16
- [PULL 063/101] ppc: Add trace-events for DCR accesses, Cédric Le Goater, 2021/12/16
- [PULL 069/101] ppc/ppc405: Rework FW load, Cédric Le Goater, 2021/12/16
- [PULL 073/101] ppc/ppc405: Fix bi_pci_enetaddr2 field in U-Boot board information,
Cédric Le Goater <=
- [PULL 076/101] target/ppc: Move xs{max,min}[cj]dp to decodetree, Cédric Le Goater, 2021/12/16
- [PULL 092/101] ppc/pnv: Move mapping of the PHB3 CQ regions under pnv_pbcq_realize(), Cédric Le Goater, 2021/12/16
- [PULL 087/101] target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) event, Cédric Le Goater, 2021/12/16
- [PULL 083/101] target/ppc: PMU: update counters on PMCs r/w, Cédric Le Goater, 2021/12/16
- [PULL 091/101] ppc/pnv: Drop the "num-phbs" property, Cédric Le Goater, 2021/12/16
- [PULL 096/101] ppc/pnv: Introduce a "chip" property under the PHB4 model, Cédric Le Goater, 2021/12/16
- [PULL 082/101] target/ppc: PMU basic cycle count for pseries TCG, Cédric Le Goater, 2021/12/16
- [PULL 074/101] ppc/ppc405: Add update of bi_procfreq field, Cédric Le Goater, 2021/12/16
- [PULL 072/101] ppc/ppc405: Change default PLL values at reset, Cédric Le Goater, 2021/12/16
- [PULL 066/101] ppc/ppc405: Change ppc405ep_init() return value, Cédric Le Goater, 2021/12/16