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[PULL 091/101] ppc/pnv: Drop the "num-phbs" property
From: |
Cédric Le Goater |
Subject: |
[PULL 091/101] ppc/pnv: Drop the "num-phbs" property |
Date: |
Thu, 16 Dec 2021 21:26:04 +0100 |
It is never used.
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20211213132830.108372-5-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
hw/ppc/pnv.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 3e43c53376c7..bbebd21d7522 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1771,7 +1771,6 @@ static Property pnv_chip_properties[] = {
DEFINE_PROP_UINT32("nr-cores", PnvChip, nr_cores, 1),
DEFINE_PROP_UINT64("cores-mask", PnvChip, cores_mask, 0x0),
DEFINE_PROP_UINT32("nr-threads", PnvChip, nr_threads, 1),
- DEFINE_PROP_UINT32("num-phbs", PnvChip, num_phbs, 0),
DEFINE_PROP_END_OF_LIST(),
};
--
2.31.1
- [PULL 075/101] target/ppc: Fix xs{max, min}[cj]dp to use VSX registers, (continued)
- [PULL 075/101] target/ppc: Fix xs{max, min}[cj]dp to use VSX registers, Cédric Le Goater, 2021/12/16
- [PULL 059/101] target/ppc: Set 601v exception model id, Cédric Le Goater, 2021/12/16
- [PULL 071/101] ppc/ppc405: Fix boot from kernel, Cédric Le Goater, 2021/12/16
- [PULL 063/101] ppc: Add trace-events for DCR accesses, Cédric Le Goater, 2021/12/16
- [PULL 069/101] ppc/ppc405: Rework FW load, Cédric Le Goater, 2021/12/16
- [PULL 073/101] ppc/ppc405: Fix bi_pci_enetaddr2 field in U-Boot board information, Cédric Le Goater, 2021/12/16
- [PULL 076/101] target/ppc: Move xs{max,min}[cj]dp to decodetree, Cédric Le Goater, 2021/12/16
- [PULL 092/101] ppc/pnv: Move mapping of the PHB3 CQ regions under pnv_pbcq_realize(), Cédric Le Goater, 2021/12/16
- [PULL 087/101] target/ppc/power8-pmu.c: add PM_RUN_INST_CMPL (0xFA) event, Cédric Le Goater, 2021/12/16
- [PULL 083/101] target/ppc: PMU: update counters on PMCs r/w, Cédric Le Goater, 2021/12/16
- [PULL 091/101] ppc/pnv: Drop the "num-phbs" property,
Cédric Le Goater <=
- [PULL 096/101] ppc/pnv: Introduce a "chip" property under the PHB4 model, Cédric Le Goater, 2021/12/16
- [PULL 082/101] target/ppc: PMU basic cycle count for pseries TCG, Cédric Le Goater, 2021/12/16
- [PULL 074/101] ppc/ppc405: Add update of bi_procfreq field, Cédric Le Goater, 2021/12/16
- [PULL 072/101] ppc/ppc405: Change default PLL values at reset, Cédric Le Goater, 2021/12/16
- [PULL 066/101] ppc/ppc405: Change ppc405ep_init() return value, Cédric Le Goater, 2021/12/16
- [PULL 067/101] ppc/ppc405: Add some address space definitions, Cédric Le Goater, 2021/12/16
- [PULL 088/101] PPC64/TCG: Implement 'rfebb' instruction, Cédric Le Goater, 2021/12/16
- [PULL 085/101] target/ppc: enable PMU counter overflow with cycle events, Cédric Le Goater, 2021/12/16
- [PULL 057/101] target/ppc: Fix MPCxxx FPU interrupt address, Cédric Le Goater, 2021/12/16
- [PULL 086/101] target/ppc: enable PMU instruction count, Cédric Le Goater, 2021/12/16