qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH] target/mips: Align vector registers to 16 bytes


From: Richard Henderson
Subject: Re: [PATCH] target/mips: Align vector registers to 16 bytes
Date: Fri, 17 Dec 2021 18:09:08 -0800
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.14.0

On 12/17/21 3:34 PM, Philippe Mathieu-Daudé wrote:
Align fpr_t to 16 bytes to be able to use the TCG "Generic"
vector operation expansion API from "tcg/tcg-op-gvec.h",
otherwise we trigger assertions in check_size_align().

See commits ec8e23e37f8 (s390x) and 11e2bfef799 (i386)
for similar justifications.

Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
---
  target/mips/cpu.h | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~



reply via email to

[Prev in Thread] Current Thread [Next in Thread]