[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [PATCH 00/15] ppc/ppc405: decade cleanup
|
From: |
Philippe Mathieu-Daudé |
|
Subject: |
Re: [PATCH 00/15] ppc/ppc405: decade cleanup |
|
Date: |
Mon, 20 Dec 2021 19:07:08 +0100 |
|
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.4.0 |
On 12/20/21 09:33, Cédric Le Goater wrote:
>>
>> Don't know if this is the reason of our problems but I think there is
>> something to investigate around timer interrupts:
>>
>>
>> / # cat /proc/interrupts
>> CPU0
>> 16: 68 UIC 1 Level serial
>> LOC: 0 Local timer interrupts for timer event device
>> LOC: 0 Local timer interrupts for others
>> SPU: 0 Spurious interrupts
>> PMI: 0 Performance monitoring interrupts
>> MCE: 0 Machine check exceptions
>>
>> Any idea what the problem can be ? How does QEMU generates timer
>> interrupts ?
>
> I did some archeology and fixed the 405 timer (PIT). Please see commits
> in :
>
> https://github.com/legoater/qemu/commits/ppc405
>
> but we are still getting segfaults. At some point /init tries to load from
> fffffe04 which is obviously wrong.
Fetching an u32 value from a missing ROM?
>
> Add -d int,mmu to have more info from QEMU internals.
>
> I have gathered some info on this page :
>
> https://github.com/legoater/qemu/wiki/ref405ep
>
> Thanks,
>
> C.
>
- Re: [PATCH 15/15] ppc/ppc405: Update U-Boot board information for hotfoot, (continued)
[PATCH 10/15] ppc/ppc405: Introduce ppc405_set_default_bootinfo(), Cédric Le Goater, 2021/12/06
[PATCH 12/15] ppc/ppc405: Change default PLL values at reset, Cédric Le Goater, 2021/12/06
Re: [PATCH 00/15] ppc/ppc405: decade cleanup, Cédric Le Goater, 2021/12/15