[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-ppc] [PATCH -V3 1/4] target-ppc: Update slb array with correct
From: |
Alexander Graf |
Subject: |
Re: [Qemu-ppc] [PATCH -V3 1/4] target-ppc: Update slb array with correct index values. |
Date: |
Sun, 25 Aug 2013 19:32:44 +0100 |
On 23.08.2013, at 06:20, Aneesh Kumar K.V wrote:
> From: "Aneesh Kumar K.V" <address@hidden>
>
> Without this, a value of rb=0 and rs=0 results in replacing the 0th
> index. This can be observed when using gdb remote debugging support.
>
> (gdb) x/10i do_fork
> 0xc000000000085330 <do_fork>: Cannot access memory at address
> 0xc000000000085330
> (gdb)
>
> This is because when we do the slb sync via kvm_cpu_synchronize_state,
> we overwrite the slb entry (0th entry) for 0xc000000000085330
>
> Signed-off-by: Aneesh Kumar K.V <address@hidden>
> ---
> target-ppc/kvm.c | 20 ++++++++++++++++++--
> 1 file changed, 18 insertions(+), 2 deletions(-)
>
> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> index 30a870e..6878af2 100644
> --- a/target-ppc/kvm.c
> +++ b/target-ppc/kvm.c
> @@ -1033,9 +1033,25 @@ int kvm_arch_get_registers(CPUState *cs)
>
> /* Sync SLB */
> #ifdef TARGET_PPC64
> + /*
> + * KVM_GET_SREGS doesn't return slb entry with slot information
> + * same as index. The ioctl zero fills the array and update only
> + * upto slb_max entries. We cannot depend on the slot value
> + * in the slbe field for update, because a zero slbe value would
> + * result in us wrongly updating the 0th index. Instead we zero fill
> + * the env->slb array first so that we mark all entries invalid and
> + * update with only valid SLB entries.
Still too negative. How about something like this:
/*
* The packed SLB array we get from KVM only contains information
* about valid entries. So we flush our internal copy to get rid of stale
* ones, then put all valid SLB entries back in.
*/
> + */
> + memset(env->slb, 0, 64 * sizeof(ppc_slb_t));
Can't we use ARRAY_SIZE here and below?
Alex
> for (i = 0; i < 64; i++) {
> - ppc_store_slb(env, sregs.u.s.ppc64.slb[i].slbe,
> - sregs.u.s.ppc64.slb[i].slbv);
> + target_ulong rb = sregs.u.s.ppc64.slb[i].slbe;
> + target_ulong rs = sregs.u.s.ppc64.slb[i].slbv;
> + /*
> + * Only restore valid entries
> + */
> + if (rb & SLB_ESID_V) {
> + ppc_store_slb(env, rb, rs);
> + }
> }
> #endif
>
> --
> 1.8.1.2
>
[Qemu-ppc] [PATCH -V3 1/4] target-ppc: Update slb array with correct index values., Aneesh Kumar K.V, 2013/08/23
- Re: [Qemu-ppc] [PATCH -V3 1/4] target-ppc: Update slb array with correct index values.,
Alexander Graf <=
[Qemu-ppc] [PATCH -V3 3/4] target-ppc: Check for error on address translation in memsave command, Aneesh Kumar K.V, 2013/08/23
[Qemu-ppc] [PATCH -V3 4/4] target-ppc: Use #define for max slb entries, Aneesh Kumar K.V, 2013/08/23