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[PATCH 12/76] target/arm: Drop tcg_temp_free from translator-mve.c
From: |
Richard Henderson |
Subject: |
[PATCH 12/76] target/arm: Drop tcg_temp_free from translator-mve.c |
Date: |
Fri, 24 Feb 2023 23:13:23 -1000 |
Translators are no longer required to free tcg temporaries.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate-mve.c | 52 --------------------------------------
1 file changed, 52 deletions(-)
diff --git a/target/arm/translate-mve.c b/target/arm/translate-mve.c
index db7ea3f603..798b4fddfe 100644
--- a/target/arm/translate-mve.c
+++ b/target/arm/translate-mve.c
@@ -178,7 +178,6 @@ static bool do_ldst(DisasContext *s, arg_VLDR_VSTR *a,
MVEGenLdStFn *fn,
qreg = mve_qreg_ptr(a->qd);
fn(cpu_env, qreg, addr);
- tcg_temp_free_ptr(qreg);
/*
* Writeback always happens after the last beat of the insn,
@@ -189,8 +188,6 @@ static bool do_ldst(DisasContext *s, arg_VLDR_VSTR *a,
MVEGenLdStFn *fn,
tcg_gen_addi_i32(addr, addr, offset);
}
store_reg(s, a->rn, addr);
- } else {
- tcg_temp_free_i32(addr);
}
mve_update_eci(s);
return true;
@@ -242,9 +239,6 @@ static bool do_ldst_sg(DisasContext *s, arg_vldst_sg *a,
MVEGenLdStSGFn fn)
qd = mve_qreg_ptr(a->qd);
qm = mve_qreg_ptr(a->qm);
fn(cpu_env, qd, qm, addr);
- tcg_temp_free_ptr(qd);
- tcg_temp_free_ptr(qm);
- tcg_temp_free_i32(addr);
mve_update_eci(s);
return true;
}
@@ -341,8 +335,6 @@ static bool do_ldst_sg_imm(DisasContext *s,
arg_vldst_sg_imm *a,
qd = mve_qreg_ptr(a->qd);
qm = mve_qreg_ptr(a->qm);
fn(cpu_env, qd, qm, tcg_constant_i32(offset));
- tcg_temp_free_ptr(qd);
- tcg_temp_free_ptr(qm);
mve_update_eci(s);
return true;
}
@@ -414,8 +406,6 @@ static bool do_vldst_il(DisasContext *s, arg_vldst_il *a,
MVEGenLdStIlFn *fn,
if (a->w) {
tcg_gen_addi_i32(rn, rn, addrinc);
store_reg(s, a->rn, rn);
- } else {
- tcg_temp_free_i32(rn);
}
mve_update_and_store_eci(s);
return true;
@@ -506,9 +496,7 @@ static bool trans_VDUP(DisasContext *s, arg_VDUP *a)
qd = mve_qreg_ptr(a->qd);
tcg_gen_dup_i32(a->size, rt, rt);
gen_helper_mve_vdup(cpu_env, qd, rt);
- tcg_temp_free_ptr(qd);
}
- tcg_temp_free_i32(rt);
mve_update_eci(s);
return true;
}
@@ -534,8 +522,6 @@ static bool do_1op_vec(DisasContext *s, arg_1op *a,
MVEGenOneOpFn fn,
qd = mve_qreg_ptr(a->qd);
qm = mve_qreg_ptr(a->qm);
fn(cpu_env, qd, qm);
- tcg_temp_free_ptr(qd);
- tcg_temp_free_ptr(qm);
}
mve_update_eci(s);
return true;
@@ -631,8 +617,6 @@ static bool do_vcvt_rmode(DisasContext *s, arg_1op *a,
qd = mve_qreg_ptr(a->qd);
qm = mve_qreg_ptr(a->qm);
fn(cpu_env, qd, qm, tcg_constant_i32(arm_rmode_to_sf(rmode)));
- tcg_temp_free_ptr(qd);
- tcg_temp_free_ptr(qm);
mve_update_eci(s);
return true;
}
@@ -821,9 +805,6 @@ static bool do_2op_vec(DisasContext *s, arg_2op *a,
MVEGenTwoOpFn fn,
qn = mve_qreg_ptr(a->qn);
qm = mve_qreg_ptr(a->qm);
fn(cpu_env, qd, qn, qm);
- tcg_temp_free_ptr(qd);
- tcg_temp_free_ptr(qn);
- tcg_temp_free_ptr(qm);
}
mve_update_eci(s);
return true;
@@ -1076,9 +1057,6 @@ static bool do_2op_scalar(DisasContext *s, arg_2scalar *a,
qn = mve_qreg_ptr(a->qn);
rm = load_reg(s, a->rm);
fn(cpu_env, qd, qn, rm);
- tcg_temp_free_i32(rm);
- tcg_temp_free_ptr(qd);
- tcg_temp_free_ptr(qn);
mve_update_eci(s);
return true;
}
@@ -1204,15 +1182,11 @@ static bool do_long_dual_acc(DisasContext *s,
arg_vmlaldav *a,
rdalo = load_reg(s, a->rdalo);
rdahi = load_reg(s, a->rdahi);
tcg_gen_concat_i32_i64(rda, rdalo, rdahi);
- tcg_temp_free_i32(rdalo);
- tcg_temp_free_i32(rdahi);
} else {
rda = tcg_const_i64(0);
}
fn(rda, cpu_env, qn, qm, rda);
- tcg_temp_free_ptr(qn);
- tcg_temp_free_ptr(qm);
rdalo = tcg_temp_new_i32();
rdahi = tcg_temp_new_i32();
@@ -1220,7 +1194,6 @@ static bool do_long_dual_acc(DisasContext *s,
arg_vmlaldav *a,
tcg_gen_extrh_i64_i32(rdahi, rda);
store_reg(s, a->rdalo, rdalo);
store_reg(s, a->rdahi, rdahi);
- tcg_temp_free_i64(rda);
mve_update_eci(s);
return true;
}
@@ -1312,8 +1285,6 @@ static bool do_dual_acc(DisasContext *s, arg_vmladav *a,
MVEGenDualAccOpFn *fn)
fn(rda, cpu_env, qn, qm, rda);
store_reg(s, a->rda, rda);
- tcg_temp_free_ptr(qn);
- tcg_temp_free_ptr(qm);
mve_update_eci(s);
return true;
@@ -1451,7 +1422,6 @@ static bool trans_VADDV(DisasContext *s, arg_VADDV *a)
qm = mve_qreg_ptr(a->qm);
fns[a->size][a->u](rda, cpu_env, qm, rda);
store_reg(s, a->rda, rda);
- tcg_temp_free_ptr(qm);
mve_update_eci(s);
return true;
@@ -1494,8 +1464,6 @@ static bool trans_VADDLV(DisasContext *s, arg_VADDLV *a)
rdalo = load_reg(s, a->rdalo);
rdahi = load_reg(s, a->rdahi);
tcg_gen_concat_i32_i64(rda, rdalo, rdahi);
- tcg_temp_free_i32(rdalo);
- tcg_temp_free_i32(rdahi);
} else {
/* Accumulate starting at zero */
rda = tcg_const_i64(0);
@@ -1507,7 +1475,6 @@ static bool trans_VADDLV(DisasContext *s, arg_VADDLV *a)
} else {
gen_helper_mve_vaddlv_s(rda, cpu_env, qm, rda);
}
- tcg_temp_free_ptr(qm);
rdalo = tcg_temp_new_i32();
rdahi = tcg_temp_new_i32();
@@ -1515,7 +1482,6 @@ static bool trans_VADDLV(DisasContext *s, arg_VADDLV *a)
tcg_gen_extrh_i64_i32(rdahi, rda);
store_reg(s, a->rdalo, rdalo);
store_reg(s, a->rdahi, rdahi);
- tcg_temp_free_i64(rda);
mve_update_eci(s);
return true;
}
@@ -1543,7 +1509,6 @@ static bool do_1imm(DisasContext *s, arg_1imm *a,
MVEGenOneOpImmFn *fn,
} else {
qd = mve_qreg_ptr(a->qd);
fn(cpu_env, qd, tcg_constant_i64(imm));
- tcg_temp_free_ptr(qd);
}
mve_update_eci(s);
return true;
@@ -1616,8 +1581,6 @@ static bool do_2shift_vec(DisasContext *s, arg_2shift *a,
MVEGenTwoOpShiftFn fn,
qd = mve_qreg_ptr(a->qd);
qm = mve_qreg_ptr(a->qm);
fn(cpu_env, qd, qm, tcg_constant_i32(shift));
- tcg_temp_free_ptr(qd);
- tcg_temp_free_ptr(qm);
}
mve_update_eci(s);
return true;
@@ -1723,8 +1686,6 @@ static bool do_2shift_scalar(DisasContext *s,
arg_shl_scalar *a,
qda = mve_qreg_ptr(a->qda);
rm = load_reg(s, a->rm);
fn(cpu_env, qda, qda, rm);
- tcg_temp_free_ptr(qda);
- tcg_temp_free_i32(rm);
mve_update_eci(s);
return true;
}
@@ -1868,7 +1829,6 @@ static bool trans_VSHLC(DisasContext *s, arg_VSHLC *a)
rdm = load_reg(s, a->rdm);
gen_helper_mve_vshlc(rdm, cpu_env, qd, rdm, tcg_constant_i32(a->imm));
store_reg(s, a->rdm, rdm);
- tcg_temp_free_ptr(qd);
mve_update_eci(s);
return true;
}
@@ -1898,7 +1858,6 @@ static bool do_vidup(DisasContext *s, arg_vidup *a,
MVEGenVIDUPFn *fn)
rn = load_reg(s, a->rn);
fn(rn, cpu_env, qd, rn, tcg_constant_i32(a->imm));
store_reg(s, a->rn, rn);
- tcg_temp_free_ptr(qd);
mve_update_eci(s);
return true;
}
@@ -1934,8 +1893,6 @@ static bool do_viwdup(DisasContext *s, arg_viwdup *a,
MVEGenVIWDUPFn *fn)
rm = load_reg(s, a->rm);
fn(rn, cpu_env, qd, rn, rm, tcg_constant_i32(a->imm));
store_reg(s, a->rn, rn);
- tcg_temp_free_ptr(qd);
- tcg_temp_free_i32(rm);
mve_update_eci(s);
return true;
}
@@ -2001,8 +1958,6 @@ static bool do_vcmp(DisasContext *s, arg_vcmp *a,
MVEGenCmpFn *fn)
qn = mve_qreg_ptr(a->qn);
qm = mve_qreg_ptr(a->qm);
fn(cpu_env, qn, qm);
- tcg_temp_free_ptr(qn);
- tcg_temp_free_ptr(qm);
if (a->mask) {
/* VPT */
gen_vpst(s, a->mask);
@@ -2034,8 +1989,6 @@ static bool do_vcmp_scalar(DisasContext *s,
arg_vcmp_scalar *a,
rm = load_reg(s, a->rm);
}
fn(cpu_env, qn, rm);
- tcg_temp_free_ptr(qn);
- tcg_temp_free_i32(rm);
if (a->mask) {
/* VPT */
gen_vpst(s, a->mask);
@@ -2138,7 +2091,6 @@ static bool do_vmaxv(DisasContext *s, arg_vmaxv *a,
MVEGenVADDVFn fn)
rda = load_reg(s, a->rda);
fn(rda, cpu_env, qm, rda);
store_reg(s, a->rda, rda);
- tcg_temp_free_ptr(qm);
mve_update_eci(s);
return true;
}
@@ -2203,8 +2155,6 @@ static bool do_vabav(DisasContext *s, arg_vabav *a,
MVEGenVABAVFn *fn)
rda = load_reg(s, a->rda);
fn(rda, cpu_env, qn, qm, rda);
store_reg(s, a->rda, rda);
- tcg_temp_free_ptr(qm);
- tcg_temp_free_ptr(qn);
mve_update_eci(s);
return true;
}
@@ -2297,12 +2247,10 @@ static bool trans_VMOV_from_2gp(DisasContext *s,
arg_VMOV_to_2gp *a)
if (!mve_skip_vmov(s, vd, a->idx, MO_32)) {
tmp = load_reg(s, a->rt);
write_neon_element32(tmp, vd, a->idx, MO_32);
- tcg_temp_free_i32(tmp);
}
if (!mve_skip_vmov(s, vd + 1, a->idx, MO_32)) {
tmp = load_reg(s, a->rt2);
write_neon_element32(tmp, vd + 1, a->idx, MO_32);
- tcg_temp_free_i32(tmp);
}
mve_update_and_store_eci(s);
--
2.34.1
- [PATCH 01/76] tcg: Remove tcg_check_temp_count, tcg_clear_temp_count, (continued)
- [PATCH 01/76] tcg: Remove tcg_check_temp_count, tcg_clear_temp_count, Richard Henderson, 2023/02/25
- [PATCH 04/76] target/arm: Remove arm_free_cc, a64_free_cc, Richard Henderson, 2023/02/25
- [PATCH 03/76] target/alpha: Drop tcg_temp_free, Richard Henderson, 2023/02/25
- [PATCH 05/76] target/arm: Remove value_global from DisasCompare, Richard Henderson, 2023/02/25
- [PATCH 06/76] target/arm: Drop tcg_temp_free from translator.c, Richard Henderson, 2023/02/25
- [PATCH 07/76] target/arm: Drop DisasContext.tmp_a64, Richard Henderson, 2023/02/25
- [PATCH 08/76] target/arm: Drop new_tmp_a64, Richard Henderson, 2023/02/25
- [PATCH 09/76] target/arm: Drop new_tmp_a64_zero, Richard Henderson, 2023/02/25
- [PATCH 10/76] target/arm: Drop tcg_temp_free from translator-a64.c, Richard Henderson, 2023/02/25
- [PATCH 11/76] target/arm: Drop tcg_temp_free from translator-m-nocp.c, Richard Henderson, 2023/02/25
- [PATCH 12/76] target/arm: Drop tcg_temp_free from translator-mve.c,
Richard Henderson <=
- [PATCH 13/76] target/arm: Drop tcg_temp_free from translator-neon.c, Richard Henderson, 2023/02/25
- [PATCH 14/76] target/arm: Drop tcg_temp_free from translator-sme.c, Richard Henderson, 2023/02/25
- [PATCH 15/76] target/arm: Drop tcg_temp_free from translator-sve.c, Richard Henderson, 2023/02/25
- [PATCH 16/76] target/arm: Drop tcg_temp_free from translator-vfp.c, Richard Henderson, 2023/02/25
- [PATCH 17/76] target/arm: Drop tcg_temp_free from translator.h, Richard Henderson, 2023/02/25
- [PATCH 18/76] target/avr: Drop DisasContext.free_skip_var0, Richard Henderson, 2023/02/25
- [PATCH 19/76] target/avr: Drop R from trans_COM, Richard Henderson, 2023/02/25
- [PATCH 20/76] target/avr: Drop tcg_temp_free, Richard Henderson, 2023/02/25
- [PATCH 21/76] target/cris: Drop cris_alu_free_temps, Richard Henderson, 2023/02/25
- [PATCH 22/76] target/cris: Drop cris_alu_m_free_temps, Richard Henderson, 2023/02/25