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RE: [PATCH 19/70] target/hexagon/idef-parser: Use gen_constant for gen_e
From: |
Taylor Simpson |
Subject: |
RE: [PATCH 19/70] target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op |
Date: |
Mon, 27 Feb 2023 21:55:08 +0000 |
> -----Original Message-----
> From: Richard Henderson <richard.henderson@linaro.org>
> Sent: Sunday, February 26, 2023 10:42 PM
> To: qemu-devel@nongnu.org
> Cc: qemu-arm@nongnu.org; qemu-ppc@nongnu.org; qemu-
> riscv@nongnu.org; qemu-s390x@nongnu.org; jcmvbkbc@gmail.com;
> kbastian@mail.uni-paderborn.de; ysato@users.sourceforge.jp;
> gaosong@loongson.cn; jiaxun.yang@flygoat.com; Taylor Simpson
> <tsimpson@quicinc.com>; ale@rev.ng; mrolnik@gmail.com;
> edgar.iglesias@gmail.com
> Subject: [PATCH 19/70] target/hexagon/idef-parser: Use gen_constant for
> gen_extend_tcg_width_op
>
> We already have a temporary, res, which we can use for the intermediate
> shift result. Simplify the constant to -1 instead of 0xf*f.
> This was the last use of gen_tmp_value, so remove it.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> target/hexagon/idef-parser/parser-helpers.c | 30 +++------------------
> 1 file changed, 3 insertions(+), 27 deletions(-)
>
> diff --git a/target/hexagon/idef-parser/parser-helpers.c
> b/target/hexagon/idef-parser/parser-helpers.c
> index c0e6f2190c..e1a55412c8 100644
> --- a/target/hexagon/idef-parser/parser-helpers.c
> +++ b/target/hexagon/idef-parser/parser-helpers.c
> @@ -1120,15 +1100,11 @@ static
> HexValue gen_extend_tcg_width_op(Context *c,
> OUT(c, locp, "tcg_gen_subfi_i", &dst_width);
> OUT(c, locp, "(", &shift, ", ", &dst_width, ", ", &src_width_m, ");\n");
> if (signedness == UNSIGNED) {
> - const char *mask_str = (dst_width == 32)
> - ? "0xffffffff"
> - : "0xffffffffffffffff";
> - HexValue mask = gen_tmp_value(c, locp, mask_str,
> - dst_width, UNSIGNED);
> + HexValue mask = gen_constant(c, locp, "-1", dst_width,
> + UNSIGNED);
> OUT(c, locp, "tcg_gen_shr_i", &dst_width, "(",
> - &mask, ", ", &mask, ", ", &shift, ");\n");
> + &res, ", ", &mask, ", ", &shift, ");\n");
> OUT(c, locp, "tcg_gen_and_i", &dst_width, "(",
> - &res, ", ", value, ", ", &mask, ");\n");
> + &res, ", ", &res, ", ", value, ");\n");
What's the advantage of putting the result of the tcg_gen_shr into res instead
of mask? Is there something in TCG code generation that takes advantage?
> } else {
> OUT(c, locp, "tcg_gen_shl_i", &dst_width, "(",
> &res, ", ", value, ", ", &shift, ");\n");
- [PATCH 12/70] target/avr: Avoid use of tcg_const_i32 in SBIC, SBIS, (continued)
- [PATCH 12/70] target/avr: Avoid use of tcg_const_i32 in SBIC, SBIS, Richard Henderson, 2023/02/27
- [PATCH 13/70] target/avr: Avoid use of tcg_const_i32 throughout, Richard Henderson, 2023/02/27
- [PATCH 14/70] target/cris: Avoid use of tcg_const_i32 throughout, Richard Henderson, 2023/02/27
- [PATCH 15/70] target/hexagon: Use tcg_constant_* for gen_constant_from_imm, Richard Henderson, 2023/02/27
- [PATCH 16/70] target/hexagon/idef-parser: Use gen_tmp for LPCFG, Richard Henderson, 2023/02/27
- [PATCH 17/70] target/hexagon/idef-parser: Use gen_tmp for gen_pred_assign, Richard Henderson, 2023/02/27
- [PATCH 19/70] target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op, Richard Henderson, 2023/02/27
- RE: [PATCH 19/70] target/hexagon/idef-parser: Use gen_constant for gen_extend_tcg_width_op,
Taylor Simpson <=
- [PATCH 18/70] target/hexagon/idef-parser: Use gen_tmp for gen_rvalue_pred, Richard Henderson, 2023/02/27
- [PATCH 20/70] target/hppa: Avoid tcg_const_i64 in trans_fid_f, Richard Henderson, 2023/02/27
- [PATCH 21/70] target/hppa: Avoid use of tcg_const_i32 throughout, Richard Henderson, 2023/02/27
- [PATCH 24/70] target/m68k: Reject immediate as destination in gen_ea_mode, Richard Henderson, 2023/02/27
- [PATCH 22/70] target/i386: Simplify POPF, Richard Henderson, 2023/02/27
- [PATCH 26/70] target/m68k: Avoid tcg_const_i32 when modified, Richard Henderson, 2023/02/27