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[PATCH 23/42] tcg/arm: Use TCGType not bool is_64 in tcg_out_qemu_{ld, s
From: |
Richard Henderson |
Subject: |
[PATCH 23/42] tcg/arm: Use TCGType not bool is_64 in tcg_out_qemu_{ld, st} |
Date: |
Fri, 7 Apr 2023 19:42:55 -0700 |
We need to set this in TCGLabelQemuLdst, so plumb this
all the way through from tcg_out_op.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/arm/tcg-target.c.inc | 28 +++++++++++++++-------------
1 file changed, 15 insertions(+), 13 deletions(-)
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index bad1e6d399..9bf831223a 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -1526,15 +1526,17 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg
addrlo, TCGReg addrhi,
/* Record the context of a call to the out of line helper code for the slow
path for a load or store, so that we can later generate the correct
helper code. */
-static void add_qemu_ldst_label(TCGContext *s, bool is_ld, MemOpIdx oi,
- TCGReg datalo, TCGReg datahi, TCGReg addrlo,
- TCGReg addrhi, tcg_insn_unit *raddr,
+static void add_qemu_ldst_label(TCGContext *s, bool is_ld, TCGType type,
+ MemOpIdx oi, TCGReg datalo, TCGReg datahi,
+ TCGReg addrlo, TCGReg addrhi,
+ tcg_insn_unit *raddr,
tcg_insn_unit *label_ptr)
{
TCGLabelQemuLdst *label = new_ldst_label(s);
label->is_ld = is_ld;
label->oi = oi;
+ label->type = type;
label->datalo_reg = datalo;
label->datahi_reg = datahi;
label->addrlo_reg = addrlo;
@@ -1788,7 +1790,7 @@ static void tcg_out_qemu_ld_direct(TCGContext *s, MemOp
opc, TCGReg datalo,
}
#endif
-static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, bool is64)
+static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args, TCGType d_type)
{
TCGReg addrlo, datalo, datahi, addrhi __attribute__((unused));
MemOpIdx oi;
@@ -1802,7 +1804,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, bool is64)
#endif
datalo = *args++;
- datahi = (is64 ? *args++ : 0);
+ datahi = (d_type == TCG_TYPE_I32 ? 0 : *args++);
addrlo = *args++;
addrhi = (TARGET_LONG_BITS == 64 ? *args++ : 0);
oi = *args++;
@@ -1819,7 +1821,7 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg
*args, bool is64)
tcg_out_qemu_ld_index(s, opc, datalo, datahi, addrlo, addend, true);
- add_qemu_ldst_label(s, true, oi, datalo, datahi, addrlo, addrhi,
+ add_qemu_ldst_label(s, true, oi, d_type, datalo, datahi, addrlo, addrhi,
s->code_ptr, label_ptr);
#else /* !CONFIG_SOFTMMU */
a_bits = get_alignment_bits(opc);
@@ -1910,7 +1912,7 @@ static void tcg_out_qemu_st_direct(TCGContext *s, MemOp
opc, TCGReg datalo,
}
#endif
-static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, bool is64)
+static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args, TCGType d_type)
{
TCGReg addrlo, datalo, datahi, addrhi __attribute__((unused));
MemOpIdx oi;
@@ -1924,7 +1926,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg
*args, bool is64)
#endif
datalo = *args++;
- datahi = (is64 ? *args++ : 0);
+ datahi = (d_type == TCG_TYPE_I32 ? 0 : *args++);
addrlo = *args++;
addrhi = (TARGET_LONG_BITS == 64 ? *args++ : 0);
oi = *args++;
@@ -1941,7 +1943,7 @@ static void tcg_out_qemu_st(TCGContext *s, const TCGArg
*args, bool is64)
label_ptr = s->code_ptr;
tcg_out_bl_imm(s, COND_NE, 0);
- add_qemu_ldst_label(s, false, oi, datalo, datahi, addrlo, addrhi,
+ add_qemu_ldst_label(s, false, oi, d_type, datalo, datahi, addrlo, addrhi,
s->code_ptr, label_ptr);
#else /* !CONFIG_SOFTMMU */
a_bits = get_alignment_bits(opc);
@@ -2237,16 +2239,16 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
break;
case INDEX_op_qemu_ld_i32:
- tcg_out_qemu_ld(s, args, 0);
+ tcg_out_qemu_ld(s, args, TCG_TYPE_I32);
break;
case INDEX_op_qemu_ld_i64:
- tcg_out_qemu_ld(s, args, 1);
+ tcg_out_qemu_ld(s, args, TCG_TYPE_I64);
break;
case INDEX_op_qemu_st_i32:
- tcg_out_qemu_st(s, args, 0);
+ tcg_out_qemu_st(s, args, TCG_TYPE_I32);
break;
case INDEX_op_qemu_st_i64:
- tcg_out_qemu_st(s, args, 1);
+ tcg_out_qemu_st(s, args, TCG_TYPE_I64);
break;
case INDEX_op_bswap16_i32:
--
2.34.1
- [PATCH 17/42] tcg: Introduce tcg_out_xchg, (continued)
- [PATCH 17/42] tcg: Introduce tcg_out_xchg, Richard Henderson, 2023/04/07
- [PATCH 18/42] tcg: Introduce tcg_out_movext2, Richard Henderson, 2023/04/07
- [PATCH 19/42] tcg: Clear TCGLabelQemuLdst on allocation, Richard Henderson, 2023/04/07
- [PATCH 20/42] tcg/i386: Use TCGType not bool is_64 in tcg_out_qemu_{ld, st}, Richard Henderson, 2023/04/07
- [PATCH 21/42] tcg/aarch64: Rename ext to d_type in tcg_out_qemu_ld, Richard Henderson, 2023/04/07
- [PATCH 22/42] tcg/aarch64: Pass TGType to tcg_out_qemu_st, Richard Henderson, 2023/04/07
- [PATCH 23/42] tcg/arm: Use TCGType not bool is_64 in tcg_out_qemu_{ld, st},
Richard Henderson <=
- [PATCH 24/42] tcg/i386: Use TCGType not bool is_64 in tcg_out_qemu_{ld, st}, Richard Henderson, 2023/04/07
- [PATCH 25/42] tcg/ppc: Use TCGType not bool is_64 in tcg_out_qemu_{ld, st}, Richard Henderson, 2023/04/07
- [PATCH 26/42] tcg/s390x: Pass TCGType to tcg_out_qemu_{ld,st}, Richard Henderson, 2023/04/07
- [PATCH 28/42] tcg/riscv: Expand arguments to tcg_out_qemu_{ld,st}, Richard Henderson, 2023/04/07
- [PATCH 27/42] tcg/riscv: Require TCG_TARGET_REG_BITS == 64, Richard Henderson, 2023/04/07
- [PATCH 29/42] tcg: Move TCGLabelQemuLdst to tcg.c, Richard Henderson, 2023/04/07
- [PATCH 30/42] tcg: Introduce tcg_out_ld_helper_args, Richard Henderson, 2023/04/07