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Re: [PATCH v3 12/16] target/riscv: Expose riscv_cpu_pending_to_irq() fro
From: |
Alistair Francis |
Subject: |
Re: [PATCH v3 12/16] target/riscv: Expose riscv_cpu_pending_to_irq() from cpu_helper.c |
Date: |
Wed, 19 Jul 2023 11:04:53 +1000 |
On Tue, Jul 11, 2023 at 10:22 PM Philippe Mathieu-Daudé
<philmd@linaro.org> wrote:
>
> We want to extract TCG/sysemu-specific code from cpu_helper.c,
> but some functions call riscv_cpu_pending_to_irq(). Expose the
> prototype in "internals.h".
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/riscv/internals.h | 4 ++++
> target/riscv/cpu_helper.c | 6 +++---
> 2 files changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/target/riscv/internals.h b/target/riscv/internals.h
> index b5f823c7ec..b6881b4815 100644
> --- a/target/riscv/internals.h
> +++ b/target/riscv/internals.h
> @@ -72,6 +72,10 @@ target_ulong fclass_d(uint64_t frs1);
>
> #ifndef CONFIG_USER_ONLY
> extern const VMStateDescription vmstate_riscv_cpu;
> +
> +int riscv_cpu_pending_to_irq(CPURISCVState *env,
> + int extirq, unsigned int extirq_def_prio,
> + uint64_t pending, uint8_t *iprio);
> #endif
>
> enum {
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 6c773000a5..e73cf56e5c 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -256,9 +256,9 @@ uint8_t riscv_cpu_default_priority(int irq)
> return default_iprio[irq] ? default_iprio[irq] : IPRIO_MMAXIPRIO;
> };
>
> -static int riscv_cpu_pending_to_irq(CPURISCVState *env,
> - int extirq, unsigned int extirq_def_prio,
> - uint64_t pending, uint8_t *iprio)
> +int riscv_cpu_pending_to_irq(CPURISCVState *env,
> + int extirq, unsigned int extirq_def_prio,
> + uint64_t pending, uint8_t *iprio)
> {
> int irq, best_irq = RISCV_EXCP_NONE;
> unsigned int prio, best_prio = UINT_MAX;
> --
> 2.38.1
>
>
- Re: [PATCH v3 08/16] target/riscv: Move TCG-specific cpu_get_tb_cpu_state() to tcg/cpu.c, (continued)
- [PATCH v3 07/16] target/riscv: Move TCG-specific files to target/riscv/tcg/, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 10/16] target/riscv: Extract TCG-specific code from debug.c, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 09/16] target/riscv: Expose some 'trigger' prototypes from debug.c, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 11/16] target/riscv: Move sysemu-specific debug files to target/riscv/sysemu/, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 12/16] target/riscv: Expose riscv_cpu_pending_to_irq() from cpu_helper.c, Philippe Mathieu-Daudé, 2023/07/11
- Re: [PATCH v3 12/16] target/riscv: Expose riscv_cpu_pending_to_irq() from cpu_helper.c,
Alistair Francis <=
- [RFC PATCH v3 13/16] target/riscv: Move TCG/sysemu-specific code to tcg/sysemu/cpu_helper.c, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 14/16] target/riscv: Move sysemu-specific code to sysemu/cpu_helper.c, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 15/16] target/riscv: Restrict TCG-specific prototype declarations, Philippe Mathieu-Daudé, 2023/07/11
- [PATCH v3 16/16] gitlab-ci.d/crossbuilds: Add KVM riscv64 cross-build jobs, Philippe Mathieu-Daudé, 2023/07/11