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Re: [PATCH v2 4/6] qemu/bitops.h: Add MAKE_32BIT_MASK macro


From: LIU Zhiwei
Subject: Re: [PATCH v2 4/6] qemu/bitops.h: Add MAKE_32BIT_MASK macro
Date: Thu, 12 Oct 2023 16:51:30 +0800
User-agent: Mozilla Thunderbird


On 2023/10/11 22:45, Rob Bradford wrote:
Add 32-bit version of mask generating macro and use it in the RISC-V PMU
code.
CC Richard
Signed-off-by: Rob Bradford <rbradford@rivosinc.com>
---
  include/qemu/bitops.h | 3 +++
  target/riscv/pmu.c    | 2 --
  2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h
index cb3526d1f4..9b25b2d5e4 100644
--- a/include/qemu/bitops.h
+++ b/include/qemu/bitops.h
@@ -25,6 +25,9 @@
  #define BIT_WORD(nr)            ((nr) / BITS_PER_LONG)
  #define BITS_TO_LONGS(nr)       DIV_ROUND_UP(nr, BITS_PER_BYTE * sizeof(long))
+#define MAKE_32BIT_MASK(shift, length) \
+    (((uint32_t)(~0UL) >> (32 - (length))) << (shift))
+
  #define MAKE_64BIT_MASK(shift, length) \
      (((~0ULL) >> (64 - (length))) << (shift))
diff --git a/target/riscv/pmu.c b/target/riscv/pmu.c
index 7ddf4977b1..360c76f63e 100644
--- a/target/riscv/pmu.c
+++ b/target/riscv/pmu.c
@@ -24,8 +24,6 @@
  #include "sysemu/device_tree.h"
#define RISCV_TIMEBASE_FREQ 1000000000 /* 1Ghz */
-#define MAKE_32BIT_MASK(shift, length) \
-        (((uint32_t)(~0UL) >> (32 - (length))) << (shift))

We can always use the MAKE_64BIT_MASK instead of MAKE_32BIT_MASK.  And MAKE_32BIT_MASK only used in target/riscv. I am not sure  whether this patch will be accepted.

Acked-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>

Zhiwei

  /*
   * To keep it simple, any event can be mapped to any programmable counters in



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