Re: [PATCH v9 01/23] target/riscv: Move MISA limits to class

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Re: [PATCH v9 01/23] target/riscv: Move MISA limits to class

From:	Akihiko Odaki
Subject:	Re: [PATCH v9 01/23] target/riscv: Move MISA limits to class
Date:	Fri, 13 Oct 2023 06:04:38 +0900
User-agent:	Mozilla Thunderbird

On 2023/10/13 4:10, Daniel Henrique Barboza wrote:



On 10/11/23 04:02, Akihiko Odaki wrote:

MISA limits are common for all instances of a RISC-V CPU class so they
are better put into class.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
---

This patch and patches 2 and 3 from this version (v9) got dropped fromthe later

versions of the series. Can I assume they're not relevant anymore?


Yes, they are replaced with patches in the following series:
https://patchew.org/QEMU/20231012054223.37870-1-akihiko.odaki@daynix.com/

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[PATCH v9 01/23] target/riscv: Move MISA limits to class, Akihiko Odaki, 2023/10/11
- Re: [PATCH v9 01/23] target/riscv: Move MISA limits to class, Alex Bennée, 2023/10/11
  - Re: [PATCH v9 01/23] target/riscv: Move MISA limits to class, Akihiko Odaki, 2023/10/12
- Re: [PATCH v9 01/23] target/riscv: Move MISA limits to class, Alex Bennée, 2023/10/11
- Re: [PATCH v9 01/23] target/riscv: Move MISA limits to class, Daniel Henrique Barboza, 2023/10/12
  - Re: [PATCH v9 01/23] target/riscv: Move MISA limits to class, Akihiko Odaki <=

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